arch/cris/arch-v32/kernel/smp.c

   1 #include <asm/delay.h>
   2 #include <asm/arch/irq.h>
   3 #include <asm/arch/hwregs/intr_vect.h>
   4 #include <asm/arch/hwregs/intr_vect_defs.h>
   5 #include <asm/tlbflush.h>
   6 #include <asm/mmu_context.h>
   7 #include <asm/arch/hwregs/mmu_defs_asm.h>
   8 #include <asm/arch/hwregs/supp_reg.h>
   9 #include <asm/atomic.h>
  10
  11 #include <linux/err.h>
  12 #include <linux/init.h>
  13 #include <linux/timex.h>
  14 #include <linux/sched.h>
  15 #include <linux/kernel.h>
  16 #include <linux/cpumask.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19
  20 #define IPI_SCHEDULE 1
  21 #define IPI_CALL 2
  22 #define IPI_FLUSH_TLB 4
  23
  24 #define FLUSH_ALL (void*)0xffffffff
  25
  26 /* Vector of locks used for various atomic operations */
  27 spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
  28
  29 /* CPU masks */
  30 cpumask_t cpu_online_map = CPU_MASK_NONE;
  31 cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
  32 EXPORT_SYMBOL(phys_cpu_present_map);
  33
  34 /* Variables used during SMP boot */
  35 volatile int cpu_now_booting = 0;
  36 volatile struct thread_info *smp_init_current_idle_thread;
  37
  38 /* Variables used during IPI */
  39 static DEFINE_SPINLOCK(call_lock);
  40 static DEFINE_SPINLOCK(tlbstate_lock);
  41
  42 struct call_data_struct {
  43         void (*func) (void *info);
  44         void *info;
  45         int wait;
  46 };
  47
  48 static struct call_data_struct * call_data;
  49
  50 static struct mm_struct* flush_mm;
  51 static struct vm_area_struct* flush_vma;
  52 static unsigned long flush_addr;
  53
  54 extern int setup_irq(int, struct irqaction *);
  55
  56 /* Mode registers */
  57 static unsigned long irq_regs[NR_CPUS] =
  58 {
  59   regi_irq,
  60   regi_irq2
  61 };
  62
  63 static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  64 static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
  65 static struct irqaction irq_ipi  = { crisv32_ipi_interrupt, IRQF_DISABLED,
  66                                      CPU_MASK_NONE, "ipi", NULL, NULL};
  67
  68 extern void cris_mmu_init(void);
  69 extern void cris_timer_init(void);
  70
  71 /* SMP initialization */
  72 void __init smp_prepare_cpus(unsigned int max_cpus)
  73 {
  74         int i;
  75
  76         /* From now on we can expect IPIs so set them up */
  77         setup_irq(IPI_INTR_VECT, &irq_ipi);
  78
  79         /* Mark all possible CPUs as present */
  80         for (i = 0; i < max_cpus; i++)
  81             cpu_set(i, phys_cpu_present_map);
  82 }
  83
  84 void __devinit smp_prepare_boot_cpu(void)
  85 {
  86         /* PGD pointer has moved after per_cpu initialization so
  87          * update the MMU.
  88          */
  89         pgd_t **pgd;
  90         pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
  91
  92         SUPP_BANK_SEL(1);
  93         SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
  94         SUPP_BANK_SEL(2);
  95         SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
  96
  97         cpu_set(0, cpu_online_map);
  98         cpu_set(0, phys_cpu_present_map);
  99 }
 100
 101 void __init smp_cpus_done(unsigned int max_cpus)
 102 {
 103 }
 104
 105 /* Bring one cpu online.*/
 106 static int __init
 107 smp_boot_one_cpu(int cpuid)
 108 {
 109         unsigned timeout;
 110         struct task_struct *idle;
 111
 112         idle = fork_idle(cpuid);
 113         if (IS_ERR(idle))
 114                 panic("SMP: fork failed for CPU:%d", cpuid);
 115
 116         task_thread_info(idle)->cpu = cpuid;
 117
 118         /* Information to the CPU that is about to boot */
 119         smp_init_current_idle_thread = task_thread_info(idle);
 120         cpu_now_booting = cpuid;
 121
 122         /* Wait for CPU to come online */
 123         for (timeout = 0; timeout < 10000; timeout++) {
 124                 if(cpu_online(cpuid)) {
 125                         cpu_now_booting = 0;
 126                         smp_init_current_idle_thread = NULL;
 127                         return 0; /* CPU online */
 128                 }
 129                 udelay(100);
 130                 barrier();
 131         }
 132
 133         put_task_struct(idle);
 134         idle = NULL;
 135
 136         printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
 137         return -1;
 138 }
 139
 140 /* Secondary CPUs starts uing C here. Here we need to setup CPU
 141  * specific stuff such as the local timer and the MMU. */
 142 void __init smp_callin(void)
 143 {
 144         extern void cpu_idle(void);
 145
 146         int cpu = cpu_now_booting;
 147         reg_intr_vect_rw_mask vect_mask = {0};
 148
 149         /* Initialise the idle task for this CPU */
 150         atomic_inc(&init_mm.mm_count);
 151         current->active_mm = &init_mm;
 152
 153         /* Set up MMU */
 154         cris_mmu_init();
 155         __flush_tlb_all();
 156
 157         /* Setup local timer. */
 158         cris_timer_init();
 159
 160         /* Enable IRQ and idle */
 161         REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
 162         unmask_irq(IPI_INTR_VECT);
 163         unmask_irq(TIMER_INTR_VECT);
 164         preempt_disable();
 165         local_irq_enable();
 166
 167         cpu_set(cpu, cpu_online_map);
 168         cpu_idle();
 169 }
 170
 171 /* Stop execution on this CPU.*/
 172 void stop_this_cpu(void* dummy)
 173 {
 174         local_irq_disable();
 175         asm volatile("halt");
 176 }
 177
 178 /* Other calls */
 179 void smp_send_stop(void)
 180 {
 181         smp_call_function(stop_this_cpu, NULL, 1, 0);
 182 }
 183
 184 int setup_profiling_timer(unsigned int multiplier)
 185 {
 186         return -EINVAL;
 187 }
 188
 189
 190 /* cache_decay_ticks is used by the scheduler to decide if a process
 191  * is "hot" on one CPU. A higher value means a higher penalty to move
 192  * a process to another CPU. Our cache is rather small so we report
 193  * 1 tick.
 194  */
 195 unsigned long cache_decay_ticks = 1;
 196
 197 int __devinit __cpu_up(unsigned int cpu)
 198 {
 199         smp_boot_one_cpu(cpu);
 200         return cpu_online(cpu) ? 0 : -ENOSYS;
 201 }
 202
 203 void smp_send_reschedule(int cpu)
 204 {
 205         cpumask_t cpu_mask = CPU_MASK_NONE;
 206         cpu_set(cpu, cpu_mask);
 207         send_ipi(IPI_SCHEDULE, 0, cpu_mask);
 208 }
 209
 210 /* TLB flushing
 211  *
 212  * Flush needs to be done on the local CPU and on any other CPU that
 213  * may have the same mapping. The mm->cpu_vm_mask is used to keep track
 214  * of which CPUs that a specific process has been executed on.
 215  */
 216 void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
 217 {
 218         unsigned long flags;
 219         cpumask_t cpu_mask;
 220
 221         spin_lock_irqsave(&tlbstate_lock, flags);
 222         cpu_mask = (mm == FLUSH_ALL ? CPU_MASK_ALL : mm->cpu_vm_mask);
 223         cpu_clear(smp_processor_id(), cpu_mask);
 224         flush_mm = mm;
 225         flush_vma = vma;
 226         flush_addr = addr;
 227         send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
 228         spin_unlock_irqrestore(&tlbstate_lock, flags);
 229 }
 230
 231 void flush_tlb_all(void)
 232 {
 233         __flush_tlb_all();
 234         flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
 235 }
 236
 237 void flush_tlb_mm(struct mm_struct *mm)
 238 {
 239         __flush_tlb_mm(mm);
 240         flush_tlb_common(mm, FLUSH_ALL, 0);
 241         /* No more mappings in other CPUs */
 242         cpus_clear(mm->cpu_vm_mask);
 243         cpu_set(smp_processor_id(), mm->cpu_vm_mask);
 244 }
 245
 246 void flush_tlb_page(struct vm_area_struct *vma,
 247                            unsigned long addr)
 248 {
 249         __flush_tlb_page(vma, addr);
 250         flush_tlb_common(vma->vm_mm, vma, addr);
 251 }
 252
 253 /* Inter processor interrupts
 254  *
 255  * The IPIs are used for:
 256  *   * Force a schedule on a CPU
 257  *   * FLush TLB on other CPUs
 258  *   * Call a function on other CPUs
 259  */
 260
 261 int send_ipi(int vector, int wait, cpumask_t cpu_mask)
 262 {
 263         int i = 0;
 264         reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
 265         int ret = 0;
 266
 267         /* Calculate CPUs to send to. */
 268         cpus_and(cpu_mask, cpu_mask, cpu_online_map);
 269
 270         /* Send the IPI. */
 271         for_each_cpu_mask(i, cpu_mask)
 272         {
 273                 ipi.vector |= vector;
 274                 REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
 275         }
 276
 277         /* Wait for IPI to finish on other CPUS */
 278         if (wait) {
 279                 for_each_cpu_mask(i, cpu_mask) {
 280                         int j;
 281                         for (j = 0 ; j < 1000; j++) {
 282                                 ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
 283                                 if (!ipi.vector)
 284                                         break;
 285                                 udelay(100);
 286                         }
 287
 288                         /* Timeout? */
 289                         if (ipi.vector) {
 290                                 printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
 291                                 ret = -ETIMEDOUT;
 292                                 dump_stack();
 293                         }
 294                 }
 295         }
 296         return ret;
 297 }
 298
 299 /*
 300  * You must not call this function with disabled interrupts or from a
 301  * hardware interrupt handler or from a bottom half handler.
 302  */
 303 int smp_call_function(void (*func)(void *info), void *info,
 304                       int nonatomic, int wait)
 305 {
 306         cpumask_t cpu_mask = CPU_MASK_ALL;
 307         struct call_data_struct data;
 308         int ret;
 309
 310         cpu_clear(smp_processor_id(), cpu_mask);
 311
 312         WARN_ON(irqs_disabled());
 313
 314         data.func = func;
 315         data.info = info;
 316         data.wait = wait;
 317
 318         spin_lock(&call_lock);
 319         call_data = &data;
 320         ret = send_ipi(IPI_CALL, wait, cpu_mask);
 321         spin_unlock(&call_lock);
 322
 323         return ret;
 324 }
 325
 326 irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 327 {
 328         void (*func) (void *info) = call_data->func;
 329         void *info = call_data->info;
 330         reg_intr_vect_rw_ipi ipi;
 331
 332         ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
 333
 334         if (ipi.vector & IPI_CALL) {
 335                  func(info);
 336         }
 337         if (ipi.vector & IPI_FLUSH_TLB) {
 338                      if (flush_mm == FLUSH_ALL)
 339                          __flush_tlb_all();
 340                      else if (flush_vma == FLUSH_ALL)
 341                         __flush_tlb_mm(flush_mm);
 342                      else
 343                         __flush_tlb_page(flush_vma, flush_addr);
 344         }
 345
 346         ipi.vector = 0;
 347         REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
 348
 349         return IRQ_HANDLED;
 350 }
 351