2 * Support for the GPIO/IRQ expander chips present on several HTC phones.
3 * These are implemented in CPLD chips present on the board.
5 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
8 * This file may be distributed under the terms of the GNU GPL license.
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
16 #include <linux/spinlock.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/module.h>
20 #include <linux/mfd/htc-egpio.h>
27 struct gpio_chip chip
;
34 void __iomem
*base_addr
;
35 int bus_shift
; /* byte shift */
36 int reg_shift
; /* bit shift */
48 struct egpio_chip
*chip
;
52 static inline void egpio_writew(u16 value
, struct egpio_info
*ei
, int reg
)
54 writew(value
, ei
->base_addr
+ (reg
<< ei
->bus_shift
));
57 static inline u16
egpio_readw(struct egpio_info
*ei
, int reg
)
59 return readw(ei
->base_addr
+ (reg
<< ei
->bus_shift
));
66 static inline void ack_irqs(struct egpio_info
*ei
)
68 egpio_writew(ei
->ack_write
, ei
, ei
->ack_register
);
69 pr_debug("EGPIO ack - write %x to base+%x\n",
70 ei
->ack_write
, ei
->ack_register
<< ei
->bus_shift
);
73 static void egpio_ack(struct irq_data
*data
)
77 /* There does not appear to be a way to proactively mask interrupts
78 * on the egpio chip itself. So, we simply ignore interrupts that
80 static void egpio_mask(struct irq_data
*data
)
82 struct egpio_info
*ei
= irq_data_get_irq_chip_data(data
);
83 ei
->irqs_enabled
&= ~(1 << (data
->irq
- ei
->irq_start
));
84 pr_debug("EGPIO mask %d %04x\n", data
->irq
, ei
->irqs_enabled
);
87 static void egpio_unmask(struct irq_data
*data
)
89 struct egpio_info
*ei
= irq_data_get_irq_chip_data(data
);
90 ei
->irqs_enabled
|= 1 << (data
->irq
- ei
->irq_start
);
91 pr_debug("EGPIO unmask %d %04x\n", data
->irq
, ei
->irqs_enabled
);
94 static struct irq_chip egpio_muxed_chip
= {
97 .irq_mask
= egpio_mask
,
98 .irq_unmask
= egpio_unmask
,
101 static void egpio_handler(unsigned int irq
, struct irq_desc
*desc
)
103 struct egpio_info
*ei
= get_irq_data(irq
);
106 /* Read current pins. */
107 unsigned long readval
= egpio_readw(ei
, ei
->ack_register
);
108 pr_debug("IRQ reg: %x\n", (unsigned int)readval
);
109 /* Ack/unmask interrupts. */
111 /* Process all set pins. */
112 readval
&= ei
->irqs_enabled
;
113 for_each_set_bit(irqpin
, &readval
, ei
->nirqs
) {
114 /* Run irq handler */
115 pr_debug("got IRQ %d\n", irqpin
);
116 irq
= ei
->irq_start
+ irqpin
;
117 desc
= irq_to_desc(irq
);
118 desc
->handle_irq(irq
, desc
);
122 int htc_egpio_get_wakeup_irq(struct device
*dev
)
124 struct egpio_info
*ei
= dev_get_drvdata(dev
);
126 /* Read current pins. */
127 u16 readval
= egpio_readw(ei
, ei
->ack_register
);
128 /* Ack/unmask interrupts. */
130 /* Return first set pin. */
131 readval
&= ei
->irqs_enabled
;
132 return ei
->irq_start
+ ffs(readval
) - 1;
134 EXPORT_SYMBOL(htc_egpio_get_wakeup_irq
);
136 static inline int egpio_pos(struct egpio_info
*ei
, int bit
)
138 return bit
>> ei
->reg_shift
;
141 static inline int egpio_bit(struct egpio_info
*ei
, int bit
)
143 return 1 << (bit
& ((1 << ei
->reg_shift
)-1));
150 static int egpio_get(struct gpio_chip
*chip
, unsigned offset
)
152 struct egpio_chip
*egpio
;
153 struct egpio_info
*ei
;
158 pr_debug("egpio_get_value(%d)\n", chip
->base
+ offset
);
160 egpio
= container_of(chip
, struct egpio_chip
, chip
);
161 ei
= dev_get_drvdata(egpio
->dev
);
162 bit
= egpio_bit(ei
, offset
);
163 reg
= egpio
->reg_start
+ egpio_pos(ei
, offset
);
165 value
= egpio_readw(ei
, reg
);
166 pr_debug("readw(%p + %x) = %x\n",
167 ei
->base_addr
, reg
<< ei
->bus_shift
, value
);
171 static int egpio_direction_input(struct gpio_chip
*chip
, unsigned offset
)
173 struct egpio_chip
*egpio
;
175 egpio
= container_of(chip
, struct egpio_chip
, chip
);
176 return test_bit(offset
, &egpio
->is_out
) ? -EINVAL
: 0;
184 static void egpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
187 struct egpio_chip
*egpio
;
188 struct egpio_info
*ei
;
194 pr_debug("egpio_set(%s, %d(%d), %d)\n",
195 chip
->label
, offset
, offset
+chip
->base
, value
);
197 egpio
= container_of(chip
, struct egpio_chip
, chip
);
198 ei
= dev_get_drvdata(egpio
->dev
);
199 bit
= egpio_bit(ei
, offset
);
200 pos
= egpio_pos(ei
, offset
);
201 reg
= egpio
->reg_start
+ pos
;
202 shift
= pos
<< ei
->reg_shift
;
204 pr_debug("egpio %s: reg %d = 0x%04x\n", value
? "set" : "clear",
205 reg
, (egpio
->cached_values
>> shift
) & ei
->reg_mask
);
207 spin_lock_irqsave(&ei
->lock
, flag
);
209 egpio
->cached_values
|= (1 << offset
);
211 egpio
->cached_values
&= ~(1 << offset
);
212 egpio_writew((egpio
->cached_values
>> shift
) & ei
->reg_mask
, ei
, reg
);
213 spin_unlock_irqrestore(&ei
->lock
, flag
);
216 static int egpio_direction_output(struct gpio_chip
*chip
,
217 unsigned offset
, int value
)
219 struct egpio_chip
*egpio
;
221 egpio
= container_of(chip
, struct egpio_chip
, chip
);
222 if (test_bit(offset
, &egpio
->is_out
)) {
223 egpio_set(chip
, offset
, value
);
230 static void egpio_write_cache(struct egpio_info
*ei
)
233 struct egpio_chip
*egpio
;
236 for (i
= 0; i
< ei
->nchips
; i
++) {
237 egpio
= &(ei
->chip
[i
]);
241 for (shift
= 0; shift
< egpio
->chip
.ngpio
;
242 shift
+= (1<<ei
->reg_shift
)) {
244 int reg
= egpio
->reg_start
+ egpio_pos(ei
, shift
);
246 if (!((egpio
->is_out
>> shift
) & ei
->reg_mask
))
249 pr_debug("EGPIO: setting %x to %x, was %x\n", reg
,
250 (egpio
->cached_values
>> shift
) & ei
->reg_mask
,
251 egpio_readw(ei
, reg
));
253 egpio_writew((egpio
->cached_values
>> shift
)
254 & ei
->reg_mask
, ei
, reg
);
264 static int __init
egpio_probe(struct platform_device
*pdev
)
266 struct htc_egpio_platform_data
*pdata
= pdev
->dev
.platform_data
;
267 struct resource
*res
;
268 struct egpio_info
*ei
;
269 struct gpio_chip
*chip
;
270 unsigned int irq
, irq_end
;
274 /* Initialize ei data structure. */
275 ei
= kzalloc(sizeof(*ei
), GFP_KERNEL
);
279 spin_lock_init(&ei
->lock
);
281 /* Find chained irq */
283 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
285 ei
->chained_irq
= res
->start
;
287 /* Map egpio chip into virtual address space. */
288 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
291 ei
->base_addr
= ioremap_nocache(res
->start
, resource_size(res
));
294 pr_debug("EGPIO phys=%08x virt=%p\n", (u32
)res
->start
, ei
->base_addr
);
296 if ((pdata
->bus_width
!= 16) && (pdata
->bus_width
!= 32))
298 ei
->bus_shift
= fls(pdata
->bus_width
- 1) - 3;
299 pr_debug("bus_shift = %d\n", ei
->bus_shift
);
301 if ((pdata
->reg_width
!= 8) && (pdata
->reg_width
!= 16))
303 ei
->reg_shift
= fls(pdata
->reg_width
- 1);
304 pr_debug("reg_shift = %d\n", ei
->reg_shift
);
306 ei
->reg_mask
= (1 << pdata
->reg_width
) - 1;
308 platform_set_drvdata(pdev
, ei
);
310 ei
->nchips
= pdata
->num_chips
;
311 ei
->chip
= kzalloc(sizeof(struct egpio_chip
) * ei
->nchips
, GFP_KERNEL
);
316 for (i
= 0; i
< ei
->nchips
; i
++) {
317 ei
->chip
[i
].reg_start
= pdata
->chip
[i
].reg_start
;
318 ei
->chip
[i
].cached_values
= pdata
->chip
[i
].initial_values
;
319 ei
->chip
[i
].is_out
= pdata
->chip
[i
].direction
;
320 ei
->chip
[i
].dev
= &(pdev
->dev
);
321 chip
= &(ei
->chip
[i
].chip
);
322 chip
->label
= "htc-egpio";
323 chip
->dev
= &pdev
->dev
;
324 chip
->owner
= THIS_MODULE
;
325 chip
->get
= egpio_get
;
326 chip
->set
= egpio_set
;
327 chip
->direction_input
= egpio_direction_input
;
328 chip
->direction_output
= egpio_direction_output
;
329 chip
->base
= pdata
->chip
[i
].gpio_base
;
330 chip
->ngpio
= pdata
->chip
[i
].num_gpios
;
335 /* Set initial pin values */
336 egpio_write_cache(ei
);
338 ei
->irq_start
= pdata
->irq_base
;
339 ei
->nirqs
= pdata
->num_irqs
;
340 ei
->ack_register
= pdata
->ack_register
;
342 if (ei
->chained_irq
) {
343 /* Setup irq handlers */
344 ei
->ack_write
= 0xFFFF;
345 if (pdata
->invert_acks
)
347 irq_end
= ei
->irq_start
+ ei
->nirqs
;
348 for (irq
= ei
->irq_start
; irq
< irq_end
; irq
++) {
349 set_irq_chip(irq
, &egpio_muxed_chip
);
350 set_irq_chip_data(irq
, ei
);
351 set_irq_handler(irq
, handle_simple_irq
);
352 set_irq_flags(irq
, IRQF_VALID
| IRQF_PROBE
);
354 set_irq_type(ei
->chained_irq
, IRQ_TYPE_EDGE_RISING
);
355 set_irq_data(ei
->chained_irq
, ei
);
356 set_irq_chained_handler(ei
->chained_irq
, egpio_handler
);
359 device_init_wakeup(&pdev
->dev
, 1);
365 printk(KERN_ERR
"EGPIO failed to setup\n");
370 static int __exit
egpio_remove(struct platform_device
*pdev
)
372 struct egpio_info
*ei
= platform_get_drvdata(pdev
);
373 unsigned int irq
, irq_end
;
375 if (ei
->chained_irq
) {
376 irq_end
= ei
->irq_start
+ ei
->nirqs
;
377 for (irq
= ei
->irq_start
; irq
< irq_end
; irq
++) {
378 set_irq_chip(irq
, NULL
);
379 set_irq_handler(irq
, NULL
);
380 set_irq_flags(irq
, 0);
382 set_irq_chained_handler(ei
->chained_irq
, NULL
);
383 device_init_wakeup(&pdev
->dev
, 0);
385 iounmap(ei
->base_addr
);
393 static int egpio_suspend(struct platform_device
*pdev
, pm_message_t state
)
395 struct egpio_info
*ei
= platform_get_drvdata(pdev
);
397 if (ei
->chained_irq
&& device_may_wakeup(&pdev
->dev
))
398 enable_irq_wake(ei
->chained_irq
);
402 static int egpio_resume(struct platform_device
*pdev
)
404 struct egpio_info
*ei
= platform_get_drvdata(pdev
);
406 if (ei
->chained_irq
&& device_may_wakeup(&pdev
->dev
))
407 disable_irq_wake(ei
->chained_irq
);
409 /* Update registers from the cache, in case
410 the CPLD was powered off during suspend */
411 egpio_write_cache(ei
);
415 #define egpio_suspend NULL
416 #define egpio_resume NULL
420 static struct platform_driver egpio_driver
= {
424 .remove
= __exit_p(egpio_remove
),
425 .suspend
= egpio_suspend
,
426 .resume
= egpio_resume
,
429 static int __init
egpio_init(void)
431 return platform_driver_probe(&egpio_driver
, egpio_probe
);
434 static void __exit
egpio_exit(void)
436 platform_driver_unregister(&egpio_driver
);
439 /* start early for dependencies */
440 subsys_initcall(egpio_init
);
441 module_exit(egpio_exit
)
443 MODULE_LICENSE("GPL");
444 MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");