2 * I/O Processor (IOP) management
3 * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org)
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice and this list of conditions.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice and this list of conditions in the documentation and/or other
12 * materials provided with the distribution.
16 * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
17 * serial and ADB. They are actually a 6502 processor and some glue logic.
19 * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
20 * into compatible mode so nobody has to fiddle with the
21 * Serial Switch control panel anymore.
22 * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
23 * and non-OSS machines (at least I hope it's correct on a
24 * non-OSS machine -- someone with a Q900 or Q950 needs to
26 * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
27 * gone, IOP base addresses are now in an array and the
28 * globally-visible functions take an IOP number instead of an
29 * an actual base address.
30 * 990610 (jmt) - Finished the message passing framework and it seems to work.
31 * Sending _definitely_ works; my adb-bus.c mods can send
32 * messages and receive the MSG_COMPLETED status back from the
33 * IOP. The trick now is figuring out the message formats.
34 * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a
35 * receive channel were never properly acknowledged. Bracketed
36 * the remaining debug printk's with #ifdef's and disabled
37 * debugging. I can now type on the console.
38 * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled.
39 * It turns out that replies are placed back in the send buffer
40 * for that channel; messages on the receive channels are always
41 * unsolicited messages from the IOP (and our replies to them
42 * should go back in the receive channel.) Also added tracking
43 * of device names to the listener functions ala the interrupt
45 * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
46 * used by the new unified ADB driver.
50 * o Something should be periodically checking iop_alive() to make sure the
52 * o Some of the IOP manager routines need better error checking and
53 * return codes. Nothing major, just prettying up.
57 * -----------------------
58 * IOP Message Passing 101
59 * -----------------------
61 * The host talks to the IOPs using a rather simple message-passing scheme via
62 * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
63 * channel is conneced to a specific software driver on the IOP. For example
64 * on the SCC IOP there is one channel for each serial port. Each channel has
65 * an incoming and and outgoing message queue with a depth of one.
67 * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW,
68 * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the
69 * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag
70 * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it
71 * receives the message and then to MSG_COMPLETE when the message processing
72 * has completed. It is the host's responsibility at that point to read the
73 * reply back out of the send channel buffer and reset the channel state back
76 * To receive message from the IOP the same procedure is used except the roles
77 * are reversed. That is, the IOP puts message in the channel with a state of
78 * MSG_NEW, and the host receives the message and move its state to MSG_RCVD
79 * and then to MSG_COMPLETE when processing is completed and the reply (if any)
80 * has been placed back in the receive channel. The IOP will then reset the
81 * channel state to MSG_IDLE.
83 * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
84 * interrupt level; they are distinguished by a pair of bits in the IOP status
85 * register. The IOP will raise INT0 when one or more messages in the send
86 * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
87 * or more messages on the receive channels have gone to the MSG_NEW state.
89 * Since each channel handles only one message we have to implement a small
90 * interrupt-driven queue on our end. Messages to be sent are placed on the
91 * queue for sending and contain a pointer to an optional callback function.
92 * The handler for a message is called when the message state goes to
95 * For receiving message we maintain a list of handler functions to call when
96 * a message is received on that IOP/channel combination. The handlers are
97 * called much like an interrupt handler and are passed a copy of the message
98 * from the IOP. The message state will be in MSG_RCVD while the handler runs;
99 * it is the handler's responsibility to call iop_complete_message() when
100 * finished; this function moves the message state to MSG_COMPLETE and signals
101 * the IOP. This two-step process is provided to allow the handler to defer
102 * message processing to a bottom-half handler if the processing will take
103 * a significant amount of time (handlers are called at interrupt time so they
104 * should execute quickly.)
107 #include <linux/types.h>
108 #include <linux/kernel.h>
109 #include <linux/mm.h>
110 #include <linux/delay.h>
111 #include <linux/init.h>
112 #include <linux/interrupt.h>
114 #include <asm/bootinfo.h>
115 #include <asm/macintosh.h>
116 #include <asm/macints.h>
117 #include <asm/mac_iop.h>
118 #include <asm/mac_oss.h>
120 /*#define DEBUG_IOP*/
122 /* Set to non-zero if the IOPs are present. Set by iop_init() */
124 int iop_scc_present
,iop_ism_present
;
126 /* structure for tracking channel listeners */
130 void (*handler
)(struct iop_msg
*);
134 * IOP structures for the two IOPs
136 * The SCC IOP controls both serial ports (A and B) as its two functions.
137 * The ISM IOP controls the SWIM (floppy drive) and ADB.
140 static volatile struct mac_iop
*iop_base
[NUM_IOPS
];
146 static struct iop_msg iop_msg_pool
[NUM_IOP_MSGS
];
147 static struct iop_msg
*iop_send_queue
[NUM_IOPS
][NUM_IOP_CHAN
];
148 static struct listener iop_listeners
[NUM_IOPS
][NUM_IOP_CHAN
];
150 irqreturn_t
iop_ism_irq(int, void *);
152 extern void oss_irq_enable(int);
155 * Private access functions
158 static __inline__
void iop_loadaddr(volatile struct mac_iop
*iop
, __u16 addr
)
160 iop
->ram_addr_lo
= addr
;
161 iop
->ram_addr_hi
= addr
>> 8;
164 static __inline__ __u8
iop_readb(volatile struct mac_iop
*iop
, __u16 addr
)
166 iop
->ram_addr_lo
= addr
;
167 iop
->ram_addr_hi
= addr
>> 8;
168 return iop
->ram_data
;
171 static __inline__
void iop_writeb(volatile struct mac_iop
*iop
, __u16 addr
, __u8 data
)
173 iop
->ram_addr_lo
= addr
;
174 iop
->ram_addr_hi
= addr
>> 8;
175 iop
->ram_data
= data
;
178 static __inline__
void iop_stop(volatile struct mac_iop
*iop
)
180 iop
->status_ctrl
&= ~IOP_RUN
;
183 static __inline__
void iop_start(volatile struct mac_iop
*iop
)
185 iop
->status_ctrl
= IOP_RUN
| IOP_AUTOINC
;
188 static __inline__
void iop_bypass(volatile struct mac_iop
*iop
)
190 iop
->status_ctrl
|= IOP_BYPASS
;
193 static __inline__
void iop_interrupt(volatile struct mac_iop
*iop
)
195 iop
->status_ctrl
|= IOP_IRQ
;
198 static int iop_alive(volatile struct mac_iop
*iop
)
202 retval
= (iop_readb(iop
, IOP_ADDR_ALIVE
) == 0xFF);
203 iop_writeb(iop
, IOP_ADDR_ALIVE
, 0);
207 static struct iop_msg
*iop_alloc_msg(void)
212 local_irq_save(flags
);
214 for (i
= 0 ; i
< NUM_IOP_MSGS
; i
++) {
215 if (iop_msg_pool
[i
].status
== IOP_MSGSTATUS_UNUSED
) {
216 iop_msg_pool
[i
].status
= IOP_MSGSTATUS_WAITING
;
217 local_irq_restore(flags
);
218 return &iop_msg_pool
[i
];
222 local_irq_restore(flags
);
226 static void iop_free_msg(struct iop_msg
*msg
)
228 msg
->status
= IOP_MSGSTATUS_UNUSED
;
232 * This is called by the startup code before anything else. Its purpose
233 * is to find and initialize the IOPs early in the boot sequence, so that
234 * the serial IOP can be placed into bypass mode _before_ we try to
235 * initialize the serial console.
238 void __init
iop_preinit(void)
240 if (macintosh_config
->scc_type
== MAC_SCC_IOP
) {
241 if (macintosh_config
->ident
== MAC_MODEL_IIFX
) {
242 iop_base
[IOP_NUM_SCC
] = (struct mac_iop
*) SCC_IOP_BASE_IIFX
;
244 iop_base
[IOP_NUM_SCC
] = (struct mac_iop
*) SCC_IOP_BASE_QUADRA
;
246 iop_base
[IOP_NUM_SCC
]->status_ctrl
= 0x87;
249 iop_base
[IOP_NUM_SCC
] = NULL
;
252 if (macintosh_config
->adb_type
== MAC_ADB_IOP
) {
253 if (macintosh_config
->ident
== MAC_MODEL_IIFX
) {
254 iop_base
[IOP_NUM_ISM
] = (struct mac_iop
*) ISM_IOP_BASE_IIFX
;
256 iop_base
[IOP_NUM_ISM
] = (struct mac_iop
*) ISM_IOP_BASE_QUADRA
;
258 iop_base
[IOP_NUM_ISM
]->status_ctrl
= 0;
261 iop_base
[IOP_NUM_ISM
] = NULL
;
267 * Initialize the IOPs, if present.
270 void __init
iop_init(void)
274 if (iop_scc_present
) {
275 printk("IOP: detected SCC IOP at %p\n", iop_base
[IOP_NUM_SCC
]);
277 if (iop_ism_present
) {
278 printk("IOP: detected ISM IOP at %p\n", iop_base
[IOP_NUM_ISM
]);
279 iop_start(iop_base
[IOP_NUM_ISM
]);
280 iop_alive(iop_base
[IOP_NUM_ISM
]); /* clears the alive flag */
283 /* Make the whole pool available and empty the queues */
285 for (i
= 0 ; i
< NUM_IOP_MSGS
; i
++) {
286 iop_msg_pool
[i
].status
= IOP_MSGSTATUS_UNUSED
;
289 for (i
= 0 ; i
< NUM_IOP_CHAN
; i
++) {
290 iop_send_queue
[IOP_NUM_SCC
][i
] = NULL
;
291 iop_send_queue
[IOP_NUM_ISM
][i
] = NULL
;
292 iop_listeners
[IOP_NUM_SCC
][i
].devname
= NULL
;
293 iop_listeners
[IOP_NUM_SCC
][i
].handler
= NULL
;
294 iop_listeners
[IOP_NUM_ISM
][i
].devname
= NULL
;
295 iop_listeners
[IOP_NUM_ISM
][i
].handler
= NULL
;
300 * Register the interrupt handler for the IOPs.
301 * TODO: might be wrong for non-OSS machines. Anyone?
304 void __init
iop_register_interrupts(void)
306 if (iop_ism_present
) {
308 if (request_irq(OSS_IRQLEV_IOPISM
, iop_ism_irq
, 0,
309 "ISM IOP", (void *)IOP_NUM_ISM
))
310 pr_err("Couldn't register ISM IOP interrupt\n");
311 oss_irq_enable(IRQ_MAC_ADB
);
313 if (request_irq(IRQ_VIA2_0
, iop_ism_irq
, 0, "ISM IOP",
314 (void *)IOP_NUM_ISM
))
315 pr_err("Couldn't register ISM IOP interrupt\n");
317 if (!iop_alive(iop_base
[IOP_NUM_ISM
])) {
318 printk("IOP: oh my god, they killed the ISM IOP!\n");
320 printk("IOP: the ISM IOP seems to be alive.\n");
326 * Register or unregister a listener for a specific IOP and channel
328 * If the handler pointer is NULL the current listener (if any) is
329 * unregistered. Otherwise the new listener is registered provided
330 * there is no existing listener registered.
333 int iop_listen(uint iop_num
, uint chan
,
334 void (*handler
)(struct iop_msg
*),
337 if ((iop_num
>= NUM_IOPS
) || !iop_base
[iop_num
]) return -EINVAL
;
338 if (chan
>= NUM_IOP_CHAN
) return -EINVAL
;
339 if (iop_listeners
[iop_num
][chan
].handler
&& handler
) return -EINVAL
;
340 iop_listeners
[iop_num
][chan
].devname
= devname
;
341 iop_listeners
[iop_num
][chan
].handler
= handler
;
346 * Complete reception of a message, which just means copying the reply
347 * into the buffer, setting the channel state to MSG_COMPLETE and
351 void iop_complete_message(struct iop_msg
*msg
)
353 int iop_num
= msg
->iop_num
;
354 int chan
= msg
->channel
;
358 printk("iop_complete(%p): iop %d chan %d\n", msg
, msg
->iop_num
, msg
->channel
);
361 offset
= IOP_ADDR_RECV_MSG
+ (msg
->channel
* IOP_MSG_LEN
);
363 for (i
= 0 ; i
< IOP_MSG_LEN
; i
++, offset
++) {
364 iop_writeb(iop_base
[iop_num
], offset
, msg
->reply
[i
]);
367 iop_writeb(iop_base
[iop_num
],
368 IOP_ADDR_RECV_STATE
+ chan
, IOP_MSG_COMPLETE
);
369 iop_interrupt(iop_base
[msg
->iop_num
]);
375 * Actually put a message into a send channel buffer
378 static void iop_do_send(struct iop_msg
*msg
)
380 volatile struct mac_iop
*iop
= iop_base
[msg
->iop_num
];
383 offset
= IOP_ADDR_SEND_MSG
+ (msg
->channel
* IOP_MSG_LEN
);
385 for (i
= 0 ; i
< IOP_MSG_LEN
; i
++, offset
++) {
386 iop_writeb(iop
, offset
, msg
->message
[i
]);
389 iop_writeb(iop
, IOP_ADDR_SEND_STATE
+ msg
->channel
, IOP_MSG_NEW
);
395 * Handle sending a message on a channel that
396 * has gone into the IOP_MSG_COMPLETE state.
399 static void iop_handle_send(uint iop_num
, uint chan
)
401 volatile struct mac_iop
*iop
= iop_base
[iop_num
];
402 struct iop_msg
*msg
,*msg2
;
406 printk("iop_handle_send: iop %d channel %d\n", iop_num
, chan
);
409 iop_writeb(iop
, IOP_ADDR_SEND_STATE
+ chan
, IOP_MSG_IDLE
);
411 if (!(msg
= iop_send_queue
[iop_num
][chan
])) return;
413 msg
->status
= IOP_MSGSTATUS_COMPLETE
;
414 offset
= IOP_ADDR_SEND_MSG
+ (chan
* IOP_MSG_LEN
);
415 for (i
= 0 ; i
< IOP_MSG_LEN
; i
++, offset
++) {
416 msg
->reply
[i
] = iop_readb(iop
, offset
);
418 if (msg
->handler
) (*msg
->handler
)(msg
);
423 iop_send_queue
[iop_num
][chan
] = msg
;
424 if (msg
) iop_do_send(msg
);
428 * Handle reception of a message on a channel that has
429 * gone into the IOP_MSG_NEW state.
432 static void iop_handle_recv(uint iop_num
, uint chan
)
434 volatile struct mac_iop
*iop
= iop_base
[iop_num
];
439 printk("iop_handle_recv: iop %d channel %d\n", iop_num
, chan
);
442 msg
= iop_alloc_msg();
443 msg
->iop_num
= iop_num
;
445 msg
->status
= IOP_MSGSTATUS_UNSOL
;
446 msg
->handler
= iop_listeners
[iop_num
][chan
].handler
;
448 offset
= IOP_ADDR_RECV_MSG
+ (chan
* IOP_MSG_LEN
);
450 for (i
= 0 ; i
< IOP_MSG_LEN
; i
++, offset
++) {
451 msg
->message
[i
] = iop_readb(iop
, offset
);
454 iop_writeb(iop
, IOP_ADDR_RECV_STATE
+ chan
, IOP_MSG_RCVD
);
456 /* If there is a listener, call it now. Otherwise complete */
457 /* the message ourselves to avoid possible stalls. */
460 (*msg
->handler
)(msg
);
463 printk("iop_handle_recv: unclaimed message on iop %d channel %d\n", iop_num
, chan
);
464 printk("iop_handle_recv:");
465 for (i
= 0 ; i
< IOP_MSG_LEN
; i
++) {
466 printk(" %02X", (uint
) msg
->message
[i
]);
470 iop_complete_message(msg
);
477 * The message is placed at the end of the send queue. Afterwards if the
478 * channel is idle we force an immediate send of the next message in the
482 int iop_send_message(uint iop_num
, uint chan
, void *privdata
,
483 uint msg_len
, __u8
*msg_data
,
484 void (*handler
)(struct iop_msg
*))
486 struct iop_msg
*msg
, *q
;
488 if ((iop_num
>= NUM_IOPS
) || !iop_base
[iop_num
]) return -EINVAL
;
489 if (chan
>= NUM_IOP_CHAN
) return -EINVAL
;
490 if (msg_len
> IOP_MSG_LEN
) return -EINVAL
;
492 msg
= iop_alloc_msg();
493 if (!msg
) return -ENOMEM
;
496 msg
->status
= IOP_MSGSTATUS_WAITING
;
497 msg
->iop_num
= iop_num
;
499 msg
->caller_priv
= privdata
;
500 memcpy(msg
->message
, msg_data
, msg_len
);
501 msg
->handler
= handler
;
503 if (!(q
= iop_send_queue
[iop_num
][chan
])) {
504 iop_send_queue
[iop_num
][chan
] = msg
;
506 while (q
->next
) q
= q
->next
;
510 if (iop_readb(iop_base
[iop_num
],
511 IOP_ADDR_SEND_STATE
+ chan
) == IOP_MSG_IDLE
) {
519 * Upload code to the shared RAM of an IOP.
522 void iop_upload_code(uint iop_num
, __u8
*code_start
,
523 uint code_len
, __u16 shared_ram_start
)
525 if ((iop_num
>= NUM_IOPS
) || !iop_base
[iop_num
]) return;
527 iop_loadaddr(iop_base
[iop_num
], shared_ram_start
);
530 iop_base
[iop_num
]->ram_data
= *code_start
++;
535 * Download code from the shared RAM of an IOP.
538 void iop_download_code(uint iop_num
, __u8
*code_start
,
539 uint code_len
, __u16 shared_ram_start
)
541 if ((iop_num
>= NUM_IOPS
) || !iop_base
[iop_num
]) return;
543 iop_loadaddr(iop_base
[iop_num
], shared_ram_start
);
546 *code_start
++ = iop_base
[iop_num
]->ram_data
;
551 * Compare the code in the shared RAM of an IOP with a copy in system memory
552 * and return 0 on match or the first nonmatching system memory address on
556 __u8
*iop_compare_code(uint iop_num
, __u8
*code_start
,
557 uint code_len
, __u16 shared_ram_start
)
559 if ((iop_num
>= NUM_IOPS
) || !iop_base
[iop_num
]) return code_start
;
561 iop_loadaddr(iop_base
[iop_num
], shared_ram_start
);
564 if (*code_start
!= iop_base
[iop_num
]->ram_data
) {
573 * Handle an ISM IOP interrupt
576 irqreturn_t
iop_ism_irq(int irq
, void *dev_id
)
578 uint iop_num
= (uint
) dev_id
;
579 volatile struct mac_iop
*iop
= iop_base
[iop_num
];
583 printk("iop_ism_irq: status = %02X\n", (uint
) iop
->status_ctrl
);
586 /* INT0 indicates a state change on an outgoing message channel */
588 if (iop
->status_ctrl
& IOP_INT0
) {
589 iop
->status_ctrl
= IOP_INT0
| IOP_RUN
| IOP_AUTOINC
;
591 printk("iop_ism_irq: new status = %02X, send states",
592 (uint
) iop
->status_ctrl
);
594 for (i
= 0 ; i
< NUM_IOP_CHAN
; i
++) {
595 state
= iop_readb(iop
, IOP_ADDR_SEND_STATE
+ i
);
597 printk(" %02X", state
);
599 if (state
== IOP_MSG_COMPLETE
) {
600 iop_handle_send(iop_num
, i
);
608 if (iop
->status_ctrl
& IOP_INT1
) { /* INT1 for incoming msgs */
609 iop
->status_ctrl
= IOP_INT1
| IOP_RUN
| IOP_AUTOINC
;
611 printk("iop_ism_irq: new status = %02X, recv states",
612 (uint
) iop
->status_ctrl
);
614 for (i
= 0 ; i
< NUM_IOP_CHAN
; i
++) {
615 state
= iop_readb(iop
, IOP_ADDR_RECV_STATE
+ i
);
617 printk(" %02X", state
);
619 if (state
== IOP_MSG_NEW
) {
620 iop_handle_recv(iop_num
, i
);