2 * linux/arch/arm/mach-pxa/generic.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code common to all PXA machines.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <linux/ioport.h>
26 #include <linux/string.h>
28 #include <asm/hardware.h>
30 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/mach/map.h>
34 #include <asm/arch/pxa-regs.h>
35 #include <asm/arch/gpio.h>
36 #include <asm/arch/udc.h>
37 #include <asm/arch/pxafb.h>
38 #include <asm/arch/mmc.h>
39 #include <asm/arch/irda.h>
40 #include <asm/arch/i2c.h>
46 * Get the clock frequency as reflected by CCCR and the turbo flag.
47 * We assume these values have been applied via a fcs.
48 * If info is not 0 we also display the current settings.
50 unsigned int get_clk_frequency_khz(int info
)
52 if (cpu_is_pxa21x() || cpu_is_pxa25x())
53 return pxa25x_get_clk_frequency_khz(info
);
55 return pxa27x_get_clk_frequency_khz(info
);
57 EXPORT_SYMBOL(get_clk_frequency_khz
);
60 * Return the current memory clock frequency in units of 10kHz
62 unsigned int get_memclk_frequency_10khz(void)
64 if (cpu_is_pxa21x() || cpu_is_pxa25x())
65 return pxa25x_get_memclk_frequency_10khz();
67 return pxa27x_get_memclk_frequency_10khz();
69 EXPORT_SYMBOL(get_memclk_frequency_10khz
);
72 * Handy function to set GPIO alternate functions
75 int pxa_gpio_mode(int gpio_mode
)
78 int gpio
= gpio_mode
& GPIO_MD_MASK_NR
;
79 int fn
= (gpio_mode
& GPIO_MD_MASK_FN
) >> 8;
82 if (gpio
> PXA_LAST_GPIO
)
85 local_irq_save(flags
);
86 if (gpio_mode
& GPIO_DFLT_LOW
)
87 GPCR(gpio
) = GPIO_bit(gpio
);
88 else if (gpio_mode
& GPIO_DFLT_HIGH
)
89 GPSR(gpio
) = GPIO_bit(gpio
);
90 if (gpio_mode
& GPIO_MD_MASK_DIR
)
91 GPDR(gpio
) |= GPIO_bit(gpio
);
93 GPDR(gpio
) &= ~GPIO_bit(gpio
);
94 gafr
= GAFR(gpio
) & ~(0x3 << (((gpio
) & 0xf)*2));
95 GAFR(gpio
) = gafr
| (fn
<< (((gpio
) & 0xf)*2));
96 local_irq_restore(flags
);
101 EXPORT_SYMBOL(pxa_gpio_mode
);
106 int pxa_gpio_get_value(unsigned gpio
)
108 return __gpio_get_value(gpio
);
111 EXPORT_SYMBOL(pxa_gpio_get_value
);
114 * Set output GPIO level
116 void pxa_gpio_set_value(unsigned gpio
, int value
)
118 __gpio_set_value(gpio
, value
);
121 EXPORT_SYMBOL(pxa_gpio_set_value
);
124 * Routine to safely enable or disable a clock in the CKEN
126 void pxa_set_cken(int clock
, int enable
)
129 local_irq_save(flags
);
132 CKEN
|= (1 << clock
);
134 CKEN
&= ~(1 << clock
);
136 local_irq_restore(flags
);
139 EXPORT_SYMBOL(pxa_set_cken
);
142 * Intel PXA2xx internal register mapping.
144 * Note 1: not all PXA2xx variants implement all those addresses.
146 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
147 * and cache flush area.
149 static struct map_desc standard_io_desc
[] __initdata
= {
151 .virtual = 0xf2000000,
152 .pfn
= __phys_to_pfn(0x40000000),
153 .length
= 0x02000000,
156 .virtual = 0xf4000000,
157 .pfn
= __phys_to_pfn(0x44000000),
158 .length
= 0x00100000,
161 .virtual = 0xf6000000,
162 .pfn
= __phys_to_pfn(0x48000000),
163 .length
= 0x00100000,
166 .virtual = 0xf8000000,
167 .pfn
= __phys_to_pfn(0x4c000000),
168 .length
= 0x00100000,
171 .virtual = 0xfa000000,
172 .pfn
= __phys_to_pfn(0x50000000),
173 .length
= 0x00100000,
176 .virtual = 0xfe000000,
177 .pfn
= __phys_to_pfn(0x58000000),
178 .length
= 0x00100000,
180 }, { /* UNCACHED_PHYS_0 */
181 .virtual = 0xff000000,
182 .pfn
= __phys_to_pfn(0x00000000),
183 .length
= 0x00100000,
188 void __init
pxa_map_io(void)
190 iotable_init(standard_io_desc
, ARRAY_SIZE(standard_io_desc
));
191 get_clk_frequency_khz(1);
195 static struct resource pxamci_resources
[] = {
199 .flags
= IORESOURCE_MEM
,
204 .flags
= IORESOURCE_IRQ
,
208 static u64 pxamci_dmamask
= 0xffffffffUL
;
210 struct platform_device pxa_device_mci
= {
211 .name
= "pxa2xx-mci",
214 .dma_mask
= &pxamci_dmamask
,
215 .coherent_dma_mask
= 0xffffffff,
217 .num_resources
= ARRAY_SIZE(pxamci_resources
),
218 .resource
= pxamci_resources
,
221 void __init
pxa_set_mci_info(struct pxamci_platform_data
*info
)
223 pxa_device_mci
.dev
.platform_data
= info
;
227 static struct pxa2xx_udc_mach_info pxa_udc_info
;
229 void __init
pxa_set_udc_info(struct pxa2xx_udc_mach_info
*info
)
231 memcpy(&pxa_udc_info
, info
, sizeof *info
);
234 static struct resource pxa2xx_udc_resources
[] = {
238 .flags
= IORESOURCE_MEM
,
243 .flags
= IORESOURCE_IRQ
,
247 static u64 udc_dma_mask
= ~(u32
)0;
249 struct platform_device pxa_device_udc
= {
250 .name
= "pxa2xx-udc",
252 .resource
= pxa2xx_udc_resources
,
253 .num_resources
= ARRAY_SIZE(pxa2xx_udc_resources
),
255 .platform_data
= &pxa_udc_info
,
256 .dma_mask
= &udc_dma_mask
,
260 static struct resource pxafb_resources
[] = {
264 .flags
= IORESOURCE_MEM
,
269 .flags
= IORESOURCE_IRQ
,
273 static u64 fb_dma_mask
= ~(u64
)0;
275 struct platform_device pxa_device_fb
= {
279 .dma_mask
= &fb_dma_mask
,
280 .coherent_dma_mask
= 0xffffffff,
282 .num_resources
= ARRAY_SIZE(pxafb_resources
),
283 .resource
= pxafb_resources
,
286 void __init
set_pxa_fb_info(struct pxafb_mach_info
*info
)
288 pxa_device_fb
.dev
.platform_data
= info
;
291 void __init
set_pxa_fb_parent(struct device
*parent_dev
)
293 pxa_device_fb
.dev
.parent
= parent_dev
;
296 static struct resource pxa_resource_ffuart
[] = {
298 .start
= __PREG(FFUART
),
299 .end
= __PREG(FFUART
) + 35,
300 .flags
= IORESOURCE_MEM
,
304 .flags
= IORESOURCE_IRQ
,
308 struct platform_device pxa_device_ffuart
= {
309 .name
= "pxa2xx-uart",
311 .resource
= pxa_resource_ffuart
,
312 .num_resources
= ARRAY_SIZE(pxa_resource_ffuart
),
315 static struct resource pxa_resource_btuart
[] = {
317 .start
= __PREG(BTUART
),
318 .end
= __PREG(BTUART
) + 35,
319 .flags
= IORESOURCE_MEM
,
323 .flags
= IORESOURCE_IRQ
,
327 struct platform_device pxa_device_btuart
= {
328 .name
= "pxa2xx-uart",
330 .resource
= pxa_resource_btuart
,
331 .num_resources
= ARRAY_SIZE(pxa_resource_btuart
),
334 static struct resource pxa_resource_stuart
[] = {
336 .start
= __PREG(STUART
),
337 .end
= __PREG(STUART
) + 35,
338 .flags
= IORESOURCE_MEM
,
342 .flags
= IORESOURCE_IRQ
,
346 struct platform_device pxa_device_stuart
= {
347 .name
= "pxa2xx-uart",
349 .resource
= pxa_resource_stuart
,
350 .num_resources
= ARRAY_SIZE(pxa_resource_stuart
),
353 static struct resource pxa_resource_hwuart
[] = {
355 .start
= __PREG(HWUART
),
356 .end
= __PREG(HWUART
) + 47,
357 .flags
= IORESOURCE_MEM
,
361 .flags
= IORESOURCE_IRQ
,
365 struct platform_device pxa_device_hwuart
= {
366 .name
= "pxa2xx-uart",
368 .resource
= pxa_resource_hwuart
,
369 .num_resources
= ARRAY_SIZE(pxa_resource_hwuart
),
372 static struct resource pxai2c_resources
[] = {
376 .flags
= IORESOURCE_MEM
,
380 .flags
= IORESOURCE_IRQ
,
384 struct platform_device pxa_device_i2c
= {
385 .name
= "pxa2xx-i2c",
387 .resource
= pxai2c_resources
,
388 .num_resources
= ARRAY_SIZE(pxai2c_resources
),
391 void __init
pxa_set_i2c_info(struct i2c_pxa_platform_data
*info
)
393 pxa_device_i2c
.dev
.platform_data
= info
;
396 static struct resource pxai2s_resources
[] = {
400 .flags
= IORESOURCE_MEM
,
404 .flags
= IORESOURCE_IRQ
,
408 struct platform_device pxa_device_i2s
= {
409 .name
= "pxa2xx-i2s",
411 .resource
= pxai2s_resources
,
412 .num_resources
= ARRAY_SIZE(pxai2s_resources
),
415 static u64 pxaficp_dmamask
= ~(u32
)0;
417 struct platform_device pxa_device_ficp
= {
421 .dma_mask
= &pxaficp_dmamask
,
422 .coherent_dma_mask
= 0xffffffff,
426 void __init
pxa_set_ficp_info(struct pxaficp_platform_data
*info
)
428 pxa_device_ficp
.dev
.platform_data
= info
;
431 struct platform_device pxa_device_rtc
= {
432 .name
= "sa1100-rtc",