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udf: replace inode uid,gid,mode init with helper
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / serial / sh-sci.c
blobf250a610a26842d236f95342487cb1487e03a7ae
1 /*
2 * drivers/serial/sh-sci.c
3 *
4 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 *
6 * Copyright (C) 2002 - 2008 Paul Mundt
7 * Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
8 *
9 * based off of the old drivers/char/sh-sci.c by:
10 *
11 * Copyright (C) 1999, 2000 Niibe Yutaka
12 * Copyright (C) 2000 Sugioka Toshinobu
13 * Modified to support multiple serial ports. Stuart Menefy (May 2000).
14 * Modified to support SecureEdge. David McCullough (2002)
15 * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
16 * Removed SH7300 support (Jul 2007).
17 *
18 * This file is subject to the terms and conditions of the GNU General Public
19 * License. See the file "COPYING" in the main directory of this archive
20 * for more details.
21 */
22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #define SUPPORT_SYSRQ
24 #endif
25
26 #undef DEBUG
27
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial.h>
35 #include <linux/major.h>
36 #include <linux/string.h>
37 #include <linux/sysrq.h>
38 #include <linux/ioport.h>
39 #include <linux/mm.h>
40 #include <linux/init.h>
41 #include <linux/delay.h>
42 #include <linux/console.h>
43 #include <linux/platform_device.h>
44 #include <linux/serial_sci.h>
45 #include <linux/notifier.h>
46 #include <linux/cpufreq.h>
47 #include <linux/clk.h>
48 #include <linux/ctype.h>
49 #include <linux/err.h>
50 #include <linux/list.h>
51 #include <linux/dmaengine.h>
52 #include <linux/scatterlist.h>
53 #include <linux/slab.h>
54
55 #ifdef CONFIG_SUPERH
56 #include <asm/sh_bios.h>
57 #endif
58
59 #ifdef CONFIG_H8300
60 #include <asm/gpio.h>
61 #endif
62
63 #include "sh-sci.h"
64
65 struct sci_port {
66 struct uart_port port;
67
68 /* Port type */
69 unsigned int type;
70
71 /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
72 unsigned int irqs[SCIx_NR_IRQS];
73
74 /* Port enable callback */
75 void (*enable)(struct uart_port *port);
76
77 /* Port disable callback */
78 void (*disable)(struct uart_port *port);
79
80 /* Break timer */
81 struct timer_list break_timer;
82 int break_flag;
83
84 /* Interface clock */
85 struct clk *iclk;
86 /* Function clock */
87 struct clk *fclk;
88
89 struct list_head node;
90 struct dma_chan *chan_tx;
91 struct dma_chan *chan_rx;
92 #ifdef CONFIG_SERIAL_SH_SCI_DMA
93 struct device *dma_dev;
94 unsigned int slave_tx;
95 unsigned int slave_rx;
96 struct dma_async_tx_descriptor *desc_tx;
97 struct dma_async_tx_descriptor *desc_rx[2];
98 dma_cookie_t cookie_tx;
99 dma_cookie_t cookie_rx[2];
100 dma_cookie_t active_rx;
101 struct scatterlist sg_tx;
102 unsigned int sg_len_tx;
103 struct scatterlist sg_rx[2];
104 size_t buf_len_rx;
105 struct sh_dmae_slave param_tx;
106 struct sh_dmae_slave param_rx;
107 struct work_struct work_tx;
108 struct work_struct work_rx;
109 struct timer_list rx_timer;
110 unsigned int rx_timeout;
111 #endif
112 };
113
114 struct sh_sci_priv {
115 spinlock_t lock;
116 struct list_head ports;
117 struct notifier_block clk_nb;
118 };
119
120 /* Function prototypes */
121 static void sci_stop_tx(struct uart_port *port);
122
123 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
124
125 static struct sci_port sci_ports[SCI_NPORTS];
126 static struct uart_driver sci_uart_driver;
127
128 static inline struct sci_port *
129 to_sci_port(struct uart_port *uart)
130 {
131 return container_of(uart, struct sci_port, port);
132 }
133
134 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
135
136 #ifdef CONFIG_CONSOLE_POLL
137 static inline void handle_error(struct uart_port *port)
138 {
139 /* Clear error flags */
140 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
141 }
142
143 static int sci_poll_get_char(struct uart_port *port)
144 {
145 unsigned short status;
146 int c;
147
148 do {
149 status = sci_in(port, SCxSR);
150 if (status & SCxSR_ERRORS(port)) {
151 handle_error(port);
152 continue;
153 }
154 break;
155 } while (1);
156
157 if (!(status & SCxSR_RDxF(port)))
158 return NO_POLL_CHAR;
159
160 c = sci_in(port, SCxRDR);
161
162 /* Dummy read */
163 sci_in(port, SCxSR);
164 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
165
166 return c;
167 }
168 #endif
169
170 static void sci_poll_put_char(struct uart_port *port, unsigned char c)
171 {
172 unsigned short status;
173
174 do {
175 status = sci_in(port, SCxSR);
176 } while (!(status & SCxSR_TDxE(port)));
177
178 sci_out(port, SCxTDR, c);
179 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
180 }
181 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
182
183 #if defined(__H8300H__) || defined(__H8300S__)
184 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
185 {
186 int ch = (port->mapbase - SMR0) >> 3;
187
188 /* set DDR regs */
189 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
190 h8300_sci_pins[ch].rx,
191 H8300_GPIO_INPUT);
192 H8300_GPIO_DDR(h8300_sci_pins[ch].port,
193 h8300_sci_pins[ch].tx,
194 H8300_GPIO_OUTPUT);
195
196 /* tx mark output*/
197 H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
198 }
199 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
200 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
201 {
202 if (port->mapbase == 0xA4400000) {
203 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
204 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
205 } else if (port->mapbase == 0xA4410000)
206 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
207 }
208 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
209 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
210 {
211 unsigned short data;
212
213 if (cflag & CRTSCTS) {
214 /* enable RTS/CTS */
215 if (port->mapbase == 0xa4430000) { /* SCIF0 */
216 /* Clear PTCR bit 9-2; enable all scif pins but sck */
217 data = __raw_readw(PORT_PTCR);
218 __raw_writew((data & 0xfc03), PORT_PTCR);
219 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
220 /* Clear PVCR bit 9-2 */
221 data = __raw_readw(PORT_PVCR);
222 __raw_writew((data & 0xfc03), PORT_PVCR);
223 }
224 } else {
225 if (port->mapbase == 0xa4430000) { /* SCIF0 */
226 /* Clear PTCR bit 5-2; enable only tx and rx */
227 data = __raw_readw(PORT_PTCR);
228 __raw_writew((data & 0xffc3), PORT_PTCR);
229 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
230 /* Clear PVCR bit 5-2 */
231 data = __raw_readw(PORT_PVCR);
232 __raw_writew((data & 0xffc3), PORT_PVCR);
233 }
234 }
235 }
236 #elif defined(CONFIG_CPU_SH3)
237 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
238 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
239 {
240 unsigned short data;
241
242 /* We need to set SCPCR to enable RTS/CTS */
243 data = __raw_readw(SCPCR);
244 /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
245 __raw_writew(data & 0x0fcf, SCPCR);
246
247 if (!(cflag & CRTSCTS)) {
248 /* We need to set SCPCR to enable RTS/CTS */
249 data = __raw_readw(SCPCR);
250 /* Clear out SCP7MD1,0, SCP4MD1,0,
251 Set SCP6MD1,0 = {01} (output) */
252 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
253
254 data = __raw_readb(SCPDR);
255 /* Set /RTS2 (bit6) = 0 */
256 __raw_writeb(data & 0xbf, SCPDR);
257 }
258 }
259 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
260 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
261 {
262 unsigned short data;
263
264 if (port->mapbase == 0xffe00000) {
265 data = __raw_readw(PSCR);
266 data &= ~0x03cf;
267 if (!(cflag & CRTSCTS))
268 data |= 0x0340;
269
270 __raw_writew(data, PSCR);
271 }
272 }
273 #elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
274 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
275 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
276 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
277 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
278 defined(CONFIG_CPU_SUBTYPE_SHX3)
279 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
280 {
281 if (!(cflag & CRTSCTS))
282 __raw_writew(0x0080, SCSPTR0); /* Set RTS = 1 */
283 }
284 #elif defined(CONFIG_CPU_SH4) && !defined(CONFIG_CPU_SH4A)
285 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
286 {
287 if (!(cflag & CRTSCTS))
288 __raw_writew(0x0080, SCSPTR2); /* Set RTS = 1 */
289 }
290 #else
291 static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
292 {
293 /* Nothing to do */
294 }
295 #endif
296
297 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
298 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
299 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
300 defined(CONFIG_CPU_SUBTYPE_SH7786)
301 static int scif_txfill(struct uart_port *port)
302 {
303 return sci_in(port, SCTFDR) & 0xff;
304 }
305
306 static int scif_txroom(struct uart_port *port)
307 {
308 return SCIF_TXROOM_MAX - scif_txfill(port);
309 }
310
311 static int scif_rxfill(struct uart_port *port)
312 {
313 return sci_in(port, SCRFDR) & 0xff;
314 }
315 #elif defined(CONFIG_CPU_SUBTYPE_SH7763)
316 static int scif_txfill(struct uart_port *port)
317 {
318 if (port->mapbase == 0xffe00000 ||
319 port->mapbase == 0xffe08000)
320 /* SCIF0/1*/
321 return sci_in(port, SCTFDR) & 0xff;
322 else
323 /* SCIF2 */
324 return sci_in(port, SCFDR) >> 8;
325 }
326
327 static int scif_txroom(struct uart_port *port)
328 {
329 if (port->mapbase == 0xffe00000 ||
330 port->mapbase == 0xffe08000)
331 /* SCIF0/1*/
332 return SCIF_TXROOM_MAX - scif_txfill(port);
333 else
334 /* SCIF2 */
335 return SCIF2_TXROOM_MAX - scif_txfill(port);
336 }
337
338 static int scif_rxfill(struct uart_port *port)
339 {
340 if ((port->mapbase == 0xffe00000) ||
341 (port->mapbase == 0xffe08000)) {
342 /* SCIF0/1*/
343 return sci_in(port, SCRFDR) & 0xff;
344 } else {
345 /* SCIF2 */
346 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
347 }
348 }
349 #else
350 static int scif_txfill(struct uart_port *port)
351 {
352 return sci_in(port, SCFDR) >> 8;
353 }
354
355 static int scif_txroom(struct uart_port *port)
356 {
357 return SCIF_TXROOM_MAX - scif_txfill(port);
358 }
359
360 static int scif_rxfill(struct uart_port *port)
361 {
362 return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
363 }
364 #endif
365
366 static int sci_txfill(struct uart_port *port)
367 {
368 return !(sci_in(port, SCxSR) & SCI_TDRE);
369 }
370
371 static int sci_txroom(struct uart_port *port)
372 {
373 return !sci_txfill(port);
374 }
375
376 static int sci_rxfill(struct uart_port *port)
377 {
378 return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
379 }
380
381 /* ********************************************************************** *
382 * the interrupt related routines *
383 * ********************************************************************** */
384
385 static void sci_transmit_chars(struct uart_port *port)
386 {
387 struct circ_buf *xmit = &port->state->xmit;
388 unsigned int stopped = uart_tx_stopped(port);
389 unsigned short status;
390 unsigned short ctrl;
391 int count;
392
393 status = sci_in(port, SCxSR);
394 if (!(status & SCxSR_TDxE(port))) {
395 ctrl = sci_in(port, SCSCR);
396 if (uart_circ_empty(xmit))
397 ctrl &= ~SCI_CTRL_FLAGS_TIE;
398 else
399 ctrl |= SCI_CTRL_FLAGS_TIE;
400 sci_out(port, SCSCR, ctrl);
401 return;
402 }
403
404 if (port->type == PORT_SCI)
405 count = sci_txroom(port);
406 else
407 count = scif_txroom(port);
408
409 do {
410 unsigned char c;
411
412 if (port->x_char) {
413 c = port->x_char;
414 port->x_char = 0;
415 } else if (!uart_circ_empty(xmit) && !stopped) {
416 c = xmit->buf[xmit->tail];
417 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
418 } else {
419 break;
420 }
421
422 sci_out(port, SCxTDR, c);
423
424 port->icount.tx++;
425 } while (--count > 0);
426
427 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
428
429 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
430 uart_write_wakeup(port);
431 if (uart_circ_empty(xmit)) {
432 sci_stop_tx(port);
433 } else {
434 ctrl = sci_in(port, SCSCR);
435
436 if (port->type != PORT_SCI) {
437 sci_in(port, SCxSR); /* Dummy read */
438 sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
439 }
440
441 ctrl |= SCI_CTRL_FLAGS_TIE;
442 sci_out(port, SCSCR, ctrl);
443 }
444 }
445
446 /* On SH3, SCIF may read end-of-break as a space->mark char */
447 #define STEPFN(c) ({int __c = (c); (((__c-1)|(__c)) == -1); })
448
449 static inline void sci_receive_chars(struct uart_port *port)
450 {
451 struct sci_port *sci_port = to_sci_port(port);
452 struct tty_struct *tty = port->state->port.tty;
453 int i, count, copied = 0;
454 unsigned short status;
455 unsigned char flag;
456
457 status = sci_in(port, SCxSR);
458 if (!(status & SCxSR_RDxF(port)))
459 return;
460
461 while (1) {
462 if (port->type == PORT_SCI)
463 count = sci_rxfill(port);
464 else
465 count = scif_rxfill(port);
466
467 /* Don't copy more bytes than there is room for in the buffer */
468 count = tty_buffer_request_room(tty, count);
469
470 /* If for any reason we can't copy more data, we're done! */
471 if (count == 0)
472 break;
473
474 if (port->type == PORT_SCI) {
475 char c = sci_in(port, SCxRDR);
476 if (uart_handle_sysrq_char(port, c) ||
477 sci_port->break_flag)
478 count = 0;
479 else
480 tty_insert_flip_char(tty, c, TTY_NORMAL);
481 } else {
482 for (i = 0; i < count; i++) {
483 char c = sci_in(port, SCxRDR);
484 status = sci_in(port, SCxSR);
485 #if defined(CONFIG_CPU_SH3)
486 /* Skip "chars" during break */
487 if (sci_port->break_flag) {
488 if ((c == 0) &&
489 (status & SCxSR_FER(port))) {
490 count--; i--;
491 continue;
492 }
493
494 /* Nonzero => end-of-break */
495 dev_dbg(port->dev, "debounce<%02x>\n", c);
496 sci_port->break_flag = 0;
497
498 if (STEPFN(c)) {
499 count--; i--;
500 continue;
501 }
502 }
503 #endif /* CONFIG_CPU_SH3 */
504 if (uart_handle_sysrq_char(port, c)) {
505 count--; i--;
506 continue;
507 }
508
509 /* Store data and status */
510 if (status & SCxSR_FER(port)) {
511 flag = TTY_FRAME;
512 dev_notice(port->dev, "frame error\n");
513 } else if (status & SCxSR_PER(port)) {
514 flag = TTY_PARITY;
515 dev_notice(port->dev, "parity error\n");
516 } else
517 flag = TTY_NORMAL;
518
519 tty_insert_flip_char(tty, c, flag);
520 }
521 }
522
523 sci_in(port, SCxSR); /* dummy read */
524 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
525
526 copied += count;
527 port->icount.rx += count;
528 }
529
530 if (copied) {
531 /* Tell the rest of the system the news. New characters! */
532 tty_flip_buffer_push(tty);
533 } else {
534 sci_in(port, SCxSR); /* dummy read */
535 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
536 }
537 }
538
539 #define SCI_BREAK_JIFFIES (HZ/20)
540 /* The sci generates interrupts during the break,
541 * 1 per millisecond or so during the break period, for 9600 baud.
542 * So dont bother disabling interrupts.
543 * But dont want more than 1 break event.
544 * Use a kernel timer to periodically poll the rx line until
545 * the break is finished.
546 */
547 static void sci_schedule_break_timer(struct sci_port *port)
548 {
549 port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
550 add_timer(&port->break_timer);
551 }
552 /* Ensure that two consecutive samples find the break over. */
553 static void sci_break_timer(unsigned long data)
554 {
555 struct sci_port *port = (struct sci_port *)data;
556
557 if (sci_rxd_in(&port->port) == 0) {
558 port->break_flag = 1;
559 sci_schedule_break_timer(port);
560 } else if (port->break_flag == 1) {
561 /* break is over. */
562 port->break_flag = 2;
563 sci_schedule_break_timer(port);
564 } else
565 port->break_flag = 0;
566 }
567
568 static inline int sci_handle_errors(struct uart_port *port)
569 {
570 int copied = 0;
571 unsigned short status = sci_in(port, SCxSR);
572 struct tty_struct *tty = port->state->port.tty;
573
574 if (status & SCxSR_ORER(port)) {
575 /* overrun error */
576 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
577 copied++;
578
579 dev_notice(port->dev, "overrun error");
580 }
581
582 if (status & SCxSR_FER(port)) {
583 if (sci_rxd_in(port) == 0) {
584 /* Notify of BREAK */
585 struct sci_port *sci_port = to_sci_port(port);
586
587 if (!sci_port->break_flag) {
588 sci_port->break_flag = 1;
589 sci_schedule_break_timer(sci_port);
590
591 /* Do sysrq handling. */
592 if (uart_handle_break(port))
593 return 0;
594
595 dev_dbg(port->dev, "BREAK detected\n");
596
597 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
598 copied++;
599 }
600
601 } else {
602 /* frame error */
603 if (tty_insert_flip_char(tty, 0, TTY_FRAME))
604 copied++;
605
606 dev_notice(port->dev, "frame error\n");
607 }
608 }
609
610 if (status & SCxSR_PER(port)) {
611 /* parity error */
612 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
613 copied++;
614
615 dev_notice(port->dev, "parity error");
616 }
617
618 if (copied)
619 tty_flip_buffer_push(tty);
620
621 return copied;
622 }
623
624 static inline int sci_handle_fifo_overrun(struct uart_port *port)
625 {
626 struct tty_struct *tty = port->state->port.tty;
627 int copied = 0;
628
629 if (port->type != PORT_SCIF)
630 return 0;
631
632 if ((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
633 sci_out(port, SCLSR, 0);
634
635 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
636 tty_flip_buffer_push(tty);
637
638 dev_notice(port->dev, "overrun error\n");
639 copied++;
640 }
641
642 return copied;
643 }
644
645 static inline int sci_handle_breaks(struct uart_port *port)
646 {
647 int copied = 0;
648 unsigned short status = sci_in(port, SCxSR);
649 struct tty_struct *tty = port->state->port.tty;
650 struct sci_port *s = to_sci_port(port);
651
652 if (uart_handle_break(port))
653 return 0;
654
655 if (!s->break_flag && status & SCxSR_BRK(port)) {
656 #if defined(CONFIG_CPU_SH3)
657 /* Debounce break */
658 s->break_flag = 1;
659 #endif
660 /* Notify of BREAK */
661 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
662 copied++;
663
664 dev_dbg(port->dev, "BREAK detected\n");
665 }
666
667 if (copied)
668 tty_flip_buffer_push(tty);
669
670 copied += sci_handle_fifo_overrun(port);
671
672 return copied;
673 }
674
675 static irqreturn_t sci_rx_interrupt(int irq, void *ptr)
676 {
677 #ifdef CONFIG_SERIAL_SH_SCI_DMA
678 struct uart_port *port = ptr;
679 struct sci_port *s = to_sci_port(port);
680
681 if (s->chan_rx) {
682 u16 scr = sci_in(port, SCSCR);
683 u16 ssr = sci_in(port, SCxSR);
684
685 /* Disable future Rx interrupts */
686 if (port->type == PORT_SCIFA) {
687 disable_irq_nosync(irq);
688 scr |= 0x4000;
689 } else {
690 scr &= ~SCI_CTRL_FLAGS_RIE;
691 }
692 sci_out(port, SCSCR, scr);
693 /* Clear current interrupt */
694 sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
695 dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n",
696 jiffies, s->rx_timeout);
697 mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
698
699 return IRQ_HANDLED;
700 }
701 #endif
702
703 /* I think sci_receive_chars has to be called irrespective
704 * of whether the I_IXOFF is set, otherwise, how is the interrupt
705 * to be disabled?
706 */
707 sci_receive_chars(ptr);
708
709 return IRQ_HANDLED;
710 }
711
712 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
713 {
714 struct uart_port *port = ptr;
715 unsigned long flags;
716
717 spin_lock_irqsave(&port->lock, flags);
718 sci_transmit_chars(port);
719 spin_unlock_irqrestore(&port->lock, flags);
720
721 return IRQ_HANDLED;
722 }
723
724 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
725 {
726 struct uart_port *port = ptr;
727
728 /* Handle errors */
729 if (port->type == PORT_SCI) {
730 if (sci_handle_errors(port)) {
731 /* discard character in rx buffer */
732 sci_in(port, SCxSR);
733 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
734 }
735 } else {
736 sci_handle_fifo_overrun(port);
737 sci_rx_interrupt(irq, ptr);
738 }
739
740 sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
741
742 /* Kick the transmission */
743 sci_tx_interrupt(irq, ptr);
744
745 return IRQ_HANDLED;
746 }
747
748 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
749 {
750 struct uart_port *port = ptr;
751
752 /* Handle BREAKs */
753 sci_handle_breaks(port);
754 sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
755
756 return IRQ_HANDLED;
757 }
758
759 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
760 {
761 unsigned short ssr_status, scr_status, err_enabled;
762 struct uart_port *port = ptr;
763 struct sci_port *s = to_sci_port(port);
764 irqreturn_t ret = IRQ_NONE;
765
766 ssr_status = sci_in(port, SCxSR);
767 scr_status = sci_in(port, SCSCR);
768 err_enabled = scr_status & (SCI_CTRL_FLAGS_REIE | SCI_CTRL_FLAGS_RIE);
769
770 /* Tx Interrupt */
771 if ((ssr_status & SCxSR_TDxE(port)) && (scr_status & SCI_CTRL_FLAGS_TIE) &&
772 !s->chan_tx)
773 ret = sci_tx_interrupt(irq, ptr);
774 /*
775 * Rx Interrupt: if we're using DMA, the DMA controller clears RDF /
776 * DR flags
777 */
778 if (((ssr_status & SCxSR_RDxF(port)) || s->chan_rx) &&
779 (scr_status & SCI_CTRL_FLAGS_RIE))
780 ret = sci_rx_interrupt(irq, ptr);
781 /* Error Interrupt */
782 if ((ssr_status & SCxSR_ERRORS(port)) && err_enabled)
783 ret = sci_er_interrupt(irq, ptr);
784 /* Break Interrupt */
785 if ((ssr_status & SCxSR_BRK(port)) && err_enabled)
786 ret = sci_br_interrupt(irq, ptr);
787
788 return ret;
789 }
790
791 /*
792 * Here we define a transistion notifier so that we can update all of our
793 * ports' baud rate when the peripheral clock changes.
794 */
795 static int sci_notifier(struct notifier_block *self,
796 unsigned long phase, void *p)
797 {
798 struct sh_sci_priv *priv = container_of(self,
799 struct sh_sci_priv, clk_nb);
800 struct sci_port *sci_port;
801 unsigned long flags;
802
803 if ((phase == CPUFREQ_POSTCHANGE) ||
804 (phase == CPUFREQ_RESUMECHANGE)) {
805 spin_lock_irqsave(&priv->lock, flags);
806 list_for_each_entry(sci_port, &priv->ports, node)
807 sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
808 spin_unlock_irqrestore(&priv->lock, flags);
809 }
810
811 return NOTIFY_OK;
812 }
813
814 static void sci_clk_enable(struct uart_port *port)
815 {
816 struct sci_port *sci_port = to_sci_port(port);
817
818 clk_enable(sci_port->iclk);
819 sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
820 clk_enable(sci_port->fclk);
821 }
822
823 static void sci_clk_disable(struct uart_port *port)
824 {
825 struct sci_port *sci_port = to_sci_port(port);
826
827 clk_disable(sci_port->fclk);
828 clk_disable(sci_port->iclk);
829 }
830
831 static int sci_request_irq(struct sci_port *port)
832 {
833 int i;
834 irqreturn_t (*handlers[4])(int irq, void *ptr) = {
835 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
836 sci_br_interrupt,
837 };
838 const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
839 "SCI Transmit Data Empty", "SCI Break" };
840
841 if (port->irqs[0] == port->irqs[1]) {
842 if (unlikely(!port->irqs[0]))
843 return -ENODEV;
844
845 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
846 IRQF_DISABLED, "sci", port)) {
847 dev_err(port->port.dev, "Can't allocate IRQ\n");
848 return -ENODEV;
849 }
850 } else {
851 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
852 if (unlikely(!port->irqs[i]))
853 continue;
854
855 if (request_irq(port->irqs[i], handlers[i],
856 IRQF_DISABLED, desc[i], port)) {
857 dev_err(port->port.dev, "Can't allocate IRQ\n");
858 return -ENODEV;
859 }
860 }
861 }
862
863 return 0;
864 }
865
866 static void sci_free_irq(struct sci_port *port)
867 {
868 int i;
869
870 if (port->irqs[0] == port->irqs[1])
871 free_irq(port->irqs[0], port);
872 else {
873 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
874 if (!port->irqs[i])
875 continue;
876
877 free_irq(port->irqs[i], port);
878 }
879 }
880 }
881
882 static unsigned int sci_tx_empty(struct uart_port *port)
883 {
884 unsigned short status = sci_in(port, SCxSR);
885 unsigned short in_tx_fifo = scif_txfill(port);
886
887 return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
888 }
889
890 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
891 {
892 /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
893 /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
894 /* If you have signals for DTR and DCD, please implement here. */
895 }
896
897 static unsigned int sci_get_mctrl(struct uart_port *port)
898 {
899 /* This routine is used for getting signals of: DTR, DCD, DSR, RI,
900 and CTS/RTS */
901
902 return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
903 }
904
905 #ifdef CONFIG_SERIAL_SH_SCI_DMA
906 static void sci_dma_tx_complete(void *arg)
907 {
908 struct sci_port *s = arg;
909 struct uart_port *port = &s->port;
910 struct circ_buf *xmit = &port->state->xmit;
911 unsigned long flags;
912
913 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
914
915 spin_lock_irqsave(&port->lock, flags);
916
917 xmit->tail += sg_dma_len(&s->sg_tx);
918 xmit->tail &= UART_XMIT_SIZE - 1;
919
920 port->icount.tx += sg_dma_len(&s->sg_tx);
921
922 async_tx_ack(s->desc_tx);
923 s->cookie_tx = -EINVAL;
924 s->desc_tx = NULL;
925
926 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
927 uart_write_wakeup(port);
928
929 if (!uart_circ_empty(xmit)) {
930 schedule_work(&s->work_tx);
931 } else if (port->type == PORT_SCIFA) {
932 u16 ctrl = sci_in(port, SCSCR);
933 sci_out(port, SCSCR, ctrl & ~SCI_CTRL_FLAGS_TIE);
934 }
935
936 spin_unlock_irqrestore(&port->lock, flags);
937 }
938
939 /* Locking: called with port lock held */
940 static int sci_dma_rx_push(struct sci_port *s, struct tty_struct *tty,
941 size_t count)
942 {
943 struct uart_port *port = &s->port;
944 int i, active, room;
945
946 room = tty_buffer_request_room(tty, count);
947
948 if (s->active_rx == s->cookie_rx[0]) {
949 active = 0;
950 } else if (s->active_rx == s->cookie_rx[1]) {
951 active = 1;
952 } else {
953 dev_err(port->dev, "cookie %d not found!\n", s->active_rx);
954 return 0;
955 }
956
957 if (room < count)
958 dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
959 count - room);
960 if (!room)
961 return room;
962
963 for (i = 0; i < room; i++)
964 tty_insert_flip_char(tty, ((u8 *)sg_virt(&s->sg_rx[active]))[i],
965 TTY_NORMAL);
966
967 port->icount.rx += room;
968
969 return room;
970 }
971
972 static void sci_dma_rx_complete(void *arg)
973 {
974 struct sci_port *s = arg;
975 struct uart_port *port = &s->port;
976 struct tty_struct *tty = port->state->port.tty;
977 unsigned long flags;
978 int count;
979
980 dev_dbg(port->dev, "%s(%d) active #%d\n", __func__, port->line, s->active_rx);
981
982 spin_lock_irqsave(&port->lock, flags);
983
984 count = sci_dma_rx_push(s, tty, s->buf_len_rx);
985
986 mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
987
988 spin_unlock_irqrestore(&port->lock, flags);
989
990 if (count)
991 tty_flip_buffer_push(tty);
992
993 schedule_work(&s->work_rx);
994 }
995
996 static void sci_start_rx(struct uart_port *port);
997 static void sci_start_tx(struct uart_port *port);
998
999 static void sci_rx_dma_release(struct sci_port *s, bool enable_pio)
1000 {
1001 struct dma_chan *chan = s->chan_rx;
1002 struct uart_port *port = &s->port;
1003
1004 s->chan_rx = NULL;
1005 s->cookie_rx[0] = s->cookie_rx[1] = -EINVAL;
1006 dma_release_channel(chan);
1007 dma_free_coherent(port->dev, s->buf_len_rx * 2,
1008 sg_virt(&s->sg_rx[0]), sg_dma_address(&s->sg_rx[0]));
1009 if (enable_pio)
1010 sci_start_rx(port);
1011 }
1012
1013 static void sci_tx_dma_release(struct sci_port *s, bool enable_pio)
1014 {
1015 struct dma_chan *chan = s->chan_tx;
1016 struct uart_port *port = &s->port;
1017
1018 s->chan_tx = NULL;
1019 s->cookie_tx = -EINVAL;
1020 dma_release_channel(chan);
1021 if (enable_pio)
1022 sci_start_tx(port);
1023 }
1024
1025 static void sci_submit_rx(struct sci_port *s)
1026 {
1027 struct dma_chan *chan = s->chan_rx;
1028 int i;
1029
1030 for (i = 0; i < 2; i++) {
1031 struct scatterlist *sg = &s->sg_rx[i];
1032 struct dma_async_tx_descriptor *desc;
1033
1034 desc = chan->device->device_prep_slave_sg(chan,
1035 sg, 1, DMA_FROM_DEVICE, DMA_PREP_INTERRUPT);
1036
1037 if (desc) {
1038 s->desc_rx[i] = desc;
1039 desc->callback = sci_dma_rx_complete;
1040 desc->callback_param = s;
1041 s->cookie_rx[i] = desc->tx_submit(desc);
1042 }
1043
1044 if (!desc || s->cookie_rx[i] < 0) {
1045 if (i) {
1046 async_tx_ack(s->desc_rx[0]);
1047 s->cookie_rx[0] = -EINVAL;
1048 }
1049 if (desc) {
1050 async_tx_ack(desc);
1051 s->cookie_rx[i] = -EINVAL;
1052 }
1053 dev_warn(s->port.dev,
1054 "failed to re-start DMA, using PIO\n");
1055 sci_rx_dma_release(s, true);
1056 return;
1057 }
1058 dev_dbg(s->port.dev, "%s(): cookie %d to #%d\n", __func__,
1059 s->cookie_rx[i], i);
1060 }
1061
1062 s->active_rx = s->cookie_rx[0];
1063
1064 dma_async_issue_pending(chan);
1065 }
1066
1067 static void work_fn_rx(struct work_struct *work)
1068 {
1069 struct sci_port *s = container_of(work, struct sci_port, work_rx);
1070 struct uart_port *port = &s->port;
1071 struct dma_async_tx_descriptor *desc;
1072 int new;
1073
1074 if (s->active_rx == s->cookie_rx[0]) {
1075 new = 0;
1076 } else if (s->active_rx == s->cookie_rx[1]) {
1077 new = 1;
1078 } else {
1079 dev_err(port->dev, "cookie %d not found!\n", s->active_rx);
1080 return;
1081 }
1082 desc = s->desc_rx[new];
1083
1084 if (dma_async_is_tx_complete(s->chan_rx, s->active_rx, NULL, NULL) !=
1085 DMA_SUCCESS) {
1086 /* Handle incomplete DMA receive */
1087 struct tty_struct *tty = port->state->port.tty;
1088 struct dma_chan *chan = s->chan_rx;
1089 struct sh_desc *sh_desc = container_of(desc, struct sh_desc,
1090 async_tx);
1091 unsigned long flags;
1092 int count;
1093
1094 chan->device->device_terminate_all(chan);
1095 dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
1096 sh_desc->partial, sh_desc->cookie);
1097
1098 spin_lock_irqsave(&port->lock, flags);
1099 count = sci_dma_rx_push(s, tty, sh_desc->partial);
1100 spin_unlock_irqrestore(&port->lock, flags);
1101
1102 if (count)
1103 tty_flip_buffer_push(tty);
1104
1105 sci_submit_rx(s);
1106
1107 return;
1108 }
1109
1110 s->cookie_rx[new] = desc->tx_submit(desc);
1111 if (s->cookie_rx[new] < 0) {
1112 dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n");
1113 sci_rx_dma_release(s, true);
1114 return;
1115 }
1116
1117 s->active_rx = s->cookie_rx[!new];
1118
1119 dev_dbg(port->dev, "%s: cookie %d #%d, new active #%d\n", __func__,
1120 s->cookie_rx[new], new, s->active_rx);
1121 }
1122
1123 static void work_fn_tx(struct work_struct *work)
1124 {
1125 struct sci_port *s = container_of(work, struct sci_port, work_tx);
1126 struct dma_async_tx_descriptor *desc;
1127 struct dma_chan *chan = s->chan_tx;
1128 struct uart_port *port = &s->port;
1129 struct circ_buf *xmit = &port->state->xmit;
1130 struct scatterlist *sg = &s->sg_tx;
1131
1132 /*
1133 * DMA is idle now.
1134 * Port xmit buffer is already mapped, and it is one page... Just adjust
1135 * offsets and lengths. Since it is a circular buffer, we have to
1136 * transmit till the end, and then the rest. Take the port lock to get a
1137 * consistent xmit buffer state.
1138 */
1139 spin_lock_irq(&port->lock);
1140 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
1141 sg_dma_address(sg) = (sg_dma_address(sg) & ~(UART_XMIT_SIZE - 1)) +
1142 sg->offset;
1143 sg_dma_len(sg) = min((int)CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE),
1144 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE));
1145 spin_unlock_irq(&port->lock);
1146
1147 BUG_ON(!sg_dma_len(sg));
1148
1149 desc = chan->device->device_prep_slave_sg(chan,
1150 sg, s->sg_len_tx, DMA_TO_DEVICE,
1151 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1152 if (!desc) {
1153 /* switch to PIO */
1154 sci_tx_dma_release(s, true);
1155 return;
1156 }
1157
1158 dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE);
1159
1160 spin_lock_irq(&port->lock);
1161 s->desc_tx = desc;
1162 desc->callback = sci_dma_tx_complete;
1163 desc->callback_param = s;
1164 spin_unlock_irq(&port->lock);
1165 s->cookie_tx = desc->tx_submit(desc);
1166 if (s->cookie_tx < 0) {
1167 dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n");
1168 /* switch to PIO */
1169 sci_tx_dma_release(s, true);
1170 return;
1171 }
1172
1173 dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n", __func__,
1174 xmit->buf, xmit->tail, xmit->head, s->cookie_tx);
1175
1176 dma_async_issue_pending(chan);
1177 }
1178 #endif
1179
1180 static void sci_start_tx(struct uart_port *port)
1181 {
1182 struct sci_port *s = to_sci_port(port);
1183 unsigned short ctrl;
1184
1185 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1186 if (port->type == PORT_SCIFA) {
1187 u16 new, scr = sci_in(port, SCSCR);
1188 if (s->chan_tx)
1189 new = scr | 0x8000;
1190 else
1191 new = scr & ~0x8000;
1192 if (new != scr)
1193 sci_out(port, SCSCR, new);
1194 }
1195 if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
1196 s->cookie_tx < 0)
1197 schedule_work(&s->work_tx);
1198 #endif
1199 if (!s->chan_tx || port->type == PORT_SCIFA) {
1200 /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
1201 ctrl = sci_in(port, SCSCR);
1202 sci_out(port, SCSCR, ctrl | SCI_CTRL_FLAGS_TIE);
1203 }
1204 }
1205
1206 static void sci_stop_tx(struct uart_port *port)
1207 {
1208 unsigned short ctrl;
1209
1210 /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1211 ctrl = sci_in(port, SCSCR);
1212 if (port->type == PORT_SCIFA)
1213 ctrl &= ~0x8000;
1214 ctrl &= ~SCI_CTRL_FLAGS_TIE;
1215 sci_out(port, SCSCR, ctrl);
1216 }
1217
1218 static void sci_start_rx(struct uart_port *port)
1219 {
1220 unsigned short ctrl = SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
1221
1222 /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
1223 ctrl |= sci_in(port, SCSCR);
1224 if (port->type == PORT_SCIFA)
1225 ctrl &= ~0x4000;
1226 sci_out(port, SCSCR, ctrl);
1227 }
1228
1229 static void sci_stop_rx(struct uart_port *port)
1230 {
1231 unsigned short ctrl;
1232
1233 /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
1234 ctrl = sci_in(port, SCSCR);
1235 if (port->type == PORT_SCIFA)
1236 ctrl &= ~0x4000;
1237 ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
1238 sci_out(port, SCSCR, ctrl);
1239 }
1240
1241 static void sci_enable_ms(struct uart_port *port)
1242 {
1243 /* Nothing here yet .. */
1244 }
1245
1246 static void sci_break_ctl(struct uart_port *port, int break_state)
1247 {
1248 /* Nothing here yet .. */
1249 }
1250
1251 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1252 static bool filter(struct dma_chan *chan, void *slave)
1253 {
1254 struct sh_dmae_slave *param = slave;
1255
1256 dev_dbg(chan->device->dev, "%s: slave ID %d\n", __func__,
1257 param->slave_id);
1258
1259 if (param->dma_dev == chan->device->dev) {
1260 chan->private = param;
1261 return true;
1262 } else {
1263 return false;
1264 }
1265 }
1266
1267 static void rx_timer_fn(unsigned long arg)
1268 {
1269 struct sci_port *s = (struct sci_port *)arg;
1270 struct uart_port *port = &s->port;
1271 u16 scr = sci_in(port, SCSCR);
1272
1273 if (port->type == PORT_SCIFA) {
1274 scr &= ~0x4000;
1275 enable_irq(s->irqs[1]);
1276 }
1277 sci_out(port, SCSCR, scr | SCI_CTRL_FLAGS_RIE);
1278 dev_dbg(port->dev, "DMA Rx timed out\n");
1279 schedule_work(&s->work_rx);
1280 }
1281
1282 static void sci_request_dma(struct uart_port *port)
1283 {
1284 struct sci_port *s = to_sci_port(port);
1285 struct sh_dmae_slave *param;
1286 struct dma_chan *chan;
1287 dma_cap_mask_t mask;
1288 int nent;
1289
1290 dev_dbg(port->dev, "%s: port %d DMA %p\n", __func__,
1291 port->line, s->dma_dev);
1292
1293 if (!s->dma_dev)
1294 return;
1295
1296 dma_cap_zero(mask);
1297 dma_cap_set(DMA_SLAVE, mask);
1298
1299 param = &s->param_tx;
1300
1301 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_TX */
1302 param->slave_id = s->slave_tx;
1303 param->dma_dev = s->dma_dev;
1304
1305 s->cookie_tx = -EINVAL;
1306 chan = dma_request_channel(mask, filter, param);
1307 dev_dbg(port->dev, "%s: TX: got channel %p\n", __func__, chan);
1308 if (chan) {
1309 s->chan_tx = chan;
1310 sg_init_table(&s->sg_tx, 1);
1311 /* UART circular tx buffer is an aligned page. */
1312 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
1313 sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
1314 UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
1315 nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
1316 if (!nent)
1317 sci_tx_dma_release(s, false);
1318 else
1319 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1320 sg_dma_len(&s->sg_tx),
1321 port->state->xmit.buf, sg_dma_address(&s->sg_tx));
1322
1323 s->sg_len_tx = nent;
1324
1325 INIT_WORK(&s->work_tx, work_fn_tx);
1326 }
1327
1328 param = &s->param_rx;
1329
1330 /* Slave ID, e.g., SHDMA_SLAVE_SCIF0_RX */
1331 param->slave_id = s->slave_rx;
1332 param->dma_dev = s->dma_dev;
1333
1334 chan = dma_request_channel(mask, filter, param);
1335 dev_dbg(port->dev, "%s: RX: got channel %p\n", __func__, chan);
1336 if (chan) {
1337 dma_addr_t dma[2];
1338 void *buf[2];
1339 int i;
1340
1341 s->chan_rx = chan;
1342
1343 s->buf_len_rx = 2 * max(16, (int)port->fifosize);
1344 buf[0] = dma_alloc_coherent(port->dev, s->buf_len_rx * 2,
1345 &dma[0], GFP_KERNEL);
1346
1347 if (!buf[0]) {
1348 dev_warn(port->dev,
1349 "failed to allocate dma buffer, using PIO\n");
1350 sci_rx_dma_release(s, true);
1351 return;
1352 }
1353
1354 buf[1] = buf[0] + s->buf_len_rx;
1355 dma[1] = dma[0] + s->buf_len_rx;
1356
1357 for (i = 0; i < 2; i++) {
1358 struct scatterlist *sg = &s->sg_rx[i];
1359
1360 sg_init_table(sg, 1);
1361 sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
1362 (int)buf[i] & ~PAGE_MASK);
1363 sg_dma_address(sg) = dma[i];
1364 }
1365
1366 INIT_WORK(&s->work_rx, work_fn_rx);
1367 setup_timer(&s->rx_timer, rx_timer_fn, (unsigned long)s);
1368
1369 sci_submit_rx(s);
1370 }
1371 }
1372
1373 static void sci_free_dma(struct uart_port *port)
1374 {
1375 struct sci_port *s = to_sci_port(port);
1376
1377 if (!s->dma_dev)
1378 return;
1379
1380 if (s->chan_tx)
1381 sci_tx_dma_release(s, false);
1382 if (s->chan_rx)
1383 sci_rx_dma_release(s, false);
1384 }
1385 #endif
1386
1387 static int sci_startup(struct uart_port *port)
1388 {
1389 struct sci_port *s = to_sci_port(port);
1390
1391 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1392
1393 if (s->enable)
1394 s->enable(port);
1395
1396 sci_request_irq(s);
1397 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1398 sci_request_dma(port);
1399 #endif
1400 sci_start_tx(port);
1401 sci_start_rx(port);
1402
1403 return 0;
1404 }
1405
1406 static void sci_shutdown(struct uart_port *port)
1407 {
1408 struct sci_port *s = to_sci_port(port);
1409
1410 dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);
1411
1412 sci_stop_rx(port);
1413 sci_stop_tx(port);
1414 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1415 sci_free_dma(port);
1416 #endif
1417 sci_free_irq(s);
1418
1419 if (s->disable)
1420 s->disable(port);
1421 }
1422
1423 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1424 struct ktermios *old)
1425 {
1426 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1427 struct sci_port *s = to_sci_port(port);
1428 #endif
1429 unsigned int status, baud, smr_val, max_baud;
1430 int t = -1;
1431 u16 scfcr = 0;
1432
1433 /*
1434 * earlyprintk comes here early on with port->uartclk set to zero.
1435 * the clock framework is not up and running at this point so here
1436 * we assume that 115200 is the maximum baud rate. please note that
1437 * the baud rate is not programmed during earlyprintk - it is assumed
1438 * that the previous boot loader has enabled required clocks and
1439 * setup the baud rate generator hardware for us already.
1440 */
1441 max_baud = port->uartclk ? port->uartclk / 16 : 115200;
1442
1443 baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
1444 if (likely(baud && port->uartclk))
1445 t = SCBRR_VALUE(baud, port->uartclk);
1446
1447 do {
1448 status = sci_in(port, SCxSR);
1449 } while (!(status & SCxSR_TEND(port)));
1450
1451 sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1452
1453 if (port->type != PORT_SCI)
1454 sci_out(port, SCFCR, scfcr | SCFCR_RFRST | SCFCR_TFRST);
1455
1456 smr_val = sci_in(port, SCSMR) & 3;
1457 if ((termios->c_cflag & CSIZE) == CS7)
1458 smr_val |= 0x40;
1459 if (termios->c_cflag & PARENB)
1460 smr_val |= 0x20;
1461 if (termios->c_cflag & PARODD)
1462 smr_val |= 0x30;
1463 if (termios->c_cflag & CSTOPB)
1464 smr_val |= 0x08;
1465
1466 uart_update_timeout(port, termios->c_cflag, baud);
1467
1468 sci_out(port, SCSMR, smr_val);
1469
1470 dev_dbg(port->dev, "%s: SMR %x, t %x, SCSCR %x\n", __func__, smr_val, t,
1471 SCSCR_INIT(port));
1472
1473 if (t > 0) {
1474 if (t >= 256) {
1475 sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1476 t >>= 2;
1477 } else
1478 sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1479
1480 sci_out(port, SCBRR, t);
1481 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1482 }
1483
1484 sci_init_pins(port, termios->c_cflag);
1485 sci_out(port, SCFCR, scfcr | ((termios->c_cflag & CRTSCTS) ? SCFCR_MCE : 0));
1486
1487 sci_out(port, SCSCR, SCSCR_INIT(port));
1488
1489 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1490 /*
1491 * Calculate delay for 1.5 DMA buffers: see
1492 * drivers/serial/serial_core.c::uart_update_timeout(). With 10 bits
1493 * (CS8), 250Hz, 115200 baud and 64 bytes FIFO, the above function
1494 * calculates 1 jiffie for the data plus 5 jiffies for the "slop(e)."
1495 * Then below we calculate 3 jiffies (12ms) for 1.5 DMA buffers (3 FIFO
1496 * sizes), but it has been found out experimentally, that this is not
1497 * enough: the driver too often needlessly runs on a DMA timeout. 20ms
1498 * as a minimum seem to work perfectly.
1499 */
1500 if (s->chan_rx) {
1501 s->rx_timeout = (port->timeout - HZ / 50) * s->buf_len_rx * 3 /
1502 port->fifosize / 2;
1503 dev_dbg(port->dev,
1504 "DMA Rx t-out %ums, tty t-out %u jiffies\n",
1505 s->rx_timeout * 1000 / HZ, port->timeout);
1506 if (s->rx_timeout < msecs_to_jiffies(20))
1507 s->rx_timeout = msecs_to_jiffies(20);
1508 }
1509 #endif
1510
1511 if ((termios->c_cflag & CREAD) != 0)
1512 sci_start_rx(port);
1513 }
1514
1515 static const char *sci_type(struct uart_port *port)
1516 {
1517 switch (port->type) {
1518 case PORT_IRDA:
1519 return "irda";
1520 case PORT_SCI:
1521 return "sci";
1522 case PORT_SCIF:
1523 return "scif";
1524 case PORT_SCIFA:
1525 return "scifa";
1526 }
1527
1528 return NULL;
1529 }
1530
1531 static void sci_release_port(struct uart_port *port)
1532 {
1533 /* Nothing here yet .. */
1534 }
1535
1536 static int sci_request_port(struct uart_port *port)
1537 {
1538 /* Nothing here yet .. */
1539 return 0;
1540 }
1541
1542 static void sci_config_port(struct uart_port *port, int flags)
1543 {
1544 struct sci_port *s = to_sci_port(port);
1545
1546 port->type = s->type;
1547
1548 if (port->membase)
1549 return;
1550
1551 if (port->flags & UPF_IOREMAP) {
1552 port->membase = ioremap_nocache(port->mapbase, 0x40);
1553
1554 if (IS_ERR(port->membase))
1555 dev_err(port->dev, "can't remap port#%d\n", port->line);
1556 } else {
1557 /*
1558 * For the simple (and majority of) cases where we don't
1559 * need to do any remapping, just cast the cookie
1560 * directly.
1561 */
1562 port->membase = (void __iomem *)port->mapbase;
1563 }
1564 }
1565
1566 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1567 {
1568 struct sci_port *s = to_sci_port(port);
1569
1570 if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
1571 return -EINVAL;
1572 if (ser->baud_base < 2400)
1573 /* No paper tape reader for Mitch.. */
1574 return -EINVAL;
1575
1576 return 0;
1577 }
1578
1579 static struct uart_ops sci_uart_ops = {
1580 .tx_empty = sci_tx_empty,
1581 .set_mctrl = sci_set_mctrl,
1582 .get_mctrl = sci_get_mctrl,
1583 .start_tx = sci_start_tx,
1584 .stop_tx = sci_stop_tx,
1585 .stop_rx = sci_stop_rx,
1586 .enable_ms = sci_enable_ms,
1587 .break_ctl = sci_break_ctl,
1588 .startup = sci_startup,
1589 .shutdown = sci_shutdown,
1590 .set_termios = sci_set_termios,
1591 .type = sci_type,
1592 .release_port = sci_release_port,
1593 .request_port = sci_request_port,
1594 .config_port = sci_config_port,
1595 .verify_port = sci_verify_port,
1596 #ifdef CONFIG_CONSOLE_POLL
1597 .poll_get_char = sci_poll_get_char,
1598 .poll_put_char = sci_poll_put_char,
1599 #endif
1600 };
1601
1602 static int __devinit sci_init_single(struct platform_device *dev,
1603 struct sci_port *sci_port,
1604 unsigned int index,
1605 struct plat_sci_port *p)
1606 {
1607 struct uart_port *port = &sci_port->port;
1608
1609 port->ops = &sci_uart_ops;
1610 port->iotype = UPIO_MEM;
1611 port->line = index;
1612
1613 switch (p->type) {
1614 case PORT_SCIFA:
1615 port->fifosize = 64;
1616 break;
1617 case PORT_SCIF:
1618 port->fifosize = 16;
1619 break;
1620 default:
1621 port->fifosize = 1;
1622 break;
1623 }
1624
1625 if (dev) {
1626 sci_port->iclk = clk_get(&dev->dev, "sci_ick");
1627 if (IS_ERR(sci_port->iclk)) {
1628 sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
1629 if (IS_ERR(sci_port->iclk)) {
1630 dev_err(&dev->dev, "can't get iclk\n");
1631 return PTR_ERR(sci_port->iclk);
1632 }
1633 }
1634
1635 /*
1636 * The function clock is optional, ignore it if we can't
1637 * find it.
1638 */
1639 sci_port->fclk = clk_get(&dev->dev, "sci_fck");
1640 if (IS_ERR(sci_port->fclk))
1641 sci_port->fclk = NULL;
1642
1643 sci_port->enable = sci_clk_enable;
1644 sci_port->disable = sci_clk_disable;
1645 port->dev = &dev->dev;
1646 }
1647
1648 sci_port->break_timer.data = (unsigned long)sci_port;
1649 sci_port->break_timer.function = sci_break_timer;
1650 init_timer(&sci_port->break_timer);
1651
1652 port->mapbase = p->mapbase;
1653 port->membase = p->membase;
1654
1655 port->irq = p->irqs[SCIx_TXI_IRQ];
1656 port->flags = p->flags;
1657 sci_port->type = port->type = p->type;
1658
1659 #ifdef CONFIG_SERIAL_SH_SCI_DMA
1660 sci_port->dma_dev = p->dma_dev;
1661 sci_port->slave_tx = p->dma_slave_tx;
1662 sci_port->slave_rx = p->dma_slave_rx;
1663
1664 dev_dbg(port->dev, "%s: DMA device %p, tx %d, rx %d\n", __func__,
1665 p->dma_dev, p->dma_slave_tx, p->dma_slave_rx);
1666 #endif
1667
1668 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
1669 return 0;
1670 }
1671
1672 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1673 static struct tty_driver *serial_console_device(struct console *co, int *index)
1674 {
1675 struct uart_driver *p = &sci_uart_driver;
1676 *index = co->index;
1677 return p->tty_driver;
1678 }
1679
1680 static void serial_console_putchar(struct uart_port *port, int ch)
1681 {
1682 sci_poll_put_char(port, ch);
1683 }
1684
1685 /*
1686 * Print a string to the serial port trying not to disturb
1687 * any possible real use of the port...
1688 */
1689 static void serial_console_write(struct console *co, const char *s,
1690 unsigned count)
1691 {
1692 struct uart_port *port = co->data;
1693 struct sci_port *sci_port = to_sci_port(port);
1694 unsigned short bits;
1695
1696 if (sci_port->enable)
1697 sci_port->enable(port);
1698
1699 uart_console_write(port, s, count, serial_console_putchar);
1700
1701 /* wait until fifo is empty and last bit has been transmitted */
1702 bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
1703 while ((sci_in(port, SCxSR) & bits) != bits)
1704 cpu_relax();
1705
1706 if (sci_port->disable)
1707 sci_port->disable(port);
1708 }
1709
1710 static int __devinit serial_console_setup(struct console *co, char *options)
1711 {
1712 struct sci_port *sci_port;
1713 struct uart_port *port;
1714 int baud = 115200;
1715 int bits = 8;
1716 int parity = 'n';
1717 int flow = 'n';
1718 int ret;
1719
1720 /*
1721 * Check whether an invalid uart number has been specified, and
1722 * if so, search for the first available port that does have
1723 * console support.
1724 */
1725 if (co->index >= SCI_NPORTS)
1726 co->index = 0;
1727
1728 if (co->data) {
1729 port = co->data;
1730 sci_port = to_sci_port(port);
1731 } else {
1732 sci_port = &sci_ports[co->index];
1733 port = &sci_port->port;
1734 co->data = port;
1735 }
1736
1737 /*
1738 * Also need to check port->type, we don't actually have any
1739 * UPIO_PORT ports, but uart_report_port() handily misreports
1740 * it anyways if we don't have a port available by the time this is
1741 * called.
1742 */
1743 if (!port->type)
1744 return -ENODEV;
1745
1746 sci_config_port(port, 0);
1747
1748 if (sci_port->enable)
1749 sci_port->enable(port);
1750
1751 if (options)
1752 uart_parse_options(options, &baud, &parity, &bits, &flow);
1753
1754 ret = uart_set_options(port, co, baud, parity, bits, flow);
1755 #if defined(__H8300H__) || defined(__H8300S__)
1756 /* disable rx interrupt */
1757 if (ret == 0)
1758 sci_stop_rx(port);
1759 #endif
1760 /* TODO: disable clock */
1761 return ret;
1762 }
1763
1764 static struct console serial_console = {
1765 .name = "ttySC",
1766 .device = serial_console_device,
1767 .write = serial_console_write,
1768 .setup = serial_console_setup,
1769 .flags = CON_PRINTBUFFER,
1770 .index = -1,
1771 };
1772
1773 static int __init sci_console_init(void)
1774 {
1775 register_console(&serial_console);
1776 return 0;
1777 }
1778 console_initcall(sci_console_init);
1779
1780 static struct sci_port early_serial_port;
1781 static struct console early_serial_console = {
1782 .name = "early_ttySC",
1783 .write = serial_console_write,
1784 .flags = CON_PRINTBUFFER,
1785 };
1786 static char early_serial_buf[32];
1787
1788 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1789
1790 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1791 #define SCI_CONSOLE (&serial_console)
1792 #else
1793 #define SCI_CONSOLE 0
1794 #endif
1795
1796 static char banner[] __initdata =
1797 KERN_INFO "SuperH SCI(F) driver initialized\n";
1798
1799 static struct uart_driver sci_uart_driver = {
1800 .owner = THIS_MODULE,
1801 .driver_name = "sci",
1802 .dev_name = "ttySC",
1803 .major = SCI_MAJOR,
1804 .minor = SCI_MINOR_START,
1805 .nr = SCI_NPORTS,
1806 .cons = SCI_CONSOLE,
1807 };
1808
1809
1810 static int sci_remove(struct platform_device *dev)
1811 {
1812 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1813 struct sci_port *p;
1814 unsigned long flags;
1815
1816 cpufreq_unregister_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1817
1818 spin_lock_irqsave(&priv->lock, flags);
1819 list_for_each_entry(p, &priv->ports, node) {
1820 uart_remove_one_port(&sci_uart_driver, &p->port);
1821 clk_put(p->iclk);
1822 clk_put(p->fclk);
1823 }
1824 spin_unlock_irqrestore(&priv->lock, flags);
1825
1826 kfree(priv);
1827 return 0;
1828 }
1829
1830 static int __devinit sci_probe_single(struct platform_device *dev,
1831 unsigned int index,
1832 struct plat_sci_port *p,
1833 struct sci_port *sciport)
1834 {
1835 struct sh_sci_priv *priv = platform_get_drvdata(dev);
1836 unsigned long flags;
1837 int ret;
1838
1839 /* Sanity check */
1840 if (unlikely(index >= SCI_NPORTS)) {
1841 dev_notice(&dev->dev, "Attempting to register port "
1842 "%d when only %d are available.\n",
1843 index+1, SCI_NPORTS);
1844 dev_notice(&dev->dev, "Consider bumping "
1845 "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1846 return 0;
1847 }
1848
1849 ret = sci_init_single(dev, sciport, index, p);
1850 if (ret)
1851 return ret;
1852
1853 ret = uart_add_one_port(&sci_uart_driver, &sciport->port);
1854 if (ret)
1855 return ret;
1856
1857 INIT_LIST_HEAD(&sciport->node);
1858
1859 spin_lock_irqsave(&priv->lock, flags);
1860 list_add(&sciport->node, &priv->ports);
1861 spin_unlock_irqrestore(&priv->lock, flags);
1862
1863 return 0;
1864 }
1865
1866 /*
1867 * Register a set of serial devices attached to a platform device. The
1868 * list is terminated with a zero flags entry, which means we expect
1869 * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1870 * remapping (such as sh64) should also set UPF_IOREMAP.
1871 */
1872 static int __devinit sci_probe(struct platform_device *dev)
1873 {
1874 struct plat_sci_port *p = dev->dev.platform_data;
1875 struct sh_sci_priv *priv;
1876 int i, ret = -EINVAL;
1877
1878 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1879 if (is_early_platform_device(dev)) {
1880 if (dev->id == -1)
1881 return -ENOTSUPP;
1882 early_serial_console.index = dev->id;
1883 early_serial_console.data = &early_serial_port.port;
1884 sci_init_single(NULL, &early_serial_port, dev->id, p);
1885 serial_console_setup(&early_serial_console, early_serial_buf);
1886 if (!strstr(early_serial_buf, "keep"))
1887 early_serial_console.flags |= CON_BOOT;
1888 register_console(&early_serial_console);
1889 return 0;
1890 }
1891 #endif
1892
1893 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1894 if (!priv)
1895 return -ENOMEM;
1896
1897 INIT_LIST_HEAD(&priv->ports);
1898 spin_lock_init(&priv->lock);
1899 platform_set_drvdata(dev, priv);
1900
1901 priv->clk_nb.notifier_call = sci_notifier;
1902 cpufreq_register_notifier(&priv->clk_nb, CPUFREQ_TRANSITION_NOTIFIER);
1903
1904 if (dev->id != -1) {
1905 ret = sci_probe_single(dev, dev->id, p, &sci_ports[dev->id]);
1906 if (ret)
1907 goto err_unreg;
1908 } else {
1909 for (i = 0; p && p->flags != 0; p++, i++) {
1910 ret = sci_probe_single(dev, i, p, &sci_ports[i]);
1911 if (ret)
1912 goto err_unreg;
1913 }
1914 }
1915
1916 #ifdef CONFIG_SH_STANDARD_BIOS
1917 sh_bios_gdb_detach();
1918 #endif
1919
1920 return 0;
1921
1922 err_unreg:
1923 sci_remove(dev);
1924 return ret;
1925 }
1926
1927 static int sci_suspend(struct device *dev)
1928 {
1929 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1930 struct sci_port *p;
1931 unsigned long flags;
1932
1933 spin_lock_irqsave(&priv->lock, flags);
1934 list_for_each_entry(p, &priv->ports, node)
1935 uart_suspend_port(&sci_uart_driver, &p->port);
1936 spin_unlock_irqrestore(&priv->lock, flags);
1937
1938 return 0;
1939 }
1940
1941 static int sci_resume(struct device *dev)
1942 {
1943 struct sh_sci_priv *priv = dev_get_drvdata(dev);
1944 struct sci_port *p;
1945 unsigned long flags;
1946
1947 spin_lock_irqsave(&priv->lock, flags);
1948 list_for_each_entry(p, &priv->ports, node)
1949 uart_resume_port(&sci_uart_driver, &p->port);
1950 spin_unlock_irqrestore(&priv->lock, flags);
1951
1952 return 0;
1953 }
1954
1955 static const struct dev_pm_ops sci_dev_pm_ops = {
1956 .suspend = sci_suspend,
1957 .resume = sci_resume,
1958 };
1959
1960 static struct platform_driver sci_driver = {
1961 .probe = sci_probe,
1962 .remove = sci_remove,
1963 .driver = {
1964 .name = "sh-sci",
1965 .owner = THIS_MODULE,
1966 .pm = &sci_dev_pm_ops,
1967 },
1968 };
1969
1970 static int __init sci_init(void)
1971 {
1972 int ret;
1973
1974 printk(banner);
1975
1976 ret = uart_register_driver(&sci_uart_driver);
1977 if (likely(ret == 0)) {
1978 ret = platform_driver_register(&sci_driver);
1979 if (unlikely(ret))
1980 uart_unregister_driver(&sci_uart_driver);
1981 }
1982
1983 return ret;
1984 }
1985
1986 static void __exit sci_exit(void)
1987 {
1988 platform_driver_unregister(&sci_driver);
1989 uart_unregister_driver(&sci_uart_driver);
1990 }
1991
1992 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1993 early_platform_init_buffer("earlyprintk", &sci_driver,
1994 early_serial_buf, ARRAY_SIZE(early_serial_buf));
1995 #endif
1996 module_init(sci_init);
1997 module_exit(sci_exit);
1998
1999 MODULE_LICENSE("GPL");
2000 MODULE_ALIAS("platform:sh-sci");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree