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iwlwifi: port to cfg80211 rfkill
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob83d31606dd00dad721aec8003e85209214a3c24a
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-sta.h"
55 #include "iwl-3945.h"
56 #include "iwl-helpers.h"
57 #include "iwl-core.h"
58 #include "iwl-dev.h"
59
60 /*
61 * module name, copyright, version, etc.
62 */
63
64 #define DRV_DESCRIPTION \
65 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66
67 #ifdef CONFIG_IWLWIFI_DEBUG
68 #define VD "d"
69 #else
70 #define VD
71 #endif
72
73 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
74 #define VS "s"
75 #else
76 #define VS
77 #endif
78
79 #define IWL39_VERSION "1.2.26k" VD VS
80 #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
81 #define DRV_AUTHOR "<ilw@linux.intel.com>"
82 #define DRV_VERSION IWL39_VERSION
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89
90 /* module parameters */
91 struct iwl_mod_params iwl3945_mod_params = {
92 .num_of_queues = IWL39_MAX_NUM_QUEUES,
93 .sw_crypto = 1,
94 .restart_fw = 1,
95 /* the rest are 0 by default */
96 };
97
98 /**
99 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
100 * @priv: eeprom and antenna fields are used to determine antenna flags
101 *
102 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
103 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
104 *
105 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
106 * IWL_ANTENNA_MAIN - Force MAIN antenna
107 * IWL_ANTENNA_AUX - Force AUX antenna
108 */
109 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
110 {
111 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
112
113 switch (iwl3945_mod_params.antenna) {
114 case IWL_ANTENNA_DIVERSITY:
115 return 0;
116
117 case IWL_ANTENNA_MAIN:
118 if (eeprom->antenna_switch_type)
119 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
121
122 case IWL_ANTENNA_AUX:
123 if (eeprom->antenna_switch_type)
124 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
126 }
127
128 /* bad antenna selector value */
129 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
130 iwl3945_mod_params.antenna);
131
132 return 0; /* "diversity" is default if error */
133 }
134
135 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
136 struct ieee80211_key_conf *keyconf,
137 u8 sta_id)
138 {
139 unsigned long flags;
140 __le16 key_flags = 0;
141 int ret;
142
143 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
144 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
145
146 if (sta_id == priv->hw_params.bcast_sta_id)
147 key_flags |= STA_KEY_MULTICAST_MSK;
148
149 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
150 keyconf->hw_key_idx = keyconf->keyidx;
151 key_flags &= ~STA_KEY_FLG_INVALID;
152
153 spin_lock_irqsave(&priv->sta_lock, flags);
154 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
155 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
156 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
157 keyconf->keylen);
158
159 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
160 keyconf->keylen);
161
162 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
163 == STA_KEY_FLG_NO_ENC)
164 priv->stations[sta_id].sta.key.key_offset =
165 iwl_get_free_ucode_key_index(priv);
166 /* else, we are overriding an existing key => no need to allocated room
167 * in uCode. */
168
169 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
170 "no space for a new key");
171
172 priv->stations[sta_id].sta.key.key_flags = key_flags;
173 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
174 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
175
176 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
177
178 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
179
180 spin_unlock_irqrestore(&priv->sta_lock, flags);
181
182 return ret;
183 }
184
185 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
186 struct ieee80211_key_conf *keyconf,
187 u8 sta_id)
188 {
189 return -EOPNOTSUPP;
190 }
191
192 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
193 struct ieee80211_key_conf *keyconf,
194 u8 sta_id)
195 {
196 return -EOPNOTSUPP;
197 }
198
199 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
200 {
201 unsigned long flags;
202
203 spin_lock_irqsave(&priv->sta_lock, flags);
204 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
205 memset(&priv->stations[sta_id].sta.key, 0,
206 sizeof(struct iwl4965_keyinfo));
207 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
208 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
209 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
210 spin_unlock_irqrestore(&priv->sta_lock, flags);
211
212 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
213 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
214 return 0;
215 }
216
217 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
218 struct ieee80211_key_conf *keyconf, u8 sta_id)
219 {
220 int ret = 0;
221
222 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
223
224 switch (keyconf->alg) {
225 case ALG_CCMP:
226 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
227 break;
228 case ALG_TKIP:
229 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
230 break;
231 case ALG_WEP:
232 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
233 break;
234 default:
235 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
236 ret = -EINVAL;
237 }
238
239 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
240 keyconf->alg, keyconf->keylen, keyconf->keyidx,
241 sta_id, ret);
242
243 return ret;
244 }
245
246 static int iwl3945_remove_static_key(struct iwl_priv *priv)
247 {
248 int ret = -EOPNOTSUPP;
249
250 return ret;
251 }
252
253 static int iwl3945_set_static_key(struct iwl_priv *priv,
254 struct ieee80211_key_conf *key)
255 {
256 if (key->alg == ALG_WEP)
257 return -EOPNOTSUPP;
258
259 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
260 return -EINVAL;
261 }
262
263 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
264 {
265 struct list_head *element;
266
267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct iwl3945_frame, list));
274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282 }
283
284 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
285 {
286 struct iwl3945_frame *frame;
287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
291 IWL_ERR(priv, "Could not allocate frame!\n");
292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
301 return list_entry(element, struct iwl3945_frame, list);
302 }
303
304 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
305 {
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308 }
309
310 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
311 struct ieee80211_hdr *hdr,
312 int left)
313 {
314
315 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
316 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
317 (priv->iw_mode != NL80211_IFTYPE_AP)))
318 return 0;
319
320 if (priv->ibss_beacon->len > left)
321 return 0;
322
323 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
324
325 return priv->ibss_beacon->len;
326 }
327
328 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
329 {
330 struct iwl3945_frame *frame;
331 unsigned int frame_size;
332 int rc;
333 u8 rate;
334
335 frame = iwl3945_get_free_frame(priv);
336
337 if (!frame) {
338 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
339 "command.\n");
340 return -ENOMEM;
341 }
342
343 rate = iwl_rate_get_lowest_plcp(priv);
344
345 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
346
347 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
348 &frame->u.cmd[0]);
349
350 iwl3945_free_frame(priv, frame);
351
352 return rc;
353 }
354
355 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
356 {
357 if (priv->shared_virt)
358 pci_free_consistent(priv->pci_dev,
359 sizeof(struct iwl3945_shared),
360 priv->shared_virt,
361 priv->shared_phys);
362 }
363
364 #define MAX_UCODE_BEACON_INTERVAL 1024
365 #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
366
367 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
368 {
369 u16 new_val = 0;
370 u16 beacon_factor = 0;
371
372 beacon_factor =
373 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
374 / MAX_UCODE_BEACON_INTERVAL;
375 new_val = beacon_val / beacon_factor;
376
377 return cpu_to_le16(new_val);
378 }
379
380 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
381 {
382 u64 interval_tm_unit;
383 u64 tsf, result;
384 unsigned long flags;
385 struct ieee80211_conf *conf = NULL;
386 u16 beacon_int = 0;
387
388 conf = ieee80211_get_hw_conf(priv->hw);
389
390 spin_lock_irqsave(&priv->lock, flags);
391 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
392 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
393
394 tsf = priv->timestamp;
395
396 beacon_int = priv->beacon_int;
397 spin_unlock_irqrestore(&priv->lock, flags);
398
399 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
400 if (beacon_int == 0) {
401 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
402 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
403 } else {
404 priv->rxon_timing.beacon_interval =
405 cpu_to_le16(beacon_int);
406 priv->rxon_timing.beacon_interval =
407 iwl3945_adjust_beacon_interval(
408 le16_to_cpu(priv->rxon_timing.beacon_interval));
409 }
410
411 priv->rxon_timing.atim_window = 0;
412 } else {
413 priv->rxon_timing.beacon_interval =
414 iwl3945_adjust_beacon_interval(
415 priv->vif->bss_conf.beacon_int);
416 /* TODO: we need to get atim_window from upper stack
417 * for now we set to 0 */
418 priv->rxon_timing.atim_window = 0;
419 }
420
421 interval_tm_unit =
422 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
423 result = do_div(tsf, interval_tm_unit);
424 priv->rxon_timing.beacon_init_val =
425 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
426
427 IWL_DEBUG_ASSOC(priv,
428 "beacon interval %d beacon timer %d beacon tim %d\n",
429 le16_to_cpu(priv->rxon_timing.beacon_interval),
430 le32_to_cpu(priv->rxon_timing.beacon_init_val),
431 le16_to_cpu(priv->rxon_timing.atim_window));
432 }
433
434 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
435 struct ieee80211_tx_info *info,
436 struct iwl_cmd *cmd,
437 struct sk_buff *skb_frag,
438 int sta_id)
439 {
440 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
441 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
442
443 switch (keyinfo->alg) {
444 case ALG_CCMP:
445 tx->sec_ctl = TX_CMD_SEC_CCM;
446 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
447 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
448 break;
449
450 case ALG_TKIP:
451 break;
452
453 case ALG_WEP:
454 tx->sec_ctl = TX_CMD_SEC_WEP |
455 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
456
457 if (keyinfo->keylen == 13)
458 tx->sec_ctl |= TX_CMD_SEC_KEY128;
459
460 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
461
462 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
463 "with key %d\n", info->control.hw_key->hw_key_idx);
464 break;
465
466 default:
467 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
468 break;
469 }
470 }
471
472 /*
473 * handle build REPLY_TX command notification.
474 */
475 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
476 struct iwl_cmd *cmd,
477 struct ieee80211_tx_info *info,
478 struct ieee80211_hdr *hdr, u8 std_id)
479 {
480 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
481 __le32 tx_flags = tx->tx_flags;
482 __le16 fc = hdr->frame_control;
483 u8 rc_flags = info->control.rates[0].flags;
484
485 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
486 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
487 tx_flags |= TX_CMD_FLG_ACK_MSK;
488 if (ieee80211_is_mgmt(fc))
489 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
490 if (ieee80211_is_probe_resp(fc) &&
491 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
492 tx_flags |= TX_CMD_FLG_TSF_MSK;
493 } else {
494 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
495 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
496 }
497
498 tx->sta_id = std_id;
499 if (ieee80211_has_morefrags(fc))
500 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
501
502 if (ieee80211_is_data_qos(fc)) {
503 u8 *qc = ieee80211_get_qos_ctl(hdr);
504 tx->tid_tspec = qc[0] & 0xf;
505 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
506 } else {
507 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
508 }
509
510 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
511 tx_flags |= TX_CMD_FLG_RTS_MSK;
512 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
513 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
514 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
515 tx_flags |= TX_CMD_FLG_CTS_MSK;
516 }
517
518 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
519 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
520
521 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
522 if (ieee80211_is_mgmt(fc)) {
523 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
524 tx->timeout.pm_frame_timeout = cpu_to_le16(3);
525 else
526 tx->timeout.pm_frame_timeout = cpu_to_le16(2);
527 } else {
528 tx->timeout.pm_frame_timeout = 0;
529 #ifdef CONFIG_IWLWIFI_LEDS
530 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
531 #endif
532 }
533
534 tx->driver_txop = 0;
535 tx->tx_flags = tx_flags;
536 tx->next_frame_len = 0;
537 }
538
539 /*
540 * start REPLY_TX command process
541 */
542 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
543 {
544 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
545 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
546 struct iwl3945_tx_cmd *tx;
547 struct iwl_tx_queue *txq = NULL;
548 struct iwl_queue *q = NULL;
549 struct iwl_cmd *out_cmd = NULL;
550 dma_addr_t phys_addr;
551 dma_addr_t txcmd_phys;
552 int txq_id = skb_get_queue_mapping(skb);
553 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
554 u8 id;
555 u8 unicast;
556 u8 sta_id;
557 u8 tid = 0;
558 u16 seq_number = 0;
559 __le16 fc;
560 u8 wait_write_ptr = 0;
561 u8 *qc = NULL;
562 unsigned long flags;
563 int rc;
564
565 spin_lock_irqsave(&priv->lock, flags);
566 if (iwl_is_rfkill(priv)) {
567 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
568 goto drop_unlock;
569 }
570
571 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
572 IWL_ERR(priv, "ERROR: No TX rate available.\n");
573 goto drop_unlock;
574 }
575
576 unicast = !is_multicast_ether_addr(hdr->addr1);
577 id = 0;
578
579 fc = hdr->frame_control;
580
581 #ifdef CONFIG_IWLWIFI_DEBUG
582 if (ieee80211_is_auth(fc))
583 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
584 else if (ieee80211_is_assoc_req(fc))
585 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
586 else if (ieee80211_is_reassoc_req(fc))
587 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
588 #endif
589
590 /* drop all data frame if we are not associated */
591 if (ieee80211_is_data(fc) &&
592 (!iwl_is_monitor_mode(priv)) && /* packet injection */
593 (!iwl_is_associated(priv) ||
594 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
595 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
596 goto drop_unlock;
597 }
598
599 spin_unlock_irqrestore(&priv->lock, flags);
600
601 hdr_len = ieee80211_hdrlen(fc);
602
603 /* Find (or create) index into station table for destination station */
604 sta_id = iwl_get_sta_id(priv, hdr);
605 if (sta_id == IWL_INVALID_STATION) {
606 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
607 hdr->addr1);
608 goto drop;
609 }
610
611 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
612
613 if (ieee80211_is_data_qos(fc)) {
614 qc = ieee80211_get_qos_ctl(hdr);
615 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
616 seq_number = priv->stations[sta_id].tid[tid].seq_number &
617 IEEE80211_SCTL_SEQ;
618 hdr->seq_ctrl = cpu_to_le16(seq_number) |
619 (hdr->seq_ctrl &
620 cpu_to_le16(IEEE80211_SCTL_FRAG));
621 seq_number += 0x10;
622 }
623
624 /* Descriptor for chosen Tx queue */
625 txq = &priv->txq[txq_id];
626 q = &txq->q;
627
628 spin_lock_irqsave(&priv->lock, flags);
629
630 idx = get_cmd_index(q, q->write_ptr, 0);
631
632 /* Set up driver data for this TFD */
633 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
634 txq->txb[q->write_ptr].skb[0] = skb;
635
636 /* Init first empty entry in queue's array of Tx/cmd buffers */
637 out_cmd = txq->cmd[idx];
638 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
639 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
640 memset(tx, 0, sizeof(*tx));
641
642 /*
643 * Set up the Tx-command (not MAC!) header.
644 * Store the chosen Tx queue and TFD index within the sequence field;
645 * after Tx, uCode's Tx response will return this value so driver can
646 * locate the frame within the tx queue and do post-tx processing.
647 */
648 out_cmd->hdr.cmd = REPLY_TX;
649 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
650 INDEX_TO_SEQ(q->write_ptr)));
651
652 /* Copy MAC header from skb into command buffer */
653 memcpy(tx->hdr, hdr, hdr_len);
654
655
656 if (info->control.hw_key)
657 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
658
659 /* TODO need this for burst mode later on */
660 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
661
662 /* set is_hcca to 0; it probably will never be implemented */
663 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
664
665 /* Total # bytes to be transmitted */
666 len = (u16)skb->len;
667 tx->len = cpu_to_le16(len);
668
669
670 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
671 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
672
673 if (!ieee80211_has_morefrags(hdr->frame_control)) {
674 txq->need_update = 1;
675 if (qc)
676 priv->stations[sta_id].tid[tid].seq_number = seq_number;
677 } else {
678 wait_write_ptr = 1;
679 txq->need_update = 0;
680 }
681
682 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
683 le16_to_cpu(out_cmd->hdr.sequence));
684 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
685 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
686 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
687 ieee80211_hdrlen(fc));
688
689 /*
690 * Use the first empty entry in this queue's command buffer array
691 * to contain the Tx command and MAC header concatenated together
692 * (payload data will be in another buffer).
693 * Size of this varies, due to varying MAC header length.
694 * If end is not dword aligned, we'll have 2 extra bytes at the end
695 * of the MAC header (device reads on dword boundaries).
696 * We'll tell device about this padding later.
697 */
698 len = sizeof(struct iwl3945_tx_cmd) +
699 sizeof(struct iwl_cmd_header) + hdr_len;
700
701 len_org = len;
702 len = (len + 3) & ~3;
703
704 if (len_org != len)
705 len_org = 1;
706 else
707 len_org = 0;
708
709 /* Physical address of this Tx command's header (not MAC header!),
710 * within command buffer array. */
711 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
712 len, PCI_DMA_TODEVICE);
713 /* we do not map meta data ... so we can safely access address to
714 * provide to unmap command*/
715 pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
716 pci_unmap_len_set(&out_cmd->meta, len, len);
717
718 /* Add buffer containing Tx command and MAC(!) header to TFD's
719 * first entry */
720 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
721 txcmd_phys, len, 1, 0);
722
723
724 /* Set up TFD's 2nd entry to point directly to remainder of skb,
725 * if any (802.11 null frames have no payload). */
726 len = skb->len - hdr_len;
727 if (len) {
728 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
729 len, PCI_DMA_TODEVICE);
730 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
731 phys_addr, len,
732 0, U32_PAD(len));
733 }
734
735
736 /* Tell device the write index *just past* this latest filled TFD */
737 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
738 rc = iwl_txq_update_write_ptr(priv, txq);
739 spin_unlock_irqrestore(&priv->lock, flags);
740
741 if (rc)
742 return rc;
743
744 if ((iwl_queue_space(q) < q->high_mark)
745 && priv->mac80211_registered) {
746 if (wait_write_ptr) {
747 spin_lock_irqsave(&priv->lock, flags);
748 txq->need_update = 1;
749 iwl_txq_update_write_ptr(priv, txq);
750 spin_unlock_irqrestore(&priv->lock, flags);
751 }
752
753 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
754 }
755
756 return 0;
757
758 drop_unlock:
759 spin_unlock_irqrestore(&priv->lock, flags);
760 drop:
761 return -1;
762 }
763
764 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
765
766 #include "iwl-spectrum.h"
767
768 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
769 #define BEACON_TIME_MASK_HIGH 0xFF000000
770 #define TIME_UNIT 1024
771
772 /*
773 * extended beacon time format
774 * time in usec will be changed into a 32-bit value in 8:24 format
775 * the high 1 byte is the beacon counts
776 * the lower 3 bytes is the time in usec within one beacon interval
777 */
778
779 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
780 {
781 u32 quot;
782 u32 rem;
783 u32 interval = beacon_interval * 1024;
784
785 if (!interval || !usec)
786 return 0;
787
788 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
789 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
790
791 return (quot << 24) + rem;
792 }
793
794 /* base is usually what we get from ucode with each received frame,
795 * the same as HW timer counter counting down
796 */
797
798 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
799 {
800 u32 base_low = base & BEACON_TIME_MASK_LOW;
801 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
802 u32 interval = beacon_interval * TIME_UNIT;
803 u32 res = (base & BEACON_TIME_MASK_HIGH) +
804 (addon & BEACON_TIME_MASK_HIGH);
805
806 if (base_low > addon_low)
807 res += base_low - addon_low;
808 else if (base_low < addon_low) {
809 res += interval + base_low - addon_low;
810 res += (1 << 24);
811 } else
812 res += (1 << 24);
813
814 return cpu_to_le32(res);
815 }
816
817 static int iwl3945_get_measurement(struct iwl_priv *priv,
818 struct ieee80211_measurement_params *params,
819 u8 type)
820 {
821 struct iwl_spectrum_cmd spectrum;
822 struct iwl_rx_packet *res;
823 struct iwl_host_cmd cmd = {
824 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
825 .data = (void *)&spectrum,
826 .meta.flags = CMD_WANT_SKB,
827 };
828 u32 add_time = le64_to_cpu(params->start_time);
829 int rc;
830 int spectrum_resp_status;
831 int duration = le16_to_cpu(params->duration);
832
833 if (iwl_is_associated(priv))
834 add_time =
835 iwl3945_usecs_to_beacons(
836 le64_to_cpu(params->start_time) - priv->last_tsf,
837 le16_to_cpu(priv->rxon_timing.beacon_interval));
838
839 memset(&spectrum, 0, sizeof(spectrum));
840
841 spectrum.channel_count = cpu_to_le16(1);
842 spectrum.flags =
843 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
844 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
845 cmd.len = sizeof(spectrum);
846 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
847
848 if (iwl_is_associated(priv))
849 spectrum.start_time =
850 iwl3945_add_beacon_time(priv->last_beacon_time,
851 add_time,
852 le16_to_cpu(priv->rxon_timing.beacon_interval));
853 else
854 spectrum.start_time = 0;
855
856 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
857 spectrum.channels[0].channel = params->channel;
858 spectrum.channels[0].type = type;
859 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
860 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
861 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
862
863 rc = iwl_send_cmd_sync(priv, &cmd);
864 if (rc)
865 return rc;
866
867 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
868 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
869 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
870 rc = -EIO;
871 }
872
873 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
874 switch (spectrum_resp_status) {
875 case 0: /* Command will be handled */
876 if (res->u.spectrum.id != 0xff) {
877 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
878 res->u.spectrum.id);
879 priv->measurement_status &= ~MEASUREMENT_READY;
880 }
881 priv->measurement_status |= MEASUREMENT_ACTIVE;
882 rc = 0;
883 break;
884
885 case 1: /* Command will not be handled */
886 rc = -EAGAIN;
887 break;
888 }
889
890 dev_kfree_skb_any(cmd.meta.u.skb);
891
892 return rc;
893 }
894 #endif
895
896 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
897 struct iwl_rx_mem_buffer *rxb)
898 {
899 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
900 struct iwl_alive_resp *palive;
901 struct delayed_work *pwork;
902
903 palive = &pkt->u.alive_frame;
904
905 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
906 "0x%01X 0x%01X\n",
907 palive->is_valid, palive->ver_type,
908 palive->ver_subtype);
909
910 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
911 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
912 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
913 sizeof(struct iwl_alive_resp));
914 pwork = &priv->init_alive_start;
915 } else {
916 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
917 memcpy(&priv->card_alive, &pkt->u.alive_frame,
918 sizeof(struct iwl_alive_resp));
919 pwork = &priv->alive_start;
920 iwl3945_disable_events(priv);
921 }
922
923 /* We delay the ALIVE response by 5ms to
924 * give the HW RF Kill time to activate... */
925 if (palive->is_valid == UCODE_VALID_OK)
926 queue_delayed_work(priv->workqueue, pwork,
927 msecs_to_jiffies(5));
928 else
929 IWL_WARN(priv, "uCode did not respond OK.\n");
930 }
931
932 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
933 struct iwl_rx_mem_buffer *rxb)
934 {
935 #ifdef CONFIG_IWLWIFI_DEBUG
936 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
937 #endif
938
939 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
940 return;
941 }
942
943 static void iwl3945_bg_beacon_update(struct work_struct *work)
944 {
945 struct iwl_priv *priv =
946 container_of(work, struct iwl_priv, beacon_update);
947 struct sk_buff *beacon;
948
949 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
950 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
951
952 if (!beacon) {
953 IWL_ERR(priv, "update beacon failed\n");
954 return;
955 }
956
957 mutex_lock(&priv->mutex);
958 /* new beacon skb is allocated every time; dispose previous.*/
959 if (priv->ibss_beacon)
960 dev_kfree_skb(priv->ibss_beacon);
961
962 priv->ibss_beacon = beacon;
963 mutex_unlock(&priv->mutex);
964
965 iwl3945_send_beacon_cmd(priv);
966 }
967
968 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
969 struct iwl_rx_mem_buffer *rxb)
970 {
971 #ifdef CONFIG_IWLWIFI_DEBUG
972 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
973 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
974 u8 rate = beacon->beacon_notify_hdr.rate;
975
976 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
977 "tsf %d %d rate %d\n",
978 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
979 beacon->beacon_notify_hdr.failure_frame,
980 le32_to_cpu(beacon->ibss_mgr_status),
981 le32_to_cpu(beacon->high_tsf),
982 le32_to_cpu(beacon->low_tsf), rate);
983 #endif
984
985 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
986 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
987 queue_work(priv->workqueue, &priv->beacon_update);
988 }
989
990 /* Handle notification from uCode that card's power state is changing
991 * due to software, hardware, or critical temperature RFKILL */
992 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
993 struct iwl_rx_mem_buffer *rxb)
994 {
995 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
996 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
997 unsigned long status = priv->status;
998
999 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
1000 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1001 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
1002
1003 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
1004 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1005
1006 if (flags & HW_CARD_DISABLED)
1007 set_bit(STATUS_RF_KILL_HW, &priv->status);
1008 else
1009 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1010
1011
1012 iwl_scan_cancel(priv);
1013
1014 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
1015 test_bit(STATUS_RF_KILL_HW, &priv->status)))
1016 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
1017 test_bit(STATUS_RF_KILL_HW, &priv->status));
1018 else
1019 wake_up_interruptible(&priv->wait_command_queue);
1020 }
1021
1022 /**
1023 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
1024 *
1025 * Setup the RX handlers for each of the reply types sent from the uCode
1026 * to the host.
1027 *
1028 * This function chains into the hardware specific files for them to setup
1029 * any hardware specific handlers as well.
1030 */
1031 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
1032 {
1033 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
1034 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
1035 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
1036 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
1037 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
1038 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
1039 iwl_rx_pm_debug_statistics_notif;
1040 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
1041
1042 /*
1043 * The same handler is used for both the REPLY to a discrete
1044 * statistics request from the host as well as for the periodic
1045 * statistics notifications (after received beacons) from the uCode.
1046 */
1047 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
1048 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
1049
1050 iwl_setup_spectrum_handlers(priv);
1051 iwl_setup_rx_scan_handlers(priv);
1052 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
1053
1054 /* Set up hardware specific Rx handlers */
1055 iwl3945_hw_rx_handler_setup(priv);
1056 }
1057
1058 /************************** RX-FUNCTIONS ****************************/
1059 /*
1060 * Rx theory of operation
1061 *
1062 * The host allocates 32 DMA target addresses and passes the host address
1063 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1064 * 0 to 31
1065 *
1066 * Rx Queue Indexes
1067 * The host/firmware share two index registers for managing the Rx buffers.
1068 *
1069 * The READ index maps to the first position that the firmware may be writing
1070 * to -- the driver can read up to (but not including) this position and get
1071 * good data.
1072 * The READ index is managed by the firmware once the card is enabled.
1073 *
1074 * The WRITE index maps to the last position the driver has read from -- the
1075 * position preceding WRITE is the last slot the firmware can place a packet.
1076 *
1077 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1078 * WRITE = READ.
1079 *
1080 * During initialization, the host sets up the READ queue position to the first
1081 * INDEX position, and WRITE to the last (READ - 1 wrapped)
1082 *
1083 * When the firmware places a packet in a buffer, it will advance the READ index
1084 * and fire the RX interrupt. The driver can then query the READ index and
1085 * process as many packets as possible, moving the WRITE index forward as it
1086 * resets the Rx queue buffers with new memory.
1087 *
1088 * The management in the driver is as follows:
1089 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1090 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1091 * to replenish the iwl->rxq->rx_free.
1092 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1093 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1094 * 'processed' and 'read' driver indexes as well)
1095 * + A received packet is processed and handed to the kernel network stack,
1096 * detached from the iwl->rxq. The driver 'processed' index is updated.
1097 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1098 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1099 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1100 * were enough free buffers and RX_STALLED is set it is cleared.
1101 *
1102 *
1103 * Driver sequence:
1104 *
1105 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1106 * iwl3945_rx_queue_restock
1107 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1108 * queue, updates firmware pointers, and updates
1109 * the WRITE index. If insufficient rx_free buffers
1110 * are available, schedules iwl3945_rx_replenish
1111 *
1112 * -- enable interrupts --
1113 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1114 * READ INDEX, detaching the SKB from the pool.
1115 * Moves the packet buffer from queue to rx_used.
1116 * Calls iwl3945_rx_queue_restock to refill any empty
1117 * slots.
1118 * ...
1119 *
1120 */
1121
1122 /**
1123 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1124 */
1125 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1126 dma_addr_t dma_addr)
1127 {
1128 return cpu_to_le32((u32)dma_addr);
1129 }
1130
1131 /**
1132 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1133 *
1134 * If there are slots in the RX queue that need to be restocked,
1135 * and we have free pre-allocated buffers, fill the ranks as much
1136 * as we can, pulling from rx_free.
1137 *
1138 * This moves the 'write' index forward to catch up with 'processed', and
1139 * also updates the memory address in the firmware to reference the new
1140 * target buffer.
1141 */
1142 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1143 {
1144 struct iwl_rx_queue *rxq = &priv->rxq;
1145 struct list_head *element;
1146 struct iwl_rx_mem_buffer *rxb;
1147 unsigned long flags;
1148 int write, rc;
1149
1150 spin_lock_irqsave(&rxq->lock, flags);
1151 write = rxq->write & ~0x7;
1152 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1153 /* Get next free Rx buffer, remove from free list */
1154 element = rxq->rx_free.next;
1155 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1156 list_del(element);
1157
1158 /* Point to Rx buffer via next RBD in circular buffer */
1159 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
1160 rxq->queue[rxq->write] = rxb;
1161 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1162 rxq->free_count--;
1163 }
1164 spin_unlock_irqrestore(&rxq->lock, flags);
1165 /* If the pre-allocated buffer pool is dropping low, schedule to
1166 * refill it */
1167 if (rxq->free_count <= RX_LOW_WATERMARK)
1168 queue_work(priv->workqueue, &priv->rx_replenish);
1169
1170
1171 /* If we've added more space for the firmware to place data, tell it.
1172 * Increment device's write pointer in multiples of 8. */
1173 if ((rxq->write_actual != (rxq->write & ~0x7))
1174 || (abs(rxq->write - rxq->read) > 7)) {
1175 spin_lock_irqsave(&rxq->lock, flags);
1176 rxq->need_update = 1;
1177 spin_unlock_irqrestore(&rxq->lock, flags);
1178 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
1179 if (rc)
1180 return rc;
1181 }
1182
1183 return 0;
1184 }
1185
1186 /**
1187 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1188 *
1189 * When moving to rx_free an SKB is allocated for the slot.
1190 *
1191 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1192 * This is called as a scheduled work item (except for during initialization)
1193 */
1194 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1195 {
1196 struct iwl_rx_queue *rxq = &priv->rxq;
1197 struct list_head *element;
1198 struct iwl_rx_mem_buffer *rxb;
1199 unsigned long flags;
1200
1201 while (1) {
1202 spin_lock_irqsave(&rxq->lock, flags);
1203
1204 if (list_empty(&rxq->rx_used)) {
1205 spin_unlock_irqrestore(&rxq->lock, flags);
1206 return;
1207 }
1208
1209 element = rxq->rx_used.next;
1210 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1211 list_del(element);
1212 spin_unlock_irqrestore(&rxq->lock, flags);
1213
1214 /* Alloc a new receive buffer */
1215 rxb->skb =
1216 alloc_skb(priv->hw_params.rx_buf_size,
1217 priority);
1218 if (!rxb->skb) {
1219 if (net_ratelimit())
1220 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
1221 /* We don't reschedule replenish work here -- we will
1222 * call the restock method and if it still needs
1223 * more buffers it will schedule replenish */
1224 break;
1225 }
1226
1227 /* If radiotap head is required, reserve some headroom here.
1228 * The physical head count is a variable rx_stats->phy_count.
1229 * We reserve 4 bytes here. Plus these extra bytes, the
1230 * headroom of the physical head should be enough for the
1231 * radiotap head that iwl3945 supported. See iwl3945_rt.
1232 */
1233 skb_reserve(rxb->skb, 4);
1234
1235 /* Get physical address of RB/SKB */
1236 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1237 rxb->skb->data,
1238 priv->hw_params.rx_buf_size,
1239 PCI_DMA_FROMDEVICE);
1240
1241 spin_lock_irqsave(&rxq->lock, flags);
1242 list_add_tail(&rxb->list, &rxq->rx_free);
1243 priv->alloc_rxb_skb++;
1244 rxq->free_count++;
1245 spin_unlock_irqrestore(&rxq->lock, flags);
1246 }
1247 }
1248
1249 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1250 {
1251 unsigned long flags;
1252 int i;
1253 spin_lock_irqsave(&rxq->lock, flags);
1254 INIT_LIST_HEAD(&rxq->rx_free);
1255 INIT_LIST_HEAD(&rxq->rx_used);
1256 /* Fill the rx_used queue with _all_ of the Rx buffers */
1257 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1258 /* In the reset function, these buffers may have been allocated
1259 * to an SKB, so we need to unmap and free potential storage */
1260 if (rxq->pool[i].skb != NULL) {
1261 pci_unmap_single(priv->pci_dev,
1262 rxq->pool[i].real_dma_addr,
1263 priv->hw_params.rx_buf_size,
1264 PCI_DMA_FROMDEVICE);
1265 priv->alloc_rxb_skb--;
1266 dev_kfree_skb(rxq->pool[i].skb);
1267 rxq->pool[i].skb = NULL;
1268 }
1269 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1270 }
1271
1272 /* Set us so that we have processed and used all buffers, but have
1273 * not restocked the Rx queue with fresh buffers */
1274 rxq->read = rxq->write = 0;
1275 rxq->free_count = 0;
1276 rxq->write_actual = 0;
1277 spin_unlock_irqrestore(&rxq->lock, flags);
1278 }
1279
1280 void iwl3945_rx_replenish(void *data)
1281 {
1282 struct iwl_priv *priv = data;
1283 unsigned long flags;
1284
1285 iwl3945_rx_allocate(priv, GFP_KERNEL);
1286
1287 spin_lock_irqsave(&priv->lock, flags);
1288 iwl3945_rx_queue_restock(priv);
1289 spin_unlock_irqrestore(&priv->lock, flags);
1290 }
1291
1292 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1293 {
1294 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1295
1296 iwl3945_rx_queue_restock(priv);
1297 }
1298
1299
1300 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1301 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1302 * This free routine walks the list of POOL entries and if SKB is set to
1303 * non NULL it is unmapped and freed
1304 */
1305 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1306 {
1307 int i;
1308 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1309 if (rxq->pool[i].skb != NULL) {
1310 pci_unmap_single(priv->pci_dev,
1311 rxq->pool[i].real_dma_addr,
1312 priv->hw_params.rx_buf_size,
1313 PCI_DMA_FROMDEVICE);
1314 dev_kfree_skb(rxq->pool[i].skb);
1315 }
1316 }
1317
1318 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1319 rxq->dma_addr);
1320 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1321 rxq->rb_stts, rxq->rb_stts_dma);
1322 rxq->bd = NULL;
1323 rxq->rb_stts = NULL;
1324 }
1325
1326
1327 /* Convert linear signal-to-noise ratio into dB */
1328 static u8 ratio2dB[100] = {
1329 /* 0 1 2 3 4 5 6 7 8 9 */
1330 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1331 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1332 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1333 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1334 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1335 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1336 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1337 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1338 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1339 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1340 };
1341
1342 /* Calculates a relative dB value from a ratio of linear
1343 * (i.e. not dB) signal levels.
1344 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1345 int iwl3945_calc_db_from_ratio(int sig_ratio)
1346 {
1347 /* 1000:1 or higher just report as 60 dB */
1348 if (sig_ratio >= 1000)
1349 return 60;
1350
1351 /* 100:1 or higher, divide by 10 and use table,
1352 * add 20 dB to make up for divide by 10 */
1353 if (sig_ratio >= 100)
1354 return 20 + (int)ratio2dB[sig_ratio/10];
1355
1356 /* We shouldn't see this */
1357 if (sig_ratio < 1)
1358 return 0;
1359
1360 /* Use table for ratios 1:1 - 99:1 */
1361 return (int)ratio2dB[sig_ratio];
1362 }
1363
1364 #define PERFECT_RSSI (-20) /* dBm */
1365 #define WORST_RSSI (-95) /* dBm */
1366 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1367
1368 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
1369 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1370 * about formulas used below. */
1371 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1372 {
1373 int sig_qual;
1374 int degradation = PERFECT_RSSI - rssi_dbm;
1375
1376 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1377 * as indicator; formula is (signal dbm - noise dbm).
1378 * SNR at or above 40 is a great signal (100%).
1379 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1380 * Weakest usable signal is usually 10 - 15 dB SNR. */
1381 if (noise_dbm) {
1382 if (rssi_dbm - noise_dbm >= 40)
1383 return 100;
1384 else if (rssi_dbm < noise_dbm)
1385 return 0;
1386 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1387
1388 /* Else use just the signal level.
1389 * This formula is a least squares fit of data points collected and
1390 * compared with a reference system that had a percentage (%) display
1391 * for signal quality. */
1392 } else
1393 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1394 (15 * RSSI_RANGE + 62 * degradation)) /
1395 (RSSI_RANGE * RSSI_RANGE);
1396
1397 if (sig_qual > 100)
1398 sig_qual = 100;
1399 else if (sig_qual < 1)
1400 sig_qual = 0;
1401
1402 return sig_qual;
1403 }
1404
1405 /**
1406 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1407 *
1408 * Uses the priv->rx_handlers callback function array to invoke
1409 * the appropriate handlers, including command responses,
1410 * frame-received notifications, and other notifications.
1411 */
1412 static void iwl3945_rx_handle(struct iwl_priv *priv)
1413 {
1414 struct iwl_rx_mem_buffer *rxb;
1415 struct iwl_rx_packet *pkt;
1416 struct iwl_rx_queue *rxq = &priv->rxq;
1417 u32 r, i;
1418 int reclaim;
1419 unsigned long flags;
1420 u8 fill_rx = 0;
1421 u32 count = 8;
1422 int total_empty = 0;
1423
1424 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1425 * buffer that the driver may process (last buffer filled by ucode). */
1426 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1427 i = rxq->read;
1428
1429 /* calculate total frames need to be restock after handling RX */
1430 total_empty = r - priv->rxq.write_actual;
1431 if (total_empty < 0)
1432 total_empty += RX_QUEUE_SIZE;
1433
1434 if (total_empty > (RX_QUEUE_SIZE / 2))
1435 fill_rx = 1;
1436 /* Rx interrupt, but nothing sent from uCode */
1437 if (i == r)
1438 IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
1439
1440 while (i != r) {
1441 rxb = rxq->queue[i];
1442
1443 /* If an RXB doesn't have a Rx queue slot associated with it,
1444 * then a bug has been introduced in the queue refilling
1445 * routines -- catch it here */
1446 BUG_ON(rxb == NULL);
1447
1448 rxq->queue[i] = NULL;
1449
1450 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1451 priv->hw_params.rx_buf_size,
1452 PCI_DMA_FROMDEVICE);
1453 pkt = (struct iwl_rx_packet *)rxb->skb->data;
1454
1455 /* Reclaim a command buffer only if this packet is a response
1456 * to a (driver-originated) command.
1457 * If the packet (e.g. Rx frame) originated from uCode,
1458 * there is no command buffer to reclaim.
1459 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1460 * but apparently a few don't get set; catch them here. */
1461 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1462 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1463 (pkt->hdr.cmd != REPLY_TX);
1464
1465 /* Based on type of command response or notification,
1466 * handle those that need handling via function in
1467 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1468 if (priv->rx_handlers[pkt->hdr.cmd]) {
1469 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
1470 "r = %d, i = %d, %s, 0x%02x\n", r, i,
1471 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1472 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1473 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1474 } else {
1475 /* No handling needed */
1476 IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
1477 "r %d i %d No handler needed for %s, 0x%02x\n",
1478 r, i, get_cmd_string(pkt->hdr.cmd),
1479 pkt->hdr.cmd);
1480 }
1481
1482 if (reclaim) {
1483 /* Invoke any callbacks, transfer the skb to caller, and
1484 * fire off the (possibly) blocking iwl_send_cmd()
1485 * as we reclaim the driver command queue */
1486 if (rxb && rxb->skb)
1487 iwl_tx_cmd_complete(priv, rxb);
1488 else
1489 IWL_WARN(priv, "Claim null rxb?\n");
1490 }
1491
1492 /* For now we just don't re-use anything. We can tweak this
1493 * later to try and re-use notification packets and SKBs that
1494 * fail to Rx correctly */
1495 if (rxb->skb != NULL) {
1496 priv->alloc_rxb_skb--;
1497 dev_kfree_skb_any(rxb->skb);
1498 rxb->skb = NULL;
1499 }
1500
1501 spin_lock_irqsave(&rxq->lock, flags);
1502 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1503 spin_unlock_irqrestore(&rxq->lock, flags);
1504 i = (i + 1) & RX_QUEUE_MASK;
1505 /* If there are a lot of unused frames,
1506 * restock the Rx queue so ucode won't assert. */
1507 if (fill_rx) {
1508 count++;
1509 if (count >= 8) {
1510 priv->rxq.read = i;
1511 iwl3945_rx_replenish_now(priv);
1512 count = 0;
1513 }
1514 }
1515 }
1516
1517 /* Backtrack one entry */
1518 priv->rxq.read = i;
1519 if (fill_rx)
1520 iwl3945_rx_replenish_now(priv);
1521 else
1522 iwl3945_rx_queue_restock(priv);
1523 }
1524
1525 /* call this function to flush any scheduled tasklet */
1526 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1527 {
1528 /* wait to make sure we flush pending tasklet*/
1529 synchronize_irq(priv->pci_dev->irq);
1530 tasklet_kill(&priv->irq_tasklet);
1531 }
1532
1533 static const char *desc_lookup(int i)
1534 {
1535 switch (i) {
1536 case 1:
1537 return "FAIL";
1538 case 2:
1539 return "BAD_PARAM";
1540 case 3:
1541 return "BAD_CHECKSUM";
1542 case 4:
1543 return "NMI_INTERRUPT";
1544 case 5:
1545 return "SYSASSERT";
1546 case 6:
1547 return "FATAL_ERROR";
1548 }
1549
1550 return "UNKNOWN";
1551 }
1552
1553 #define ERROR_START_OFFSET (1 * sizeof(u32))
1554 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1555
1556 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1557 {
1558 u32 i;
1559 u32 desc, time, count, base, data1;
1560 u32 blink1, blink2, ilink1, ilink2;
1561
1562 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1563
1564 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1565 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1566 return;
1567 }
1568
1569
1570 count = iwl_read_targ_mem(priv, base);
1571
1572 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1573 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1574 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1575 priv->status, count);
1576 }
1577
1578 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1579 "ilink1 nmiPC Line\n");
1580 for (i = ERROR_START_OFFSET;
1581 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1582 i += ERROR_ELEM_SIZE) {
1583 desc = iwl_read_targ_mem(priv, base + i);
1584 time =
1585 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1586 blink1 =
1587 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1588 blink2 =
1589 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1590 ilink1 =
1591 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1592 ilink2 =
1593 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1594 data1 =
1595 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1596
1597 IWL_ERR(priv,
1598 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1599 desc_lookup(desc), desc, time, blink1, blink2,
1600 ilink1, ilink2, data1);
1601 }
1602
1603 }
1604
1605 #define EVENT_START_OFFSET (6 * sizeof(u32))
1606
1607 /**
1608 * iwl3945_print_event_log - Dump error event log to syslog
1609 *
1610 */
1611 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1612 u32 num_events, u32 mode)
1613 {
1614 u32 i;
1615 u32 base; /* SRAM byte address of event log header */
1616 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1617 u32 ptr; /* SRAM byte address of log data */
1618 u32 ev, time, data; /* event log data */
1619
1620 if (num_events == 0)
1621 return;
1622
1623 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1624
1625 if (mode == 0)
1626 event_size = 2 * sizeof(u32);
1627 else
1628 event_size = 3 * sizeof(u32);
1629
1630 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1631
1632 /* "time" is actually "data" for mode 0 (no timestamp).
1633 * place event id # at far right for easier visual parsing. */
1634 for (i = 0; i < num_events; i++) {
1635 ev = iwl_read_targ_mem(priv, ptr);
1636 ptr += sizeof(u32);
1637 time = iwl_read_targ_mem(priv, ptr);
1638 ptr += sizeof(u32);
1639 if (mode == 0) {
1640 /* data, ev */
1641 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1642 } else {
1643 data = iwl_read_targ_mem(priv, ptr);
1644 ptr += sizeof(u32);
1645 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
1646 }
1647 }
1648 }
1649
1650 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1651 {
1652 u32 base; /* SRAM byte address of event log header */
1653 u32 capacity; /* event log capacity in # entries */
1654 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1655 u32 num_wraps; /* # times uCode wrapped to top of log */
1656 u32 next_entry; /* index of next entry to be written by uCode */
1657 u32 size; /* # entries that we'll print */
1658
1659 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1660 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1661 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1662 return;
1663 }
1664
1665 /* event log header */
1666 capacity = iwl_read_targ_mem(priv, base);
1667 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1668 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1669 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1670
1671 size = num_wraps ? capacity : next_entry;
1672
1673 /* bail out if nothing in log */
1674 if (size == 0) {
1675 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1676 return;
1677 }
1678
1679 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1680 size, num_wraps);
1681
1682 /* if uCode has wrapped back to top of log, start at the oldest entry,
1683 * i.e the next one that uCode would fill. */
1684 if (num_wraps)
1685 iwl3945_print_event_log(priv, next_entry,
1686 capacity - next_entry, mode);
1687
1688 /* (then/else) start at top of log */
1689 iwl3945_print_event_log(priv, 0, next_entry, mode);
1690
1691 }
1692
1693 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1694 {
1695 u32 inta, handled = 0;
1696 u32 inta_fh;
1697 unsigned long flags;
1698 #ifdef CONFIG_IWLWIFI_DEBUG
1699 u32 inta_mask;
1700 #endif
1701
1702 spin_lock_irqsave(&priv->lock, flags);
1703
1704 /* Ack/clear/reset pending uCode interrupts.
1705 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1706 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1707 inta = iwl_read32(priv, CSR_INT);
1708 iwl_write32(priv, CSR_INT, inta);
1709
1710 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1711 * Any new interrupts that happen after this, either while we're
1712 * in this tasklet, or later, will show up in next ISR/tasklet. */
1713 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1714 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1715
1716 #ifdef CONFIG_IWLWIFI_DEBUG
1717 if (priv->debug_level & IWL_DL_ISR) {
1718 /* just for debug */
1719 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1720 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1721 inta, inta_mask, inta_fh);
1722 }
1723 #endif
1724
1725 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1726 * atomic, make sure that inta covers all the interrupts that
1727 * we've discovered, even if FH interrupt came in just after
1728 * reading CSR_INT. */
1729 if (inta_fh & CSR39_FH_INT_RX_MASK)
1730 inta |= CSR_INT_BIT_FH_RX;
1731 if (inta_fh & CSR39_FH_INT_TX_MASK)
1732 inta |= CSR_INT_BIT_FH_TX;
1733
1734 /* Now service all interrupt bits discovered above. */
1735 if (inta & CSR_INT_BIT_HW_ERR) {
1736 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1737
1738 /* Tell the device to stop sending interrupts */
1739 iwl_disable_interrupts(priv);
1740
1741 priv->isr_stats.hw++;
1742 iwl_irq_handle_error(priv);
1743
1744 handled |= CSR_INT_BIT_HW_ERR;
1745
1746 spin_unlock_irqrestore(&priv->lock, flags);
1747
1748 return;
1749 }
1750
1751 #ifdef CONFIG_IWLWIFI_DEBUG
1752 if (priv->debug_level & (IWL_DL_ISR)) {
1753 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1754 if (inta & CSR_INT_BIT_SCD) {
1755 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1756 "the frame/frames.\n");
1757 priv->isr_stats.sch++;
1758 }
1759
1760 /* Alive notification via Rx interrupt will do the real work */
1761 if (inta & CSR_INT_BIT_ALIVE) {
1762 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1763 priv->isr_stats.alive++;
1764 }
1765 }
1766 #endif
1767 /* Safely ignore these bits for debug checks below */
1768 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1769
1770 /* Error detected by uCode */
1771 if (inta & CSR_INT_BIT_SW_ERR) {
1772 IWL_ERR(priv, "Microcode SW error detected. "
1773 "Restarting 0x%X.\n", inta);
1774 priv->isr_stats.sw++;
1775 priv->isr_stats.sw_err = inta;
1776 iwl_irq_handle_error(priv);
1777 handled |= CSR_INT_BIT_SW_ERR;
1778 }
1779
1780 /* uCode wakes up after power-down sleep */
1781 if (inta & CSR_INT_BIT_WAKEUP) {
1782 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1783 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1784 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1785 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1786 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1787 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1788 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1789 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1790
1791 priv->isr_stats.wakeup++;
1792 handled |= CSR_INT_BIT_WAKEUP;
1793 }
1794
1795 /* All uCode command responses, including Tx command responses,
1796 * Rx "responses" (frame-received notification), and other
1797 * notifications from uCode come through here*/
1798 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1799 iwl3945_rx_handle(priv);
1800 priv->isr_stats.rx++;
1801 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1802 }
1803
1804 if (inta & CSR_INT_BIT_FH_TX) {
1805 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1806 priv->isr_stats.tx++;
1807
1808 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1809 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1810 (FH39_SRVC_CHNL), 0x0);
1811 handled |= CSR_INT_BIT_FH_TX;
1812 }
1813
1814 if (inta & ~handled) {
1815 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1816 priv->isr_stats.unhandled++;
1817 }
1818
1819 if (inta & ~priv->inta_mask) {
1820 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1821 inta & ~priv->inta_mask);
1822 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1823 }
1824
1825 /* Re-enable all interrupts */
1826 /* only Re-enable if disabled by irq */
1827 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1828 iwl_enable_interrupts(priv);
1829
1830 #ifdef CONFIG_IWLWIFI_DEBUG
1831 if (priv->debug_level & (IWL_DL_ISR)) {
1832 inta = iwl_read32(priv, CSR_INT);
1833 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1834 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1835 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1836 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1837 }
1838 #endif
1839 spin_unlock_irqrestore(&priv->lock, flags);
1840 }
1841
1842 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1843 enum ieee80211_band band,
1844 u8 is_active, u8 n_probes,
1845 struct iwl3945_scan_channel *scan_ch)
1846 {
1847 const struct ieee80211_channel *channels = NULL;
1848 const struct ieee80211_supported_band *sband;
1849 const struct iwl_channel_info *ch_info;
1850 u16 passive_dwell = 0;
1851 u16 active_dwell = 0;
1852 int added, i;
1853
1854 sband = iwl_get_hw_mode(priv, band);
1855 if (!sband)
1856 return 0;
1857
1858 channels = sband->channels;
1859
1860 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1861 passive_dwell = iwl_get_passive_dwell_time(priv, band);
1862
1863 if (passive_dwell <= active_dwell)
1864 passive_dwell = active_dwell + 1;
1865
1866 for (i = 0, added = 0; i < sband->n_channels; i++) {
1867 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
1868 continue;
1869
1870 scan_ch->channel = channels[i].hw_value;
1871
1872 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1873 if (!is_channel_valid(ch_info)) {
1874 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1875 scan_ch->channel);
1876 continue;
1877 }
1878
1879 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1880 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1881 /* If passive , set up for auto-switch
1882 * and use long active_dwell time.
1883 */
1884 if (!is_active || is_channel_passive(ch_info) ||
1885 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1886 scan_ch->type = 0; /* passive */
1887 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1888 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1889 } else {
1890 scan_ch->type = 1; /* active */
1891 }
1892
1893 /* Set direct probe bits. These may be used both for active
1894 * scan channels (probes gets sent right away),
1895 * or for passive channels (probes get se sent only after
1896 * hearing clear Rx packet).*/
1897 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1898 if (n_probes)
1899 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1900 } else {
1901 /* uCode v1 does not allow setting direct probe bits on
1902 * passive channel. */
1903 if ((scan_ch->type & 1) && n_probes)
1904 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1905 }
1906
1907 /* Set txpower levels to defaults */
1908 scan_ch->tpc.dsp_atten = 110;
1909 /* scan_pwr_info->tpc.dsp_atten; */
1910
1911 /*scan_pwr_info->tpc.tx_gain; */
1912 if (band == IEEE80211_BAND_5GHZ)
1913 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1914 else {
1915 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1916 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1917 * power level:
1918 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1919 */
1920 }
1921
1922 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1923 scan_ch->channel,
1924 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1925 (scan_ch->type & 1) ?
1926 active_dwell : passive_dwell);
1927
1928 scan_ch++;
1929 added++;
1930 }
1931
1932 IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
1933 return added;
1934 }
1935
1936 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1937 struct ieee80211_rate *rates)
1938 {
1939 int i;
1940
1941 for (i = 0; i < IWL_RATE_COUNT; i++) {
1942 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1943 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1944 rates[i].hw_value_short = i;
1945 rates[i].flags = 0;
1946 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1947 /*
1948 * If CCK != 1M then set short preamble rate flag.
1949 */
1950 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1951 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1952 }
1953 }
1954 }
1955
1956 /******************************************************************************
1957 *
1958 * uCode download functions
1959 *
1960 ******************************************************************************/
1961
1962 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1963 {
1964 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1965 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1966 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1967 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1968 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1969 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1970 }
1971
1972 /**
1973 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1974 * looking at all data.
1975 */
1976 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1977 {
1978 u32 val;
1979 u32 save_len = len;
1980 int rc = 0;
1981 u32 errcnt;
1982
1983 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1984
1985 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1986 IWL39_RTC_INST_LOWER_BOUND);
1987
1988 errcnt = 0;
1989 for (; len > 0; len -= sizeof(u32), image++) {
1990 /* read data comes through single port, auto-incr addr */
1991 /* NOTE: Use the debugless read so we don't flood kernel log
1992 * if IWL_DL_IO is set */
1993 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1994 if (val != le32_to_cpu(*image)) {
1995 IWL_ERR(priv, "uCode INST section is invalid at "
1996 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1997 save_len - len, val, le32_to_cpu(*image));
1998 rc = -EIO;
1999 errcnt++;
2000 if (errcnt >= 20)
2001 break;
2002 }
2003 }
2004
2005
2006 if (!errcnt)
2007 IWL_DEBUG_INFO(priv,
2008 "ucode image in INSTRUCTION memory is good\n");
2009
2010 return rc;
2011 }
2012
2013
2014 /**
2015 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2016 * using sample data 100 bytes apart. If these sample points are good,
2017 * it's a pretty good bet that everything between them is good, too.
2018 */
2019 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2020 {
2021 u32 val;
2022 int rc = 0;
2023 u32 errcnt = 0;
2024 u32 i;
2025
2026 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2027
2028 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2029 /* read data comes through single port, auto-incr addr */
2030 /* NOTE: Use the debugless read so we don't flood kernel log
2031 * if IWL_DL_IO is set */
2032 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2033 i + IWL39_RTC_INST_LOWER_BOUND);
2034 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2035 if (val != le32_to_cpu(*image)) {
2036 #if 0 /* Enable this if you want to see details */
2037 IWL_ERR(priv, "uCode INST section is invalid at "
2038 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2039 i, val, *image);
2040 #endif
2041 rc = -EIO;
2042 errcnt++;
2043 if (errcnt >= 3)
2044 break;
2045 }
2046 }
2047
2048 return rc;
2049 }
2050
2051
2052 /**
2053 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2054 * and verify its contents
2055 */
2056 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2057 {
2058 __le32 *image;
2059 u32 len;
2060 int rc = 0;
2061
2062 /* Try bootstrap */
2063 image = (__le32 *)priv->ucode_boot.v_addr;
2064 len = priv->ucode_boot.len;
2065 rc = iwl3945_verify_inst_sparse(priv, image, len);
2066 if (rc == 0) {
2067 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2068 return 0;
2069 }
2070
2071 /* Try initialize */
2072 image = (__le32 *)priv->ucode_init.v_addr;
2073 len = priv->ucode_init.len;
2074 rc = iwl3945_verify_inst_sparse(priv, image, len);
2075 if (rc == 0) {
2076 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2077 return 0;
2078 }
2079
2080 /* Try runtime/protocol */
2081 image = (__le32 *)priv->ucode_code.v_addr;
2082 len = priv->ucode_code.len;
2083 rc = iwl3945_verify_inst_sparse(priv, image, len);
2084 if (rc == 0) {
2085 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2086 return 0;
2087 }
2088
2089 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2090
2091 /* Since nothing seems to match, show first several data entries in
2092 * instruction SRAM, so maybe visual inspection will give a clue.
2093 * Selection of bootstrap image (vs. other images) is arbitrary. */
2094 image = (__le32 *)priv->ucode_boot.v_addr;
2095 len = priv->ucode_boot.len;
2096 rc = iwl3945_verify_inst_full(priv, image, len);
2097
2098 return rc;
2099 }
2100
2101 static void iwl3945_nic_start(struct iwl_priv *priv)
2102 {
2103 /* Remove all resets to allow NIC to operate */
2104 iwl_write32(priv, CSR_RESET, 0);
2105 }
2106
2107 /**
2108 * iwl3945_read_ucode - Read uCode images from disk file.
2109 *
2110 * Copy into buffers for card to fetch via bus-mastering
2111 */
2112 static int iwl3945_read_ucode(struct iwl_priv *priv)
2113 {
2114 struct iwl_ucode *ucode;
2115 int ret = -EINVAL, index;
2116 const struct firmware *ucode_raw;
2117 /* firmware file name contains uCode/driver compatibility version */
2118 const char *name_pre = priv->cfg->fw_name_pre;
2119 const unsigned int api_max = priv->cfg->ucode_api_max;
2120 const unsigned int api_min = priv->cfg->ucode_api_min;
2121 char buf[25];
2122 u8 *src;
2123 size_t len;
2124 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2125
2126 /* Ask kernel firmware_class module to get the boot firmware off disk.
2127 * request_firmware() is synchronous, file is in memory on return. */
2128 for (index = api_max; index >= api_min; index--) {
2129 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2130 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2131 if (ret < 0) {
2132 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2133 buf, ret);
2134 if (ret == -ENOENT)
2135 continue;
2136 else
2137 goto error;
2138 } else {
2139 if (index < api_max)
2140 IWL_ERR(priv, "Loaded firmware %s, "
2141 "which is deprecated. "
2142 " Please use API v%u instead.\n",
2143 buf, api_max);
2144 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2145 "(%zd bytes) from disk\n",
2146 buf, ucode_raw->size);
2147 break;
2148 }
2149 }
2150
2151 if (ret < 0)
2152 goto error;
2153
2154 /* Make sure that we got at least our header! */
2155 if (ucode_raw->size < sizeof(*ucode)) {
2156 IWL_ERR(priv, "File size way too small!\n");
2157 ret = -EINVAL;
2158 goto err_release;
2159 }
2160
2161 /* Data from ucode file: header followed by uCode images */
2162 ucode = (void *)ucode_raw->data;
2163
2164 priv->ucode_ver = le32_to_cpu(ucode->ver);
2165 api_ver = IWL_UCODE_API(priv->ucode_ver);
2166 inst_size = le32_to_cpu(ucode->inst_size);
2167 data_size = le32_to_cpu(ucode->data_size);
2168 init_size = le32_to_cpu(ucode->init_size);
2169 init_data_size = le32_to_cpu(ucode->init_data_size);
2170 boot_size = le32_to_cpu(ucode->boot_size);
2171
2172 /* api_ver should match the api version forming part of the
2173 * firmware filename ... but we don't check for that and only rely
2174 * on the API version read from firmware header from here on forward */
2175
2176 if (api_ver < api_min || api_ver > api_max) {
2177 IWL_ERR(priv, "Driver unable to support your firmware API. "
2178 "Driver supports v%u, firmware is v%u.\n",
2179 api_max, api_ver);
2180 priv->ucode_ver = 0;
2181 ret = -EINVAL;
2182 goto err_release;
2183 }
2184 if (api_ver != api_max)
2185 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2186 "got %u. New firmware can be obtained "
2187 "from http://www.intellinuxwireless.org.\n",
2188 api_max, api_ver);
2189
2190 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2191 IWL_UCODE_MAJOR(priv->ucode_ver),
2192 IWL_UCODE_MINOR(priv->ucode_ver),
2193 IWL_UCODE_API(priv->ucode_ver),
2194 IWL_UCODE_SERIAL(priv->ucode_ver));
2195
2196 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2197 priv->ucode_ver);
2198 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2199 inst_size);
2200 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2201 data_size);
2202 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2203 init_size);
2204 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2205 init_data_size);
2206 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2207 boot_size);
2208
2209
2210 /* Verify size of file vs. image size info in file's header */
2211 if (ucode_raw->size < sizeof(*ucode) +
2212 inst_size + data_size + init_size +
2213 init_data_size + boot_size) {
2214
2215 IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
2216 ucode_raw->size);
2217 ret = -EINVAL;
2218 goto err_release;
2219 }
2220
2221 /* Verify that uCode images will fit in card's SRAM */
2222 if (inst_size > IWL39_MAX_INST_SIZE) {
2223 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2224 inst_size);
2225 ret = -EINVAL;
2226 goto err_release;
2227 }
2228
2229 if (data_size > IWL39_MAX_DATA_SIZE) {
2230 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2231 data_size);
2232 ret = -EINVAL;
2233 goto err_release;
2234 }
2235 if (init_size > IWL39_MAX_INST_SIZE) {
2236 IWL_DEBUG_INFO(priv,
2237 "uCode init instr len %d too large to fit in\n",
2238 init_size);
2239 ret = -EINVAL;
2240 goto err_release;
2241 }
2242 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2243 IWL_DEBUG_INFO(priv,
2244 "uCode init data len %d too large to fit in\n",
2245 init_data_size);
2246 ret = -EINVAL;
2247 goto err_release;
2248 }
2249 if (boot_size > IWL39_MAX_BSM_SIZE) {
2250 IWL_DEBUG_INFO(priv,
2251 "uCode boot instr len %d too large to fit in\n",
2252 boot_size);
2253 ret = -EINVAL;
2254 goto err_release;
2255 }
2256
2257 /* Allocate ucode buffers for card's bus-master loading ... */
2258
2259 /* Runtime instructions and 2 copies of data:
2260 * 1) unmodified from disk
2261 * 2) backup cache for save/restore during power-downs */
2262 priv->ucode_code.len = inst_size;
2263 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2264
2265 priv->ucode_data.len = data_size;
2266 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2267
2268 priv->ucode_data_backup.len = data_size;
2269 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2270
2271 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2272 !priv->ucode_data_backup.v_addr)
2273 goto err_pci_alloc;
2274
2275 /* Initialization instructions and data */
2276 if (init_size && init_data_size) {
2277 priv->ucode_init.len = init_size;
2278 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2279
2280 priv->ucode_init_data.len = init_data_size;
2281 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2282
2283 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2284 goto err_pci_alloc;
2285 }
2286
2287 /* Bootstrap (instructions only, no data) */
2288 if (boot_size) {
2289 priv->ucode_boot.len = boot_size;
2290 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2291
2292 if (!priv->ucode_boot.v_addr)
2293 goto err_pci_alloc;
2294 }
2295
2296 /* Copy images into buffers for card's bus-master reads ... */
2297
2298 /* Runtime instructions (first block of data in file) */
2299 src = &ucode->data[0];
2300 len = priv->ucode_code.len;
2301 IWL_DEBUG_INFO(priv,
2302 "Copying (but not loading) uCode instr len %zd\n", len);
2303 memcpy(priv->ucode_code.v_addr, src, len);
2304 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2305 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2306
2307 /* Runtime data (2nd block)
2308 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2309 src = &ucode->data[inst_size];
2310 len = priv->ucode_data.len;
2311 IWL_DEBUG_INFO(priv,
2312 "Copying (but not loading) uCode data len %zd\n", len);
2313 memcpy(priv->ucode_data.v_addr, src, len);
2314 memcpy(priv->ucode_data_backup.v_addr, src, len);
2315
2316 /* Initialization instructions (3rd block) */
2317 if (init_size) {
2318 src = &ucode->data[inst_size + data_size];
2319 len = priv->ucode_init.len;
2320 IWL_DEBUG_INFO(priv,
2321 "Copying (but not loading) init instr len %zd\n", len);
2322 memcpy(priv->ucode_init.v_addr, src, len);
2323 }
2324
2325 /* Initialization data (4th block) */
2326 if (init_data_size) {
2327 src = &ucode->data[inst_size + data_size + init_size];
2328 len = priv->ucode_init_data.len;
2329 IWL_DEBUG_INFO(priv,
2330 "Copying (but not loading) init data len %zd\n", len);
2331 memcpy(priv->ucode_init_data.v_addr, src, len);
2332 }
2333
2334 /* Bootstrap instructions (5th block) */
2335 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
2336 len = priv->ucode_boot.len;
2337 IWL_DEBUG_INFO(priv,
2338 "Copying (but not loading) boot instr len %zd\n", len);
2339 memcpy(priv->ucode_boot.v_addr, src, len);
2340
2341 /* We have our copies now, allow OS release its copies */
2342 release_firmware(ucode_raw);
2343 return 0;
2344
2345 err_pci_alloc:
2346 IWL_ERR(priv, "failed to allocate pci memory\n");
2347 ret = -ENOMEM;
2348 iwl3945_dealloc_ucode_pci(priv);
2349
2350 err_release:
2351 release_firmware(ucode_raw);
2352
2353 error:
2354 return ret;
2355 }
2356
2357
2358 /**
2359 * iwl3945_set_ucode_ptrs - Set uCode address location
2360 *
2361 * Tell initialization uCode where to find runtime uCode.
2362 *
2363 * BSM registers initially contain pointers to initialization uCode.
2364 * We need to replace them to load runtime uCode inst and data,
2365 * and to save runtime data when powering down.
2366 */
2367 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2368 {
2369 dma_addr_t pinst;
2370 dma_addr_t pdata;
2371
2372 /* bits 31:0 for 3945 */
2373 pinst = priv->ucode_code.p_addr;
2374 pdata = priv->ucode_data_backup.p_addr;
2375
2376 /* Tell bootstrap uCode where to find image to load */
2377 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2378 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2379 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2380 priv->ucode_data.len);
2381
2382 /* Inst byte count must be last to set up, bit 31 signals uCode
2383 * that all new ptr/size info is in place */
2384 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2385 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2386
2387 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2388
2389 return 0;
2390 }
2391
2392 /**
2393 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2394 *
2395 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2396 *
2397 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2398 */
2399 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2400 {
2401 /* Check alive response for "valid" sign from uCode */
2402 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2403 /* We had an error bringing up the hardware, so take it
2404 * all the way back down so we can try again */
2405 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2406 goto restart;
2407 }
2408
2409 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2410 * This is a paranoid check, because we would not have gotten the
2411 * "initialize" alive if code weren't properly loaded. */
2412 if (iwl3945_verify_ucode(priv)) {
2413 /* Runtime instruction load was bad;
2414 * take it all the way back down so we can try again */
2415 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2416 goto restart;
2417 }
2418
2419 /* Send pointers to protocol/runtime uCode image ... init code will
2420 * load and launch runtime uCode, which will send us another "Alive"
2421 * notification. */
2422 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2423 if (iwl3945_set_ucode_ptrs(priv)) {
2424 /* Runtime instruction load won't happen;
2425 * take it all the way back down so we can try again */
2426 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2427 goto restart;
2428 }
2429 return;
2430
2431 restart:
2432 queue_work(priv->workqueue, &priv->restart);
2433 }
2434
2435 /**
2436 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2437 * from protocol/runtime uCode (initialization uCode's
2438 * Alive gets handled by iwl3945_init_alive_start()).
2439 */
2440 static void iwl3945_alive_start(struct iwl_priv *priv)
2441 {
2442 int thermal_spin = 0;
2443 u32 rfkill;
2444
2445 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2446
2447 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2448 /* We had an error bringing up the hardware, so take it
2449 * all the way back down so we can try again */
2450 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2451 goto restart;
2452 }
2453
2454 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2455 * This is a paranoid check, because we would not have gotten the
2456 * "runtime" alive if code weren't properly loaded. */
2457 if (iwl3945_verify_ucode(priv)) {
2458 /* Runtime instruction load was bad;
2459 * take it all the way back down so we can try again */
2460 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2461 goto restart;
2462 }
2463
2464 iwl_clear_stations_table(priv);
2465
2466 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2467 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2468
2469 if (rfkill & 0x1) {
2470 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2471 /* if RFKILL is not on, then wait for thermal
2472 * sensor in adapter to kick in */
2473 while (iwl3945_hw_get_temperature(priv) == 0) {
2474 thermal_spin++;
2475 udelay(10);
2476 }
2477
2478 if (thermal_spin)
2479 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2480 thermal_spin * 10);
2481 } else
2482 set_bit(STATUS_RF_KILL_HW, &priv->status);
2483
2484 /* After the ALIVE response, we can send commands to 3945 uCode */
2485 set_bit(STATUS_ALIVE, &priv->status);
2486
2487 if (iwl_is_rfkill(priv))
2488 return;
2489
2490 ieee80211_wake_queues(priv->hw);
2491
2492 priv->active_rate = priv->rates_mask;
2493 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2494
2495 iwl_power_update_mode(priv, false);
2496
2497 if (iwl_is_associated(priv)) {
2498 struct iwl3945_rxon_cmd *active_rxon =
2499 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2500
2501 memcpy(&priv->staging_rxon, &priv->active_rxon,
2502 sizeof(priv->staging_rxon));
2503 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2504 } else {
2505 /* Initialize our rx_config data */
2506 iwl_connection_init_rx_config(priv, priv->iw_mode);
2507 }
2508
2509 /* Configure Bluetooth device coexistence support */
2510 iwl_send_bt_config(priv);
2511
2512 /* Configure the adapter for unassociated operation */
2513 iwlcore_commit_rxon(priv);
2514
2515 iwl3945_reg_txpower_periodic(priv);
2516
2517 iwl3945_led_register(priv);
2518
2519 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2520 set_bit(STATUS_READY, &priv->status);
2521 wake_up_interruptible(&priv->wait_command_queue);
2522
2523 /* reassociate for ADHOC mode */
2524 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2525 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2526 priv->vif);
2527 if (beacon)
2528 iwl_mac_beacon_update(priv->hw, beacon);
2529 }
2530
2531 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2532 iwl_set_mode(priv, priv->iw_mode);
2533
2534 return;
2535
2536 restart:
2537 queue_work(priv->workqueue, &priv->restart);
2538 }
2539
2540 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2541
2542 static void __iwl3945_down(struct iwl_priv *priv)
2543 {
2544 unsigned long flags;
2545 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2546 struct ieee80211_conf *conf = NULL;
2547
2548 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2549
2550 conf = ieee80211_get_hw_conf(priv->hw);
2551
2552 if (!exit_pending)
2553 set_bit(STATUS_EXIT_PENDING, &priv->status);
2554
2555 iwl3945_led_unregister(priv);
2556 iwl_clear_stations_table(priv);
2557
2558 /* Unblock any waiting calls */
2559 wake_up_interruptible_all(&priv->wait_command_queue);
2560
2561 /* Wipe out the EXIT_PENDING status bit if we are not actually
2562 * exiting the module */
2563 if (!exit_pending)
2564 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2565
2566 /* stop and reset the on-board processor */
2567 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2568
2569 /* tell the device to stop sending interrupts */
2570 spin_lock_irqsave(&priv->lock, flags);
2571 iwl_disable_interrupts(priv);
2572 spin_unlock_irqrestore(&priv->lock, flags);
2573 iwl_synchronize_irq(priv);
2574
2575 if (priv->mac80211_registered)
2576 ieee80211_stop_queues(priv->hw);
2577
2578 /* If we have not previously called iwl3945_init() then
2579 * clear all bits but the RF Kill bits and return */
2580 if (!iwl_is_init(priv)) {
2581 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2582 STATUS_RF_KILL_HW |
2583 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2584 STATUS_GEO_CONFIGURED |
2585 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2586 STATUS_EXIT_PENDING;
2587 goto exit;
2588 }
2589
2590 /* ...otherwise clear out all the status bits but the RF Kill
2591 * bit and continue taking the NIC down. */
2592 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2593 STATUS_RF_KILL_HW |
2594 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2595 STATUS_GEO_CONFIGURED |
2596 test_bit(STATUS_FW_ERROR, &priv->status) <<
2597 STATUS_FW_ERROR |
2598 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2599 STATUS_EXIT_PENDING;
2600
2601 priv->cfg->ops->lib->apm_ops.reset(priv);
2602 spin_lock_irqsave(&priv->lock, flags);
2603 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2604 spin_unlock_irqrestore(&priv->lock, flags);
2605
2606 iwl3945_hw_txq_ctx_stop(priv);
2607 iwl3945_hw_rxq_stop(priv);
2608
2609 iwl_write_prph(priv, APMG_CLK_DIS_REG,
2610 APMG_CLK_VAL_DMA_CLK_RQT);
2611
2612 udelay(5);
2613
2614 if (exit_pending)
2615 priv->cfg->ops->lib->apm_ops.stop(priv);
2616 else
2617 priv->cfg->ops->lib->apm_ops.reset(priv);
2618
2619 exit:
2620 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2621
2622 if (priv->ibss_beacon)
2623 dev_kfree_skb(priv->ibss_beacon);
2624 priv->ibss_beacon = NULL;
2625
2626 /* clear out any free frames */
2627 iwl3945_clear_free_frames(priv);
2628 }
2629
2630 static void iwl3945_down(struct iwl_priv *priv)
2631 {
2632 mutex_lock(&priv->mutex);
2633 __iwl3945_down(priv);
2634 mutex_unlock(&priv->mutex);
2635
2636 iwl3945_cancel_deferred_work(priv);
2637 }
2638
2639 #define MAX_HW_RESTARTS 5
2640
2641 static int __iwl3945_up(struct iwl_priv *priv)
2642 {
2643 int rc, i;
2644
2645 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2646 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2647 return -EIO;
2648 }
2649
2650 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2651 IWL_ERR(priv, "ucode not available for device bring up\n");
2652 return -EIO;
2653 }
2654
2655 /* If platform's RF_KILL switch is NOT set to KILL */
2656 if (iwl_read32(priv, CSR_GP_CNTRL) &
2657 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2658 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2659 else {
2660 set_bit(STATUS_RF_KILL_HW, &priv->status);
2661 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2662 return -ENODEV;
2663 }
2664
2665 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2666
2667 rc = iwl3945_hw_nic_init(priv);
2668 if (rc) {
2669 IWL_ERR(priv, "Unable to int nic\n");
2670 return rc;
2671 }
2672
2673 /* make sure rfkill handshake bits are cleared */
2674 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2675 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2676 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2677
2678 /* clear (again), then enable host interrupts */
2679 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2680 iwl_enable_interrupts(priv);
2681
2682 /* really make sure rfkill handshake bits are cleared */
2683 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2684 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2685
2686 /* Copy original ucode data image from disk into backup cache.
2687 * This will be used to initialize the on-board processor's
2688 * data SRAM for a clean start when the runtime program first loads. */
2689 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2690 priv->ucode_data.len);
2691
2692 /* We return success when we resume from suspend and rf_kill is on. */
2693 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2694 return 0;
2695
2696 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2697
2698 iwl_clear_stations_table(priv);
2699
2700 /* load bootstrap state machine,
2701 * load bootstrap program into processor's memory,
2702 * prepare to load the "initialize" uCode */
2703 priv->cfg->ops->lib->load_ucode(priv);
2704
2705 if (rc) {
2706 IWL_ERR(priv,
2707 "Unable to set up bootstrap uCode: %d\n", rc);
2708 continue;
2709 }
2710
2711 /* start card; "initialize" will load runtime ucode */
2712 iwl3945_nic_start(priv);
2713
2714 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2715
2716 return 0;
2717 }
2718
2719 set_bit(STATUS_EXIT_PENDING, &priv->status);
2720 __iwl3945_down(priv);
2721 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2722
2723 /* tried to restart and config the device for as long as our
2724 * patience could withstand */
2725 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2726 return -EIO;
2727 }
2728
2729
2730 /*****************************************************************************
2731 *
2732 * Workqueue callbacks
2733 *
2734 *****************************************************************************/
2735
2736 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2737 {
2738 struct iwl_priv *priv =
2739 container_of(data, struct iwl_priv, init_alive_start.work);
2740
2741 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2742 return;
2743
2744 mutex_lock(&priv->mutex);
2745 iwl3945_init_alive_start(priv);
2746 mutex_unlock(&priv->mutex);
2747 }
2748
2749 static void iwl3945_bg_alive_start(struct work_struct *data)
2750 {
2751 struct iwl_priv *priv =
2752 container_of(data, struct iwl_priv, alive_start.work);
2753
2754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2755 return;
2756
2757 mutex_lock(&priv->mutex);
2758 iwl3945_alive_start(priv);
2759 mutex_unlock(&priv->mutex);
2760 }
2761
2762 static void iwl3945_rfkill_poll(struct work_struct *data)
2763 {
2764 struct iwl_priv *priv =
2765 container_of(data, struct iwl_priv, rfkill_poll.work);
2766
2767 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2768 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2769 else
2770 set_bit(STATUS_RF_KILL_HW, &priv->status);
2771
2772 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2773 test_bit(STATUS_RF_KILL_HW, &priv->status));
2774
2775 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2776 round_jiffies_relative(2 * HZ));
2777
2778 }
2779
2780 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2781 static void iwl3945_bg_request_scan(struct work_struct *data)
2782 {
2783 struct iwl_priv *priv =
2784 container_of(data, struct iwl_priv, request_scan);
2785 struct iwl_host_cmd cmd = {
2786 .id = REPLY_SCAN_CMD,
2787 .len = sizeof(struct iwl3945_scan_cmd),
2788 .meta.flags = CMD_SIZE_HUGE,
2789 };
2790 int rc = 0;
2791 struct iwl3945_scan_cmd *scan;
2792 struct ieee80211_conf *conf = NULL;
2793 u8 n_probes = 0;
2794 enum ieee80211_band band;
2795 bool is_active = false;
2796
2797 conf = ieee80211_get_hw_conf(priv->hw);
2798
2799 mutex_lock(&priv->mutex);
2800
2801 cancel_delayed_work(&priv->scan_check);
2802
2803 if (!iwl_is_ready(priv)) {
2804 IWL_WARN(priv, "request scan called when driver not ready.\n");
2805 goto done;
2806 }
2807
2808 /* Make sure the scan wasn't canceled before this queued work
2809 * was given the chance to run... */
2810 if (!test_bit(STATUS_SCANNING, &priv->status))
2811 goto done;
2812
2813 /* This should never be called or scheduled if there is currently
2814 * a scan active in the hardware. */
2815 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2816 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2817 "Ignoring second request.\n");
2818 rc = -EIO;
2819 goto done;
2820 }
2821
2822 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2823 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2824 goto done;
2825 }
2826
2827 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2828 IWL_DEBUG_HC(priv,
2829 "Scan request while abort pending. Queuing.\n");
2830 goto done;
2831 }
2832
2833 if (iwl_is_rfkill(priv)) {
2834 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2835 goto done;
2836 }
2837
2838 if (!test_bit(STATUS_READY, &priv->status)) {
2839 IWL_DEBUG_HC(priv,
2840 "Scan request while uninitialized. Queuing.\n");
2841 goto done;
2842 }
2843
2844 if (!priv->scan_bands) {
2845 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2846 goto done;
2847 }
2848
2849 if (!priv->scan) {
2850 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2851 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2852 if (!priv->scan) {
2853 rc = -ENOMEM;
2854 goto done;
2855 }
2856 }
2857 scan = priv->scan;
2858 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2859
2860 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2861 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2862
2863 if (iwl_is_associated(priv)) {
2864 u16 interval = 0;
2865 u32 extra;
2866 u32 suspend_time = 100;
2867 u32 scan_suspend_time = 100;
2868 unsigned long flags;
2869
2870 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2871
2872 spin_lock_irqsave(&priv->lock, flags);
2873 interval = priv->beacon_int;
2874 spin_unlock_irqrestore(&priv->lock, flags);
2875
2876 scan->suspend_time = 0;
2877 scan->max_out_time = cpu_to_le32(200 * 1024);
2878 if (!interval)
2879 interval = suspend_time;
2880 /*
2881 * suspend time format:
2882 * 0-19: beacon interval in usec (time before exec.)
2883 * 20-23: 0
2884 * 24-31: number of beacons (suspend between channels)
2885 */
2886
2887 extra = (suspend_time / interval) << 24;
2888 scan_suspend_time = 0xFF0FFFFF &
2889 (extra | ((suspend_time % interval) * 1024));
2890
2891 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2892 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2893 scan_suspend_time, interval);
2894 }
2895
2896 if (priv->scan_request->n_ssids) {
2897 int i, p = 0;
2898 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2899 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2900 /* always does wildcard anyway */
2901 if (!priv->scan_request->ssids[i].ssid_len)
2902 continue;
2903 scan->direct_scan[p].id = WLAN_EID_SSID;
2904 scan->direct_scan[p].len =
2905 priv->scan_request->ssids[i].ssid_len;
2906 memcpy(scan->direct_scan[p].ssid,
2907 priv->scan_request->ssids[i].ssid,
2908 priv->scan_request->ssids[i].ssid_len);
2909 n_probes++;
2910 p++;
2911 }
2912 is_active = true;
2913 } else
2914 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2915
2916 /* We don't build a direct scan probe request; the uCode will do
2917 * that based on the direct_mask added to each channel entry */
2918 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2919 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2920 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2921
2922 /* flags + rate selection */
2923
2924 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
2925 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2926 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2927 scan->good_CRC_th = 0;
2928 band = IEEE80211_BAND_2GHZ;
2929 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
2930 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2931 /*
2932 * If active scaning is requested but a certain channel
2933 * is marked passive, we can do active scanning if we
2934 * detect transmissions.
2935 */
2936 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
2937 band = IEEE80211_BAND_5GHZ;
2938 } else {
2939 IWL_WARN(priv, "Invalid scan band count\n");
2940 goto done;
2941 }
2942
2943 scan->tx_cmd.len = cpu_to_le16(
2944 iwl_fill_probe_req(priv,
2945 (struct ieee80211_mgmt *)scan->data,
2946 priv->scan_request->ie,
2947 priv->scan_request->ie_len,
2948 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2949
2950 /* select Rx antennas */
2951 scan->flags |= iwl3945_get_antenna_flags(priv);
2952
2953 if (iwl_is_monitor_mode(priv))
2954 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2955
2956 scan->channel_count =
2957 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2958 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2959
2960 if (scan->channel_count == 0) {
2961 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2962 goto done;
2963 }
2964
2965 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2966 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2967 cmd.data = scan;
2968 scan->len = cpu_to_le16(cmd.len);
2969
2970 set_bit(STATUS_SCAN_HW, &priv->status);
2971 rc = iwl_send_cmd_sync(priv, &cmd);
2972 if (rc)
2973 goto done;
2974
2975 queue_delayed_work(priv->workqueue, &priv->scan_check,
2976 IWL_SCAN_CHECK_WATCHDOG);
2977
2978 mutex_unlock(&priv->mutex);
2979 return;
2980
2981 done:
2982 /* can not perform scan make sure we clear scanning
2983 * bits from status so next scan request can be performed.
2984 * if we dont clear scanning status bit here all next scan
2985 * will fail
2986 */
2987 clear_bit(STATUS_SCAN_HW, &priv->status);
2988 clear_bit(STATUS_SCANNING, &priv->status);
2989
2990 /* inform mac80211 scan aborted */
2991 queue_work(priv->workqueue, &priv->scan_completed);
2992 mutex_unlock(&priv->mutex);
2993 }
2994
2995 static void iwl3945_bg_up(struct work_struct *data)
2996 {
2997 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2998
2999 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3000 return;
3001
3002 mutex_lock(&priv->mutex);
3003 __iwl3945_up(priv);
3004 mutex_unlock(&priv->mutex);
3005 }
3006
3007 static void iwl3945_bg_restart(struct work_struct *data)
3008 {
3009 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3010
3011 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3012 return;
3013
3014 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3015 mutex_lock(&priv->mutex);
3016 priv->vif = NULL;
3017 priv->is_open = 0;
3018 mutex_unlock(&priv->mutex);
3019 iwl3945_down(priv);
3020 ieee80211_restart_hw(priv->hw);
3021 } else {
3022 iwl3945_down(priv);
3023 queue_work(priv->workqueue, &priv->up);
3024 }
3025 }
3026
3027 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3028 {
3029 struct iwl_priv *priv =
3030 container_of(data, struct iwl_priv, rx_replenish);
3031
3032 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3033 return;
3034
3035 mutex_lock(&priv->mutex);
3036 iwl3945_rx_replenish(priv);
3037 mutex_unlock(&priv->mutex);
3038 }
3039
3040 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3041
3042 void iwl3945_post_associate(struct iwl_priv *priv)
3043 {
3044 int rc = 0;
3045 struct ieee80211_conf *conf = NULL;
3046
3047 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3048 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3049 return;
3050 }
3051
3052
3053 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3054 priv->assoc_id, priv->active_rxon.bssid_addr);
3055
3056 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3057 return;
3058
3059 if (!priv->vif || !priv->is_open)
3060 return;
3061
3062 iwl_scan_cancel_timeout(priv, 200);
3063
3064 conf = ieee80211_get_hw_conf(priv->hw);
3065
3066 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3067 iwlcore_commit_rxon(priv);
3068
3069 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3070 iwl3945_setup_rxon_timing(priv);
3071 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3072 sizeof(priv->rxon_timing), &priv->rxon_timing);
3073 if (rc)
3074 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3075 "Attempting to continue.\n");
3076
3077 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3078
3079 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3080
3081 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3082 priv->assoc_id, priv->beacon_int);
3083
3084 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3085 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3086 else
3087 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3088
3089 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3090 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3091 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3092 else
3093 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3094
3095 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3096 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3097
3098 }
3099
3100 iwlcore_commit_rxon(priv);
3101
3102 switch (priv->iw_mode) {
3103 case NL80211_IFTYPE_STATION:
3104 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3105 break;
3106
3107 case NL80211_IFTYPE_ADHOC:
3108
3109 priv->assoc_id = 1;
3110 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
3111 iwl3945_sync_sta(priv, IWL_STA_ID,
3112 (priv->band == IEEE80211_BAND_5GHZ) ?
3113 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3114 CMD_ASYNC);
3115 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3116 iwl3945_send_beacon_cmd(priv);
3117
3118 break;
3119
3120 default:
3121 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3122 __func__, priv->iw_mode);
3123 break;
3124 }
3125
3126 iwl_activate_qos(priv, 0);
3127
3128 /* we have just associated, don't start scan too early */
3129 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3130 }
3131
3132 /*****************************************************************************
3133 *
3134 * mac80211 entry point functions
3135 *
3136 *****************************************************************************/
3137
3138 #define UCODE_READY_TIMEOUT (2 * HZ)
3139
3140 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3141 {
3142 struct iwl_priv *priv = hw->priv;
3143 int ret;
3144
3145 IWL_DEBUG_MAC80211(priv, "enter\n");
3146
3147 /* we should be verifying the device is ready to be opened */
3148 mutex_lock(&priv->mutex);
3149
3150 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
3151 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3152 * ucode filename and max sizes are card-specific. */
3153
3154 if (!priv->ucode_code.len) {
3155 ret = iwl3945_read_ucode(priv);
3156 if (ret) {
3157 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3158 mutex_unlock(&priv->mutex);
3159 goto out_release_irq;
3160 }
3161 }
3162
3163 ret = __iwl3945_up(priv);
3164
3165 mutex_unlock(&priv->mutex);
3166
3167 if (ret)
3168 goto out_release_irq;
3169
3170 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3171
3172 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3173 * mac80211 will not be run successfully. */
3174 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3175 test_bit(STATUS_READY, &priv->status),
3176 UCODE_READY_TIMEOUT);
3177 if (!ret) {
3178 if (!test_bit(STATUS_READY, &priv->status)) {
3179 IWL_ERR(priv,
3180 "Wait for START_ALIVE timeout after %dms.\n",
3181 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3182 ret = -ETIMEDOUT;
3183 goto out_release_irq;
3184 }
3185 }
3186
3187 /* ucode is running and will send rfkill notifications,
3188 * no need to poll the killswitch state anymore */
3189 cancel_delayed_work(&priv->rfkill_poll);
3190
3191 priv->is_open = 1;
3192 IWL_DEBUG_MAC80211(priv, "leave\n");
3193 return 0;
3194
3195 out_release_irq:
3196 priv->is_open = 0;
3197 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3198 return ret;
3199 }
3200
3201 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3202 {
3203 struct iwl_priv *priv = hw->priv;
3204
3205 IWL_DEBUG_MAC80211(priv, "enter\n");
3206
3207 if (!priv->is_open) {
3208 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3209 return;
3210 }
3211
3212 priv->is_open = 0;
3213
3214 if (iwl_is_ready_rf(priv)) {
3215 /* stop mac, cancel any scan request and clear
3216 * RXON_FILTER_ASSOC_MSK BIT
3217 */
3218 mutex_lock(&priv->mutex);
3219 iwl_scan_cancel_timeout(priv, 100);
3220 mutex_unlock(&priv->mutex);
3221 }
3222
3223 iwl3945_down(priv);
3224
3225 flush_workqueue(priv->workqueue);
3226
3227 /* start polling the killswitch state again */
3228 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
3229 round_jiffies_relative(2 * HZ));
3230
3231 IWL_DEBUG_MAC80211(priv, "leave\n");
3232 }
3233
3234 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3235 {
3236 struct iwl_priv *priv = hw->priv;
3237
3238 IWL_DEBUG_MAC80211(priv, "enter\n");
3239
3240 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3241 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3242
3243 if (iwl3945_tx_skb(priv, skb))
3244 dev_kfree_skb_any(skb);
3245
3246 IWL_DEBUG_MAC80211(priv, "leave\n");
3247 return NETDEV_TX_OK;
3248 }
3249
3250 void iwl3945_config_ap(struct iwl_priv *priv)
3251 {
3252 int rc = 0;
3253
3254 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3255 return;
3256
3257 /* The following should be done only at AP bring up */
3258 if (!(iwl_is_associated(priv))) {
3259
3260 /* RXON - unassoc (to set timing command) */
3261 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3262 iwlcore_commit_rxon(priv);
3263
3264 /* RXON Timing */
3265 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3266 iwl3945_setup_rxon_timing(priv);
3267 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3268 sizeof(priv->rxon_timing),
3269 &priv->rxon_timing);
3270 if (rc)
3271 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3272 "Attempting to continue.\n");
3273
3274 /* FIXME: what should be the assoc_id for AP? */
3275 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3276 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3277 priv->staging_rxon.flags |=
3278 RXON_FLG_SHORT_PREAMBLE_MSK;
3279 else
3280 priv->staging_rxon.flags &=
3281 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3282
3283 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3284 if (priv->assoc_capability &
3285 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3286 priv->staging_rxon.flags |=
3287 RXON_FLG_SHORT_SLOT_MSK;
3288 else
3289 priv->staging_rxon.flags &=
3290 ~RXON_FLG_SHORT_SLOT_MSK;
3291
3292 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3293 priv->staging_rxon.flags &=
3294 ~RXON_FLG_SHORT_SLOT_MSK;
3295 }
3296 /* restore RXON assoc */
3297 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3298 iwlcore_commit_rxon(priv);
3299 iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
3300 }
3301 iwl3945_send_beacon_cmd(priv);
3302
3303 /* FIXME - we need to add code here to detect a totally new
3304 * configuration, reset the AP, unassoc, rxon timing, assoc,
3305 * clear sta table, add BCAST sta... */
3306 }
3307
3308 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3309 struct ieee80211_vif *vif,
3310 struct ieee80211_sta *sta,
3311 struct ieee80211_key_conf *key)
3312 {
3313 struct iwl_priv *priv = hw->priv;
3314 const u8 *addr;
3315 int ret = 0;
3316 u8 sta_id = IWL_INVALID_STATION;
3317 u8 static_key;
3318
3319 IWL_DEBUG_MAC80211(priv, "enter\n");
3320
3321 if (iwl3945_mod_params.sw_crypto) {
3322 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3323 return -EOPNOTSUPP;
3324 }
3325
3326 addr = sta ? sta->addr : iwl_bcast_addr;
3327 static_key = !iwl_is_associated(priv);
3328
3329 if (!static_key) {
3330 sta_id = iwl_find_station(priv, addr);
3331 if (sta_id == IWL_INVALID_STATION) {
3332 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3333 addr);
3334 return -EINVAL;
3335 }
3336 }
3337
3338 mutex_lock(&priv->mutex);
3339 iwl_scan_cancel_timeout(priv, 100);
3340 mutex_unlock(&priv->mutex);
3341
3342 switch (cmd) {
3343 case SET_KEY:
3344 if (static_key)
3345 ret = iwl3945_set_static_key(priv, key);
3346 else
3347 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3348 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3349 break;
3350 case DISABLE_KEY:
3351 if (static_key)
3352 ret = iwl3945_remove_static_key(priv);
3353 else
3354 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3355 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3356 break;
3357 default:
3358 ret = -EINVAL;
3359 }
3360
3361 IWL_DEBUG_MAC80211(priv, "leave\n");
3362
3363 return ret;
3364 }
3365
3366 /*****************************************************************************
3367 *
3368 * sysfs attributes
3369 *
3370 *****************************************************************************/
3371
3372 #ifdef CONFIG_IWLWIFI_DEBUG
3373
3374 /*
3375 * The following adds a new attribute to the sysfs representation
3376 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3377 * used for controlling the debug level.
3378 *
3379 * See the level definitions in iwl for details.
3380 */
3381 static ssize_t show_debug_level(struct device *d,
3382 struct device_attribute *attr, char *buf)
3383 {
3384 struct iwl_priv *priv = dev_get_drvdata(d);
3385
3386 return sprintf(buf, "0x%08X\n", priv->debug_level);
3387 }
3388 static ssize_t store_debug_level(struct device *d,
3389 struct device_attribute *attr,
3390 const char *buf, size_t count)
3391 {
3392 struct iwl_priv *priv = dev_get_drvdata(d);
3393 unsigned long val;
3394 int ret;
3395
3396 ret = strict_strtoul(buf, 0, &val);
3397 if (ret)
3398 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3399 else
3400 priv->debug_level = val;
3401
3402 return strnlen(buf, count);
3403 }
3404
3405 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3406 show_debug_level, store_debug_level);
3407
3408 #endif /* CONFIG_IWLWIFI_DEBUG */
3409
3410 static ssize_t show_temperature(struct device *d,
3411 struct device_attribute *attr, char *buf)
3412 {
3413 struct iwl_priv *priv = dev_get_drvdata(d);
3414
3415 if (!iwl_is_alive(priv))
3416 return -EAGAIN;
3417
3418 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3419 }
3420
3421 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3422
3423 static ssize_t show_tx_power(struct device *d,
3424 struct device_attribute *attr, char *buf)
3425 {
3426 struct iwl_priv *priv = dev_get_drvdata(d);
3427 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3428 }
3429
3430 static ssize_t store_tx_power(struct device *d,
3431 struct device_attribute *attr,
3432 const char *buf, size_t count)
3433 {
3434 struct iwl_priv *priv = dev_get_drvdata(d);
3435 char *p = (char *)buf;
3436 u32 val;
3437
3438 val = simple_strtoul(p, &p, 10);
3439 if (p == buf)
3440 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3441 else
3442 iwl3945_hw_reg_set_txpower(priv, val);
3443
3444 return count;
3445 }
3446
3447 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3448
3449 static ssize_t show_flags(struct device *d,
3450 struct device_attribute *attr, char *buf)
3451 {
3452 struct iwl_priv *priv = dev_get_drvdata(d);
3453
3454 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3455 }
3456
3457 static ssize_t store_flags(struct device *d,
3458 struct device_attribute *attr,
3459 const char *buf, size_t count)
3460 {
3461 struct iwl_priv *priv = dev_get_drvdata(d);
3462 u32 flags = simple_strtoul(buf, NULL, 0);
3463
3464 mutex_lock(&priv->mutex);
3465 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3466 /* Cancel any currently running scans... */
3467 if (iwl_scan_cancel_timeout(priv, 100))
3468 IWL_WARN(priv, "Could not cancel scan.\n");
3469 else {
3470 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3471 flags);
3472 priv->staging_rxon.flags = cpu_to_le32(flags);
3473 iwlcore_commit_rxon(priv);
3474 }
3475 }
3476 mutex_unlock(&priv->mutex);
3477
3478 return count;
3479 }
3480
3481 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3482
3483 static ssize_t show_filter_flags(struct device *d,
3484 struct device_attribute *attr, char *buf)
3485 {
3486 struct iwl_priv *priv = dev_get_drvdata(d);
3487
3488 return sprintf(buf, "0x%04X\n",
3489 le32_to_cpu(priv->active_rxon.filter_flags));
3490 }
3491
3492 static ssize_t store_filter_flags(struct device *d,
3493 struct device_attribute *attr,
3494 const char *buf, size_t count)
3495 {
3496 struct iwl_priv *priv = dev_get_drvdata(d);
3497 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3498
3499 mutex_lock(&priv->mutex);
3500 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3501 /* Cancel any currently running scans... */
3502 if (iwl_scan_cancel_timeout(priv, 100))
3503 IWL_WARN(priv, "Could not cancel scan.\n");
3504 else {
3505 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3506 "0x%04X\n", filter_flags);
3507 priv->staging_rxon.filter_flags =
3508 cpu_to_le32(filter_flags);
3509 iwlcore_commit_rxon(priv);
3510 }
3511 }
3512 mutex_unlock(&priv->mutex);
3513
3514 return count;
3515 }
3516
3517 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3518 store_filter_flags);
3519
3520 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3521
3522 static ssize_t show_measurement(struct device *d,
3523 struct device_attribute *attr, char *buf)
3524 {
3525 struct iwl_priv *priv = dev_get_drvdata(d);
3526 struct iwl_spectrum_notification measure_report;
3527 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3528 u8 *data = (u8 *)&measure_report;
3529 unsigned long flags;
3530
3531 spin_lock_irqsave(&priv->lock, flags);
3532 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3533 spin_unlock_irqrestore(&priv->lock, flags);
3534 return 0;
3535 }
3536 memcpy(&measure_report, &priv->measure_report, size);
3537 priv->measurement_status = 0;
3538 spin_unlock_irqrestore(&priv->lock, flags);
3539
3540 while (size && (PAGE_SIZE - len)) {
3541 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3542 PAGE_SIZE - len, 1);
3543 len = strlen(buf);
3544 if (PAGE_SIZE - len)
3545 buf[len++] = '\n';
3546
3547 ofs += 16;
3548 size -= min(size, 16U);
3549 }
3550
3551 return len;
3552 }
3553
3554 static ssize_t store_measurement(struct device *d,
3555 struct device_attribute *attr,
3556 const char *buf, size_t count)
3557 {
3558 struct iwl_priv *priv = dev_get_drvdata(d);
3559 struct ieee80211_measurement_params params = {
3560 .channel = le16_to_cpu(priv->active_rxon.channel),
3561 .start_time = cpu_to_le64(priv->last_tsf),
3562 .duration = cpu_to_le16(1),
3563 };
3564 u8 type = IWL_MEASURE_BASIC;
3565 u8 buffer[32];
3566 u8 channel;
3567
3568 if (count) {
3569 char *p = buffer;
3570 strncpy(buffer, buf, min(sizeof(buffer), count));
3571 channel = simple_strtoul(p, NULL, 0);
3572 if (channel)
3573 params.channel = channel;
3574
3575 p = buffer;
3576 while (*p && *p != ' ')
3577 p++;
3578 if (*p)
3579 type = simple_strtoul(p + 1, NULL, 0);
3580 }
3581
3582 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3583 "channel %d (for '%s')\n", type, params.channel, buf);
3584 iwl3945_get_measurement(priv, &params, type);
3585
3586 return count;
3587 }
3588
3589 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3590 show_measurement, store_measurement);
3591 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
3592
3593 static ssize_t store_retry_rate(struct device *d,
3594 struct device_attribute *attr,
3595 const char *buf, size_t count)
3596 {
3597 struct iwl_priv *priv = dev_get_drvdata(d);
3598
3599 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3600 if (priv->retry_rate <= 0)
3601 priv->retry_rate = 1;
3602
3603 return count;
3604 }
3605
3606 static ssize_t show_retry_rate(struct device *d,
3607 struct device_attribute *attr, char *buf)
3608 {
3609 struct iwl_priv *priv = dev_get_drvdata(d);
3610 return sprintf(buf, "%d", priv->retry_rate);
3611 }
3612
3613 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3614 store_retry_rate);
3615
3616
3617 static ssize_t store_power_level(struct device *d,
3618 struct device_attribute *attr,
3619 const char *buf, size_t count)
3620 {
3621 struct iwl_priv *priv = dev_get_drvdata(d);
3622 int ret;
3623 unsigned long mode;
3624
3625
3626 mutex_lock(&priv->mutex);
3627
3628 ret = strict_strtoul(buf, 10, &mode);
3629 if (ret)
3630 goto out;
3631
3632 ret = iwl_power_set_user_mode(priv, mode);
3633 if (ret) {
3634 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
3635 goto out;
3636 }
3637 ret = count;
3638
3639 out:
3640 mutex_unlock(&priv->mutex);
3641 return ret;
3642 }
3643
3644 static ssize_t show_power_level(struct device *d,
3645 struct device_attribute *attr, char *buf)
3646 {
3647 struct iwl_priv *priv = dev_get_drvdata(d);
3648 int mode = priv->power_data.user_power_setting;
3649 int level = priv->power_data.power_mode;
3650 char *p = buf;
3651
3652 p += sprintf(p, "INDEX:%d\t", level);
3653 p += sprintf(p, "USER:%d\n", mode);
3654 return p - buf + 1;
3655 }
3656
3657 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
3658 show_power_level, store_power_level);
3659
3660 #define MAX_WX_STRING 80
3661
3662 /* Values are in microsecond */
3663 static const s32 timeout_duration[] = {
3664 350000,
3665 250000,
3666 75000,
3667 37000,
3668 25000,
3669 };
3670 static const s32 period_duration[] = {
3671 400000,
3672 700000,
3673 1000000,
3674 1000000,
3675 1000000
3676 };
3677
3678 static ssize_t show_channels(struct device *d,
3679 struct device_attribute *attr, char *buf)
3680 {
3681 /* all this shit doesn't belong into sysfs anyway */
3682 return 0;
3683 }
3684
3685 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3686
3687 static ssize_t show_statistics(struct device *d,
3688 struct device_attribute *attr, char *buf)
3689 {
3690 struct iwl_priv *priv = dev_get_drvdata(d);
3691 u32 size = sizeof(struct iwl3945_notif_statistics);
3692 u32 len = 0, ofs = 0;
3693 u8 *data = (u8 *)&priv->statistics_39;
3694 int rc = 0;
3695
3696 if (!iwl_is_alive(priv))
3697 return -EAGAIN;
3698
3699 mutex_lock(&priv->mutex);
3700 rc = iwl_send_statistics_request(priv, 0);
3701 mutex_unlock(&priv->mutex);
3702
3703 if (rc) {
3704 len = sprintf(buf,
3705 "Error sending statistics request: 0x%08X\n", rc);
3706 return len;
3707 }
3708
3709 while (size && (PAGE_SIZE - len)) {
3710 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3711 PAGE_SIZE - len, 1);
3712 len = strlen(buf);
3713 if (PAGE_SIZE - len)
3714 buf[len++] = '\n';
3715
3716 ofs += 16;
3717 size -= min(size, 16U);
3718 }
3719
3720 return len;
3721 }
3722
3723 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3724
3725 static ssize_t show_antenna(struct device *d,
3726 struct device_attribute *attr, char *buf)
3727 {
3728 struct iwl_priv *priv = dev_get_drvdata(d);
3729
3730 if (!iwl_is_alive(priv))
3731 return -EAGAIN;
3732
3733 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3734 }
3735
3736 static ssize_t store_antenna(struct device *d,
3737 struct device_attribute *attr,
3738 const char *buf, size_t count)
3739 {
3740 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3741 int ant;
3742
3743 if (count == 0)
3744 return 0;
3745
3746 if (sscanf(buf, "%1i", &ant) != 1) {
3747 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3748 return count;
3749 }
3750
3751 if ((ant >= 0) && (ant <= 2)) {
3752 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3753 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3754 } else
3755 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3756
3757
3758 return count;
3759 }
3760
3761 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3762
3763 static ssize_t show_status(struct device *d,
3764 struct device_attribute *attr, char *buf)
3765 {
3766 struct iwl_priv *priv = dev_get_drvdata(d);
3767 if (!iwl_is_alive(priv))
3768 return -EAGAIN;
3769 return sprintf(buf, "0x%08x\n", (int)priv->status);
3770 }
3771
3772 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3773
3774 static ssize_t dump_error_log(struct device *d,
3775 struct device_attribute *attr,
3776 const char *buf, size_t count)
3777 {
3778 struct iwl_priv *priv = dev_get_drvdata(d);
3779 char *p = (char *)buf;
3780
3781 if (p[0] == '1')
3782 iwl3945_dump_nic_error_log(priv);
3783
3784 return strnlen(buf, count);
3785 }
3786
3787 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3788
3789 static ssize_t dump_event_log(struct device *d,
3790 struct device_attribute *attr,
3791 const char *buf, size_t count)
3792 {
3793 struct iwl_priv *priv = dev_get_drvdata(d);
3794 char *p = (char *)buf;
3795
3796 if (p[0] == '1')
3797 iwl3945_dump_nic_event_log(priv);
3798
3799 return strnlen(buf, count);
3800 }
3801
3802 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
3803
3804 /*****************************************************************************
3805 *
3806 * driver setup and tear down
3807 *
3808 *****************************************************************************/
3809
3810 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3811 {
3812 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3813
3814 init_waitqueue_head(&priv->wait_command_queue);
3815
3816 INIT_WORK(&priv->up, iwl3945_bg_up);
3817 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3818 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3819 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3820 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3821 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3822 INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
3823 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3824 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3825 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3826 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3827
3828 iwl3945_hw_setup_deferred_work(priv);
3829
3830 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3831 iwl3945_irq_tasklet, (unsigned long)priv);
3832 }
3833
3834 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3835 {
3836 iwl3945_hw_cancel_deferred_work(priv);
3837
3838 cancel_delayed_work_sync(&priv->init_alive_start);
3839 cancel_delayed_work(&priv->scan_check);
3840 cancel_delayed_work(&priv->alive_start);
3841 cancel_work_sync(&priv->beacon_update);
3842 }
3843
3844 static struct attribute *iwl3945_sysfs_entries[] = {
3845 &dev_attr_antenna.attr,
3846 &dev_attr_channels.attr,
3847 &dev_attr_dump_errors.attr,
3848 &dev_attr_dump_events.attr,
3849 &dev_attr_flags.attr,
3850 &dev_attr_filter_flags.attr,
3851 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3852 &dev_attr_measurement.attr,
3853 #endif
3854 &dev_attr_power_level.attr,
3855 &dev_attr_retry_rate.attr,
3856 &dev_attr_statistics.attr,
3857 &dev_attr_status.attr,
3858 &dev_attr_temperature.attr,
3859 &dev_attr_tx_power.attr,
3860 #ifdef CONFIG_IWLWIFI_DEBUG
3861 &dev_attr_debug_level.attr,
3862 #endif
3863 NULL
3864 };
3865
3866 static struct attribute_group iwl3945_attribute_group = {
3867 .name = NULL, /* put in device directory */
3868 .attrs = iwl3945_sysfs_entries,
3869 };
3870
3871 static struct ieee80211_ops iwl3945_hw_ops = {
3872 .tx = iwl3945_mac_tx,
3873 .start = iwl3945_mac_start,
3874 .stop = iwl3945_mac_stop,
3875 .add_interface = iwl_mac_add_interface,
3876 .remove_interface = iwl_mac_remove_interface,
3877 .config = iwl_mac_config,
3878 .configure_filter = iwl_configure_filter,
3879 .set_key = iwl3945_mac_set_key,
3880 .get_tx_stats = iwl_mac_get_tx_stats,
3881 .conf_tx = iwl_mac_conf_tx,
3882 .reset_tsf = iwl_mac_reset_tsf,
3883 .bss_info_changed = iwl_bss_info_changed,
3884 .hw_scan = iwl_mac_hw_scan
3885 };
3886
3887 static int iwl3945_init_drv(struct iwl_priv *priv)
3888 {
3889 int ret;
3890 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3891
3892 priv->retry_rate = 1;
3893 priv->ibss_beacon = NULL;
3894
3895 spin_lock_init(&priv->lock);
3896 spin_lock_init(&priv->sta_lock);
3897 spin_lock_init(&priv->hcmd_lock);
3898
3899 INIT_LIST_HEAD(&priv->free_frames);
3900
3901 mutex_init(&priv->mutex);
3902
3903 /* Clear the driver's (not device's) station table */
3904 iwl_clear_stations_table(priv);
3905
3906 priv->data_retry_limit = -1;
3907 priv->ieee_channels = NULL;
3908 priv->ieee_rates = NULL;
3909 priv->band = IEEE80211_BAND_2GHZ;
3910
3911 priv->iw_mode = NL80211_IFTYPE_STATION;
3912
3913 iwl_reset_qos(priv);
3914
3915 priv->qos_data.qos_active = 0;
3916 priv->qos_data.qos_cap.val = 0;
3917
3918 priv->rates_mask = IWL_RATES_MASK;
3919 /* If power management is turned on, default to CAM mode */
3920 priv->power_mode = IWL_POWER_MODE_CAM;
3921 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3922
3923 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3924 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3925 eeprom->version);
3926 ret = -EINVAL;
3927 goto err;
3928 }
3929 ret = iwl_init_channel_map(priv);
3930 if (ret) {
3931 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3932 goto err;
3933 }
3934
3935 /* Set up txpower settings in driver for all channels */
3936 if (iwl3945_txpower_set_from_eeprom(priv)) {
3937 ret = -EIO;
3938 goto err_free_channel_map;
3939 }
3940
3941 ret = iwlcore_init_geos(priv);
3942 if (ret) {
3943 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3944 goto err_free_channel_map;
3945 }
3946 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3947
3948 return 0;
3949
3950 err_free_channel_map:
3951 iwl_free_channel_map(priv);
3952 err:
3953 return ret;
3954 }
3955
3956 static int iwl3945_setup_mac(struct iwl_priv *priv)
3957 {
3958 int ret;
3959 struct ieee80211_hw *hw = priv->hw;
3960
3961 hw->rate_control_algorithm = "iwl-3945-rs";
3962 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3963
3964 /* Tell mac80211 our characteristics */
3965 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3966 IEEE80211_HW_NOISE_DBM |
3967 IEEE80211_HW_SPECTRUM_MGMT;
3968
3969 hw->wiphy->interface_modes =
3970 BIT(NL80211_IFTYPE_STATION) |
3971 BIT(NL80211_IFTYPE_ADHOC);
3972
3973 hw->wiphy->custom_regulatory = true;
3974
3975 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3976 /* we create the 802.11 header and a zero-length SSID element */
3977 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
3978
3979 /* Default value; 4 EDCA QOS priorities */
3980 hw->queues = 4;
3981
3982 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3983 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3984 &priv->bands[IEEE80211_BAND_2GHZ];
3985
3986 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3987 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3988 &priv->bands[IEEE80211_BAND_5GHZ];
3989
3990 ret = ieee80211_register_hw(priv->hw);
3991 if (ret) {
3992 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3993 return ret;
3994 }
3995 priv->mac80211_registered = 1;
3996
3997 return 0;
3998 }
3999
4000 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4001 {
4002 int err = 0;
4003 struct iwl_priv *priv;
4004 struct ieee80211_hw *hw;
4005 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4006 struct iwl3945_eeprom *eeprom;
4007 unsigned long flags;
4008
4009 /***********************
4010 * 1. Allocating HW data
4011 * ********************/
4012
4013 /* mac80211 allocates memory for this device instance, including
4014 * space for this driver's private structure */
4015 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
4016 if (hw == NULL) {
4017 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
4018 err = -ENOMEM;
4019 goto out;
4020 }
4021 priv = hw->priv;
4022 SET_IEEE80211_DEV(hw, &pdev->dev);
4023
4024 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
4025 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
4026 IWL_ERR(priv,
4027 "invalid queues_num, should be between %d and %d\n",
4028 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
4029 err = -EINVAL;
4030 goto out_ieee80211_free_hw;
4031 }
4032
4033 /*
4034 * Disabling hardware scan means that mac80211 will perform scans
4035 * "the hard way", rather than using device's scan.
4036 */
4037 if (iwl3945_mod_params.disable_hw_scan) {
4038 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
4039 iwl3945_hw_ops.hw_scan = NULL;
4040 }
4041
4042
4043 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4044 priv->cfg = cfg;
4045 priv->pci_dev = pdev;
4046 priv->inta_mask = CSR_INI_SET_MASK;
4047
4048 #ifdef CONFIG_IWLWIFI_DEBUG
4049 priv->debug_level = iwl3945_mod_params.debug;
4050 atomic_set(&priv->restrict_refcnt, 0);
4051 #endif
4052
4053 /***************************
4054 * 2. Initializing PCI bus
4055 * *************************/
4056 if (pci_enable_device(pdev)) {
4057 err = -ENODEV;
4058 goto out_ieee80211_free_hw;
4059 }
4060
4061 pci_set_master(pdev);
4062
4063 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4064 if (!err)
4065 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4066 if (err) {
4067 IWL_WARN(priv, "No suitable DMA available.\n");
4068 goto out_pci_disable_device;
4069 }
4070
4071 pci_set_drvdata(pdev, priv);
4072 err = pci_request_regions(pdev, DRV_NAME);
4073 if (err)
4074 goto out_pci_disable_device;
4075
4076 /***********************
4077 * 3. Read REV Register
4078 * ********************/
4079 priv->hw_base = pci_iomap(pdev, 0, 0);
4080 if (!priv->hw_base) {
4081 err = -ENODEV;
4082 goto out_pci_release_regions;
4083 }
4084
4085 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4086 (unsigned long long) pci_resource_len(pdev, 0));
4087 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4088
4089 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4090 * PCI Tx retries from interfering with C3 CPU state */
4091 pci_write_config_byte(pdev, 0x41, 0x00);
4092
4093 /* this spin lock will be used in apm_ops.init and EEPROM access
4094 * we should init now
4095 */
4096 spin_lock_init(&priv->reg_lock);
4097
4098 /* amp init */
4099 err = priv->cfg->ops->lib->apm_ops.init(priv);
4100 if (err < 0) {
4101 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
4102 goto out_iounmap;
4103 }
4104
4105 /***********************
4106 * 4. Read EEPROM
4107 * ********************/
4108
4109 /* Read the EEPROM */
4110 err = iwl_eeprom_init(priv);
4111 if (err) {
4112 IWL_ERR(priv, "Unable to init EEPROM\n");
4113 goto out_iounmap;
4114 }
4115 /* MAC Address location in EEPROM same for 3945/4965 */
4116 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4117 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4118 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4119 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4120
4121 /***********************
4122 * 5. Setup HW Constants
4123 * ********************/
4124 /* Device-specific setup */
4125 if (iwl3945_hw_set_hw_params(priv)) {
4126 IWL_ERR(priv, "failed to set hw settings\n");
4127 goto out_eeprom_free;
4128 }
4129
4130 /***********************
4131 * 6. Setup priv
4132 * ********************/
4133
4134 err = iwl3945_init_drv(priv);
4135 if (err) {
4136 IWL_ERR(priv, "initializing driver failed\n");
4137 goto out_unset_hw_params;
4138 }
4139
4140 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4141 priv->cfg->name);
4142
4143 /***********************
4144 * 7. Setup Services
4145 * ********************/
4146
4147 spin_lock_irqsave(&priv->lock, flags);
4148 iwl_disable_interrupts(priv);
4149 spin_unlock_irqrestore(&priv->lock, flags);
4150
4151 pci_enable_msi(priv->pci_dev);
4152
4153 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4154 IRQF_SHARED, DRV_NAME, priv);
4155 if (err) {
4156 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4157 goto out_disable_msi;
4158 }
4159
4160 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4161 if (err) {
4162 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4163 goto out_release_irq;
4164 }
4165
4166 iwl_set_rxon_channel(priv,
4167 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4168 iwl3945_setup_deferred_work(priv);
4169 iwl3945_setup_rx_handlers(priv);
4170
4171 /*********************************
4172 * 8. Setup and Register mac80211
4173 * *******************************/
4174
4175 iwl_enable_interrupts(priv);
4176
4177 err = iwl3945_setup_mac(priv);
4178 if (err)
4179 goto out_remove_sysfs;
4180
4181 err = iwl_dbgfs_register(priv, DRV_NAME);
4182 if (err)
4183 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4184
4185 /* Start monitoring the killswitch */
4186 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
4187 2 * HZ);
4188
4189 return 0;
4190
4191 out_remove_sysfs:
4192 destroy_workqueue(priv->workqueue);
4193 priv->workqueue = NULL;
4194 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4195 out_release_irq:
4196 free_irq(priv->pci_dev->irq, priv);
4197 out_disable_msi:
4198 pci_disable_msi(priv->pci_dev);
4199 iwlcore_free_geos(priv);
4200 iwl_free_channel_map(priv);
4201 out_unset_hw_params:
4202 iwl3945_unset_hw_params(priv);
4203 out_eeprom_free:
4204 iwl_eeprom_free(priv);
4205 out_iounmap:
4206 pci_iounmap(pdev, priv->hw_base);
4207 out_pci_release_regions:
4208 pci_release_regions(pdev);
4209 out_pci_disable_device:
4210 pci_set_drvdata(pdev, NULL);
4211 pci_disable_device(pdev);
4212 out_ieee80211_free_hw:
4213 ieee80211_free_hw(priv->hw);
4214 out:
4215 return err;
4216 }
4217
4218 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4219 {
4220 struct iwl_priv *priv = pci_get_drvdata(pdev);
4221 unsigned long flags;
4222
4223 if (!priv)
4224 return;
4225
4226 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4227
4228 iwl_dbgfs_unregister(priv);
4229
4230 set_bit(STATUS_EXIT_PENDING, &priv->status);
4231
4232 if (priv->mac80211_registered) {
4233 ieee80211_unregister_hw(priv->hw);
4234 priv->mac80211_registered = 0;
4235 } else {
4236 iwl3945_down(priv);
4237 }
4238
4239 /* make sure we flush any pending irq or
4240 * tasklet for the driver
4241 */
4242 spin_lock_irqsave(&priv->lock, flags);
4243 iwl_disable_interrupts(priv);
4244 spin_unlock_irqrestore(&priv->lock, flags);
4245
4246 iwl_synchronize_irq(priv);
4247
4248 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4249
4250 cancel_delayed_work_sync(&priv->rfkill_poll);
4251
4252 iwl3945_dealloc_ucode_pci(priv);
4253
4254 if (priv->rxq.bd)
4255 iwl3945_rx_queue_free(priv, &priv->rxq);
4256 iwl3945_hw_txq_ctx_free(priv);
4257
4258 iwl3945_unset_hw_params(priv);
4259 iwl_clear_stations_table(priv);
4260
4261 /*netif_stop_queue(dev); */
4262 flush_workqueue(priv->workqueue);
4263
4264 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4265 * priv->workqueue... so we can't take down the workqueue
4266 * until now... */
4267 destroy_workqueue(priv->workqueue);
4268 priv->workqueue = NULL;
4269
4270 free_irq(pdev->irq, priv);
4271 pci_disable_msi(pdev);
4272
4273 pci_iounmap(pdev, priv->hw_base);
4274 pci_release_regions(pdev);
4275 pci_disable_device(pdev);
4276 pci_set_drvdata(pdev, NULL);
4277
4278 iwl_free_channel_map(priv);
4279 iwlcore_free_geos(priv);
4280 kfree(priv->scan);
4281 if (priv->ibss_beacon)
4282 dev_kfree_skb(priv->ibss_beacon);
4283
4284 ieee80211_free_hw(priv->hw);
4285 }
4286
4287
4288 /*****************************************************************************
4289 *
4290 * driver and module entry point
4291 *
4292 *****************************************************************************/
4293
4294 static struct pci_driver iwl3945_driver = {
4295 .name = DRV_NAME,
4296 .id_table = iwl3945_hw_card_ids,
4297 .probe = iwl3945_pci_probe,
4298 .remove = __devexit_p(iwl3945_pci_remove),
4299 #ifdef CONFIG_PM
4300 .suspend = iwl_pci_suspend,
4301 .resume = iwl_pci_resume,
4302 #endif
4303 };
4304
4305 static int __init iwl3945_init(void)
4306 {
4307
4308 int ret;
4309 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4310 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4311
4312 ret = iwl3945_rate_control_register();
4313 if (ret) {
4314 printk(KERN_ERR DRV_NAME
4315 "Unable to register rate control algorithm: %d\n", ret);
4316 return ret;
4317 }
4318
4319 ret = pci_register_driver(&iwl3945_driver);
4320 if (ret) {
4321 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4322 goto error_register;
4323 }
4324
4325 return ret;
4326
4327 error_register:
4328 iwl3945_rate_control_unregister();
4329 return ret;
4330 }
4331
4332 static void __exit iwl3945_exit(void)
4333 {
4334 pci_unregister_driver(&iwl3945_driver);
4335 iwl3945_rate_control_unregister();
4336 }
4337
4338 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4339
4340 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
4341 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4342 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
4343 MODULE_PARM_DESC(swcrypto,
4344 "using software crypto (default 1 [software])\n");
4345 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
4346 MODULE_PARM_DESC(debug, "debug output mask");
4347 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
4348 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4349
4350 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
4351 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4352
4353 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
4354 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4355
4356 module_exit(iwl3945_exit);
4357 module_init(iwl3945_init);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree