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iwlwifi: port to cfg80211 rfkill
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
bloba5637c4aa85dc2936c129d37501560db2b13ec21
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
121
122 ret = iwl_check_rxon_cmd(priv);
123 if (ret) {
124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
130 * and other flags for the current radio configuration. */
131 if (!iwl_full_rxon_required(priv)) {
132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135 return ret;
136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
149 if (iwl_is_associated(priv) && new_assoc) {
150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
154 sizeof(struct iwl_rxon_cmd),
155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
159 if (ret) {
160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
162 return ret;
163 }
164 }
165
166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
169 "* bssid = %pM\n",
170 (new_assoc ? "" : "out"),
171 le16_to_cpu(priv->staging_rxon.channel),
172 priv->staging_rxon.bssid_addr);
173
174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
184 if (ret) {
185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
189 }
190
191 iwl_clear_stations_table(priv);
192
193 priv->start_calib = 0;
194
195 /* Add the broadcast address so we can send broadcast frames */
196 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
197 IWL_INVALID_STATION) {
198 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
199 return -EIO;
200 }
201
202 /* If we have set the ASSOC_MSK and we are in BSS mode then
203 * add the IWL_AP_ID to the station rate table */
204 if (new_assoc) {
205 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
206 ret = iwl_rxon_add_station(priv,
207 priv->active_rxon.bssid_addr, 1);
208 if (ret == IWL_INVALID_STATION) {
209 IWL_ERR(priv,
210 "Error adding AP address for TX.\n");
211 return -EIO;
212 }
213 priv->assoc_station_added = 1;
214 if (priv->default_wep_key &&
215 iwl_send_static_wepkey_cmd(priv, 0))
216 IWL_ERR(priv,
217 "Could not send WEP static key.\n");
218 }
219
220 /* Apply the new configuration
221 * RXON assoc doesn't clear the station table in uCode,
222 */
223 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
224 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
225 if (ret) {
226 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
227 return ret;
228 }
229 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
230 }
231
232 iwl_init_sensitivity(priv);
233
234 /* If we issue a new RXON command which required a tune then we must
235 * send a new TXPOWER command or we won't be able to Tx any frames */
236 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
237 if (ret) {
238 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
239 return ret;
240 }
241
242 return 0;
243 }
244
245 void iwl_update_chain_flags(struct iwl_priv *priv)
246 {
247
248 if (priv->cfg->ops->hcmd->set_rxon_chain)
249 priv->cfg->ops->hcmd->set_rxon_chain(priv);
250 iwlcore_commit_rxon(priv);
251 }
252
253 static void iwl_clear_free_frames(struct iwl_priv *priv)
254 {
255 struct list_head *element;
256
257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
258 priv->frames_count);
259
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
262 list_del(element);
263 kfree(list_entry(element, struct iwl_frame, list));
264 priv->frames_count--;
265 }
266
267 if (priv->frames_count) {
268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
269 priv->frames_count);
270 priv->frames_count = 0;
271 }
272 }
273
274 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
275 {
276 struct iwl_frame *frame;
277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280 if (!frame) {
281 IWL_ERR(priv, "Could not allocate frame!\n");
282 return NULL;
283 }
284
285 priv->frames_count++;
286 return frame;
287 }
288
289 element = priv->free_frames.next;
290 list_del(element);
291 return list_entry(element, struct iwl_frame, list);
292 }
293
294 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
295 {
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
298 }
299
300 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
302 int left)
303 {
304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
307 return 0;
308
309 if (priv->ibss_beacon->len > left)
310 return 0;
311
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314 return priv->ibss_beacon->len;
315 }
316
317 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
318 struct iwl_frame *frame, u8 rate)
319 {
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
322
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338 else
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
341
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343 TX_CMD_FLG_TSF_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
345
346 return sizeof(*tx_beacon_cmd) + frame_size;
347 }
348 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
349 {
350 struct iwl_frame *frame;
351 unsigned int frame_size;
352 int rc;
353 u8 rate;
354
355 frame = iwl_get_free_frame(priv);
356
357 if (!frame) {
358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
359 "command.\n");
360 return -ENOMEM;
361 }
362
363 rate = iwl_rate_get_lowest_plcp(priv);
364
365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
366
367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
368 &frame->u.cmd[0]);
369
370 iwl_free_frame(priv, frame);
371
372 return rc;
373 }
374
375 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376 {
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
381 addr |=
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384 return addr;
385 }
386
387 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388 {
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391 return le16_to_cpu(tb->hi_n_len) >> 4;
392 }
393
394 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
396 {
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
399
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406 tfd->num_tbs = idx + 1;
407 }
408
409 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410 {
411 return tfd->num_tbs & 0x1f;
412 }
413
414 /**
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
417 * @txq - tx queue
418 *
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
421 */
422 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423 {
424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
425 struct iwl_tfd *tfd;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
428 int i;
429 int num_tbs;
430
431 tfd = &tfd_tmp[index];
432
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
439 return;
440 }
441
442 /* Unmap tx_cmd */
443 if (num_tbs)
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446 pci_unmap_len(&txq->cmd[index]->meta, len),
447 PCI_DMA_BIDIRECTIONAL);
448
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454 if (txq->txb) {
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457 }
458 }
459 }
460
461 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
464 u8 reset, u8 pad)
465 {
466 struct iwl_queue *q;
467 struct iwl_tfd *tfd, *tfd_tmp;
468 u32 num_tbs;
469
470 q = &txq->q;
471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
473
474 if (reset)
475 memset(tfd, 0, sizeof(*tfd));
476
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482 IWL_NUM_OF_TBS);
483 return -EINVAL;
484 }
485
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
490
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493 return 0;
494 }
495
496 /*
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
499 *
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
502 */
503 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
505 {
506 int txq_id = txq->q.id;
507
508 /* Circular buffer (TFD queue in DRAM) physical base address */
509 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
510 txq->q.dma_addr >> 8);
511
512 return 0;
513 }
514
515
516 /******************************************************************************
517 *
518 * Misc. internal state and helper functions
519 *
520 ******************************************************************************/
521
522 #define MAX_UCODE_BEACON_INTERVAL 4096
523
524 static u16 iwl_adjust_beacon_interval(u16 beacon_val)
525 {
526 u16 new_val = 0;
527 u16 beacon_factor = 0;
528
529 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
530 / MAX_UCODE_BEACON_INTERVAL;
531 new_val = beacon_val / beacon_factor;
532
533 if (!new_val)
534 new_val = MAX_UCODE_BEACON_INTERVAL;
535
536 return new_val;
537 }
538
539 static void iwl_setup_rxon_timing(struct iwl_priv *priv)
540 {
541 u64 tsf;
542 s32 interval_tm, rem;
543 unsigned long flags;
544 struct ieee80211_conf *conf = NULL;
545 u16 beacon_int = 0;
546
547 conf = ieee80211_get_hw_conf(priv->hw);
548
549 spin_lock_irqsave(&priv->lock, flags);
550 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
551 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
552
553 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
554 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
555 priv->rxon_timing.atim_window = 0;
556 } else {
557 beacon_int = iwl_adjust_beacon_interval(
558 priv->vif->bss_conf.beacon_int);
559
560 /* TODO: we need to get atim_window from upper stack
561 * for now we set to 0 */
562 priv->rxon_timing.atim_window = 0;
563 }
564
565 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
566
567 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
568 interval_tm = beacon_int * 1024;
569 rem = do_div(tsf, interval_tm);
570 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
571
572 spin_unlock_irqrestore(&priv->lock, flags);
573 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
574 le16_to_cpu(priv->rxon_timing.beacon_interval),
575 le32_to_cpu(priv->rxon_timing.beacon_init_val),
576 le16_to_cpu(priv->rxon_timing.atim_window));
577 }
578
579 /******************************************************************************
580 *
581 * Generic RX handler implementations
582 *
583 ******************************************************************************/
584 static void iwl_rx_reply_alive(struct iwl_priv *priv,
585 struct iwl_rx_mem_buffer *rxb)
586 {
587 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
588 struct iwl_alive_resp *palive;
589 struct delayed_work *pwork;
590
591 palive = &pkt->u.alive_frame;
592
593 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
594 "0x%01X 0x%01X\n",
595 palive->is_valid, palive->ver_type,
596 palive->ver_subtype);
597
598 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
599 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
600 memcpy(&priv->card_alive_init,
601 &pkt->u.alive_frame,
602 sizeof(struct iwl_init_alive_resp));
603 pwork = &priv->init_alive_start;
604 } else {
605 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
606 memcpy(&priv->card_alive, &pkt->u.alive_frame,
607 sizeof(struct iwl_alive_resp));
608 pwork = &priv->alive_start;
609 }
610
611 /* We delay the ALIVE response by 5ms to
612 * give the HW RF Kill time to activate... */
613 if (palive->is_valid == UCODE_VALID_OK)
614 queue_delayed_work(priv->workqueue, pwork,
615 msecs_to_jiffies(5));
616 else
617 IWL_WARN(priv, "uCode did not respond OK.\n");
618 }
619
620 static void iwl_bg_beacon_update(struct work_struct *work)
621 {
622 struct iwl_priv *priv =
623 container_of(work, struct iwl_priv, beacon_update);
624 struct sk_buff *beacon;
625
626 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
627 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
628
629 if (!beacon) {
630 IWL_ERR(priv, "update beacon failed\n");
631 return;
632 }
633
634 mutex_lock(&priv->mutex);
635 /* new beacon skb is allocated every time; dispose previous.*/
636 if (priv->ibss_beacon)
637 dev_kfree_skb(priv->ibss_beacon);
638
639 priv->ibss_beacon = beacon;
640 mutex_unlock(&priv->mutex);
641
642 iwl_send_beacon_cmd(priv);
643 }
644
645 /**
646 * iwl_bg_statistics_periodic - Timer callback to queue statistics
647 *
648 * This callback is provided in order to send a statistics request.
649 *
650 * This timer function is continually reset to execute within
651 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
652 * was received. We need to ensure we receive the statistics in order
653 * to update the temperature used for calibrating the TXPOWER.
654 */
655 static void iwl_bg_statistics_periodic(unsigned long data)
656 {
657 struct iwl_priv *priv = (struct iwl_priv *)data;
658
659 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
660 return;
661
662 /* dont send host command if rf-kill is on */
663 if (!iwl_is_ready_rf(priv))
664 return;
665
666 iwl_send_statistics_request(priv, CMD_ASYNC);
667 }
668
669 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
670 struct iwl_rx_mem_buffer *rxb)
671 {
672 #ifdef CONFIG_IWLWIFI_DEBUG
673 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
674 struct iwl4965_beacon_notif *beacon =
675 (struct iwl4965_beacon_notif *)pkt->u.raw;
676 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
677
678 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
679 "tsf %d %d rate %d\n",
680 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
681 beacon->beacon_notify_hdr.failure_frame,
682 le32_to_cpu(beacon->ibss_mgr_status),
683 le32_to_cpu(beacon->high_tsf),
684 le32_to_cpu(beacon->low_tsf), rate);
685 #endif
686
687 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
688 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
689 queue_work(priv->workqueue, &priv->beacon_update);
690 }
691
692 /* Handle notification from uCode that card's power state is changing
693 * due to software, hardware, or critical temperature RFKILL */
694 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
695 struct iwl_rx_mem_buffer *rxb)
696 {
697 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
698 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
699 unsigned long status = priv->status;
700 unsigned long reg_flags;
701
702 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
703 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
704 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
705
706 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
707 RF_CARD_DISABLED)) {
708
709 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
710 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
711
712 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
713 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
714
715 if (!(flags & RXON_CARD_DISABLED)) {
716 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
717 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
718 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
719 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
720
721 }
722
723 if (flags & RF_CARD_DISABLED) {
724 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
725 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
726 iwl_read32(priv, CSR_UCODE_DRV_GP1);
727 spin_lock_irqsave(&priv->reg_lock, reg_flags);
728 if (!iwl_grab_nic_access(priv))
729 iwl_release_nic_access(priv);
730 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
731 }
732 }
733
734 if (flags & HW_CARD_DISABLED)
735 set_bit(STATUS_RF_KILL_HW, &priv->status);
736 else
737 clear_bit(STATUS_RF_KILL_HW, &priv->status);
738
739
740 if (!(flags & RXON_CARD_DISABLED))
741 iwl_scan_cancel(priv);
742
743 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
744 test_bit(STATUS_RF_KILL_HW, &priv->status)))
745 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
746 test_bit(STATUS_RF_KILL_HW, &priv->status));
747 else
748 wake_up_interruptible(&priv->wait_command_queue);
749 }
750
751 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
752 {
753 if (src == IWL_PWR_SRC_VAUX) {
754 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
755 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
756 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
757 ~APMG_PS_CTRL_MSK_PWR_SRC);
758 } else {
759 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
760 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
761 ~APMG_PS_CTRL_MSK_PWR_SRC);
762 }
763
764 return 0;
765 }
766
767 /**
768 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
769 *
770 * Setup the RX handlers for each of the reply types sent from the uCode
771 * to the host.
772 *
773 * This function chains into the hardware specific files for them to setup
774 * any hardware specific handlers as well.
775 */
776 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
777 {
778 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
779 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
780 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
781 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
782 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
783 iwl_rx_pm_debug_statistics_notif;
784 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
785
786 /*
787 * The same handler is used for both the REPLY to a discrete
788 * statistics request from the host as well as for the periodic
789 * statistics notifications (after received beacons) from the uCode.
790 */
791 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
792 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
793
794 iwl_setup_spectrum_handlers(priv);
795 iwl_setup_rx_scan_handlers(priv);
796
797 /* status change handler */
798 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
799
800 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
801 iwl_rx_missed_beacon_notif;
802 /* Rx handlers */
803 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
804 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
805 /* block ack */
806 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
807 /* Set up hardware specific Rx handlers */
808 priv->cfg->ops->lib->rx_handler_setup(priv);
809 }
810
811 /**
812 * iwl_rx_handle - Main entry function for receiving responses from uCode
813 *
814 * Uses the priv->rx_handlers callback function array to invoke
815 * the appropriate handlers, including command responses,
816 * frame-received notifications, and other notifications.
817 */
818 void iwl_rx_handle(struct iwl_priv *priv)
819 {
820 struct iwl_rx_mem_buffer *rxb;
821 struct iwl_rx_packet *pkt;
822 struct iwl_rx_queue *rxq = &priv->rxq;
823 u32 r, i;
824 int reclaim;
825 unsigned long flags;
826 u8 fill_rx = 0;
827 u32 count = 8;
828 int total_empty;
829
830 /* uCode's read index (stored in shared DRAM) indicates the last Rx
831 * buffer that the driver may process (last buffer filled by ucode). */
832 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
833 i = rxq->read;
834
835 /* Rx interrupt, but nothing sent from uCode */
836 if (i == r)
837 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
838
839 /* calculate total frames need to be restock after handling RX */
840 total_empty = r - priv->rxq.write_actual;
841 if (total_empty < 0)
842 total_empty += RX_QUEUE_SIZE;
843
844 if (total_empty > (RX_QUEUE_SIZE / 2))
845 fill_rx = 1;
846
847 while (i != r) {
848 rxb = rxq->queue[i];
849
850 /* If an RXB doesn't have a Rx queue slot associated with it,
851 * then a bug has been introduced in the queue refilling
852 * routines -- catch it here */
853 BUG_ON(rxb == NULL);
854
855 rxq->queue[i] = NULL;
856
857 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
858 priv->hw_params.rx_buf_size + 256,
859 PCI_DMA_FROMDEVICE);
860 pkt = (struct iwl_rx_packet *)rxb->skb->data;
861
862 /* Reclaim a command buffer only if this packet is a response
863 * to a (driver-originated) command.
864 * If the packet (e.g. Rx frame) originated from uCode,
865 * there is no command buffer to reclaim.
866 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
867 * but apparently a few don't get set; catch them here. */
868 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
869 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
870 (pkt->hdr.cmd != REPLY_RX) &&
871 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
872 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
873 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
874 (pkt->hdr.cmd != REPLY_TX);
875
876 /* Based on type of command response or notification,
877 * handle those that need handling via function in
878 * rx_handlers table. See iwl_setup_rx_handlers() */
879 if (priv->rx_handlers[pkt->hdr.cmd]) {
880 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
881 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
882 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
883 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
884 } else {
885 /* No handling needed */
886 IWL_DEBUG_RX(priv,
887 "r %d i %d No handler needed for %s, 0x%02x\n",
888 r, i, get_cmd_string(pkt->hdr.cmd),
889 pkt->hdr.cmd);
890 }
891
892 if (reclaim) {
893 /* Invoke any callbacks, transfer the skb to caller, and
894 * fire off the (possibly) blocking iwl_send_cmd()
895 * as we reclaim the driver command queue */
896 if (rxb && rxb->skb)
897 iwl_tx_cmd_complete(priv, rxb);
898 else
899 IWL_WARN(priv, "Claim null rxb?\n");
900 }
901
902 /* For now we just don't re-use anything. We can tweak this
903 * later to try and re-use notification packets and SKBs that
904 * fail to Rx correctly */
905 if (rxb->skb != NULL) {
906 priv->alloc_rxb_skb--;
907 dev_kfree_skb_any(rxb->skb);
908 rxb->skb = NULL;
909 }
910
911 spin_lock_irqsave(&rxq->lock, flags);
912 list_add_tail(&rxb->list, &priv->rxq.rx_used);
913 spin_unlock_irqrestore(&rxq->lock, flags);
914 i = (i + 1) & RX_QUEUE_MASK;
915 /* If there are a lot of unused frames,
916 * restock the Rx queue so ucode wont assert. */
917 if (fill_rx) {
918 count++;
919 if (count >= 8) {
920 priv->rxq.read = i;
921 iwl_rx_replenish_now(priv);
922 count = 0;
923 }
924 }
925 }
926
927 /* Backtrack one entry */
928 priv->rxq.read = i;
929 if (fill_rx)
930 iwl_rx_replenish_now(priv);
931 else
932 iwl_rx_queue_restock(priv);
933 }
934
935 /* call this function to flush any scheduled tasklet */
936 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
937 {
938 /* wait to make sure we flush pending tasklet*/
939 synchronize_irq(priv->pci_dev->irq);
940 tasklet_kill(&priv->irq_tasklet);
941 }
942
943 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
944 {
945 u32 inta, handled = 0;
946 u32 inta_fh;
947 unsigned long flags;
948 #ifdef CONFIG_IWLWIFI_DEBUG
949 u32 inta_mask;
950 #endif
951
952 spin_lock_irqsave(&priv->lock, flags);
953
954 /* Ack/clear/reset pending uCode interrupts.
955 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
956 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
957 inta = iwl_read32(priv, CSR_INT);
958 iwl_write32(priv, CSR_INT, inta);
959
960 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
961 * Any new interrupts that happen after this, either while we're
962 * in this tasklet, or later, will show up in next ISR/tasklet. */
963 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
964 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
965
966 #ifdef CONFIG_IWLWIFI_DEBUG
967 if (priv->debug_level & IWL_DL_ISR) {
968 /* just for debug */
969 inta_mask = iwl_read32(priv, CSR_INT_MASK);
970 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
971 inta, inta_mask, inta_fh);
972 }
973 #endif
974
975 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
976 * atomic, make sure that inta covers all the interrupts that
977 * we've discovered, even if FH interrupt came in just after
978 * reading CSR_INT. */
979 if (inta_fh & CSR49_FH_INT_RX_MASK)
980 inta |= CSR_INT_BIT_FH_RX;
981 if (inta_fh & CSR49_FH_INT_TX_MASK)
982 inta |= CSR_INT_BIT_FH_TX;
983
984 /* Now service all interrupt bits discovered above. */
985 if (inta & CSR_INT_BIT_HW_ERR) {
986 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
987
988 /* Tell the device to stop sending interrupts */
989 iwl_disable_interrupts(priv);
990
991 priv->isr_stats.hw++;
992 iwl_irq_handle_error(priv);
993
994 handled |= CSR_INT_BIT_HW_ERR;
995
996 spin_unlock_irqrestore(&priv->lock, flags);
997
998 return;
999 }
1000
1001 #ifdef CONFIG_IWLWIFI_DEBUG
1002 if (priv->debug_level & (IWL_DL_ISR)) {
1003 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1004 if (inta & CSR_INT_BIT_SCD) {
1005 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1006 "the frame/frames.\n");
1007 priv->isr_stats.sch++;
1008 }
1009
1010 /* Alive notification via Rx interrupt will do the real work */
1011 if (inta & CSR_INT_BIT_ALIVE) {
1012 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1013 priv->isr_stats.alive++;
1014 }
1015 }
1016 #endif
1017 /* Safely ignore these bits for debug checks below */
1018 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1019
1020 /* HW RF KILL switch toggled */
1021 if (inta & CSR_INT_BIT_RF_KILL) {
1022 int hw_rf_kill = 0;
1023 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1024 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1025 hw_rf_kill = 1;
1026
1027 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1028 hw_rf_kill ? "disable radio" : "enable radio");
1029
1030 priv->isr_stats.rfkill++;
1031
1032 /* driver only loads ucode once setting the interface up.
1033 * the driver allows loading the ucode even if the radio
1034 * is killed. Hence update the killswitch state here. The
1035 * rfkill handler will care about restarting if needed.
1036 */
1037 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1038 if (hw_rf_kill)
1039 set_bit(STATUS_RF_KILL_HW, &priv->status);
1040 else
1041 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1042 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1043 }
1044
1045 handled |= CSR_INT_BIT_RF_KILL;
1046 }
1047
1048 /* Chip got too hot and stopped itself */
1049 if (inta & CSR_INT_BIT_CT_KILL) {
1050 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1051 priv->isr_stats.ctkill++;
1052 handled |= CSR_INT_BIT_CT_KILL;
1053 }
1054
1055 /* Error detected by uCode */
1056 if (inta & CSR_INT_BIT_SW_ERR) {
1057 IWL_ERR(priv, "Microcode SW error detected. "
1058 " Restarting 0x%X.\n", inta);
1059 priv->isr_stats.sw++;
1060 priv->isr_stats.sw_err = inta;
1061 iwl_irq_handle_error(priv);
1062 handled |= CSR_INT_BIT_SW_ERR;
1063 }
1064
1065 /* uCode wakes up after power-down sleep */
1066 if (inta & CSR_INT_BIT_WAKEUP) {
1067 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1068 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1069 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1070 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1071 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1072 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1073 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1074 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1075
1076 priv->isr_stats.wakeup++;
1077
1078 handled |= CSR_INT_BIT_WAKEUP;
1079 }
1080
1081 /* All uCode command responses, including Tx command responses,
1082 * Rx "responses" (frame-received notification), and other
1083 * notifications from uCode come through here*/
1084 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1085 iwl_rx_handle(priv);
1086 priv->isr_stats.rx++;
1087 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1088 }
1089
1090 if (inta & CSR_INT_BIT_FH_TX) {
1091 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1092 priv->isr_stats.tx++;
1093 handled |= CSR_INT_BIT_FH_TX;
1094 /* FH finished to write, send event */
1095 priv->ucode_write_complete = 1;
1096 wake_up_interruptible(&priv->wait_command_queue);
1097 }
1098
1099 if (inta & ~handled) {
1100 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1101 priv->isr_stats.unhandled++;
1102 }
1103
1104 if (inta & ~(priv->inta_mask)) {
1105 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1106 inta & ~priv->inta_mask);
1107 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1108 }
1109
1110 /* Re-enable all interrupts */
1111 /* only Re-enable if diabled by irq */
1112 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1113 iwl_enable_interrupts(priv);
1114
1115 #ifdef CONFIG_IWLWIFI_DEBUG
1116 if (priv->debug_level & (IWL_DL_ISR)) {
1117 inta = iwl_read32(priv, CSR_INT);
1118 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1119 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1120 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1121 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1122 }
1123 #endif
1124 spin_unlock_irqrestore(&priv->lock, flags);
1125 }
1126
1127 /* tasklet for iwlagn interrupt */
1128 static void iwl_irq_tasklet(struct iwl_priv *priv)
1129 {
1130 u32 inta = 0;
1131 u32 handled = 0;
1132 unsigned long flags;
1133 #ifdef CONFIG_IWLWIFI_DEBUG
1134 u32 inta_mask;
1135 #endif
1136
1137 spin_lock_irqsave(&priv->lock, flags);
1138
1139 /* Ack/clear/reset pending uCode interrupts.
1140 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1141 */
1142 iwl_write32(priv, CSR_INT, priv->inta);
1143
1144 inta = priv->inta;
1145
1146 #ifdef CONFIG_IWLWIFI_DEBUG
1147 if (priv->debug_level & IWL_DL_ISR) {
1148 /* just for debug */
1149 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1150 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1151 inta, inta_mask);
1152 }
1153 #endif
1154 /* saved interrupt in inta variable now we can reset priv->inta */
1155 priv->inta = 0;
1156
1157 /* Now service all interrupt bits discovered above. */
1158 if (inta & CSR_INT_BIT_HW_ERR) {
1159 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1160
1161 /* Tell the device to stop sending interrupts */
1162 iwl_disable_interrupts(priv);
1163
1164 priv->isr_stats.hw++;
1165 iwl_irq_handle_error(priv);
1166
1167 handled |= CSR_INT_BIT_HW_ERR;
1168
1169 spin_unlock_irqrestore(&priv->lock, flags);
1170
1171 return;
1172 }
1173
1174 #ifdef CONFIG_IWLWIFI_DEBUG
1175 if (priv->debug_level & (IWL_DL_ISR)) {
1176 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1177 if (inta & CSR_INT_BIT_SCD) {
1178 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1179 "the frame/frames.\n");
1180 priv->isr_stats.sch++;
1181 }
1182
1183 /* Alive notification via Rx interrupt will do the real work */
1184 if (inta & CSR_INT_BIT_ALIVE) {
1185 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1186 priv->isr_stats.alive++;
1187 }
1188 }
1189 #endif
1190 /* Safely ignore these bits for debug checks below */
1191 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1192
1193 /* HW RF KILL switch toggled */
1194 if (inta & CSR_INT_BIT_RF_KILL) {
1195 int hw_rf_kill = 0;
1196 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1197 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1198 hw_rf_kill = 1;
1199
1200 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1201 hw_rf_kill ? "disable radio" : "enable radio");
1202
1203 priv->isr_stats.rfkill++;
1204
1205 /* driver only loads ucode once setting the interface up.
1206 * the driver allows loading the ucode even if the radio
1207 * is killed. Hence update the killswitch state here. The
1208 * rfkill handler will care about restarting if needed.
1209 */
1210 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1211 if (hw_rf_kill)
1212 set_bit(STATUS_RF_KILL_HW, &priv->status);
1213 else
1214 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1215 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1216 }
1217
1218 handled |= CSR_INT_BIT_RF_KILL;
1219 }
1220
1221 /* Chip got too hot and stopped itself */
1222 if (inta & CSR_INT_BIT_CT_KILL) {
1223 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1224 priv->isr_stats.ctkill++;
1225 handled |= CSR_INT_BIT_CT_KILL;
1226 }
1227
1228 /* Error detected by uCode */
1229 if (inta & CSR_INT_BIT_SW_ERR) {
1230 IWL_ERR(priv, "Microcode SW error detected. "
1231 " Restarting 0x%X.\n", inta);
1232 priv->isr_stats.sw++;
1233 priv->isr_stats.sw_err = inta;
1234 iwl_irq_handle_error(priv);
1235 handled |= CSR_INT_BIT_SW_ERR;
1236 }
1237
1238 /* uCode wakes up after power-down sleep */
1239 if (inta & CSR_INT_BIT_WAKEUP) {
1240 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1241 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1242 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1243 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1244 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1245 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1246 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1247 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1248
1249 priv->isr_stats.wakeup++;
1250
1251 handled |= CSR_INT_BIT_WAKEUP;
1252 }
1253
1254 /* All uCode command responses, including Tx command responses,
1255 * Rx "responses" (frame-received notification), and other
1256 * notifications from uCode come through here*/
1257 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1258 CSR_INT_BIT_RX_PERIODIC)) {
1259 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1260 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1261 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1262 iwl_write32(priv, CSR_FH_INT_STATUS,
1263 CSR49_FH_INT_RX_MASK);
1264 }
1265 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1266 handled |= CSR_INT_BIT_RX_PERIODIC;
1267 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1268 }
1269 /* Sending RX interrupt require many steps to be done in the
1270 * the device:
1271 * 1- write interrupt to current index in ICT table.
1272 * 2- dma RX frame.
1273 * 3- update RX shared data to indicate last write index.
1274 * 4- send interrupt.
1275 * This could lead to RX race, driver could receive RX interrupt
1276 * but the shared data changes does not reflect this.
1277 * this could lead to RX race, RX periodic will solve this race
1278 */
1279 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1280 CSR_INT_PERIODIC_DIS);
1281 iwl_rx_handle(priv);
1282 /* Only set RX periodic if real RX is received. */
1283 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1284 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1285 CSR_INT_PERIODIC_ENA);
1286
1287 priv->isr_stats.rx++;
1288 }
1289
1290 if (inta & CSR_INT_BIT_FH_TX) {
1291 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1292 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1293 priv->isr_stats.tx++;
1294 handled |= CSR_INT_BIT_FH_TX;
1295 /* FH finished to write, send event */
1296 priv->ucode_write_complete = 1;
1297 wake_up_interruptible(&priv->wait_command_queue);
1298 }
1299
1300 if (inta & ~handled) {
1301 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1302 priv->isr_stats.unhandled++;
1303 }
1304
1305 if (inta & ~(priv->inta_mask)) {
1306 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1307 inta & ~priv->inta_mask);
1308 }
1309
1310
1311 /* Re-enable all interrupts */
1312 /* only Re-enable if diabled by irq */
1313 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1314 iwl_enable_interrupts(priv);
1315
1316 spin_unlock_irqrestore(&priv->lock, flags);
1317
1318 }
1319
1320
1321 /******************************************************************************
1322 *
1323 * uCode download functions
1324 *
1325 ******************************************************************************/
1326
1327 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1328 {
1329 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1330 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1331 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1332 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1333 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1334 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1335 }
1336
1337 static void iwl_nic_start(struct iwl_priv *priv)
1338 {
1339 /* Remove all resets to allow NIC to operate */
1340 iwl_write32(priv, CSR_RESET, 0);
1341 }
1342
1343
1344 /**
1345 * iwl_read_ucode - Read uCode images from disk file.
1346 *
1347 * Copy into buffers for card to fetch via bus-mastering
1348 */
1349 static int iwl_read_ucode(struct iwl_priv *priv)
1350 {
1351 struct iwl_ucode *ucode;
1352 int ret = -EINVAL, index;
1353 const struct firmware *ucode_raw;
1354 const char *name_pre = priv->cfg->fw_name_pre;
1355 const unsigned int api_max = priv->cfg->ucode_api_max;
1356 const unsigned int api_min = priv->cfg->ucode_api_min;
1357 char buf[25];
1358 u8 *src;
1359 size_t len;
1360 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1361
1362 /* Ask kernel firmware_class module to get the boot firmware off disk.
1363 * request_firmware() is synchronous, file is in memory on return. */
1364 for (index = api_max; index >= api_min; index--) {
1365 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1366 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1367 if (ret < 0) {
1368 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1369 buf, ret);
1370 if (ret == -ENOENT)
1371 continue;
1372 else
1373 goto error;
1374 } else {
1375 if (index < api_max)
1376 IWL_ERR(priv, "Loaded firmware %s, "
1377 "which is deprecated. "
1378 "Please use API v%u instead.\n",
1379 buf, api_max);
1380
1381 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1382 buf, ucode_raw->size);
1383 break;
1384 }
1385 }
1386
1387 if (ret < 0)
1388 goto error;
1389
1390 /* Make sure that we got at least our header! */
1391 if (ucode_raw->size < sizeof(*ucode)) {
1392 IWL_ERR(priv, "File size way too small!\n");
1393 ret = -EINVAL;
1394 goto err_release;
1395 }
1396
1397 /* Data from ucode file: header followed by uCode images */
1398 ucode = (void *)ucode_raw->data;
1399
1400 priv->ucode_ver = le32_to_cpu(ucode->ver);
1401 api_ver = IWL_UCODE_API(priv->ucode_ver);
1402 inst_size = le32_to_cpu(ucode->inst_size);
1403 data_size = le32_to_cpu(ucode->data_size);
1404 init_size = le32_to_cpu(ucode->init_size);
1405 init_data_size = le32_to_cpu(ucode->init_data_size);
1406 boot_size = le32_to_cpu(ucode->boot_size);
1407
1408 /* api_ver should match the api version forming part of the
1409 * firmware filename ... but we don't check for that and only rely
1410 * on the API version read from firmware header from here on forward */
1411
1412 if (api_ver < api_min || api_ver > api_max) {
1413 IWL_ERR(priv, "Driver unable to support your firmware API. "
1414 "Driver supports v%u, firmware is v%u.\n",
1415 api_max, api_ver);
1416 priv->ucode_ver = 0;
1417 ret = -EINVAL;
1418 goto err_release;
1419 }
1420 if (api_ver != api_max)
1421 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1422 "got v%u. New firmware can be obtained "
1423 "from http://www.intellinuxwireless.org.\n",
1424 api_max, api_ver);
1425
1426 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1427 IWL_UCODE_MAJOR(priv->ucode_ver),
1428 IWL_UCODE_MINOR(priv->ucode_ver),
1429 IWL_UCODE_API(priv->ucode_ver),
1430 IWL_UCODE_SERIAL(priv->ucode_ver));
1431
1432 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1433 priv->ucode_ver);
1434 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1435 inst_size);
1436 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1437 data_size);
1438 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1439 init_size);
1440 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1441 init_data_size);
1442 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1443 boot_size);
1444
1445 /* Verify size of file vs. image size info in file's header */
1446 if (ucode_raw->size < sizeof(*ucode) +
1447 inst_size + data_size + init_size +
1448 init_data_size + boot_size) {
1449
1450 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
1451 (int)ucode_raw->size);
1452 ret = -EINVAL;
1453 goto err_release;
1454 }
1455
1456 /* Verify that uCode images will fit in card's SRAM */
1457 if (inst_size > priv->hw_params.max_inst_size) {
1458 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1459 inst_size);
1460 ret = -EINVAL;
1461 goto err_release;
1462 }
1463
1464 if (data_size > priv->hw_params.max_data_size) {
1465 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1466 data_size);
1467 ret = -EINVAL;
1468 goto err_release;
1469 }
1470 if (init_size > priv->hw_params.max_inst_size) {
1471 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1472 init_size);
1473 ret = -EINVAL;
1474 goto err_release;
1475 }
1476 if (init_data_size > priv->hw_params.max_data_size) {
1477 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1478 init_data_size);
1479 ret = -EINVAL;
1480 goto err_release;
1481 }
1482 if (boot_size > priv->hw_params.max_bsm_size) {
1483 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1484 boot_size);
1485 ret = -EINVAL;
1486 goto err_release;
1487 }
1488
1489 /* Allocate ucode buffers for card's bus-master loading ... */
1490
1491 /* Runtime instructions and 2 copies of data:
1492 * 1) unmodified from disk
1493 * 2) backup cache for save/restore during power-downs */
1494 priv->ucode_code.len = inst_size;
1495 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1496
1497 priv->ucode_data.len = data_size;
1498 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1499
1500 priv->ucode_data_backup.len = data_size;
1501 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1502
1503 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1504 !priv->ucode_data_backup.v_addr)
1505 goto err_pci_alloc;
1506
1507 /* Initialization instructions and data */
1508 if (init_size && init_data_size) {
1509 priv->ucode_init.len = init_size;
1510 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1511
1512 priv->ucode_init_data.len = init_data_size;
1513 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1514
1515 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1516 goto err_pci_alloc;
1517 }
1518
1519 /* Bootstrap (instructions only, no data) */
1520 if (boot_size) {
1521 priv->ucode_boot.len = boot_size;
1522 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1523
1524 if (!priv->ucode_boot.v_addr)
1525 goto err_pci_alloc;
1526 }
1527
1528 /* Copy images into buffers for card's bus-master reads ... */
1529
1530 /* Runtime instructions (first block of data in file) */
1531 src = &ucode->data[0];
1532 len = priv->ucode_code.len;
1533 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1534 memcpy(priv->ucode_code.v_addr, src, len);
1535 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1536 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1537
1538 /* Runtime data (2nd block)
1539 * NOTE: Copy into backup buffer will be done in iwl_up() */
1540 src = &ucode->data[inst_size];
1541 len = priv->ucode_data.len;
1542 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1543 memcpy(priv->ucode_data.v_addr, src, len);
1544 memcpy(priv->ucode_data_backup.v_addr, src, len);
1545
1546 /* Initialization instructions (3rd block) */
1547 if (init_size) {
1548 src = &ucode->data[inst_size + data_size];
1549 len = priv->ucode_init.len;
1550 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1551 len);
1552 memcpy(priv->ucode_init.v_addr, src, len);
1553 }
1554
1555 /* Initialization data (4th block) */
1556 if (init_data_size) {
1557 src = &ucode->data[inst_size + data_size + init_size];
1558 len = priv->ucode_init_data.len;
1559 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1560 len);
1561 memcpy(priv->ucode_init_data.v_addr, src, len);
1562 }
1563
1564 /* Bootstrap instructions (5th block) */
1565 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1566 len = priv->ucode_boot.len;
1567 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1568 memcpy(priv->ucode_boot.v_addr, src, len);
1569
1570 /* We have our copies now, allow OS release its copies */
1571 release_firmware(ucode_raw);
1572 return 0;
1573
1574 err_pci_alloc:
1575 IWL_ERR(priv, "failed to allocate pci memory\n");
1576 ret = -ENOMEM;
1577 iwl_dealloc_ucode_pci(priv);
1578
1579 err_release:
1580 release_firmware(ucode_raw);
1581
1582 error:
1583 return ret;
1584 }
1585
1586 /**
1587 * iwl_alive_start - called after REPLY_ALIVE notification received
1588 * from protocol/runtime uCode (initialization uCode's
1589 * Alive gets handled by iwl_init_alive_start()).
1590 */
1591 static void iwl_alive_start(struct iwl_priv *priv)
1592 {
1593 int ret = 0;
1594
1595 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1596
1597 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1598 /* We had an error bringing up the hardware, so take it
1599 * all the way back down so we can try again */
1600 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1601 goto restart;
1602 }
1603
1604 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1605 * This is a paranoid check, because we would not have gotten the
1606 * "runtime" alive if code weren't properly loaded. */
1607 if (iwl_verify_ucode(priv)) {
1608 /* Runtime instruction load was bad;
1609 * take it all the way back down so we can try again */
1610 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1611 goto restart;
1612 }
1613
1614 iwl_clear_stations_table(priv);
1615 ret = priv->cfg->ops->lib->alive_notify(priv);
1616 if (ret) {
1617 IWL_WARN(priv,
1618 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1619 goto restart;
1620 }
1621
1622 /* After the ALIVE response, we can send host commands to the uCode */
1623 set_bit(STATUS_ALIVE, &priv->status);
1624
1625 if (iwl_is_rfkill(priv))
1626 return;
1627
1628 ieee80211_wake_queues(priv->hw);
1629
1630 priv->active_rate = priv->rates_mask;
1631 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1632
1633 if (iwl_is_associated(priv)) {
1634 struct iwl_rxon_cmd *active_rxon =
1635 (struct iwl_rxon_cmd *)&priv->active_rxon;
1636 /* apply any changes in staging */
1637 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1638 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1639 } else {
1640 /* Initialize our rx_config data */
1641 iwl_connection_init_rx_config(priv, priv->iw_mode);
1642
1643 if (priv->cfg->ops->hcmd->set_rxon_chain)
1644 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1645
1646 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1647 }
1648
1649 /* Configure Bluetooth device coexistence support */
1650 iwl_send_bt_config(priv);
1651
1652 iwl_reset_run_time_calib(priv);
1653
1654 /* Configure the adapter for unassociated operation */
1655 iwlcore_commit_rxon(priv);
1656
1657 /* At this point, the NIC is initialized and operational */
1658 iwl_rf_kill_ct_config(priv);
1659
1660 iwl_leds_register(priv);
1661
1662 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1663 set_bit(STATUS_READY, &priv->status);
1664 wake_up_interruptible(&priv->wait_command_queue);
1665
1666 iwl_power_update_mode(priv, 1);
1667
1668 /* reassociate for ADHOC mode */
1669 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1670 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1671 priv->vif);
1672 if (beacon)
1673 iwl_mac_beacon_update(priv->hw, beacon);
1674 }
1675
1676
1677 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1678 iwl_set_mode(priv, priv->iw_mode);
1679
1680 return;
1681
1682 restart:
1683 queue_work(priv->workqueue, &priv->restart);
1684 }
1685
1686 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1687
1688 static void __iwl_down(struct iwl_priv *priv)
1689 {
1690 unsigned long flags;
1691 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1692
1693 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1694
1695 if (!exit_pending)
1696 set_bit(STATUS_EXIT_PENDING, &priv->status);
1697
1698 iwl_leds_unregister(priv);
1699
1700 iwl_clear_stations_table(priv);
1701
1702 /* Unblock any waiting calls */
1703 wake_up_interruptible_all(&priv->wait_command_queue);
1704
1705 /* Wipe out the EXIT_PENDING status bit if we are not actually
1706 * exiting the module */
1707 if (!exit_pending)
1708 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1709
1710 /* stop and reset the on-board processor */
1711 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1712
1713 /* tell the device to stop sending interrupts */
1714 spin_lock_irqsave(&priv->lock, flags);
1715 iwl_disable_interrupts(priv);
1716 spin_unlock_irqrestore(&priv->lock, flags);
1717 iwl_synchronize_irq(priv);
1718
1719 if (priv->mac80211_registered)
1720 ieee80211_stop_queues(priv->hw);
1721
1722 /* If we have not previously called iwl_init() then
1723 * clear all bits but the RF Kill bit and return */
1724 if (!iwl_is_init(priv)) {
1725 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1726 STATUS_RF_KILL_HW |
1727 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1728 STATUS_GEO_CONFIGURED |
1729 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1730 STATUS_EXIT_PENDING;
1731 goto exit;
1732 }
1733
1734 /* ...otherwise clear out all the status bits but the RF Kill
1735 * bit and continue taking the NIC down. */
1736 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1737 STATUS_RF_KILL_HW |
1738 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1739 STATUS_GEO_CONFIGURED |
1740 test_bit(STATUS_FW_ERROR, &priv->status) <<
1741 STATUS_FW_ERROR |
1742 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1743 STATUS_EXIT_PENDING;
1744
1745 /* device going down, Stop using ICT table */
1746 iwl_disable_ict(priv);
1747 spin_lock_irqsave(&priv->lock, flags);
1748 iwl_clear_bit(priv, CSR_GP_CNTRL,
1749 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1750 spin_unlock_irqrestore(&priv->lock, flags);
1751
1752 iwl_txq_ctx_stop(priv);
1753 iwl_rxq_stop(priv);
1754
1755 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1756 APMG_CLK_VAL_DMA_CLK_RQT);
1757
1758 udelay(5);
1759
1760 /* FIXME: apm_ops.suspend(priv) */
1761 if (exit_pending)
1762 priv->cfg->ops->lib->apm_ops.stop(priv);
1763 else
1764 priv->cfg->ops->lib->apm_ops.reset(priv);
1765 exit:
1766 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1767
1768 if (priv->ibss_beacon)
1769 dev_kfree_skb(priv->ibss_beacon);
1770 priv->ibss_beacon = NULL;
1771
1772 /* clear out any free frames */
1773 iwl_clear_free_frames(priv);
1774 }
1775
1776 static void iwl_down(struct iwl_priv *priv)
1777 {
1778 mutex_lock(&priv->mutex);
1779 __iwl_down(priv);
1780 mutex_unlock(&priv->mutex);
1781
1782 iwl_cancel_deferred_work(priv);
1783 }
1784
1785 #define HW_READY_TIMEOUT (50)
1786
1787 static int iwl_set_hw_ready(struct iwl_priv *priv)
1788 {
1789 int ret = 0;
1790
1791 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1792 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1793
1794 /* See if we got it */
1795 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1796 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1797 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1798 HW_READY_TIMEOUT);
1799 if (ret != -ETIMEDOUT)
1800 priv->hw_ready = true;
1801 else
1802 priv->hw_ready = false;
1803
1804 IWL_DEBUG_INFO(priv, "hardware %s\n",
1805 (priv->hw_ready == 1) ? "ready" : "not ready");
1806 return ret;
1807 }
1808
1809 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1810 {
1811 int ret = 0;
1812
1813 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1814
1815 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1816 CSR_HW_IF_CONFIG_REG_PREPARE);
1817
1818 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1819 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1820 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1821
1822 if (ret != -ETIMEDOUT)
1823 iwl_set_hw_ready(priv);
1824
1825 return ret;
1826 }
1827
1828 #define MAX_HW_RESTARTS 5
1829
1830 static int __iwl_up(struct iwl_priv *priv)
1831 {
1832 int i;
1833 int ret;
1834
1835 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1836 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1837 return -EIO;
1838 }
1839
1840 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1841 IWL_ERR(priv, "ucode not available for device bringup\n");
1842 return -EIO;
1843 }
1844
1845 iwl_prepare_card_hw(priv);
1846
1847 if (!priv->hw_ready) {
1848 IWL_WARN(priv, "Exit HW not ready\n");
1849 return -EIO;
1850 }
1851
1852 /* If platform's RF_KILL switch is NOT set to KILL */
1853 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1854 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1855 else
1856 set_bit(STATUS_RF_KILL_HW, &priv->status);
1857
1858 if (iwl_is_rfkill(priv)) {
1859 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1860
1861 iwl_enable_interrupts(priv);
1862 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
1863 return 0;
1864 }
1865
1866 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1867
1868 ret = iwl_hw_nic_init(priv);
1869 if (ret) {
1870 IWL_ERR(priv, "Unable to init nic\n");
1871 return ret;
1872 }
1873
1874 /* make sure rfkill handshake bits are cleared */
1875 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1876 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1877 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1878
1879 /* clear (again), then enable host interrupts */
1880 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1881 iwl_enable_interrupts(priv);
1882
1883 /* really make sure rfkill handshake bits are cleared */
1884 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1885 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1886
1887 /* Copy original ucode data image from disk into backup cache.
1888 * This will be used to initialize the on-board processor's
1889 * data SRAM for a clean start when the runtime program first loads. */
1890 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1891 priv->ucode_data.len);
1892
1893 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1894
1895 iwl_clear_stations_table(priv);
1896
1897 /* load bootstrap state machine,
1898 * load bootstrap program into processor's memory,
1899 * prepare to load the "initialize" uCode */
1900 ret = priv->cfg->ops->lib->load_ucode(priv);
1901
1902 if (ret) {
1903 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1904 ret);
1905 continue;
1906 }
1907
1908 /* start card; "initialize" will load runtime ucode */
1909 iwl_nic_start(priv);
1910
1911 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1912
1913 return 0;
1914 }
1915
1916 set_bit(STATUS_EXIT_PENDING, &priv->status);
1917 __iwl_down(priv);
1918 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1919
1920 /* tried to restart and config the device for as long as our
1921 * patience could withstand */
1922 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1923 return -EIO;
1924 }
1925
1926
1927 /*****************************************************************************
1928 *
1929 * Workqueue callbacks
1930 *
1931 *****************************************************************************/
1932
1933 static void iwl_bg_init_alive_start(struct work_struct *data)
1934 {
1935 struct iwl_priv *priv =
1936 container_of(data, struct iwl_priv, init_alive_start.work);
1937
1938 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1939 return;
1940
1941 mutex_lock(&priv->mutex);
1942 priv->cfg->ops->lib->init_alive_start(priv);
1943 mutex_unlock(&priv->mutex);
1944 }
1945
1946 static void iwl_bg_alive_start(struct work_struct *data)
1947 {
1948 struct iwl_priv *priv =
1949 container_of(data, struct iwl_priv, alive_start.work);
1950
1951 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1952 return;
1953
1954 /* enable dram interrupt */
1955 iwl_reset_ict(priv);
1956
1957 mutex_lock(&priv->mutex);
1958 iwl_alive_start(priv);
1959 mutex_unlock(&priv->mutex);
1960 }
1961
1962 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1963 {
1964 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1965 run_time_calib_work);
1966
1967 mutex_lock(&priv->mutex);
1968
1969 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1970 test_bit(STATUS_SCANNING, &priv->status)) {
1971 mutex_unlock(&priv->mutex);
1972 return;
1973 }
1974
1975 if (priv->start_calib) {
1976 iwl_chain_noise_calibration(priv, &priv->statistics);
1977
1978 iwl_sensitivity_calibration(priv, &priv->statistics);
1979 }
1980
1981 mutex_unlock(&priv->mutex);
1982 return;
1983 }
1984
1985 static void iwl_bg_up(struct work_struct *data)
1986 {
1987 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1988
1989 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1990 return;
1991
1992 mutex_lock(&priv->mutex);
1993 __iwl_up(priv);
1994 mutex_unlock(&priv->mutex);
1995 }
1996
1997 static void iwl_bg_restart(struct work_struct *data)
1998 {
1999 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2000
2001 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2002 return;
2003
2004 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2005 mutex_lock(&priv->mutex);
2006 priv->vif = NULL;
2007 priv->is_open = 0;
2008 mutex_unlock(&priv->mutex);
2009 iwl_down(priv);
2010 ieee80211_restart_hw(priv->hw);
2011 } else {
2012 iwl_down(priv);
2013 queue_work(priv->workqueue, &priv->up);
2014 }
2015 }
2016
2017 static void iwl_bg_rx_replenish(struct work_struct *data)
2018 {
2019 struct iwl_priv *priv =
2020 container_of(data, struct iwl_priv, rx_replenish);
2021
2022 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2023 return;
2024
2025 mutex_lock(&priv->mutex);
2026 iwl_rx_replenish(priv);
2027 mutex_unlock(&priv->mutex);
2028 }
2029
2030 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2031
2032 void iwl_post_associate(struct iwl_priv *priv)
2033 {
2034 struct ieee80211_conf *conf = NULL;
2035 int ret = 0;
2036 unsigned long flags;
2037
2038 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2039 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2040 return;
2041 }
2042
2043 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2044 priv->assoc_id, priv->active_rxon.bssid_addr);
2045
2046
2047 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2048 return;
2049
2050
2051 if (!priv->vif || !priv->is_open)
2052 return;
2053
2054 iwl_scan_cancel_timeout(priv, 200);
2055
2056 conf = ieee80211_get_hw_conf(priv->hw);
2057
2058 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2059 iwlcore_commit_rxon(priv);
2060
2061 iwl_setup_rxon_timing(priv);
2062 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2063 sizeof(priv->rxon_timing), &priv->rxon_timing);
2064 if (ret)
2065 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2066 "Attempting to continue.\n");
2067
2068 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2069
2070 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2071
2072 if (priv->cfg->ops->hcmd->set_rxon_chain)
2073 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2074
2075 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2076
2077 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2078 priv->assoc_id, priv->beacon_int);
2079
2080 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2081 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2082 else
2083 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2084
2085 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2086 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2087 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2088 else
2089 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2090
2091 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2092 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2093
2094 }
2095
2096 iwlcore_commit_rxon(priv);
2097
2098 switch (priv->iw_mode) {
2099 case NL80211_IFTYPE_STATION:
2100 break;
2101
2102 case NL80211_IFTYPE_ADHOC:
2103
2104 /* assume default assoc id */
2105 priv->assoc_id = 1;
2106
2107 iwl_rxon_add_station(priv, priv->bssid, 0);
2108 iwl_send_beacon_cmd(priv);
2109
2110 break;
2111
2112 default:
2113 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2114 __func__, priv->iw_mode);
2115 break;
2116 }
2117
2118 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2119 priv->assoc_station_added = 1;
2120
2121 spin_lock_irqsave(&priv->lock, flags);
2122 iwl_activate_qos(priv, 0);
2123 spin_unlock_irqrestore(&priv->lock, flags);
2124
2125 /* the chain noise calibration will enabled PM upon completion
2126 * If chain noise has already been run, then we need to enable
2127 * power management here */
2128 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2129 iwl_power_update_mode(priv, 0);
2130
2131 /* Enable Rx differential gain and sensitivity calibrations */
2132 iwl_chain_noise_reset(priv);
2133 priv->start_calib = 1;
2134
2135 }
2136
2137 /*****************************************************************************
2138 *
2139 * mac80211 entry point functions
2140 *
2141 *****************************************************************************/
2142
2143 #define UCODE_READY_TIMEOUT (4 * HZ)
2144
2145 static int iwl_mac_start(struct ieee80211_hw *hw)
2146 {
2147 struct iwl_priv *priv = hw->priv;
2148 int ret;
2149
2150 IWL_DEBUG_MAC80211(priv, "enter\n");
2151
2152 /* we should be verifying the device is ready to be opened */
2153 mutex_lock(&priv->mutex);
2154
2155 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
2156 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2157 * ucode filename and max sizes are card-specific. */
2158
2159 if (!priv->ucode_code.len) {
2160 ret = iwl_read_ucode(priv);
2161 if (ret) {
2162 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2163 mutex_unlock(&priv->mutex);
2164 return ret;
2165 }
2166 }
2167
2168 ret = __iwl_up(priv);
2169
2170 mutex_unlock(&priv->mutex);
2171
2172 if (ret)
2173 return ret;
2174
2175 if (iwl_is_rfkill(priv))
2176 goto out;
2177
2178 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2179
2180 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2181 * mac80211 will not be run successfully. */
2182 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2183 test_bit(STATUS_READY, &priv->status),
2184 UCODE_READY_TIMEOUT);
2185 if (!ret) {
2186 if (!test_bit(STATUS_READY, &priv->status)) {
2187 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2188 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2189 return -ETIMEDOUT;
2190 }
2191 }
2192
2193 out:
2194 priv->is_open = 1;
2195 IWL_DEBUG_MAC80211(priv, "leave\n");
2196 return 0;
2197 }
2198
2199 static void iwl_mac_stop(struct ieee80211_hw *hw)
2200 {
2201 struct iwl_priv *priv = hw->priv;
2202
2203 IWL_DEBUG_MAC80211(priv, "enter\n");
2204
2205 if (!priv->is_open)
2206 return;
2207
2208 priv->is_open = 0;
2209
2210 if (iwl_is_ready_rf(priv)) {
2211 /* stop mac, cancel any scan request and clear
2212 * RXON_FILTER_ASSOC_MSK BIT
2213 */
2214 mutex_lock(&priv->mutex);
2215 iwl_scan_cancel_timeout(priv, 100);
2216 mutex_unlock(&priv->mutex);
2217 }
2218
2219 iwl_down(priv);
2220
2221 flush_workqueue(priv->workqueue);
2222
2223 /* enable interrupts again in order to receive rfkill changes */
2224 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2225 iwl_enable_interrupts(priv);
2226
2227 IWL_DEBUG_MAC80211(priv, "leave\n");
2228 }
2229
2230 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2231 {
2232 struct iwl_priv *priv = hw->priv;
2233
2234 IWL_DEBUG_MACDUMP(priv, "enter\n");
2235
2236 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2237 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2238
2239 if (iwl_tx_skb(priv, skb))
2240 dev_kfree_skb_any(skb);
2241
2242 IWL_DEBUG_MACDUMP(priv, "leave\n");
2243 return NETDEV_TX_OK;
2244 }
2245
2246 void iwl_config_ap(struct iwl_priv *priv)
2247 {
2248 int ret = 0;
2249 unsigned long flags;
2250
2251 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2252 return;
2253
2254 /* The following should be done only at AP bring up */
2255 if (!iwl_is_associated(priv)) {
2256
2257 /* RXON - unassoc (to set timing command) */
2258 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2259 iwlcore_commit_rxon(priv);
2260
2261 /* RXON Timing */
2262 iwl_setup_rxon_timing(priv);
2263 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2264 sizeof(priv->rxon_timing), &priv->rxon_timing);
2265 if (ret)
2266 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2267 "Attempting to continue.\n");
2268
2269 if (priv->cfg->ops->hcmd->set_rxon_chain)
2270 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2271
2272 /* FIXME: what should be the assoc_id for AP? */
2273 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2274 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2275 priv->staging_rxon.flags |=
2276 RXON_FLG_SHORT_PREAMBLE_MSK;
2277 else
2278 priv->staging_rxon.flags &=
2279 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2280
2281 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2282 if (priv->assoc_capability &
2283 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2284 priv->staging_rxon.flags |=
2285 RXON_FLG_SHORT_SLOT_MSK;
2286 else
2287 priv->staging_rxon.flags &=
2288 ~RXON_FLG_SHORT_SLOT_MSK;
2289
2290 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2291 priv->staging_rxon.flags &=
2292 ~RXON_FLG_SHORT_SLOT_MSK;
2293 }
2294 /* restore RXON assoc */
2295 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2296 iwlcore_commit_rxon(priv);
2297 spin_lock_irqsave(&priv->lock, flags);
2298 iwl_activate_qos(priv, 1);
2299 spin_unlock_irqrestore(&priv->lock, flags);
2300 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2301 }
2302 iwl_send_beacon_cmd(priv);
2303
2304 /* FIXME - we need to add code here to detect a totally new
2305 * configuration, reset the AP, unassoc, rxon timing, assoc,
2306 * clear sta table, add BCAST sta... */
2307 }
2308
2309 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2310 struct ieee80211_key_conf *keyconf, const u8 *addr,
2311 u32 iv32, u16 *phase1key)
2312 {
2313
2314 struct iwl_priv *priv = hw->priv;
2315 IWL_DEBUG_MAC80211(priv, "enter\n");
2316
2317 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2318
2319 IWL_DEBUG_MAC80211(priv, "leave\n");
2320 }
2321
2322 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2323 struct ieee80211_vif *vif,
2324 struct ieee80211_sta *sta,
2325 struct ieee80211_key_conf *key)
2326 {
2327 struct iwl_priv *priv = hw->priv;
2328 const u8 *addr;
2329 int ret;
2330 u8 sta_id;
2331 bool is_default_wep_key = false;
2332
2333 IWL_DEBUG_MAC80211(priv, "enter\n");
2334
2335 if (priv->hw_params.sw_crypto) {
2336 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2337 return -EOPNOTSUPP;
2338 }
2339 addr = sta ? sta->addr : iwl_bcast_addr;
2340 sta_id = iwl_find_station(priv, addr);
2341 if (sta_id == IWL_INVALID_STATION) {
2342 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2343 addr);
2344 return -EINVAL;
2345
2346 }
2347
2348 mutex_lock(&priv->mutex);
2349 iwl_scan_cancel_timeout(priv, 100);
2350 mutex_unlock(&priv->mutex);
2351
2352 /* If we are getting WEP group key and we didn't receive any key mapping
2353 * so far, we are in legacy wep mode (group key only), otherwise we are
2354 * in 1X mode.
2355 * In legacy wep mode, we use another host command to the uCode */
2356 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2357 priv->iw_mode != NL80211_IFTYPE_AP) {
2358 if (cmd == SET_KEY)
2359 is_default_wep_key = !priv->key_mapping_key;
2360 else
2361 is_default_wep_key =
2362 (key->hw_key_idx == HW_KEY_DEFAULT);
2363 }
2364
2365 switch (cmd) {
2366 case SET_KEY:
2367 if (is_default_wep_key)
2368 ret = iwl_set_default_wep_key(priv, key);
2369 else
2370 ret = iwl_set_dynamic_key(priv, key, sta_id);
2371
2372 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2373 break;
2374 case DISABLE_KEY:
2375 if (is_default_wep_key)
2376 ret = iwl_remove_default_wep_key(priv, key);
2377 else
2378 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2379
2380 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2381 break;
2382 default:
2383 ret = -EINVAL;
2384 }
2385
2386 IWL_DEBUG_MAC80211(priv, "leave\n");
2387
2388 return ret;
2389 }
2390
2391 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2392 enum ieee80211_ampdu_mlme_action action,
2393 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2394 {
2395 struct iwl_priv *priv = hw->priv;
2396 int ret;
2397
2398 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2399 sta->addr, tid);
2400
2401 if (!(priv->cfg->sku & IWL_SKU_N))
2402 return -EACCES;
2403
2404 switch (action) {
2405 case IEEE80211_AMPDU_RX_START:
2406 IWL_DEBUG_HT(priv, "start Rx\n");
2407 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2408 case IEEE80211_AMPDU_RX_STOP:
2409 IWL_DEBUG_HT(priv, "stop Rx\n");
2410 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2411 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2412 return 0;
2413 else
2414 return ret;
2415 case IEEE80211_AMPDU_TX_START:
2416 IWL_DEBUG_HT(priv, "start Tx\n");
2417 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2418 case IEEE80211_AMPDU_TX_STOP:
2419 IWL_DEBUG_HT(priv, "stop Tx\n");
2420 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2421 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2422 return 0;
2423 else
2424 return ret;
2425 default:
2426 IWL_DEBUG_HT(priv, "unknown\n");
2427 return -EINVAL;
2428 break;
2429 }
2430 return 0;
2431 }
2432
2433 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2434 struct ieee80211_low_level_stats *stats)
2435 {
2436 struct iwl_priv *priv = hw->priv;
2437
2438 priv = hw->priv;
2439 IWL_DEBUG_MAC80211(priv, "enter\n");
2440 IWL_DEBUG_MAC80211(priv, "leave\n");
2441
2442 return 0;
2443 }
2444
2445 /*****************************************************************************
2446 *
2447 * sysfs attributes
2448 *
2449 *****************************************************************************/
2450
2451 #ifdef CONFIG_IWLWIFI_DEBUG
2452
2453 /*
2454 * The following adds a new attribute to the sysfs representation
2455 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2456 * used for controlling the debug level.
2457 *
2458 * See the level definitions in iwl for details.
2459 */
2460
2461 static ssize_t show_debug_level(struct device *d,
2462 struct device_attribute *attr, char *buf)
2463 {
2464 struct iwl_priv *priv = dev_get_drvdata(d);
2465
2466 return sprintf(buf, "0x%08X\n", priv->debug_level);
2467 }
2468 static ssize_t store_debug_level(struct device *d,
2469 struct device_attribute *attr,
2470 const char *buf, size_t count)
2471 {
2472 struct iwl_priv *priv = dev_get_drvdata(d);
2473 unsigned long val;
2474 int ret;
2475
2476 ret = strict_strtoul(buf, 0, &val);
2477 if (ret)
2478 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2479 else
2480 priv->debug_level = val;
2481
2482 return strnlen(buf, count);
2483 }
2484
2485 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2486 show_debug_level, store_debug_level);
2487
2488
2489 #endif /* CONFIG_IWLWIFI_DEBUG */
2490
2491
2492 static ssize_t show_version(struct device *d,
2493 struct device_attribute *attr, char *buf)
2494 {
2495 struct iwl_priv *priv = dev_get_drvdata(d);
2496 struct iwl_alive_resp *palive = &priv->card_alive;
2497 ssize_t pos = 0;
2498 u16 eeprom_ver;
2499
2500 if (palive->is_valid)
2501 pos += sprintf(buf + pos,
2502 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2503 "fw type: 0x%01X 0x%01X\n",
2504 palive->ucode_major, palive->ucode_minor,
2505 palive->sw_rev[0], palive->sw_rev[1],
2506 palive->ver_type, palive->ver_subtype);
2507 else
2508 pos += sprintf(buf + pos, "fw not loaded\n");
2509
2510 if (priv->eeprom) {
2511 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2512 pos += sprintf(buf + pos, "NVM Type: %s, version: 0x%x\n",
2513 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
2514 ? "OTP" : "EEPROM", eeprom_ver);
2515
2516 } else {
2517 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2518 }
2519
2520 return pos;
2521 }
2522
2523 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2524
2525 static ssize_t show_temperature(struct device *d,
2526 struct device_attribute *attr, char *buf)
2527 {
2528 struct iwl_priv *priv = dev_get_drvdata(d);
2529
2530 if (!iwl_is_alive(priv))
2531 return -EAGAIN;
2532
2533 return sprintf(buf, "%d\n", priv->temperature);
2534 }
2535
2536 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2537
2538 static ssize_t show_tx_power(struct device *d,
2539 struct device_attribute *attr, char *buf)
2540 {
2541 struct iwl_priv *priv = dev_get_drvdata(d);
2542
2543 if (!iwl_is_ready_rf(priv))
2544 return sprintf(buf, "off\n");
2545 else
2546 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2547 }
2548
2549 static ssize_t store_tx_power(struct device *d,
2550 struct device_attribute *attr,
2551 const char *buf, size_t count)
2552 {
2553 struct iwl_priv *priv = dev_get_drvdata(d);
2554 unsigned long val;
2555 int ret;
2556
2557 ret = strict_strtoul(buf, 10, &val);
2558 if (ret)
2559 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2560 else
2561 iwl_set_tx_power(priv, val, false);
2562
2563 return count;
2564 }
2565
2566 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2567
2568 static ssize_t show_flags(struct device *d,
2569 struct device_attribute *attr, char *buf)
2570 {
2571 struct iwl_priv *priv = dev_get_drvdata(d);
2572
2573 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2574 }
2575
2576 static ssize_t store_flags(struct device *d,
2577 struct device_attribute *attr,
2578 const char *buf, size_t count)
2579 {
2580 struct iwl_priv *priv = dev_get_drvdata(d);
2581 unsigned long val;
2582 u32 flags;
2583 int ret = strict_strtoul(buf, 0, &val);
2584 if (ret)
2585 return ret;
2586 flags = (u32)val;
2587
2588 mutex_lock(&priv->mutex);
2589 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2590 /* Cancel any currently running scans... */
2591 if (iwl_scan_cancel_timeout(priv, 100))
2592 IWL_WARN(priv, "Could not cancel scan.\n");
2593 else {
2594 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2595 priv->staging_rxon.flags = cpu_to_le32(flags);
2596 iwlcore_commit_rxon(priv);
2597 }
2598 }
2599 mutex_unlock(&priv->mutex);
2600
2601 return count;
2602 }
2603
2604 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2605
2606 static ssize_t show_filter_flags(struct device *d,
2607 struct device_attribute *attr, char *buf)
2608 {
2609 struct iwl_priv *priv = dev_get_drvdata(d);
2610
2611 return sprintf(buf, "0x%04X\n",
2612 le32_to_cpu(priv->active_rxon.filter_flags));
2613 }
2614
2615 static ssize_t store_filter_flags(struct device *d,
2616 struct device_attribute *attr,
2617 const char *buf, size_t count)
2618 {
2619 struct iwl_priv *priv = dev_get_drvdata(d);
2620 unsigned long val;
2621 u32 filter_flags;
2622 int ret = strict_strtoul(buf, 0, &val);
2623 if (ret)
2624 return ret;
2625 filter_flags = (u32)val;
2626
2627 mutex_lock(&priv->mutex);
2628 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2629 /* Cancel any currently running scans... */
2630 if (iwl_scan_cancel_timeout(priv, 100))
2631 IWL_WARN(priv, "Could not cancel scan.\n");
2632 else {
2633 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2634 "0x%04X\n", filter_flags);
2635 priv->staging_rxon.filter_flags =
2636 cpu_to_le32(filter_flags);
2637 iwlcore_commit_rxon(priv);
2638 }
2639 }
2640 mutex_unlock(&priv->mutex);
2641
2642 return count;
2643 }
2644
2645 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2646 store_filter_flags);
2647
2648 static ssize_t store_power_level(struct device *d,
2649 struct device_attribute *attr,
2650 const char *buf, size_t count)
2651 {
2652 struct iwl_priv *priv = dev_get_drvdata(d);
2653 int ret;
2654 unsigned long mode;
2655
2656
2657 mutex_lock(&priv->mutex);
2658
2659 ret = strict_strtoul(buf, 10, &mode);
2660 if (ret)
2661 goto out;
2662
2663 ret = iwl_power_set_user_mode(priv, mode);
2664 if (ret) {
2665 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2666 goto out;
2667 }
2668 ret = count;
2669
2670 out:
2671 mutex_unlock(&priv->mutex);
2672 return ret;
2673 }
2674
2675 static ssize_t show_power_level(struct device *d,
2676 struct device_attribute *attr, char *buf)
2677 {
2678 struct iwl_priv *priv = dev_get_drvdata(d);
2679 int mode = priv->power_data.user_power_setting;
2680 int level = priv->power_data.power_mode;
2681 char *p = buf;
2682
2683 p += sprintf(p, "INDEX:%d\t", level);
2684 p += sprintf(p, "USER:%d\n", mode);
2685 return p - buf + 1;
2686 }
2687
2688 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2689 store_power_level);
2690
2691 static ssize_t show_qos(struct device *d,
2692 struct device_attribute *attr, char *buf)
2693 {
2694 struct iwl_priv *priv = dev_get_drvdata(d);
2695 char *p = buf;
2696 int q;
2697
2698 for (q = 0; q < AC_NUM; q++) {
2699 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2700 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2701 priv->qos_data.def_qos_parm.ac[q].cw_min,
2702 priv->qos_data.def_qos_parm.ac[q].cw_max,
2703 priv->qos_data.def_qos_parm.ac[q].aifsn,
2704 priv->qos_data.def_qos_parm.ac[q].edca_txop);
2705 }
2706
2707 return p - buf + 1;
2708 }
2709
2710 static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
2711
2712 static ssize_t show_statistics(struct device *d,
2713 struct device_attribute *attr, char *buf)
2714 {
2715 struct iwl_priv *priv = dev_get_drvdata(d);
2716 u32 size = sizeof(struct iwl_notif_statistics);
2717 u32 len = 0, ofs = 0;
2718 u8 *data = (u8 *)&priv->statistics;
2719 int rc = 0;
2720
2721 if (!iwl_is_alive(priv))
2722 return -EAGAIN;
2723
2724 mutex_lock(&priv->mutex);
2725 rc = iwl_send_statistics_request(priv, 0);
2726 mutex_unlock(&priv->mutex);
2727
2728 if (rc) {
2729 len = sprintf(buf,
2730 "Error sending statistics request: 0x%08X\n", rc);
2731 return len;
2732 }
2733
2734 while (size && (PAGE_SIZE - len)) {
2735 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2736 PAGE_SIZE - len, 1);
2737 len = strlen(buf);
2738 if (PAGE_SIZE - len)
2739 buf[len++] = '\n';
2740
2741 ofs += 16;
2742 size -= min(size, 16U);
2743 }
2744
2745 return len;
2746 }
2747
2748 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2749
2750
2751 /*****************************************************************************
2752 *
2753 * driver setup and teardown
2754 *
2755 *****************************************************************************/
2756
2757 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2758 {
2759 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2760
2761 init_waitqueue_head(&priv->wait_command_queue);
2762
2763 INIT_WORK(&priv->up, iwl_bg_up);
2764 INIT_WORK(&priv->restart, iwl_bg_restart);
2765 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2766 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2767 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2768 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2769 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2770
2771 iwl_setup_scan_deferred_work(priv);
2772
2773 if (priv->cfg->ops->lib->setup_deferred_work)
2774 priv->cfg->ops->lib->setup_deferred_work(priv);
2775
2776 init_timer(&priv->statistics_periodic);
2777 priv->statistics_periodic.data = (unsigned long)priv;
2778 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2779
2780 if (!priv->cfg->use_isr_legacy)
2781 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2782 iwl_irq_tasklet, (unsigned long)priv);
2783 else
2784 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2785 iwl_irq_tasklet_legacy, (unsigned long)priv);
2786 }
2787
2788 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2789 {
2790 if (priv->cfg->ops->lib->cancel_deferred_work)
2791 priv->cfg->ops->lib->cancel_deferred_work(priv);
2792
2793 cancel_delayed_work_sync(&priv->init_alive_start);
2794 cancel_delayed_work(&priv->scan_check);
2795 cancel_delayed_work(&priv->alive_start);
2796 cancel_work_sync(&priv->beacon_update);
2797 del_timer_sync(&priv->statistics_periodic);
2798 }
2799
2800 static struct attribute *iwl_sysfs_entries[] = {
2801 &dev_attr_flags.attr,
2802 &dev_attr_filter_flags.attr,
2803 &dev_attr_power_level.attr,
2804 &dev_attr_statistics.attr,
2805 &dev_attr_temperature.attr,
2806 &dev_attr_tx_power.attr,
2807 #ifdef CONFIG_IWLWIFI_DEBUG
2808 &dev_attr_debug_level.attr,
2809 #endif
2810 &dev_attr_version.attr,
2811 &dev_attr_qos.attr,
2812 NULL
2813 };
2814
2815 static struct attribute_group iwl_attribute_group = {
2816 .name = NULL, /* put in device directory */
2817 .attrs = iwl_sysfs_entries,
2818 };
2819
2820 static struct ieee80211_ops iwl_hw_ops = {
2821 .tx = iwl_mac_tx,
2822 .start = iwl_mac_start,
2823 .stop = iwl_mac_stop,
2824 .add_interface = iwl_mac_add_interface,
2825 .remove_interface = iwl_mac_remove_interface,
2826 .config = iwl_mac_config,
2827 .configure_filter = iwl_configure_filter,
2828 .set_key = iwl_mac_set_key,
2829 .update_tkip_key = iwl_mac_update_tkip_key,
2830 .get_stats = iwl_mac_get_stats,
2831 .get_tx_stats = iwl_mac_get_tx_stats,
2832 .conf_tx = iwl_mac_conf_tx,
2833 .reset_tsf = iwl_mac_reset_tsf,
2834 .bss_info_changed = iwl_bss_info_changed,
2835 .ampdu_action = iwl_mac_ampdu_action,
2836 .hw_scan = iwl_mac_hw_scan
2837 };
2838
2839 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2840 {
2841 int err = 0;
2842 struct iwl_priv *priv;
2843 struct ieee80211_hw *hw;
2844 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2845 unsigned long flags;
2846 u16 pci_cmd;
2847
2848 /************************
2849 * 1. Allocating HW data
2850 ************************/
2851
2852 /* Disabling hardware scan means that mac80211 will perform scans
2853 * "the hard way", rather than using device's scan. */
2854 if (cfg->mod_params->disable_hw_scan) {
2855 if (cfg->mod_params->debug & IWL_DL_INFO)
2856 dev_printk(KERN_DEBUG, &(pdev->dev),
2857 "Disabling hw_scan\n");
2858 iwl_hw_ops.hw_scan = NULL;
2859 }
2860
2861 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2862 if (!hw) {
2863 err = -ENOMEM;
2864 goto out;
2865 }
2866 priv = hw->priv;
2867 /* At this point both hw and priv are allocated. */
2868
2869 SET_IEEE80211_DEV(hw, &pdev->dev);
2870
2871 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2872 priv->cfg = cfg;
2873 priv->pci_dev = pdev;
2874 priv->inta_mask = CSR_INI_SET_MASK;
2875
2876 #ifdef CONFIG_IWLWIFI_DEBUG
2877 priv->debug_level = priv->cfg->mod_params->debug;
2878 atomic_set(&priv->restrict_refcnt, 0);
2879 #endif
2880
2881 /**************************
2882 * 2. Initializing PCI bus
2883 **************************/
2884 if (pci_enable_device(pdev)) {
2885 err = -ENODEV;
2886 goto out_ieee80211_free_hw;
2887 }
2888
2889 pci_set_master(pdev);
2890
2891 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2892 if (!err)
2893 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2894 if (err) {
2895 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2896 if (!err)
2897 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2898 /* both attempts failed: */
2899 if (err) {
2900 IWL_WARN(priv, "No suitable DMA available.\n");
2901 goto out_pci_disable_device;
2902 }
2903 }
2904
2905 err = pci_request_regions(pdev, DRV_NAME);
2906 if (err)
2907 goto out_pci_disable_device;
2908
2909 pci_set_drvdata(pdev, priv);
2910
2911
2912 /***********************
2913 * 3. Read REV register
2914 ***********************/
2915 priv->hw_base = pci_iomap(pdev, 0, 0);
2916 if (!priv->hw_base) {
2917 err = -ENODEV;
2918 goto out_pci_release_regions;
2919 }
2920
2921 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2922 (unsigned long long) pci_resource_len(pdev, 0));
2923 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2924
2925 /* this spin lock will be used in apm_ops.init and EEPROM access
2926 * we should init now
2927 */
2928 spin_lock_init(&priv->reg_lock);
2929 iwl_hw_detect(priv);
2930 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2931 priv->cfg->name, priv->hw_rev);
2932
2933 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2934 * PCI Tx retries from interfering with C3 CPU state */
2935 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2936
2937 iwl_prepare_card_hw(priv);
2938 if (!priv->hw_ready) {
2939 IWL_WARN(priv, "Failed, HW not ready\n");
2940 goto out_iounmap;
2941 }
2942
2943 /* amp init */
2944 err = priv->cfg->ops->lib->apm_ops.init(priv);
2945 if (err < 0) {
2946 IWL_ERR(priv, "Failed to init APMG\n");
2947 goto out_iounmap;
2948 }
2949 /*****************
2950 * 4. Read EEPROM
2951 *****************/
2952 /* Read the EEPROM */
2953 err = iwl_eeprom_init(priv);
2954 if (err) {
2955 IWL_ERR(priv, "Unable to init EEPROM\n");
2956 goto out_iounmap;
2957 }
2958 err = iwl_eeprom_check_version(priv);
2959 if (err)
2960 goto out_free_eeprom;
2961
2962 /* extract MAC Address */
2963 iwl_eeprom_get_mac(priv, priv->mac_addr);
2964 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2965 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2966
2967 /************************
2968 * 5. Setup HW constants
2969 ************************/
2970 if (iwl_set_hw_params(priv)) {
2971 IWL_ERR(priv, "failed to set hw parameters\n");
2972 goto out_free_eeprom;
2973 }
2974
2975 /*******************
2976 * 6. Setup priv
2977 *******************/
2978
2979 err = iwl_init_drv(priv);
2980 if (err)
2981 goto out_free_eeprom;
2982 /* At this point both hw and priv are initialized. */
2983
2984 /********************
2985 * 7. Setup services
2986 ********************/
2987 spin_lock_irqsave(&priv->lock, flags);
2988 iwl_disable_interrupts(priv);
2989 spin_unlock_irqrestore(&priv->lock, flags);
2990
2991 pci_enable_msi(priv->pci_dev);
2992
2993 iwl_alloc_isr_ict(priv);
2994 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
2995 IRQF_SHARED, DRV_NAME, priv);
2996 if (err) {
2997 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
2998 goto out_disable_msi;
2999 }
3000 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3001 if (err) {
3002 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3003 goto out_free_irq;
3004 }
3005
3006 iwl_setup_deferred_work(priv);
3007 iwl_setup_rx_handlers(priv);
3008
3009 /**********************************
3010 * 8. Setup and register mac80211
3011 **********************************/
3012
3013 /* enable interrupts if needed: hw bug w/a */
3014 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3015 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3016 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3017 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3018 }
3019
3020 iwl_enable_interrupts(priv);
3021
3022 err = iwl_setup_mac(priv);
3023 if (err)
3024 goto out_remove_sysfs;
3025
3026 err = iwl_dbgfs_register(priv, DRV_NAME);
3027 if (err)
3028 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3029
3030 /* If platform's RF_KILL switch is NOT set to KILL */
3031 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3032 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3033 else
3034 set_bit(STATUS_RF_KILL_HW, &priv->status);
3035
3036 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3037 test_bit(STATUS_RF_KILL_HW, &priv->status));
3038
3039 iwl_power_initialize(priv);
3040 return 0;
3041
3042 out_remove_sysfs:
3043 destroy_workqueue(priv->workqueue);
3044 priv->workqueue = NULL;
3045 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3046 out_free_irq:
3047 free_irq(priv->pci_dev->irq, priv);
3048 iwl_free_isr_ict(priv);
3049 out_disable_msi:
3050 pci_disable_msi(priv->pci_dev);
3051 iwl_uninit_drv(priv);
3052 out_free_eeprom:
3053 iwl_eeprom_free(priv);
3054 out_iounmap:
3055 pci_iounmap(pdev, priv->hw_base);
3056 out_pci_release_regions:
3057 pci_set_drvdata(pdev, NULL);
3058 pci_release_regions(pdev);
3059 out_pci_disable_device:
3060 pci_disable_device(pdev);
3061 out_ieee80211_free_hw:
3062 ieee80211_free_hw(priv->hw);
3063 out:
3064 return err;
3065 }
3066
3067 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3068 {
3069 struct iwl_priv *priv = pci_get_drvdata(pdev);
3070 unsigned long flags;
3071
3072 if (!priv)
3073 return;
3074
3075 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3076
3077 iwl_dbgfs_unregister(priv);
3078 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3079
3080 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3081 * to be called and iwl_down since we are removing the device
3082 * we need to set STATUS_EXIT_PENDING bit.
3083 */
3084 set_bit(STATUS_EXIT_PENDING, &priv->status);
3085 if (priv->mac80211_registered) {
3086 ieee80211_unregister_hw(priv->hw);
3087 priv->mac80211_registered = 0;
3088 } else {
3089 iwl_down(priv);
3090 }
3091
3092 /* make sure we flush any pending irq or
3093 * tasklet for the driver
3094 */
3095 spin_lock_irqsave(&priv->lock, flags);
3096 iwl_disable_interrupts(priv);
3097 spin_unlock_irqrestore(&priv->lock, flags);
3098
3099 iwl_synchronize_irq(priv);
3100
3101 iwl_dealloc_ucode_pci(priv);
3102
3103 if (priv->rxq.bd)
3104 iwl_rx_queue_free(priv, &priv->rxq);
3105 iwl_hw_txq_ctx_free(priv);
3106
3107 iwl_clear_stations_table(priv);
3108 iwl_eeprom_free(priv);
3109
3110
3111 /*netif_stop_queue(dev); */
3112 flush_workqueue(priv->workqueue);
3113
3114 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3115 * priv->workqueue... so we can't take down the workqueue
3116 * until now... */
3117 destroy_workqueue(priv->workqueue);
3118 priv->workqueue = NULL;
3119
3120 free_irq(priv->pci_dev->irq, priv);
3121 pci_disable_msi(priv->pci_dev);
3122 pci_iounmap(pdev, priv->hw_base);
3123 pci_release_regions(pdev);
3124 pci_disable_device(pdev);
3125 pci_set_drvdata(pdev, NULL);
3126
3127 iwl_uninit_drv(priv);
3128
3129 iwl_free_isr_ict(priv);
3130
3131 if (priv->ibss_beacon)
3132 dev_kfree_skb(priv->ibss_beacon);
3133
3134 ieee80211_free_hw(priv->hw);
3135 }
3136
3137
3138 /*****************************************************************************
3139 *
3140 * driver and module entry point
3141 *
3142 *****************************************************************************/
3143
3144 /* Hardware specific file defines the PCI IDs table for that hardware module */
3145 static struct pci_device_id iwl_hw_card_ids[] = {
3146 #ifdef CONFIG_IWL4965
3147 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3148 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3149 #endif /* CONFIG_IWL4965 */
3150 #ifdef CONFIG_IWL5000
3151 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3152 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3153 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3154 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3155 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3156 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3157 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3158 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3159 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3160 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3161 /* 5350 WiFi/WiMax */
3162 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3163 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3164 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3165 /* 5150 Wifi/WiMax */
3166 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3167 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3168 /* 6000/6050 Series */
3169 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3170 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3171 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3172 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3173 {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000_2agn_cfg)},
3174 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3175 {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000_2agn_cfg)},
3176 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3177 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3178 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3179 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3180 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3181 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3182 /* 1000 Series WiFi */
3183 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3184 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3185 #endif /* CONFIG_IWL5000 */
3186
3187 {0}
3188 };
3189 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3190
3191 static struct pci_driver iwl_driver = {
3192 .name = DRV_NAME,
3193 .id_table = iwl_hw_card_ids,
3194 .probe = iwl_pci_probe,
3195 .remove = __devexit_p(iwl_pci_remove),
3196 #ifdef CONFIG_PM
3197 .suspend = iwl_pci_suspend,
3198 .resume = iwl_pci_resume,
3199 #endif
3200 };
3201
3202 static int __init iwl_init(void)
3203 {
3204
3205 int ret;
3206 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3207 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3208
3209 ret = iwlagn_rate_control_register();
3210 if (ret) {
3211 printk(KERN_ERR DRV_NAME
3212 "Unable to register rate control algorithm: %d\n", ret);
3213 return ret;
3214 }
3215
3216 ret = pci_register_driver(&iwl_driver);
3217 if (ret) {
3218 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3219 goto error_register;
3220 }
3221
3222 return ret;
3223
3224 error_register:
3225 iwlagn_rate_control_unregister();
3226 return ret;
3227 }
3228
3229 static void __exit iwl_exit(void)
3230 {
3231 pci_unregister_driver(&iwl_driver);
3232 iwlagn_rate_control_unregister();
3233 }
3234
3235 module_exit(iwl_exit);
3236 module_init(iwl_init);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree