binfmt_elf: fix PT_INTERP bss handling
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / watchdog / iTCO_vendor_support.c
blobca344a85eb9591e450d2aad02a0bcc9736e05e83
1 /*
2 * intel TCO vendor specific watchdog driver support
4 * (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
17 * Includes, defines, variables, module parameters, ...
20 /* Module and version information */
21 #define DRV_NAME "iTCO_vendor_support"
22 #define DRV_VERSION "1.01"
23 #define DRV_RELDATE "11-Nov-2006"
24 #define PFX DRV_NAME ": "
26 /* Includes */
27 #include <linux/module.h> /* For module specific items */
28 #include <linux/moduleparam.h> /* For new moduleparam's */
29 #include <linux/types.h> /* For standard types (like size_t) */
30 #include <linux/errno.h> /* For the -ENODEV/... values */
31 #include <linux/kernel.h> /* For printk/panic/... */
32 #include <linux/init.h> /* For __init/__exit/... */
33 #include <linux/ioport.h> /* For io-port access */
34 #include <linux/io.h> /* For inb/outb/... */
36 #include "iTCO_vendor.h"
38 /* iTCO defines */
39 #define SMI_EN acpibase + 0x30 /* SMI Control and Enable Register */
40 #define TCOBASE acpibase + 0x60 /* TCO base address */
41 #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */
43 /* List of vendor support modes */
44 /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
45 #define SUPERMICRO_OLD_BOARD 1
46 /* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
47 #define SUPERMICRO_NEW_BOARD 2
49 static int vendorsupport;
50 module_param(vendorsupport, int, 0);
51 MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");
54 * Vendor Specific Support
58 * Vendor Support: 1
59 * Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE
60 * iTCO chipset: ICH2
62 * Code contributed by: R. Seretny <lkpatches@paypc.com>
63 * Documentation obtained by R. Seretny from SuperMicro Technical Support
65 * To enable Watchdog function:
66 * BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes
67 * This setting enables SMI to clear the watchdog expired flag.
68 * If BIOS or CPU fail which may cause SMI hang, then system will
69 * reboot. When application starts to use watchdog function,
70 * application has to take over the control from SMI.
72 * For P3TSSE, J36 jumper needs to be removed to enable the Watchdog
73 * function.
75 * Note: The system will reboot when Expire Flag is set TWICE.
76 * So, if the watchdog timer is 20 seconds, then the maximum hang
77 * time is about 40 seconds, and the minimum hang time is about
78 * 20.6 seconds.
81 static void supermicro_old_pre_start(unsigned long acpibase)
83 unsigned long val32;
85 val32 = inl(SMI_EN);
86 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
87 outl(val32, SMI_EN); /* Needed to activate watchdog */
90 static void supermicro_old_pre_stop(unsigned long acpibase)
92 unsigned long val32;
94 val32 = inl(SMI_EN);
95 val32 &= 0x00002000; /* Turn on SMI clearing watchdog */
96 outl(val32, SMI_EN); /* Needed to deactivate watchdog */
99 static void supermicro_old_pre_keepalive(unsigned long acpibase)
101 /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
102 /* Clear "Expire Flag" (Bit 3 of TC01_STS register) */
103 outb(0x08, TCO1_STS);
107 * Vendor Support: 2
108 * Board: Super Micro Computer Inc. P4SBx, P4DPx
109 * iTCO chipset: ICH4
111 * Code contributed by: R. Seretny <lkpatches@paypc.com>
112 * Documentation obtained by R. Seretny from SuperMicro Technical Support
114 * To enable Watchdog function:
115 * 1. BIOS
116 * For P4SBx:
117 * BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature
118 * For P4DPx:
119 * BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog
120 * This setting enables or disables Watchdog function. When enabled, the
121 * default watchdog timer is set to be 5 minutes (about 4m35s). It is
122 * enough to load and run the OS. The application (service or driver) has
123 * to take over the control once OS is running up and before watchdog
124 * expires.
126 * 2. JUMPER
127 * For P4SBx: JP39
128 * For P4DPx: JP37
129 * This jumper is used for safety. Closed is enabled. This jumper
130 * prevents user enables watchdog in BIOS by accident.
132 * To enable Watch Dog function, both BIOS and JUMPER must be enabled.
134 * The documentation lists motherboards P4SBx and P4DPx series as of
135 * 20-March-2002. However, this code works flawlessly with much newer
136 * motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82).
138 * The original iTCO driver as written does not actually reset the
139 * watchdog timer on these machines, as a result they reboot after five
140 * minutes.
142 * NOTE: You may leave the Watchdog function disabled in the SuperMicro
143 * BIOS to avoid a "boot-race"... This driver will enable watchdog
144 * functionality even if it's disabled in the BIOS once the /dev/watchdog
145 * file is opened.
148 /* I/O Port's */
149 #define SM_REGINDEX 0x2e /* SuperMicro ICH4+ Register Index */
150 #define SM_DATAIO 0x2f /* SuperMicro ICH4+ Register Data I/O */
152 /* Control Register's */
153 #define SM_CTLPAGESW 0x07 /* SuperMicro ICH4+ Control Page Switch */
154 #define SM_CTLPAGE 0x08 /* SuperMicro ICH4+ Control Page Num */
156 #define SM_WATCHENABLE 0x30 /* Watchdog enable: Bit 0: 0=off, 1=on */
158 #define SM_WATCHPAGE 0x87 /* Watchdog unlock control page */
160 #define SM_ENDWATCH 0xAA /* Watchdog lock control page */
162 #define SM_COUNTMODE 0xf5 /* Watchdog count mode select */
163 /* (Bit 3: 0 = seconds, 1 = minutes */
165 #define SM_WATCHTIMER 0xf6 /* 8-bits, Watchdog timer counter (RW) */
167 #define SM_RESETCONTROL 0xf7 /* Watchdog reset control */
168 /* Bit 6: timer is reset by kbd interrupt */
169 /* Bit 7: timer is reset by mouse interrupt */
171 static void supermicro_new_unlock_watchdog(void)
173 /* Write 0x87 to port 0x2e twice */
174 outb(SM_WATCHPAGE, SM_REGINDEX);
175 outb(SM_WATCHPAGE, SM_REGINDEX);
176 /* Switch to watchdog control page */
177 outb(SM_CTLPAGESW, SM_REGINDEX);
178 outb(SM_CTLPAGE, SM_DATAIO);
181 static void supermicro_new_lock_watchdog(void)
183 outb(SM_ENDWATCH, SM_REGINDEX);
186 static void supermicro_new_pre_start(unsigned int heartbeat)
188 unsigned int val;
190 supermicro_new_unlock_watchdog();
192 /* Watchdog timer setting needs to be in seconds*/
193 outb(SM_COUNTMODE, SM_REGINDEX);
194 val = inb(SM_DATAIO);
195 val &= 0xF7;
196 outb(val, SM_DATAIO);
198 /* Write heartbeat interval to WDOG */
199 outb(SM_WATCHTIMER, SM_REGINDEX);
200 outb((heartbeat & 255), SM_DATAIO);
202 /* Make sure keyboard/mouse interrupts don't interfere */
203 outb(SM_RESETCONTROL, SM_REGINDEX);
204 val = inb(SM_DATAIO);
205 val &= 0x3f;
206 outb(val, SM_DATAIO);
208 /* enable watchdog by setting bit 0 of Watchdog Enable to 1 */
209 outb(SM_WATCHENABLE, SM_REGINDEX);
210 val = inb(SM_DATAIO);
211 val |= 0x01;
212 outb(val, SM_DATAIO);
214 supermicro_new_lock_watchdog();
217 static void supermicro_new_pre_stop(void)
219 unsigned int val;
221 supermicro_new_unlock_watchdog();
223 /* disable watchdog by setting bit 0 of Watchdog Enable to 0 */
224 outb(SM_WATCHENABLE, SM_REGINDEX);
225 val = inb(SM_DATAIO);
226 val &= 0xFE;
227 outb(val, SM_DATAIO);
229 supermicro_new_lock_watchdog();
232 static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
234 supermicro_new_unlock_watchdog();
236 /* reset watchdog timeout to heartveat value */
237 outb(SM_WATCHTIMER, SM_REGINDEX);
238 outb((heartbeat & 255), SM_DATAIO);
240 supermicro_new_lock_watchdog();
244 * Generic Support Functions
247 void iTCO_vendor_pre_start(unsigned long acpibase,
248 unsigned int heartbeat)
250 if (vendorsupport == SUPERMICRO_OLD_BOARD)
251 supermicro_old_pre_start(acpibase);
252 else if (vendorsupport == SUPERMICRO_NEW_BOARD)
253 supermicro_new_pre_start(heartbeat);
255 EXPORT_SYMBOL(iTCO_vendor_pre_start);
257 void iTCO_vendor_pre_stop(unsigned long acpibase)
259 if (vendorsupport == SUPERMICRO_OLD_BOARD)
260 supermicro_old_pre_stop(acpibase);
261 else if (vendorsupport == SUPERMICRO_NEW_BOARD)
262 supermicro_new_pre_stop();
264 EXPORT_SYMBOL(iTCO_vendor_pre_stop);
266 void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat)
268 if (vendorsupport == SUPERMICRO_OLD_BOARD)
269 supermicro_old_pre_keepalive(acpibase);
270 else if (vendorsupport == SUPERMICRO_NEW_BOARD)
271 supermicro_new_pre_set_heartbeat(heartbeat);
273 EXPORT_SYMBOL(iTCO_vendor_pre_keepalive);
275 void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat)
277 if (vendorsupport == SUPERMICRO_NEW_BOARD)
278 supermicro_new_pre_set_heartbeat(heartbeat);
280 EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);
282 int iTCO_vendor_check_noreboot_on(void)
284 switch (vendorsupport) {
285 case SUPERMICRO_OLD_BOARD:
286 return 0;
287 default:
288 return 1;
291 EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);
293 static int __init iTCO_vendor_init_module(void)
295 printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
296 return 0;
299 static void __exit iTCO_vendor_exit_module(void)
301 printk(KERN_INFO PFX "Module Unloaded\n");
304 module_init(iTCO_vendor_init_module);
305 module_exit(iTCO_vendor_exit_module);
307 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, R. Seretny <lkpatches@paypc.com>");
308 MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support");
309 MODULE_VERSION(DRV_VERSION);
310 MODULE_LICENSE("GPL");