arch/sh/boards/mach-migor/setup.c

   1 /*
   2  * Renesas System Solutions Asia Pte. Ltd - Migo-R
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10 #include <linux/init.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/input.h>
  14 #include <linux/input/sh_keysc.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/mmc/sh_mobile_sdhi.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/i2c.h>
  20 #include <linux/smc91x.h>
  21 #include <linux/delay.h>
  22 #include <linux/clk.h>
  23 #include <linux/gpio.h>
  24 #include <linux/videodev2.h>
  25 #include <video/sh_mobile_lcdc.h>
  26 #include <media/sh_mobile_ceu.h>
  27 #include <media/ov772x.h>
  28 #include <media/soc_camera.h>
  29 #include <media/tw9910.h>
  30 #include <asm/clock.h>
  31 #include <asm/machvec.h>
  32 #include <asm/io.h>
  33 #include <asm/suspend.h>
  34 #include <mach/migor.h>
  35 #include <cpu/sh7722.h>
  36
  37 /* Address     IRQ  Size  Bus  Description
  38  * 0x00000000       64MB  16   NOR Flash (SP29PL256N)
  39  * 0x0c000000       64MB  64   SDRAM (2xK4M563233G)
  40  * 0x10000000  IRQ0       16   Ethernet (SMC91C111)
  41  * 0x14000000  IRQ4       16   USB 2.0 Host Controller (M66596)
  42  * 0x18000000       8GB    8   NAND Flash (K9K8G08U0A)
  43  */
  44
  45 static struct smc91x_platdata smc91x_info = {
  46         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  47 };
  48
  49 static struct resource smc91x_eth_resources[] = {
  50         [0] = {
  51                 .name   = "SMC91C111" ,
  52                 .start  = 0x10000300,
  53                 .end    = 0x1000030f,
  54                 .flags  = IORESOURCE_MEM,
  55         },
  56         [1] = {
  57                 .start  = 32, /* IRQ0 */
  58                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  59         },
  60 };
  61
  62 static struct platform_device smc91x_eth_device = {
  63         .name           = "smc91x",
  64         .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
  65         .resource       = smc91x_eth_resources,
  66         .dev    = {
  67                 .platform_data  = &smc91x_info,
  68         },
  69 };
  70
  71 static struct sh_keysc_info sh_keysc_info = {
  72         .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
  73         .scan_timing = 3,
  74         .delay = 5,
  75         .keycodes = {
  76                 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
  77                 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
  78                 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
  79                 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
  80                 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
  81         },
  82 };
  83
  84 static struct resource sh_keysc_resources[] = {
  85         [0] = {
  86                 .start  = 0x044b0000,
  87                 .end    = 0x044b000f,
  88                 .flags  = IORESOURCE_MEM,
  89         },
  90         [1] = {
  91                 .start  = 79,
  92                 .flags  = IORESOURCE_IRQ,
  93         },
  94 };
  95
  96 static struct platform_device sh_keysc_device = {
  97         .name           = "sh_keysc",
  98         .id             = 0, /* "keysc0" clock */
  99         .num_resources  = ARRAY_SIZE(sh_keysc_resources),
 100         .resource       = sh_keysc_resources,
 101         .dev    = {
 102                 .platform_data  = &sh_keysc_info,
 103         },
 104 };
 105
 106 static struct mtd_partition migor_nor_flash_partitions[] =
 107 {
 108         {
 109                 .name = "uboot",
 110                 .offset = 0,
 111                 .size = (1 * 1024 * 1024),
 112                 .mask_flags = MTD_WRITEABLE,    /* Read-only */
 113         },
 114         {
 115                 .name = "rootfs",
 116                 .offset = MTDPART_OFS_APPEND,
 117                 .size = (15 * 1024 * 1024),
 118         },
 119         {
 120                 .name = "other",
 121                 .offset = MTDPART_OFS_APPEND,
 122                 .size = MTDPART_SIZ_FULL,
 123         },
 124 };
 125
 126 static struct physmap_flash_data migor_nor_flash_data = {
 127         .width          = 2,
 128         .parts          = migor_nor_flash_partitions,
 129         .nr_parts       = ARRAY_SIZE(migor_nor_flash_partitions),
 130 };
 131
 132 static struct resource migor_nor_flash_resources[] = {
 133         [0] = {
 134                 .name           = "NOR Flash",
 135                 .start          = 0x00000000,
 136                 .end            = 0x03ffffff,
 137                 .flags          = IORESOURCE_MEM,
 138         }
 139 };
 140
 141 static struct platform_device migor_nor_flash_device = {
 142         .name           = "physmap-flash",
 143         .resource       = migor_nor_flash_resources,
 144         .num_resources  = ARRAY_SIZE(migor_nor_flash_resources),
 145         .dev            = {
 146                 .platform_data = &migor_nor_flash_data,
 147         },
 148 };
 149
 150 static struct mtd_partition migor_nand_flash_partitions[] = {
 151         {
 152                 .name           = "nanddata1",
 153                 .offset         = 0x0,
 154                 .size           = 512 * 1024 * 1024,
 155         },
 156         {
 157                 .name           = "nanddata2",
 158                 .offset         = MTDPART_OFS_APPEND,
 159                 .size           = 512 * 1024 * 1024,
 160         },
 161 };
 162
 163 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
 164                                      unsigned int ctrl)
 165 {
 166         struct nand_chip *chip = mtd->priv;
 167
 168         if (cmd == NAND_CMD_NONE)
 169                 return;
 170
 171         if (ctrl & NAND_CLE)
 172                 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
 173         else if (ctrl & NAND_ALE)
 174                 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
 175         else
 176                 writeb(cmd, chip->IO_ADDR_W);
 177 }
 178
 179 static int migor_nand_flash_ready(struct mtd_info *mtd)
 180 {
 181         return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
 182 }
 183
 184 static struct platform_nand_data migor_nand_flash_data = {
 185         .chip = {
 186                 .nr_chips = 1,
 187                 .partitions = migor_nand_flash_partitions,
 188                 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
 189                 .chip_delay = 20,
 190                 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
 191         },
 192         .ctrl = {
 193                 .dev_ready = migor_nand_flash_ready,
 194                 .cmd_ctrl = migor_nand_flash_cmd_ctl,
 195         },
 196 };
 197
 198 static struct resource migor_nand_flash_resources[] = {
 199         [0] = {
 200                 .name           = "NAND Flash",
 201                 .start          = 0x18000000,
 202                 .end            = 0x18ffffff,
 203                 .flags          = IORESOURCE_MEM,
 204         },
 205 };
 206
 207 static struct platform_device migor_nand_flash_device = {
 208         .name           = "gen_nand",
 209         .resource       = migor_nand_flash_resources,
 210         .num_resources  = ARRAY_SIZE(migor_nand_flash_resources),
 211         .dev            = {
 212                 .platform_data = &migor_nand_flash_data,
 213         }
 214 };
 215
 216 static const struct fb_videomode migor_lcd_modes[] = {
 217         {
 218 #if defined(CONFIG_SH_MIGOR_RTA_WVGA)
 219                 .name = "LB070WV1",
 220                 .xres = 800,
 221                 .yres = 480,
 222                 .left_margin = 64,
 223                 .right_margin = 16,
 224                 .hsync_len = 120,
 225                 .sync = 0,
 226 #elif defined(CONFIG_SH_MIGOR_QVGA)
 227                 .name = "PH240320T",
 228                 .xres = 320,
 229                 .yres = 240,
 230                 .left_margin = 0,
 231                 .right_margin = 16,
 232                 .hsync_len = 8,
 233                 .sync = FB_SYNC_HOR_HIGH_ACT,
 234 #endif
 235                 .upper_margin = 1,
 236                 .lower_margin = 17,
 237                 .vsync_len = 2,
 238         },
 239 };
 240
 241 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
 242 #if defined(CONFIG_SH_MIGOR_RTA_WVGA)
 243         .clock_source = LCDC_CLK_BUS,
 244         .ch[0] = {
 245                 .chan = LCDC_CHAN_MAINLCD,
 246                 .fourcc = V4L2_PIX_FMT_RGB565,
 247                 .interface_type = RGB16,
 248                 .clock_divider = 2,
 249                 .lcd_cfg = migor_lcd_modes,
 250                 .num_cfg = ARRAY_SIZE(migor_lcd_modes),
 251                 .lcd_size_cfg = { /* 7.0 inch */
 252                         .width = 152,
 253                         .height = 91,
 254                 },
 255         }
 256 #elif defined(CONFIG_SH_MIGOR_QVGA)
 257         .clock_source = LCDC_CLK_PERIPHERAL,
 258         .ch[0] = {
 259                 .chan = LCDC_CHAN_MAINLCD,
 260                 .fourcc = V4L2_PIX_FMT_RGB565,
 261                 .interface_type = SYS16A,
 262                 .clock_divider = 10,
 263                 .lcd_cfg = migor_lcd_modes,
 264                 .num_cfg = ARRAY_SIZE(migor_lcd_modes),
 265                 .lcd_size_cfg = { /* 2.4 inch */
 266                         .width = 49,
 267                         .height = 37,
 268                 },
 269                 .board_cfg = {
 270                         .setup_sys = migor_lcd_qvga_setup,
 271                 },
 272                 .sys_bus_cfg = {
 273                         .ldmt2r = 0x06000a09,
 274                         .ldmt3r = 0x180e3418,
 275                         /* set 1s delay to encourage fsync() */
 276                         .deferred_io_msec = 1000,
 277                 },
 278         }
 279 #endif
 280 };
 281
 282 static struct resource migor_lcdc_resources[] = {
 283         [0] = {
 284                 .name   = "LCDC",
 285                 .start  = 0xfe940000, /* P4-only space */
 286                 .end    = 0xfe942fff,
 287                 .flags  = IORESOURCE_MEM,
 288         },
 289         [1] = {
 290                 .start  = 28,
 291                 .flags  = IORESOURCE_IRQ,
 292         },
 293 };
 294
 295 static struct platform_device migor_lcdc_device = {
 296         .name           = "sh_mobile_lcdc_fb",
 297         .num_resources  = ARRAY_SIZE(migor_lcdc_resources),
 298         .resource       = migor_lcdc_resources,
 299         .dev    = {
 300                 .platform_data  = &sh_mobile_lcdc_info,
 301         },
 302 };
 303
 304 static struct clk *camera_clk;
 305 static DEFINE_MUTEX(camera_lock);
 306
 307 static void camera_power_on(int is_tw)
 308 {
 309         mutex_lock(&camera_lock);
 310
 311         /* Use 10 MHz VIO_CKO instead of 24 MHz to work
 312          * around signal quality issues on Panel Board V2.1.
 313          */
 314         camera_clk = clk_get(NULL, "video_clk");
 315         clk_set_rate(camera_clk, 10000000);
 316         clk_enable(camera_clk); /* start VIO_CKO */
 317
 318         /* use VIO_RST to take camera out of reset */
 319         mdelay(10);
 320         if (is_tw) {
 321                 gpio_set_value(GPIO_PTT2, 0);
 322                 gpio_set_value(GPIO_PTT0, 0);
 323         } else {
 324                 gpio_set_value(GPIO_PTT0, 1);
 325         }
 326         gpio_set_value(GPIO_PTT3, 0);
 327         mdelay(10);
 328         gpio_set_value(GPIO_PTT3, 1);
 329         mdelay(10); /* wait to let chip come out of reset */
 330 }
 331
 332 static void camera_power_off(void)
 333 {
 334         clk_disable(camera_clk); /* stop VIO_CKO */
 335         clk_put(camera_clk);
 336
 337         gpio_set_value(GPIO_PTT3, 0);
 338         mutex_unlock(&camera_lock);
 339 }
 340
 341 static int ov7725_power(struct device *dev, int mode)
 342 {
 343         if (mode)
 344                 camera_power_on(0);
 345         else
 346                 camera_power_off();
 347
 348         return 0;
 349 }
 350
 351 static int tw9910_power(struct device *dev, int mode)
 352 {
 353         if (mode)
 354                 camera_power_on(1);
 355         else
 356                 camera_power_off();
 357
 358         return 0;
 359 }
 360
 361 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
 362         .flags = SH_CEU_FLAG_USE_8BIT_BUS,
 363 };
 364
 365 static struct resource migor_ceu_resources[] = {
 366         [0] = {
 367                 .name   = "CEU",
 368                 .start  = 0xfe910000,
 369                 .end    = 0xfe91009f,
 370                 .flags  = IORESOURCE_MEM,
 371         },
 372         [1] = {
 373                 .start  = 52,
 374                 .flags  = IORESOURCE_IRQ,
 375         },
 376         [2] = {
 377                 /* place holder for contiguous memory */
 378         },
 379 };
 380
 381 static struct platform_device migor_ceu_device = {
 382         .name           = "sh_mobile_ceu",
 383         .id             = 0, /* "ceu0" clock */
 384         .num_resources  = ARRAY_SIZE(migor_ceu_resources),
 385         .resource       = migor_ceu_resources,
 386         .dev    = {
 387                 .platform_data  = &sh_mobile_ceu_info,
 388         },
 389 };
 390
 391 static struct resource sdhi_cn9_resources[] = {
 392         [0] = {
 393                 .name   = "SDHI",
 394                 .start  = 0x04ce0000,
 395                 .end    = 0x04ce00ff,
 396                 .flags  = IORESOURCE_MEM,
 397         },
 398         [1] = {
 399                 .start  = 100,
 400                 .flags  = IORESOURCE_IRQ,
 401         },
 402 };
 403
 404 static struct sh_mobile_sdhi_info sh7724_sdhi_data = {
 405         .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
 406         .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
 407         .tmio_caps      = MMC_CAP_SDIO_IRQ,
 408 };
 409
 410 static struct platform_device sdhi_cn9_device = {
 411         .name           = "sh_mobile_sdhi",
 412         .num_resources  = ARRAY_SIZE(sdhi_cn9_resources),
 413         .resource       = sdhi_cn9_resources,
 414         .dev = {
 415                 .platform_data  = &sh7724_sdhi_data,
 416         },
 417 };
 418
 419 static struct i2c_board_info migor_i2c_devices[] = {
 420         {
 421                 I2C_BOARD_INFO("rs5c372b", 0x32),
 422         },
 423         {
 424                 I2C_BOARD_INFO("migor_ts", 0x51),
 425                 .irq = 38, /* IRQ6 */
 426         },
 427         {
 428                 I2C_BOARD_INFO("wm8978", 0x1a),
 429         },
 430 };
 431
 432 static struct i2c_board_info migor_i2c_camera[] = {
 433         {
 434                 I2C_BOARD_INFO("ov772x", 0x21),
 435         },
 436         {
 437                 I2C_BOARD_INFO("tw9910", 0x45),
 438         },
 439 };
 440
 441 static struct ov772x_camera_info ov7725_info;
 442
 443 static struct soc_camera_link ov7725_link = {
 444         .power          = ov7725_power,
 445         .board_info     = &migor_i2c_camera[0],
 446         .i2c_adapter_id = 0,
 447         .priv           = &ov7725_info,
 448 };
 449
 450 static struct tw9910_video_info tw9910_info = {
 451         .buswidth       = SOCAM_DATAWIDTH_8,
 452         .mpout          = TW9910_MPO_FIELD,
 453 };
 454
 455 static struct soc_camera_link tw9910_link = {
 456         .power          = tw9910_power,
 457         .board_info     = &migor_i2c_camera[1],
 458         .i2c_adapter_id = 0,
 459         .priv           = &tw9910_info,
 460 };
 461
 462 static struct platform_device migor_camera[] = {
 463         {
 464                 .name   = "soc-camera-pdrv",
 465                 .id     = 0,
 466                 .dev    = {
 467                         .platform_data = &ov7725_link,
 468                 },
 469         }, {
 470                 .name   = "soc-camera-pdrv",
 471                 .id     = 1,
 472                 .dev    = {
 473                         .platform_data = &tw9910_link,
 474                 },
 475         },
 476 };
 477
 478 static struct platform_device *migor_devices[] __initdata = {
 479         &smc91x_eth_device,
 480         &sh_keysc_device,
 481         &migor_lcdc_device,
 482         &migor_ceu_device,
 483         &migor_nor_flash_device,
 484         &migor_nand_flash_device,
 485         &sdhi_cn9_device,
 486         &migor_camera[0],
 487         &migor_camera[1],
 488 };
 489
 490 extern char migor_sdram_enter_start;
 491 extern char migor_sdram_enter_end;
 492 extern char migor_sdram_leave_start;
 493 extern char migor_sdram_leave_end;
 494
 495 static int __init migor_devices_setup(void)
 496 {
 497         /* register board specific self-refresh code */
 498         sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
 499                                         &migor_sdram_enter_start,
 500                                         &migor_sdram_enter_end,
 501                                         &migor_sdram_leave_start,
 502                                         &migor_sdram_leave_end);
 503         /* Let D11 LED show STATUS0 */
 504         gpio_request(GPIO_FN_STATUS0, NULL);
 505
 506         /* Lit D12 LED show PDSTATUS */
 507         gpio_request(GPIO_FN_PDSTATUS, NULL);
 508
 509         /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
 510         gpio_request(GPIO_FN_IRQ0, NULL);
 511         __raw_writel(0x00003400, BSC_CS4BCR);
 512         __raw_writel(0x00110080, BSC_CS4WCR);
 513
 514         /* KEYSC */
 515         gpio_request(GPIO_FN_KEYOUT0, NULL);
 516         gpio_request(GPIO_FN_KEYOUT1, NULL);
 517         gpio_request(GPIO_FN_KEYOUT2, NULL);
 518         gpio_request(GPIO_FN_KEYOUT3, NULL);
 519         gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
 520         gpio_request(GPIO_FN_KEYIN1, NULL);
 521         gpio_request(GPIO_FN_KEYIN2, NULL);
 522         gpio_request(GPIO_FN_KEYIN3, NULL);
 523         gpio_request(GPIO_FN_KEYIN4, NULL);
 524         gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
 525
 526         /* NAND Flash */
 527         gpio_request(GPIO_FN_CS6A_CE2B, NULL);
 528         __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
 529         gpio_request(GPIO_PTA1, NULL);
 530         gpio_direction_input(GPIO_PTA1);
 531
 532         /* SDHI */
 533         gpio_request(GPIO_FN_SDHICD, NULL);
 534         gpio_request(GPIO_FN_SDHIWP, NULL);
 535         gpio_request(GPIO_FN_SDHID3, NULL);
 536         gpio_request(GPIO_FN_SDHID2, NULL);
 537         gpio_request(GPIO_FN_SDHID1, NULL);
 538         gpio_request(GPIO_FN_SDHID0, NULL);
 539         gpio_request(GPIO_FN_SDHICMD, NULL);
 540         gpio_request(GPIO_FN_SDHICLK, NULL);
 541
 542         /* Touch Panel */
 543         gpio_request(GPIO_FN_IRQ6, NULL);
 544
 545         /* LCD Panel */
 546 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
 547         gpio_request(GPIO_FN_LCDD17, NULL);
 548         gpio_request(GPIO_FN_LCDD16, NULL);
 549         gpio_request(GPIO_FN_LCDD15, NULL);
 550         gpio_request(GPIO_FN_LCDD14, NULL);
 551         gpio_request(GPIO_FN_LCDD13, NULL);
 552         gpio_request(GPIO_FN_LCDD12, NULL);
 553         gpio_request(GPIO_FN_LCDD11, NULL);
 554         gpio_request(GPIO_FN_LCDD10, NULL);
 555         gpio_request(GPIO_FN_LCDD8, NULL);
 556         gpio_request(GPIO_FN_LCDD7, NULL);
 557         gpio_request(GPIO_FN_LCDD6, NULL);
 558         gpio_request(GPIO_FN_LCDD5, NULL);
 559         gpio_request(GPIO_FN_LCDD4, NULL);
 560         gpio_request(GPIO_FN_LCDD3, NULL);
 561         gpio_request(GPIO_FN_LCDD2, NULL);
 562         gpio_request(GPIO_FN_LCDD1, NULL);
 563         gpio_request(GPIO_FN_LCDRS, NULL);
 564         gpio_request(GPIO_FN_LCDCS, NULL);
 565         gpio_request(GPIO_FN_LCDRD, NULL);
 566         gpio_request(GPIO_FN_LCDWR, NULL);
 567         gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
 568         gpio_direction_output(GPIO_PTH2, 1);
 569 #endif
 570 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
 571         gpio_request(GPIO_FN_LCDD15, NULL);
 572         gpio_request(GPIO_FN_LCDD14, NULL);
 573         gpio_request(GPIO_FN_LCDD13, NULL);
 574         gpio_request(GPIO_FN_LCDD12, NULL);
 575         gpio_request(GPIO_FN_LCDD11, NULL);
 576         gpio_request(GPIO_FN_LCDD10, NULL);
 577         gpio_request(GPIO_FN_LCDD9, NULL);
 578         gpio_request(GPIO_FN_LCDD8, NULL);
 579         gpio_request(GPIO_FN_LCDD7, NULL);
 580         gpio_request(GPIO_FN_LCDD6, NULL);
 581         gpio_request(GPIO_FN_LCDD5, NULL);
 582         gpio_request(GPIO_FN_LCDD4, NULL);
 583         gpio_request(GPIO_FN_LCDD3, NULL);
 584         gpio_request(GPIO_FN_LCDD2, NULL);
 585         gpio_request(GPIO_FN_LCDD1, NULL);
 586         gpio_request(GPIO_FN_LCDD0, NULL);
 587         gpio_request(GPIO_FN_LCDLCLK, NULL);
 588         gpio_request(GPIO_FN_LCDDCK, NULL);
 589         gpio_request(GPIO_FN_LCDVEPWC, NULL);
 590         gpio_request(GPIO_FN_LCDVCPWC, NULL);
 591         gpio_request(GPIO_FN_LCDVSYN, NULL);
 592         gpio_request(GPIO_FN_LCDHSYN, NULL);
 593         gpio_request(GPIO_FN_LCDDISP, NULL);
 594         gpio_request(GPIO_FN_LCDDON, NULL);
 595 #endif
 596
 597         /* CEU */
 598         gpio_request(GPIO_FN_VIO_CLK2, NULL);
 599         gpio_request(GPIO_FN_VIO_VD2, NULL);
 600         gpio_request(GPIO_FN_VIO_HD2, NULL);
 601         gpio_request(GPIO_FN_VIO_FLD, NULL);
 602         gpio_request(GPIO_FN_VIO_CKO, NULL);
 603         gpio_request(GPIO_FN_VIO_D15, NULL);
 604         gpio_request(GPIO_FN_VIO_D14, NULL);
 605         gpio_request(GPIO_FN_VIO_D13, NULL);
 606         gpio_request(GPIO_FN_VIO_D12, NULL);
 607         gpio_request(GPIO_FN_VIO_D11, NULL);
 608         gpio_request(GPIO_FN_VIO_D10, NULL);
 609         gpio_request(GPIO_FN_VIO_D9, NULL);
 610         gpio_request(GPIO_FN_VIO_D8, NULL);
 611
 612         gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
 613         gpio_direction_output(GPIO_PTT3, 0);
 614         gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
 615         gpio_direction_output(GPIO_PTT2, 1);
 616         gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
 617 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
 618         gpio_direction_output(GPIO_PTT0, 0);
 619 #else
 620         gpio_direction_output(GPIO_PTT0, 1);
 621 #endif
 622         __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
 623
 624         platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
 625
 626         /* SIU: Port B */
 627         gpio_request(GPIO_FN_SIUBOLR, NULL);
 628         gpio_request(GPIO_FN_SIUBOBT, NULL);
 629         gpio_request(GPIO_FN_SIUBISLD, NULL);
 630         gpio_request(GPIO_FN_SIUBOSLD, NULL);
 631         gpio_request(GPIO_FN_SIUMCKB, NULL);
 632
 633         /*
 634          * The original driver sets SIUB OLR/OBT, ILR/IBT, and SIUA OLR/OBT to
 635          * output. Need only SIUB, set to output for master mode (table 34.2)
 636          */
 637         __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA);
 638
 639         i2c_register_board_info(0, migor_i2c_devices,
 640                                 ARRAY_SIZE(migor_i2c_devices));
 641
 642         return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
 643 }
 644 arch_initcall(migor_devices_setup);
 645
 646 /* Return the board specific boot mode pin configuration */
 647 static int migor_mode_pins(void)
 648 {
 649         /* MD0=1, MD1=1, MD2=0: Clock Mode 3
 650          * MD3=0: 16-bit Area0 Bus Width
 651          * MD5=1: Little Endian
 652          * TSTMD=1, MD8=0: Test Mode Disabled
 653          */
 654         return MODE_PIN0 | MODE_PIN1 | MODE_PIN5;
 655 }
 656
 657 /*
 658  * The Machine Vector
 659  */
 660 static struct sh_machine_vector mv_migor __initmv = {
 661         .mv_name                = "Migo-R",
 662         .mv_mode_pins           = migor_mode_pins,
 663 };