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x86: Use printk_once()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kvm / x86.c
blob0572c90f0c84b6243925f89fd993a23add970f39
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
61 */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "irq_exits", VCPU_STAT(irq_exits) },
95 { "host_state_reload", VCPU_STAT(host_state_reload) },
96 { "efer_reload", VCPU_STAT(efer_reload) },
97 { "fpu_reload", VCPU_STAT(fpu_reload) },
98 { "insn_emulation", VCPU_STAT(insn_emulation) },
99 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
100 { "irq_injections", VCPU_STAT(irq_injections) },
101 { "nmi_injections", VCPU_STAT(nmi_injections) },
102 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
103 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
104 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
105 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
106 { "mmu_flooded", VM_STAT(mmu_flooded) },
107 { "mmu_recycled", VM_STAT(mmu_recycled) },
108 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
109 { "mmu_unsync", VM_STAT(mmu_unsync) },
110 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
111 { "largepages", VM_STAT(lpages) },
112 { NULL }
113 };
114
115 unsigned long segment_base(u16 selector)
116 {
117 struct descriptor_table gdt;
118 struct desc_struct *d;
119 unsigned long table_base;
120 unsigned long v;
121
122 if (selector == 0)
123 return 0;
124
125 asm("sgdt %0" : "=m"(gdt));
126 table_base = gdt.base;
127
128 if (selector & 4) { /* from ldt */
129 u16 ldt_selector;
130
131 asm("sldt %0" : "=g"(ldt_selector));
132 table_base = segment_base(ldt_selector);
133 }
134 d = (struct desc_struct *)(table_base + (selector & ~7));
135 v = d->base0 | ((unsigned long)d->base1 << 16) |
136 ((unsigned long)d->base2 << 24);
137 #ifdef CONFIG_X86_64
138 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
139 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
140 #endif
141 return v;
142 }
143 EXPORT_SYMBOL_GPL(segment_base);
144
145 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
146 {
147 if (irqchip_in_kernel(vcpu->kvm))
148 return vcpu->arch.apic_base;
149 else
150 return vcpu->arch.apic_base;
151 }
152 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
153
154 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
155 {
156 /* TODO: reserve bits check */
157 if (irqchip_in_kernel(vcpu->kvm))
158 kvm_lapic_set_base(vcpu, data);
159 else
160 vcpu->arch.apic_base = data;
161 }
162 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
163
164 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
165 {
166 WARN_ON(vcpu->arch.exception.pending);
167 vcpu->arch.exception.pending = true;
168 vcpu->arch.exception.has_error_code = false;
169 vcpu->arch.exception.nr = nr;
170 }
171 EXPORT_SYMBOL_GPL(kvm_queue_exception);
172
173 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
174 u32 error_code)
175 {
176 ++vcpu->stat.pf_guest;
177
178 if (vcpu->arch.exception.pending) {
179 if (vcpu->arch.exception.nr == PF_VECTOR) {
180 printk(KERN_DEBUG "kvm: inject_page_fault:"
181 " double fault 0x%lx\n", addr);
182 vcpu->arch.exception.nr = DF_VECTOR;
183 vcpu->arch.exception.error_code = 0;
184 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
185 /* triple fault -> shutdown */
186 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
187 }
188 return;
189 }
190 vcpu->arch.cr2 = addr;
191 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
192 }
193
194 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
195 {
196 vcpu->arch.nmi_pending = 1;
197 }
198 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
199
200 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
201 {
202 WARN_ON(vcpu->arch.exception.pending);
203 vcpu->arch.exception.pending = true;
204 vcpu->arch.exception.has_error_code = true;
205 vcpu->arch.exception.nr = nr;
206 vcpu->arch.exception.error_code = error_code;
207 }
208 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
209
210 static void __queue_exception(struct kvm_vcpu *vcpu)
211 {
212 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
213 vcpu->arch.exception.has_error_code,
214 vcpu->arch.exception.error_code);
215 }
216
217 /*
218 * Load the pae pdptrs. Return true is they are all valid.
219 */
220 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
221 {
222 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
223 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
224 int i;
225 int ret;
226 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
227
228 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
229 offset * sizeof(u64), sizeof(pdpte));
230 if (ret < 0) {
231 ret = 0;
232 goto out;
233 }
234 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
235 if (is_present_pte(pdpte[i]) &&
236 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
237 ret = 0;
238 goto out;
239 }
240 }
241 ret = 1;
242
243 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
244 out:
245
246 return ret;
247 }
248 EXPORT_SYMBOL_GPL(load_pdptrs);
249
250 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
251 {
252 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
253 bool changed = true;
254 int r;
255
256 if (is_long_mode(vcpu) || !is_pae(vcpu))
257 return false;
258
259 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
260 if (r < 0)
261 goto out;
262 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
263 out:
264
265 return changed;
266 }
267
268 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
269 {
270 if (cr0 & CR0_RESERVED_BITS) {
271 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
272 cr0, vcpu->arch.cr0);
273 kvm_inject_gp(vcpu, 0);
274 return;
275 }
276
277 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
278 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
279 kvm_inject_gp(vcpu, 0);
280 return;
281 }
282
283 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
284 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
285 "and a clear PE flag\n");
286 kvm_inject_gp(vcpu, 0);
287 return;
288 }
289
290 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
291 #ifdef CONFIG_X86_64
292 if ((vcpu->arch.shadow_efer & EFER_LME)) {
293 int cs_db, cs_l;
294
295 if (!is_pae(vcpu)) {
296 printk(KERN_DEBUG "set_cr0: #GP, start paging "
297 "in long mode while PAE is disabled\n");
298 kvm_inject_gp(vcpu, 0);
299 return;
300 }
301 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
302 if (cs_l) {
303 printk(KERN_DEBUG "set_cr0: #GP, start paging "
304 "in long mode while CS.L == 1\n");
305 kvm_inject_gp(vcpu, 0);
306 return;
307
308 }
309 } else
310 #endif
311 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
312 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
313 "reserved bits\n");
314 kvm_inject_gp(vcpu, 0);
315 return;
316 }
317
318 }
319
320 kvm_x86_ops->set_cr0(vcpu, cr0);
321 vcpu->arch.cr0 = cr0;
322
323 kvm_mmu_reset_context(vcpu);
324 return;
325 }
326 EXPORT_SYMBOL_GPL(kvm_set_cr0);
327
328 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
329 {
330 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
331 KVMTRACE_1D(LMSW, vcpu,
332 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
333 handler);
334 }
335 EXPORT_SYMBOL_GPL(kvm_lmsw);
336
337 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
338 {
339 unsigned long old_cr4 = vcpu->arch.cr4;
340 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
341
342 if (cr4 & CR4_RESERVED_BITS) {
343 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
344 kvm_inject_gp(vcpu, 0);
345 return;
346 }
347
348 if (is_long_mode(vcpu)) {
349 if (!(cr4 & X86_CR4_PAE)) {
350 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
351 "in long mode\n");
352 kvm_inject_gp(vcpu, 0);
353 return;
354 }
355 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
356 && ((cr4 ^ old_cr4) & pdptr_bits)
357 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
358 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
359 kvm_inject_gp(vcpu, 0);
360 return;
361 }
362
363 if (cr4 & X86_CR4_VMXE) {
364 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
365 kvm_inject_gp(vcpu, 0);
366 return;
367 }
368 kvm_x86_ops->set_cr4(vcpu, cr4);
369 vcpu->arch.cr4 = cr4;
370 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
371 kvm_mmu_reset_context(vcpu);
372 }
373 EXPORT_SYMBOL_GPL(kvm_set_cr4);
374
375 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
376 {
377 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
378 kvm_mmu_sync_roots(vcpu);
379 kvm_mmu_flush_tlb(vcpu);
380 return;
381 }
382
383 if (is_long_mode(vcpu)) {
384 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
385 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
386 kvm_inject_gp(vcpu, 0);
387 return;
388 }
389 } else {
390 if (is_pae(vcpu)) {
391 if (cr3 & CR3_PAE_RESERVED_BITS) {
392 printk(KERN_DEBUG
393 "set_cr3: #GP, reserved bits\n");
394 kvm_inject_gp(vcpu, 0);
395 return;
396 }
397 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
398 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
399 "reserved bits\n");
400 kvm_inject_gp(vcpu, 0);
401 return;
402 }
403 }
404 /*
405 * We don't check reserved bits in nonpae mode, because
406 * this isn't enforced, and VMware depends on this.
407 */
408 }
409
410 /*
411 * Does the new cr3 value map to physical memory? (Note, we
412 * catch an invalid cr3 even in real-mode, because it would
413 * cause trouble later on when we turn on paging anyway.)
414 *
415 * A real CPU would silently accept an invalid cr3 and would
416 * attempt to use it - with largely undefined (and often hard
417 * to debug) behavior on the guest side.
418 */
419 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
420 kvm_inject_gp(vcpu, 0);
421 else {
422 vcpu->arch.cr3 = cr3;
423 vcpu->arch.mmu.new_cr3(vcpu);
424 }
425 }
426 EXPORT_SYMBOL_GPL(kvm_set_cr3);
427
428 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
429 {
430 if (cr8 & CR8_RESERVED_BITS) {
431 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
432 kvm_inject_gp(vcpu, 0);
433 return;
434 }
435 if (irqchip_in_kernel(vcpu->kvm))
436 kvm_lapic_set_tpr(vcpu, cr8);
437 else
438 vcpu->arch.cr8 = cr8;
439 }
440 EXPORT_SYMBOL_GPL(kvm_set_cr8);
441
442 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
443 {
444 if (irqchip_in_kernel(vcpu->kvm))
445 return kvm_lapic_get_cr8(vcpu);
446 else
447 return vcpu->arch.cr8;
448 }
449 EXPORT_SYMBOL_GPL(kvm_get_cr8);
450
451 static inline u32 bit(int bitno)
452 {
453 return 1 << (bitno & 31);
454 }
455
456 /*
457 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
458 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
459 *
460 * This list is modified at module load time to reflect the
461 * capabilities of the host cpu.
462 */
463 static u32 msrs_to_save[] = {
464 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
465 MSR_K6_STAR,
466 #ifdef CONFIG_X86_64
467 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
468 #endif
469 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
470 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
471 };
472
473 static unsigned num_msrs_to_save;
474
475 static u32 emulated_msrs[] = {
476 MSR_IA32_MISC_ENABLE,
477 };
478
479 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
480 {
481 if (efer & efer_reserved_bits) {
482 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
483 efer);
484 kvm_inject_gp(vcpu, 0);
485 return;
486 }
487
488 if (is_paging(vcpu)
489 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
490 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
491 kvm_inject_gp(vcpu, 0);
492 return;
493 }
494
495 if (efer & EFER_FFXSR) {
496 struct kvm_cpuid_entry2 *feat;
497
498 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
499 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
500 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
501 kvm_inject_gp(vcpu, 0);
502 return;
503 }
504 }
505
506 if (efer & EFER_SVME) {
507 struct kvm_cpuid_entry2 *feat;
508
509 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
510 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
511 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
512 kvm_inject_gp(vcpu, 0);
513 return;
514 }
515 }
516
517 kvm_x86_ops->set_efer(vcpu, efer);
518
519 efer &= ~EFER_LMA;
520 efer |= vcpu->arch.shadow_efer & EFER_LMA;
521
522 vcpu->arch.shadow_efer = efer;
523
524 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
525 kvm_mmu_reset_context(vcpu);
526 }
527
528 void kvm_enable_efer_bits(u64 mask)
529 {
530 efer_reserved_bits &= ~mask;
531 }
532 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
533
534
535 /*
536 * Writes msr value into into the appropriate "register".
537 * Returns 0 on success, non-0 otherwise.
538 * Assumes vcpu_load() was already called.
539 */
540 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
541 {
542 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
543 }
544
545 /*
546 * Adapt set_msr() to msr_io()'s calling convention
547 */
548 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
549 {
550 return kvm_set_msr(vcpu, index, *data);
551 }
552
553 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
554 {
555 static int version;
556 struct pvclock_wall_clock wc;
557 struct timespec now, sys, boot;
558
559 if (!wall_clock)
560 return;
561
562 version++;
563
564 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
565
566 /*
567 * The guest calculates current wall clock time by adding
568 * system time (updated by kvm_write_guest_time below) to the
569 * wall clock specified here. guest system time equals host
570 * system time for us, thus we must fill in host boot time here.
571 */
572 now = current_kernel_time();
573 ktime_get_ts(&sys);
574 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
575
576 wc.sec = boot.tv_sec;
577 wc.nsec = boot.tv_nsec;
578 wc.version = version;
579
580 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
581
582 version++;
583 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
584 }
585
586 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
587 {
588 uint32_t quotient, remainder;
589
590 /* Don't try to replace with do_div(), this one calculates
591 * "(dividend << 32) / divisor" */
592 __asm__ ( "divl %4"
593 : "=a" (quotient), "=d" (remainder)
594 : "0" (0), "1" (dividend), "r" (divisor) );
595 return quotient;
596 }
597
598 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
599 {
600 uint64_t nsecs = 1000000000LL;
601 int32_t shift = 0;
602 uint64_t tps64;
603 uint32_t tps32;
604
605 tps64 = tsc_khz * 1000LL;
606 while (tps64 > nsecs*2) {
607 tps64 >>= 1;
608 shift--;
609 }
610
611 tps32 = (uint32_t)tps64;
612 while (tps32 <= (uint32_t)nsecs) {
613 tps32 <<= 1;
614 shift++;
615 }
616
617 hv_clock->tsc_shift = shift;
618 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
619
620 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
621 __func__, tsc_khz, hv_clock->tsc_shift,
622 hv_clock->tsc_to_system_mul);
623 }
624
625 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
626
627 static void kvm_write_guest_time(struct kvm_vcpu *v)
628 {
629 struct timespec ts;
630 unsigned long flags;
631 struct kvm_vcpu_arch *vcpu = &v->arch;
632 void *shared_kaddr;
633 unsigned long this_tsc_khz;
634
635 if ((!vcpu->time_page))
636 return;
637
638 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
639 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
640 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
641 vcpu->hv_clock_tsc_khz = this_tsc_khz;
642 }
643 put_cpu_var(cpu_tsc_khz);
644
645 /* Keep irq disabled to prevent changes to the clock */
646 local_irq_save(flags);
647 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
648 &vcpu->hv_clock.tsc_timestamp);
649 ktime_get_ts(&ts);
650 local_irq_restore(flags);
651
652 /* With all the info we got, fill in the values */
653
654 vcpu->hv_clock.system_time = ts.tv_nsec +
655 (NSEC_PER_SEC * (u64)ts.tv_sec);
656 /*
657 * The interface expects us to write an even number signaling that the
658 * update is finished. Since the guest won't see the intermediate
659 * state, we just increase by 2 at the end.
660 */
661 vcpu->hv_clock.version += 2;
662
663 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
664
665 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
666 sizeof(vcpu->hv_clock));
667
668 kunmap_atomic(shared_kaddr, KM_USER0);
669
670 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
671 }
672
673 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
674 {
675 struct kvm_vcpu_arch *vcpu = &v->arch;
676
677 if (!vcpu->time_page)
678 return 0;
679 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
680 return 1;
681 }
682
683 static bool msr_mtrr_valid(unsigned msr)
684 {
685 switch (msr) {
686 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
687 case MSR_MTRRfix64K_00000:
688 case MSR_MTRRfix16K_80000:
689 case MSR_MTRRfix16K_A0000:
690 case MSR_MTRRfix4K_C0000:
691 case MSR_MTRRfix4K_C8000:
692 case MSR_MTRRfix4K_D0000:
693 case MSR_MTRRfix4K_D8000:
694 case MSR_MTRRfix4K_E0000:
695 case MSR_MTRRfix4K_E8000:
696 case MSR_MTRRfix4K_F0000:
697 case MSR_MTRRfix4K_F8000:
698 case MSR_MTRRdefType:
699 case MSR_IA32_CR_PAT:
700 return true;
701 case 0x2f8:
702 return true;
703 }
704 return false;
705 }
706
707 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
708 {
709 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
710
711 if (!msr_mtrr_valid(msr))
712 return 1;
713
714 if (msr == MSR_MTRRdefType) {
715 vcpu->arch.mtrr_state.def_type = data;
716 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
717 } else if (msr == MSR_MTRRfix64K_00000)
718 p[0] = data;
719 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
720 p[1 + msr - MSR_MTRRfix16K_80000] = data;
721 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
722 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
723 else if (msr == MSR_IA32_CR_PAT)
724 vcpu->arch.pat = data;
725 else { /* Variable MTRRs */
726 int idx, is_mtrr_mask;
727 u64 *pt;
728
729 idx = (msr - 0x200) / 2;
730 is_mtrr_mask = msr - 0x200 - 2 * idx;
731 if (!is_mtrr_mask)
732 pt =
733 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
734 else
735 pt =
736 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
737 *pt = data;
738 }
739
740 kvm_mmu_reset_context(vcpu);
741 return 0;
742 }
743
744 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
745 {
746 switch (msr) {
747 case MSR_EFER:
748 set_efer(vcpu, data);
749 break;
750 case MSR_IA32_MC0_STATUS:
751 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
752 __func__, data);
753 break;
754 case MSR_IA32_MCG_STATUS:
755 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
756 __func__, data);
757 break;
758 case MSR_IA32_MCG_CTL:
759 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
760 __func__, data);
761 break;
762 case MSR_IA32_DEBUGCTLMSR:
763 if (!data) {
764 /* We support the non-activated case already */
765 break;
766 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
767 /* Values other than LBR and BTF are vendor-specific,
768 thus reserved and should throw a #GP */
769 return 1;
770 }
771 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
772 __func__, data);
773 break;
774 case MSR_IA32_UCODE_REV:
775 case MSR_IA32_UCODE_WRITE:
776 case MSR_VM_HSAVE_PA:
777 break;
778 case 0x200 ... 0x2ff:
779 return set_msr_mtrr(vcpu, msr, data);
780 case MSR_IA32_APICBASE:
781 kvm_set_apic_base(vcpu, data);
782 break;
783 case MSR_IA32_MISC_ENABLE:
784 vcpu->arch.ia32_misc_enable_msr = data;
785 break;
786 case MSR_KVM_WALL_CLOCK:
787 vcpu->kvm->arch.wall_clock = data;
788 kvm_write_wall_clock(vcpu->kvm, data);
789 break;
790 case MSR_KVM_SYSTEM_TIME: {
791 if (vcpu->arch.time_page) {
792 kvm_release_page_dirty(vcpu->arch.time_page);
793 vcpu->arch.time_page = NULL;
794 }
795
796 vcpu->arch.time = data;
797
798 /* we verify if the enable bit is set... */
799 if (!(data & 1))
800 break;
801
802 /* ...but clean it before doing the actual write */
803 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
804
805 vcpu->arch.time_page =
806 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
807
808 if (is_error_page(vcpu->arch.time_page)) {
809 kvm_release_page_clean(vcpu->arch.time_page);
810 vcpu->arch.time_page = NULL;
811 }
812
813 kvm_request_guest_time_update(vcpu);
814 break;
815 }
816 default:
817 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
818 return 1;
819 }
820 return 0;
821 }
822 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
823
824
825 /*
826 * Reads an msr value (of 'msr_index') into 'pdata'.
827 * Returns 0 on success, non-0 otherwise.
828 * Assumes vcpu_load() was already called.
829 */
830 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
831 {
832 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
833 }
834
835 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
836 {
837 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
838
839 if (!msr_mtrr_valid(msr))
840 return 1;
841
842 if (msr == MSR_MTRRdefType)
843 *pdata = vcpu->arch.mtrr_state.def_type +
844 (vcpu->arch.mtrr_state.enabled << 10);
845 else if (msr == MSR_MTRRfix64K_00000)
846 *pdata = p[0];
847 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
848 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
849 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
850 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
851 else if (msr == MSR_IA32_CR_PAT)
852 *pdata = vcpu->arch.pat;
853 else { /* Variable MTRRs */
854 int idx, is_mtrr_mask;
855 u64 *pt;
856
857 idx = (msr - 0x200) / 2;
858 is_mtrr_mask = msr - 0x200 - 2 * idx;
859 if (!is_mtrr_mask)
860 pt =
861 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
862 else
863 pt =
864 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
865 *pdata = *pt;
866 }
867
868 return 0;
869 }
870
871 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
872 {
873 u64 data;
874
875 switch (msr) {
876 case 0xc0010010: /* SYSCFG */
877 case 0xc0010015: /* HWCR */
878 case MSR_IA32_PLATFORM_ID:
879 case MSR_IA32_P5_MC_ADDR:
880 case MSR_IA32_P5_MC_TYPE:
881 case MSR_IA32_MC0_CTL:
882 case MSR_IA32_MCG_STATUS:
883 case MSR_IA32_MCG_CAP:
884 case MSR_IA32_MCG_CTL:
885 case MSR_IA32_MC0_MISC:
886 case MSR_IA32_MC0_MISC+4:
887 case MSR_IA32_MC0_MISC+8:
888 case MSR_IA32_MC0_MISC+12:
889 case MSR_IA32_MC0_MISC+16:
890 case MSR_IA32_MC0_MISC+20:
891 case MSR_IA32_UCODE_REV:
892 case MSR_IA32_EBL_CR_POWERON:
893 case MSR_IA32_DEBUGCTLMSR:
894 case MSR_IA32_LASTBRANCHFROMIP:
895 case MSR_IA32_LASTBRANCHTOIP:
896 case MSR_IA32_LASTINTFROMIP:
897 case MSR_IA32_LASTINTTOIP:
898 case MSR_VM_HSAVE_PA:
899 case MSR_P6_EVNTSEL0:
900 case MSR_P6_EVNTSEL1:
901 case MSR_K7_EVNTSEL0:
902 data = 0;
903 break;
904 case MSR_MTRRcap:
905 data = 0x500 | KVM_NR_VAR_MTRR;
906 break;
907 case 0x200 ... 0x2ff:
908 return get_msr_mtrr(vcpu, msr, pdata);
909 case 0xcd: /* fsb frequency */
910 data = 3;
911 break;
912 case MSR_IA32_APICBASE:
913 data = kvm_get_apic_base(vcpu);
914 break;
915 case MSR_IA32_MISC_ENABLE:
916 data = vcpu->arch.ia32_misc_enable_msr;
917 break;
918 case MSR_IA32_PERF_STATUS:
919 /* TSC increment by tick */
920 data = 1000ULL;
921 /* CPU multiplier */
922 data |= (((uint64_t)4ULL) << 40);
923 break;
924 case MSR_EFER:
925 data = vcpu->arch.shadow_efer;
926 break;
927 case MSR_KVM_WALL_CLOCK:
928 data = vcpu->kvm->arch.wall_clock;
929 break;
930 case MSR_KVM_SYSTEM_TIME:
931 data = vcpu->arch.time;
932 break;
933 default:
934 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
935 return 1;
936 }
937 *pdata = data;
938 return 0;
939 }
940 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
941
942 /*
943 * Read or write a bunch of msrs. All parameters are kernel addresses.
944 *
945 * @return number of msrs set successfully.
946 */
947 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
948 struct kvm_msr_entry *entries,
949 int (*do_msr)(struct kvm_vcpu *vcpu,
950 unsigned index, u64 *data))
951 {
952 int i;
953
954 vcpu_load(vcpu);
955
956 down_read(&vcpu->kvm->slots_lock);
957 for (i = 0; i < msrs->nmsrs; ++i)
958 if (do_msr(vcpu, entries[i].index, &entries[i].data))
959 break;
960 up_read(&vcpu->kvm->slots_lock);
961
962 vcpu_put(vcpu);
963
964 return i;
965 }
966
967 /*
968 * Read or write a bunch of msrs. Parameters are user addresses.
969 *
970 * @return number of msrs set successfully.
971 */
972 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
973 int (*do_msr)(struct kvm_vcpu *vcpu,
974 unsigned index, u64 *data),
975 int writeback)
976 {
977 struct kvm_msrs msrs;
978 struct kvm_msr_entry *entries;
979 int r, n;
980 unsigned size;
981
982 r = -EFAULT;
983 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
984 goto out;
985
986 r = -E2BIG;
987 if (msrs.nmsrs >= MAX_IO_MSRS)
988 goto out;
989
990 r = -ENOMEM;
991 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
992 entries = vmalloc(size);
993 if (!entries)
994 goto out;
995
996 r = -EFAULT;
997 if (copy_from_user(entries, user_msrs->entries, size))
998 goto out_free;
999
1000 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1001 if (r < 0)
1002 goto out_free;
1003
1004 r = -EFAULT;
1005 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1006 goto out_free;
1007
1008 r = n;
1009
1010 out_free:
1011 vfree(entries);
1012 out:
1013 return r;
1014 }
1015
1016 int kvm_dev_ioctl_check_extension(long ext)
1017 {
1018 int r;
1019
1020 switch (ext) {
1021 case KVM_CAP_IRQCHIP:
1022 case KVM_CAP_HLT:
1023 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1024 case KVM_CAP_SET_TSS_ADDR:
1025 case KVM_CAP_EXT_CPUID:
1026 case KVM_CAP_CLOCKSOURCE:
1027 case KVM_CAP_PIT:
1028 case KVM_CAP_NOP_IO_DELAY:
1029 case KVM_CAP_MP_STATE:
1030 case KVM_CAP_SYNC_MMU:
1031 case KVM_CAP_REINJECT_CONTROL:
1032 case KVM_CAP_IRQ_INJECT_STATUS:
1033 case KVM_CAP_ASSIGN_DEV_IRQ:
1034 r = 1;
1035 break;
1036 case KVM_CAP_COALESCED_MMIO:
1037 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1038 break;
1039 case KVM_CAP_VAPIC:
1040 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1041 break;
1042 case KVM_CAP_NR_VCPUS:
1043 r = KVM_MAX_VCPUS;
1044 break;
1045 case KVM_CAP_NR_MEMSLOTS:
1046 r = KVM_MEMORY_SLOTS;
1047 break;
1048 case KVM_CAP_PV_MMU:
1049 r = !tdp_enabled;
1050 break;
1051 case KVM_CAP_IOMMU:
1052 r = iommu_found();
1053 break;
1054 default:
1055 r = 0;
1056 break;
1057 }
1058 return r;
1059
1060 }
1061
1062 long kvm_arch_dev_ioctl(struct file *filp,
1063 unsigned int ioctl, unsigned long arg)
1064 {
1065 void __user *argp = (void __user *)arg;
1066 long r;
1067
1068 switch (ioctl) {
1069 case KVM_GET_MSR_INDEX_LIST: {
1070 struct kvm_msr_list __user *user_msr_list = argp;
1071 struct kvm_msr_list msr_list;
1072 unsigned n;
1073
1074 r = -EFAULT;
1075 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1076 goto out;
1077 n = msr_list.nmsrs;
1078 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1079 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1080 goto out;
1081 r = -E2BIG;
1082 if (n < num_msrs_to_save)
1083 goto out;
1084 r = -EFAULT;
1085 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1086 num_msrs_to_save * sizeof(u32)))
1087 goto out;
1088 if (copy_to_user(user_msr_list->indices
1089 + num_msrs_to_save * sizeof(u32),
1090 &emulated_msrs,
1091 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1092 goto out;
1093 r = 0;
1094 break;
1095 }
1096 case KVM_GET_SUPPORTED_CPUID: {
1097 struct kvm_cpuid2 __user *cpuid_arg = argp;
1098 struct kvm_cpuid2 cpuid;
1099
1100 r = -EFAULT;
1101 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1102 goto out;
1103 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1104 cpuid_arg->entries);
1105 if (r)
1106 goto out;
1107
1108 r = -EFAULT;
1109 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1110 goto out;
1111 r = 0;
1112 break;
1113 }
1114 default:
1115 r = -EINVAL;
1116 }
1117 out:
1118 return r;
1119 }
1120
1121 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1122 {
1123 kvm_x86_ops->vcpu_load(vcpu, cpu);
1124 kvm_request_guest_time_update(vcpu);
1125 }
1126
1127 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1128 {
1129 kvm_x86_ops->vcpu_put(vcpu);
1130 kvm_put_guest_fpu(vcpu);
1131 }
1132
1133 static int is_efer_nx(void)
1134 {
1135 unsigned long long efer = 0;
1136
1137 rdmsrl_safe(MSR_EFER, &efer);
1138 return efer & EFER_NX;
1139 }
1140
1141 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1142 {
1143 int i;
1144 struct kvm_cpuid_entry2 *e, *entry;
1145
1146 entry = NULL;
1147 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1148 e = &vcpu->arch.cpuid_entries[i];
1149 if (e->function == 0x80000001) {
1150 entry = e;
1151 break;
1152 }
1153 }
1154 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1155 entry->edx &= ~(1 << 20);
1156 printk(KERN_INFO "kvm: guest NX capability removed\n");
1157 }
1158 }
1159
1160 /* when an old userspace process fills a new kernel module */
1161 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1162 struct kvm_cpuid *cpuid,
1163 struct kvm_cpuid_entry __user *entries)
1164 {
1165 int r, i;
1166 struct kvm_cpuid_entry *cpuid_entries;
1167
1168 r = -E2BIG;
1169 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1170 goto out;
1171 r = -ENOMEM;
1172 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1173 if (!cpuid_entries)
1174 goto out;
1175 r = -EFAULT;
1176 if (copy_from_user(cpuid_entries, entries,
1177 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1178 goto out_free;
1179 for (i = 0; i < cpuid->nent; i++) {
1180 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1181 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1182 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1183 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1184 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1185 vcpu->arch.cpuid_entries[i].index = 0;
1186 vcpu->arch.cpuid_entries[i].flags = 0;
1187 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1188 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1189 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1190 }
1191 vcpu->arch.cpuid_nent = cpuid->nent;
1192 cpuid_fix_nx_cap(vcpu);
1193 r = 0;
1194
1195 out_free:
1196 vfree(cpuid_entries);
1197 out:
1198 return r;
1199 }
1200
1201 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1202 struct kvm_cpuid2 *cpuid,
1203 struct kvm_cpuid_entry2 __user *entries)
1204 {
1205 int r;
1206
1207 r = -E2BIG;
1208 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1209 goto out;
1210 r = -EFAULT;
1211 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1212 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1213 goto out;
1214 vcpu->arch.cpuid_nent = cpuid->nent;
1215 return 0;
1216
1217 out:
1218 return r;
1219 }
1220
1221 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1222 struct kvm_cpuid2 *cpuid,
1223 struct kvm_cpuid_entry2 __user *entries)
1224 {
1225 int r;
1226
1227 r = -E2BIG;
1228 if (cpuid->nent < vcpu->arch.cpuid_nent)
1229 goto out;
1230 r = -EFAULT;
1231 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1232 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1233 goto out;
1234 return 0;
1235
1236 out:
1237 cpuid->nent = vcpu->arch.cpuid_nent;
1238 return r;
1239 }
1240
1241 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1242 u32 index)
1243 {
1244 entry->function = function;
1245 entry->index = index;
1246 cpuid_count(entry->function, entry->index,
1247 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1248 entry->flags = 0;
1249 }
1250
1251 #define F(x) bit(X86_FEATURE_##x)
1252
1253 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1254 u32 index, int *nent, int maxnent)
1255 {
1256 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1257 #ifdef CONFIG_X86_64
1258 unsigned f_lm = F(LM);
1259 #else
1260 unsigned f_lm = 0;
1261 #endif
1262
1263 /* cpuid 1.edx */
1264 const u32 kvm_supported_word0_x86_features =
1265 F(FPU) | F(VME) | F(DE) | F(PSE) |
1266 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1267 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1268 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1269 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1270 0 /* Reserved, DS, ACPI */ | F(MMX) |
1271 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1272 0 /* HTT, TM, Reserved, PBE */;
1273 /* cpuid 0x80000001.edx */
1274 const u32 kvm_supported_word1_x86_features =
1275 F(FPU) | F(VME) | F(DE) | F(PSE) |
1276 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1277 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1278 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1279 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1280 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1281 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1282 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1283 /* cpuid 1.ecx */
1284 const u32 kvm_supported_word4_x86_features =
1285 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1286 0 /* DS-CPL, VMX, SMX, EST */ |
1287 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1288 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1289 0 /* Reserved, DCA */ | F(XMM4_1) |
1290 F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
1291 0 /* Reserved, XSAVE, OSXSAVE */;
1292 /* cpuid 0x80000001.ecx */
1293 const u32 kvm_supported_word6_x86_features =
1294 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1295 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1296 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1297 0 /* SKINIT */ | 0 /* WDT */;
1298
1299 /* all calls to cpuid_count() should be made on the same cpu */
1300 get_cpu();
1301 do_cpuid_1_ent(entry, function, index);
1302 ++*nent;
1303
1304 switch (function) {
1305 case 0:
1306 entry->eax = min(entry->eax, (u32)0xb);
1307 break;
1308 case 1:
1309 entry->edx &= kvm_supported_word0_x86_features;
1310 entry->ecx &= kvm_supported_word4_x86_features;
1311 break;
1312 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1313 * may return different values. This forces us to get_cpu() before
1314 * issuing the first command, and also to emulate this annoying behavior
1315 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1316 case 2: {
1317 int t, times = entry->eax & 0xff;
1318
1319 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1320 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1321 for (t = 1; t < times && *nent < maxnent; ++t) {
1322 do_cpuid_1_ent(&entry[t], function, 0);
1323 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1324 ++*nent;
1325 }
1326 break;
1327 }
1328 /* function 4 and 0xb have additional index. */
1329 case 4: {
1330 int i, cache_type;
1331
1332 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1333 /* read more entries until cache_type is zero */
1334 for (i = 1; *nent < maxnent; ++i) {
1335 cache_type = entry[i - 1].eax & 0x1f;
1336 if (!cache_type)
1337 break;
1338 do_cpuid_1_ent(&entry[i], function, i);
1339 entry[i].flags |=
1340 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1341 ++*nent;
1342 }
1343 break;
1344 }
1345 case 0xb: {
1346 int i, level_type;
1347
1348 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1349 /* read more entries until level_type is zero */
1350 for (i = 1; *nent < maxnent; ++i) {
1351 level_type = entry[i - 1].ecx & 0xff00;
1352 if (!level_type)
1353 break;
1354 do_cpuid_1_ent(&entry[i], function, i);
1355 entry[i].flags |=
1356 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1357 ++*nent;
1358 }
1359 break;
1360 }
1361 case 0x80000000:
1362 entry->eax = min(entry->eax, 0x8000001a);
1363 break;
1364 case 0x80000001:
1365 entry->edx &= kvm_supported_word1_x86_features;
1366 entry->ecx &= kvm_supported_word6_x86_features;
1367 break;
1368 }
1369 put_cpu();
1370 }
1371
1372 #undef F
1373
1374 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1375 struct kvm_cpuid_entry2 __user *entries)
1376 {
1377 struct kvm_cpuid_entry2 *cpuid_entries;
1378 int limit, nent = 0, r = -E2BIG;
1379 u32 func;
1380
1381 if (cpuid->nent < 1)
1382 goto out;
1383 r = -ENOMEM;
1384 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1385 if (!cpuid_entries)
1386 goto out;
1387
1388 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1389 limit = cpuid_entries[0].eax;
1390 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1391 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1392 &nent, cpuid->nent);
1393 r = -E2BIG;
1394 if (nent >= cpuid->nent)
1395 goto out_free;
1396
1397 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1398 limit = cpuid_entries[nent - 1].eax;
1399 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1400 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1401 &nent, cpuid->nent);
1402 r = -EFAULT;
1403 if (copy_to_user(entries, cpuid_entries,
1404 nent * sizeof(struct kvm_cpuid_entry2)))
1405 goto out_free;
1406 cpuid->nent = nent;
1407 r = 0;
1408
1409 out_free:
1410 vfree(cpuid_entries);
1411 out:
1412 return r;
1413 }
1414
1415 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1416 struct kvm_lapic_state *s)
1417 {
1418 vcpu_load(vcpu);
1419 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1420 vcpu_put(vcpu);
1421
1422 return 0;
1423 }
1424
1425 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1426 struct kvm_lapic_state *s)
1427 {
1428 vcpu_load(vcpu);
1429 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1430 kvm_apic_post_state_restore(vcpu);
1431 vcpu_put(vcpu);
1432
1433 return 0;
1434 }
1435
1436 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1437 struct kvm_interrupt *irq)
1438 {
1439 if (irq->irq < 0 || irq->irq >= 256)
1440 return -EINVAL;
1441 if (irqchip_in_kernel(vcpu->kvm))
1442 return -ENXIO;
1443 vcpu_load(vcpu);
1444
1445 kvm_queue_interrupt(vcpu, irq->irq, false);
1446
1447 vcpu_put(vcpu);
1448
1449 return 0;
1450 }
1451
1452 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1453 {
1454 vcpu_load(vcpu);
1455 kvm_inject_nmi(vcpu);
1456 vcpu_put(vcpu);
1457
1458 return 0;
1459 }
1460
1461 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1462 struct kvm_tpr_access_ctl *tac)
1463 {
1464 if (tac->flags)
1465 return -EINVAL;
1466 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1467 return 0;
1468 }
1469
1470 long kvm_arch_vcpu_ioctl(struct file *filp,
1471 unsigned int ioctl, unsigned long arg)
1472 {
1473 struct kvm_vcpu *vcpu = filp->private_data;
1474 void __user *argp = (void __user *)arg;
1475 int r;
1476 struct kvm_lapic_state *lapic = NULL;
1477
1478 switch (ioctl) {
1479 case KVM_GET_LAPIC: {
1480 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1481
1482 r = -ENOMEM;
1483 if (!lapic)
1484 goto out;
1485 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1486 if (r)
1487 goto out;
1488 r = -EFAULT;
1489 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1490 goto out;
1491 r = 0;
1492 break;
1493 }
1494 case KVM_SET_LAPIC: {
1495 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1496 r = -ENOMEM;
1497 if (!lapic)
1498 goto out;
1499 r = -EFAULT;
1500 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1501 goto out;
1502 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1503 if (r)
1504 goto out;
1505 r = 0;
1506 break;
1507 }
1508 case KVM_INTERRUPT: {
1509 struct kvm_interrupt irq;
1510
1511 r = -EFAULT;
1512 if (copy_from_user(&irq, argp, sizeof irq))
1513 goto out;
1514 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1515 if (r)
1516 goto out;
1517 r = 0;
1518 break;
1519 }
1520 case KVM_NMI: {
1521 r = kvm_vcpu_ioctl_nmi(vcpu);
1522 if (r)
1523 goto out;
1524 r = 0;
1525 break;
1526 }
1527 case KVM_SET_CPUID: {
1528 struct kvm_cpuid __user *cpuid_arg = argp;
1529 struct kvm_cpuid cpuid;
1530
1531 r = -EFAULT;
1532 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1533 goto out;
1534 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1535 if (r)
1536 goto out;
1537 break;
1538 }
1539 case KVM_SET_CPUID2: {
1540 struct kvm_cpuid2 __user *cpuid_arg = argp;
1541 struct kvm_cpuid2 cpuid;
1542
1543 r = -EFAULT;
1544 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1545 goto out;
1546 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1547 cpuid_arg->entries);
1548 if (r)
1549 goto out;
1550 break;
1551 }
1552 case KVM_GET_CPUID2: {
1553 struct kvm_cpuid2 __user *cpuid_arg = argp;
1554 struct kvm_cpuid2 cpuid;
1555
1556 r = -EFAULT;
1557 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1558 goto out;
1559 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1560 cpuid_arg->entries);
1561 if (r)
1562 goto out;
1563 r = -EFAULT;
1564 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1565 goto out;
1566 r = 0;
1567 break;
1568 }
1569 case KVM_GET_MSRS:
1570 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1571 break;
1572 case KVM_SET_MSRS:
1573 r = msr_io(vcpu, argp, do_set_msr, 0);
1574 break;
1575 case KVM_TPR_ACCESS_REPORTING: {
1576 struct kvm_tpr_access_ctl tac;
1577
1578 r = -EFAULT;
1579 if (copy_from_user(&tac, argp, sizeof tac))
1580 goto out;
1581 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1582 if (r)
1583 goto out;
1584 r = -EFAULT;
1585 if (copy_to_user(argp, &tac, sizeof tac))
1586 goto out;
1587 r = 0;
1588 break;
1589 };
1590 case KVM_SET_VAPIC_ADDR: {
1591 struct kvm_vapic_addr va;
1592
1593 r = -EINVAL;
1594 if (!irqchip_in_kernel(vcpu->kvm))
1595 goto out;
1596 r = -EFAULT;
1597 if (copy_from_user(&va, argp, sizeof va))
1598 goto out;
1599 r = 0;
1600 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1601 break;
1602 }
1603 default:
1604 r = -EINVAL;
1605 }
1606 out:
1607 kfree(lapic);
1608 return r;
1609 }
1610
1611 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1612 {
1613 int ret;
1614
1615 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1616 return -1;
1617 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1618 return ret;
1619 }
1620
1621 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1622 u32 kvm_nr_mmu_pages)
1623 {
1624 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1625 return -EINVAL;
1626
1627 down_write(&kvm->slots_lock);
1628 spin_lock(&kvm->mmu_lock);
1629
1630 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1631 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1632
1633 spin_unlock(&kvm->mmu_lock);
1634 up_write(&kvm->slots_lock);
1635 return 0;
1636 }
1637
1638 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1639 {
1640 return kvm->arch.n_alloc_mmu_pages;
1641 }
1642
1643 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1644 {
1645 int i;
1646 struct kvm_mem_alias *alias;
1647
1648 for (i = 0; i < kvm->arch.naliases; ++i) {
1649 alias = &kvm->arch.aliases[i];
1650 if (gfn >= alias->base_gfn
1651 && gfn < alias->base_gfn + alias->npages)
1652 return alias->target_gfn + gfn - alias->base_gfn;
1653 }
1654 return gfn;
1655 }
1656
1657 /*
1658 * Set a new alias region. Aliases map a portion of physical memory into
1659 * another portion. This is useful for memory windows, for example the PC
1660 * VGA region.
1661 */
1662 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1663 struct kvm_memory_alias *alias)
1664 {
1665 int r, n;
1666 struct kvm_mem_alias *p;
1667
1668 r = -EINVAL;
1669 /* General sanity checks */
1670 if (alias->memory_size & (PAGE_SIZE - 1))
1671 goto out;
1672 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1673 goto out;
1674 if (alias->slot >= KVM_ALIAS_SLOTS)
1675 goto out;
1676 if (alias->guest_phys_addr + alias->memory_size
1677 < alias->guest_phys_addr)
1678 goto out;
1679 if (alias->target_phys_addr + alias->memory_size
1680 < alias->target_phys_addr)
1681 goto out;
1682
1683 down_write(&kvm->slots_lock);
1684 spin_lock(&kvm->mmu_lock);
1685
1686 p = &kvm->arch.aliases[alias->slot];
1687 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1688 p->npages = alias->memory_size >> PAGE_SHIFT;
1689 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1690
1691 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1692 if (kvm->arch.aliases[n - 1].npages)
1693 break;
1694 kvm->arch.naliases = n;
1695
1696 spin_unlock(&kvm->mmu_lock);
1697 kvm_mmu_zap_all(kvm);
1698
1699 up_write(&kvm->slots_lock);
1700
1701 return 0;
1702
1703 out:
1704 return r;
1705 }
1706
1707 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1708 {
1709 int r;
1710
1711 r = 0;
1712 switch (chip->chip_id) {
1713 case KVM_IRQCHIP_PIC_MASTER:
1714 memcpy(&chip->chip.pic,
1715 &pic_irqchip(kvm)->pics[0],
1716 sizeof(struct kvm_pic_state));
1717 break;
1718 case KVM_IRQCHIP_PIC_SLAVE:
1719 memcpy(&chip->chip.pic,
1720 &pic_irqchip(kvm)->pics[1],
1721 sizeof(struct kvm_pic_state));
1722 break;
1723 case KVM_IRQCHIP_IOAPIC:
1724 memcpy(&chip->chip.ioapic,
1725 ioapic_irqchip(kvm),
1726 sizeof(struct kvm_ioapic_state));
1727 break;
1728 default:
1729 r = -EINVAL;
1730 break;
1731 }
1732 return r;
1733 }
1734
1735 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1736 {
1737 int r;
1738
1739 r = 0;
1740 switch (chip->chip_id) {
1741 case KVM_IRQCHIP_PIC_MASTER:
1742 memcpy(&pic_irqchip(kvm)->pics[0],
1743 &chip->chip.pic,
1744 sizeof(struct kvm_pic_state));
1745 break;
1746 case KVM_IRQCHIP_PIC_SLAVE:
1747 memcpy(&pic_irqchip(kvm)->pics[1],
1748 &chip->chip.pic,
1749 sizeof(struct kvm_pic_state));
1750 break;
1751 case KVM_IRQCHIP_IOAPIC:
1752 memcpy(ioapic_irqchip(kvm),
1753 &chip->chip.ioapic,
1754 sizeof(struct kvm_ioapic_state));
1755 break;
1756 default:
1757 r = -EINVAL;
1758 break;
1759 }
1760 kvm_pic_update_irq(pic_irqchip(kvm));
1761 return r;
1762 }
1763
1764 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1765 {
1766 int r = 0;
1767
1768 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1769 return r;
1770 }
1771
1772 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1773 {
1774 int r = 0;
1775
1776 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1777 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1778 return r;
1779 }
1780
1781 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1782 struct kvm_reinject_control *control)
1783 {
1784 if (!kvm->arch.vpit)
1785 return -ENXIO;
1786 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1787 return 0;
1788 }
1789
1790 /*
1791 * Get (and clear) the dirty memory log for a memory slot.
1792 */
1793 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1794 struct kvm_dirty_log *log)
1795 {
1796 int r;
1797 int n;
1798 struct kvm_memory_slot *memslot;
1799 int is_dirty = 0;
1800
1801 down_write(&kvm->slots_lock);
1802
1803 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1804 if (r)
1805 goto out;
1806
1807 /* If nothing is dirty, don't bother messing with page tables. */
1808 if (is_dirty) {
1809 spin_lock(&kvm->mmu_lock);
1810 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1811 spin_unlock(&kvm->mmu_lock);
1812 kvm_flush_remote_tlbs(kvm);
1813 memslot = &kvm->memslots[log->slot];
1814 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1815 memset(memslot->dirty_bitmap, 0, n);
1816 }
1817 r = 0;
1818 out:
1819 up_write(&kvm->slots_lock);
1820 return r;
1821 }
1822
1823 long kvm_arch_vm_ioctl(struct file *filp,
1824 unsigned int ioctl, unsigned long arg)
1825 {
1826 struct kvm *kvm = filp->private_data;
1827 void __user *argp = (void __user *)arg;
1828 int r = -EINVAL;
1829 /*
1830 * This union makes it completely explicit to gcc-3.x
1831 * that these two variables' stack usage should be
1832 * combined, not added together.
1833 */
1834 union {
1835 struct kvm_pit_state ps;
1836 struct kvm_memory_alias alias;
1837 } u;
1838
1839 switch (ioctl) {
1840 case KVM_SET_TSS_ADDR:
1841 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1842 if (r < 0)
1843 goto out;
1844 break;
1845 case KVM_SET_MEMORY_REGION: {
1846 struct kvm_memory_region kvm_mem;
1847 struct kvm_userspace_memory_region kvm_userspace_mem;
1848
1849 r = -EFAULT;
1850 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1851 goto out;
1852 kvm_userspace_mem.slot = kvm_mem.slot;
1853 kvm_userspace_mem.flags = kvm_mem.flags;
1854 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1855 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1856 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1857 if (r)
1858 goto out;
1859 break;
1860 }
1861 case KVM_SET_NR_MMU_PAGES:
1862 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1863 if (r)
1864 goto out;
1865 break;
1866 case KVM_GET_NR_MMU_PAGES:
1867 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1868 break;
1869 case KVM_SET_MEMORY_ALIAS:
1870 r = -EFAULT;
1871 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1872 goto out;
1873 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1874 if (r)
1875 goto out;
1876 break;
1877 case KVM_CREATE_IRQCHIP:
1878 r = -ENOMEM;
1879 kvm->arch.vpic = kvm_create_pic(kvm);
1880 if (kvm->arch.vpic) {
1881 r = kvm_ioapic_init(kvm);
1882 if (r) {
1883 kfree(kvm->arch.vpic);
1884 kvm->arch.vpic = NULL;
1885 goto out;
1886 }
1887 } else
1888 goto out;
1889 r = kvm_setup_default_irq_routing(kvm);
1890 if (r) {
1891 kfree(kvm->arch.vpic);
1892 kfree(kvm->arch.vioapic);
1893 goto out;
1894 }
1895 break;
1896 case KVM_CREATE_PIT:
1897 mutex_lock(&kvm->lock);
1898 r = -EEXIST;
1899 if (kvm->arch.vpit)
1900 goto create_pit_unlock;
1901 r = -ENOMEM;
1902 kvm->arch.vpit = kvm_create_pit(kvm);
1903 if (kvm->arch.vpit)
1904 r = 0;
1905 create_pit_unlock:
1906 mutex_unlock(&kvm->lock);
1907 break;
1908 case KVM_IRQ_LINE_STATUS:
1909 case KVM_IRQ_LINE: {
1910 struct kvm_irq_level irq_event;
1911
1912 r = -EFAULT;
1913 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1914 goto out;
1915 if (irqchip_in_kernel(kvm)) {
1916 __s32 status;
1917 mutex_lock(&kvm->lock);
1918 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1919 irq_event.irq, irq_event.level);
1920 mutex_unlock(&kvm->lock);
1921 if (ioctl == KVM_IRQ_LINE_STATUS) {
1922 irq_event.status = status;
1923 if (copy_to_user(argp, &irq_event,
1924 sizeof irq_event))
1925 goto out;
1926 }
1927 r = 0;
1928 }
1929 break;
1930 }
1931 case KVM_GET_IRQCHIP: {
1932 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1933 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1934
1935 r = -ENOMEM;
1936 if (!chip)
1937 goto out;
1938 r = -EFAULT;
1939 if (copy_from_user(chip, argp, sizeof *chip))
1940 goto get_irqchip_out;
1941 r = -ENXIO;
1942 if (!irqchip_in_kernel(kvm))
1943 goto get_irqchip_out;
1944 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1945 if (r)
1946 goto get_irqchip_out;
1947 r = -EFAULT;
1948 if (copy_to_user(argp, chip, sizeof *chip))
1949 goto get_irqchip_out;
1950 r = 0;
1951 get_irqchip_out:
1952 kfree(chip);
1953 if (r)
1954 goto out;
1955 break;
1956 }
1957 case KVM_SET_IRQCHIP: {
1958 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1959 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1960
1961 r = -ENOMEM;
1962 if (!chip)
1963 goto out;
1964 r = -EFAULT;
1965 if (copy_from_user(chip, argp, sizeof *chip))
1966 goto set_irqchip_out;
1967 r = -ENXIO;
1968 if (!irqchip_in_kernel(kvm))
1969 goto set_irqchip_out;
1970 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1971 if (r)
1972 goto set_irqchip_out;
1973 r = 0;
1974 set_irqchip_out:
1975 kfree(chip);
1976 if (r)
1977 goto out;
1978 break;
1979 }
1980 case KVM_GET_PIT: {
1981 r = -EFAULT;
1982 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1983 goto out;
1984 r = -ENXIO;
1985 if (!kvm->arch.vpit)
1986 goto out;
1987 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1988 if (r)
1989 goto out;
1990 r = -EFAULT;
1991 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1992 goto out;
1993 r = 0;
1994 break;
1995 }
1996 case KVM_SET_PIT: {
1997 r = -EFAULT;
1998 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1999 goto out;
2000 r = -ENXIO;
2001 if (!kvm->arch.vpit)
2002 goto out;
2003 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2004 if (r)
2005 goto out;
2006 r = 0;
2007 break;
2008 }
2009 case KVM_REINJECT_CONTROL: {
2010 struct kvm_reinject_control control;
2011 r = -EFAULT;
2012 if (copy_from_user(&control, argp, sizeof(control)))
2013 goto out;
2014 r = kvm_vm_ioctl_reinject(kvm, &control);
2015 if (r)
2016 goto out;
2017 r = 0;
2018 break;
2019 }
2020 default:
2021 ;
2022 }
2023 out:
2024 return r;
2025 }
2026
2027 static void kvm_init_msr_list(void)
2028 {
2029 u32 dummy[2];
2030 unsigned i, j;
2031
2032 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2033 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2034 continue;
2035 if (j < i)
2036 msrs_to_save[j] = msrs_to_save[i];
2037 j++;
2038 }
2039 num_msrs_to_save = j;
2040 }
2041
2042 /*
2043 * Only apic need an MMIO device hook, so shortcut now..
2044 */
2045 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2046 gpa_t addr, int len,
2047 int is_write)
2048 {
2049 struct kvm_io_device *dev;
2050
2051 if (vcpu->arch.apic) {
2052 dev = &vcpu->arch.apic->dev;
2053 if (dev->in_range(dev, addr, len, is_write))
2054 return dev;
2055 }
2056 return NULL;
2057 }
2058
2059
2060 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2061 gpa_t addr, int len,
2062 int is_write)
2063 {
2064 struct kvm_io_device *dev;
2065
2066 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2067 if (dev == NULL)
2068 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2069 is_write);
2070 return dev;
2071 }
2072
2073 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2074 struct kvm_vcpu *vcpu)
2075 {
2076 void *data = val;
2077 int r = X86EMUL_CONTINUE;
2078
2079 while (bytes) {
2080 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2081 unsigned offset = addr & (PAGE_SIZE-1);
2082 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2083 int ret;
2084
2085 if (gpa == UNMAPPED_GVA) {
2086 r = X86EMUL_PROPAGATE_FAULT;
2087 goto out;
2088 }
2089 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2090 if (ret < 0) {
2091 r = X86EMUL_UNHANDLEABLE;
2092 goto out;
2093 }
2094
2095 bytes -= toread;
2096 data += toread;
2097 addr += toread;
2098 }
2099 out:
2100 return r;
2101 }
2102
2103 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2104 struct kvm_vcpu *vcpu)
2105 {
2106 void *data = val;
2107 int r = X86EMUL_CONTINUE;
2108
2109 while (bytes) {
2110 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2111 unsigned offset = addr & (PAGE_SIZE-1);
2112 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2113 int ret;
2114
2115 if (gpa == UNMAPPED_GVA) {
2116 r = X86EMUL_PROPAGATE_FAULT;
2117 goto out;
2118 }
2119 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2120 if (ret < 0) {
2121 r = X86EMUL_UNHANDLEABLE;
2122 goto out;
2123 }
2124
2125 bytes -= towrite;
2126 data += towrite;
2127 addr += towrite;
2128 }
2129 out:
2130 return r;
2131 }
2132
2133
2134 static int emulator_read_emulated(unsigned long addr,
2135 void *val,
2136 unsigned int bytes,
2137 struct kvm_vcpu *vcpu)
2138 {
2139 struct kvm_io_device *mmio_dev;
2140 gpa_t gpa;
2141
2142 if (vcpu->mmio_read_completed) {
2143 memcpy(val, vcpu->mmio_data, bytes);
2144 vcpu->mmio_read_completed = 0;
2145 return X86EMUL_CONTINUE;
2146 }
2147
2148 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2149
2150 /* For APIC access vmexit */
2151 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2152 goto mmio;
2153
2154 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2155 == X86EMUL_CONTINUE)
2156 return X86EMUL_CONTINUE;
2157 if (gpa == UNMAPPED_GVA)
2158 return X86EMUL_PROPAGATE_FAULT;
2159
2160 mmio:
2161 /*
2162 * Is this MMIO handled locally?
2163 */
2164 mutex_lock(&vcpu->kvm->lock);
2165 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2166 if (mmio_dev) {
2167 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2168 mutex_unlock(&vcpu->kvm->lock);
2169 return X86EMUL_CONTINUE;
2170 }
2171 mutex_unlock(&vcpu->kvm->lock);
2172
2173 vcpu->mmio_needed = 1;
2174 vcpu->mmio_phys_addr = gpa;
2175 vcpu->mmio_size = bytes;
2176 vcpu->mmio_is_write = 0;
2177
2178 return X86EMUL_UNHANDLEABLE;
2179 }
2180
2181 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2182 const void *val, int bytes)
2183 {
2184 int ret;
2185
2186 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2187 if (ret < 0)
2188 return 0;
2189 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2190 return 1;
2191 }
2192
2193 static int emulator_write_emulated_onepage(unsigned long addr,
2194 const void *val,
2195 unsigned int bytes,
2196 struct kvm_vcpu *vcpu)
2197 {
2198 struct kvm_io_device *mmio_dev;
2199 gpa_t gpa;
2200
2201 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2202
2203 if (gpa == UNMAPPED_GVA) {
2204 kvm_inject_page_fault(vcpu, addr, 2);
2205 return X86EMUL_PROPAGATE_FAULT;
2206 }
2207
2208 /* For APIC access vmexit */
2209 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2210 goto mmio;
2211
2212 if (emulator_write_phys(vcpu, gpa, val, bytes))
2213 return X86EMUL_CONTINUE;
2214
2215 mmio:
2216 /*
2217 * Is this MMIO handled locally?
2218 */
2219 mutex_lock(&vcpu->kvm->lock);
2220 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2221 if (mmio_dev) {
2222 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2223 mutex_unlock(&vcpu->kvm->lock);
2224 return X86EMUL_CONTINUE;
2225 }
2226 mutex_unlock(&vcpu->kvm->lock);
2227
2228 vcpu->mmio_needed = 1;
2229 vcpu->mmio_phys_addr = gpa;
2230 vcpu->mmio_size = bytes;
2231 vcpu->mmio_is_write = 1;
2232 memcpy(vcpu->mmio_data, val, bytes);
2233
2234 return X86EMUL_CONTINUE;
2235 }
2236
2237 int emulator_write_emulated(unsigned long addr,
2238 const void *val,
2239 unsigned int bytes,
2240 struct kvm_vcpu *vcpu)
2241 {
2242 /* Crossing a page boundary? */
2243 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2244 int rc, now;
2245
2246 now = -addr & ~PAGE_MASK;
2247 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2248 if (rc != X86EMUL_CONTINUE)
2249 return rc;
2250 addr += now;
2251 val += now;
2252 bytes -= now;
2253 }
2254 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2255 }
2256 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2257
2258 static int emulator_cmpxchg_emulated(unsigned long addr,
2259 const void *old,
2260 const void *new,
2261 unsigned int bytes,
2262 struct kvm_vcpu *vcpu)
2263 {
2264 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2265 #ifndef CONFIG_X86_64
2266 /* guests cmpxchg8b have to be emulated atomically */
2267 if (bytes == 8) {
2268 gpa_t gpa;
2269 struct page *page;
2270 char *kaddr;
2271 u64 val;
2272
2273 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2274
2275 if (gpa == UNMAPPED_GVA ||
2276 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2277 goto emul_write;
2278
2279 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2280 goto emul_write;
2281
2282 val = *(u64 *)new;
2283
2284 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2285
2286 kaddr = kmap_atomic(page, KM_USER0);
2287 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2288 kunmap_atomic(kaddr, KM_USER0);
2289 kvm_release_page_dirty(page);
2290 }
2291 emul_write:
2292 #endif
2293
2294 return emulator_write_emulated(addr, new, bytes, vcpu);
2295 }
2296
2297 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2298 {
2299 return kvm_x86_ops->get_segment_base(vcpu, seg);
2300 }
2301
2302 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2303 {
2304 kvm_mmu_invlpg(vcpu, address);
2305 return X86EMUL_CONTINUE;
2306 }
2307
2308 int emulate_clts(struct kvm_vcpu *vcpu)
2309 {
2310 KVMTRACE_0D(CLTS, vcpu, handler);
2311 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2312 return X86EMUL_CONTINUE;
2313 }
2314
2315 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2316 {
2317 struct kvm_vcpu *vcpu = ctxt->vcpu;
2318
2319 switch (dr) {
2320 case 0 ... 3:
2321 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2322 return X86EMUL_CONTINUE;
2323 default:
2324 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2325 return X86EMUL_UNHANDLEABLE;
2326 }
2327 }
2328
2329 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2330 {
2331 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2332 int exception;
2333
2334 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2335 if (exception) {
2336 /* FIXME: better handling */
2337 return X86EMUL_UNHANDLEABLE;
2338 }
2339 return X86EMUL_CONTINUE;
2340 }
2341
2342 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2343 {
2344 u8 opcodes[4];
2345 unsigned long rip = kvm_rip_read(vcpu);
2346 unsigned long rip_linear;
2347
2348 if (!printk_ratelimit())
2349 return;
2350
2351 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2352
2353 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2354
2355 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2356 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2357 }
2358 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2359
2360 static struct x86_emulate_ops emulate_ops = {
2361 .read_std = kvm_read_guest_virt,
2362 .read_emulated = emulator_read_emulated,
2363 .write_emulated = emulator_write_emulated,
2364 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2365 };
2366
2367 static void cache_all_regs(struct kvm_vcpu *vcpu)
2368 {
2369 kvm_register_read(vcpu, VCPU_REGS_RAX);
2370 kvm_register_read(vcpu, VCPU_REGS_RSP);
2371 kvm_register_read(vcpu, VCPU_REGS_RIP);
2372 vcpu->arch.regs_dirty = ~0;
2373 }
2374
2375 int emulate_instruction(struct kvm_vcpu *vcpu,
2376 struct kvm_run *run,
2377 unsigned long cr2,
2378 u16 error_code,
2379 int emulation_type)
2380 {
2381 int r, shadow_mask;
2382 struct decode_cache *c;
2383
2384 kvm_clear_exception_queue(vcpu);
2385 vcpu->arch.mmio_fault_cr2 = cr2;
2386 /*
2387 * TODO: fix x86_emulate.c to use guest_read/write_register
2388 * instead of direct ->regs accesses, can save hundred cycles
2389 * on Intel for instructions that don't read/change RSP, for
2390 * for example.
2391 */
2392 cache_all_regs(vcpu);
2393
2394 vcpu->mmio_is_write = 0;
2395 vcpu->arch.pio.string = 0;
2396
2397 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2398 int cs_db, cs_l;
2399 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2400
2401 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2402 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2403 vcpu->arch.emulate_ctxt.mode =
2404 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2405 ? X86EMUL_MODE_REAL : cs_l
2406 ? X86EMUL_MODE_PROT64 : cs_db
2407 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2408
2409 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2410
2411 /* Reject the instructions other than VMCALL/VMMCALL when
2412 * try to emulate invalid opcode */
2413 c = &vcpu->arch.emulate_ctxt.decode;
2414 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2415 (!(c->twobyte && c->b == 0x01 &&
2416 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2417 c->modrm_mod == 3 && c->modrm_rm == 1)))
2418 return EMULATE_FAIL;
2419
2420 ++vcpu->stat.insn_emulation;
2421 if (r) {
2422 ++vcpu->stat.insn_emulation_fail;
2423 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2424 return EMULATE_DONE;
2425 return EMULATE_FAIL;
2426 }
2427 }
2428
2429 if (emulation_type & EMULTYPE_SKIP) {
2430 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2431 return EMULATE_DONE;
2432 }
2433
2434 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2435 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2436
2437 if (r == 0)
2438 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2439
2440 if (vcpu->arch.pio.string)
2441 return EMULATE_DO_MMIO;
2442
2443 if ((r || vcpu->mmio_is_write) && run) {
2444 run->exit_reason = KVM_EXIT_MMIO;
2445 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2446 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2447 run->mmio.len = vcpu->mmio_size;
2448 run->mmio.is_write = vcpu->mmio_is_write;
2449 }
2450
2451 if (r) {
2452 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2453 return EMULATE_DONE;
2454 if (!vcpu->mmio_needed) {
2455 kvm_report_emulation_failure(vcpu, "mmio");
2456 return EMULATE_FAIL;
2457 }
2458 return EMULATE_DO_MMIO;
2459 }
2460
2461 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2462
2463 if (vcpu->mmio_is_write) {
2464 vcpu->mmio_needed = 0;
2465 return EMULATE_DO_MMIO;
2466 }
2467
2468 return EMULATE_DONE;
2469 }
2470 EXPORT_SYMBOL_GPL(emulate_instruction);
2471
2472 static int pio_copy_data(struct kvm_vcpu *vcpu)
2473 {
2474 void *p = vcpu->arch.pio_data;
2475 gva_t q = vcpu->arch.pio.guest_gva;
2476 unsigned bytes;
2477 int ret;
2478
2479 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2480 if (vcpu->arch.pio.in)
2481 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2482 else
2483 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2484 return ret;
2485 }
2486
2487 int complete_pio(struct kvm_vcpu *vcpu)
2488 {
2489 struct kvm_pio_request *io = &vcpu->arch.pio;
2490 long delta;
2491 int r;
2492 unsigned long val;
2493
2494 if (!io->string) {
2495 if (io->in) {
2496 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2497 memcpy(&val, vcpu->arch.pio_data, io->size);
2498 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2499 }
2500 } else {
2501 if (io->in) {
2502 r = pio_copy_data(vcpu);
2503 if (r)
2504 return r;
2505 }
2506
2507 delta = 1;
2508 if (io->rep) {
2509 delta *= io->cur_count;
2510 /*
2511 * The size of the register should really depend on
2512 * current address size.
2513 */
2514 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2515 val -= delta;
2516 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2517 }
2518 if (io->down)
2519 delta = -delta;
2520 delta *= io->size;
2521 if (io->in) {
2522 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2523 val += delta;
2524 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2525 } else {
2526 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2527 val += delta;
2528 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2529 }
2530 }
2531
2532 io->count -= io->cur_count;
2533 io->cur_count = 0;
2534
2535 return 0;
2536 }
2537
2538 static void kernel_pio(struct kvm_io_device *pio_dev,
2539 struct kvm_vcpu *vcpu,
2540 void *pd)
2541 {
2542 /* TODO: String I/O for in kernel device */
2543
2544 mutex_lock(&vcpu->kvm->lock);
2545 if (vcpu->arch.pio.in)
2546 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2547 vcpu->arch.pio.size,
2548 pd);
2549 else
2550 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2551 vcpu->arch.pio.size,
2552 pd);
2553 mutex_unlock(&vcpu->kvm->lock);
2554 }
2555
2556 static void pio_string_write(struct kvm_io_device *pio_dev,
2557 struct kvm_vcpu *vcpu)
2558 {
2559 struct kvm_pio_request *io = &vcpu->arch.pio;
2560 void *pd = vcpu->arch.pio_data;
2561 int i;
2562
2563 mutex_lock(&vcpu->kvm->lock);
2564 for (i = 0; i < io->cur_count; i++) {
2565 kvm_iodevice_write(pio_dev, io->port,
2566 io->size,
2567 pd);
2568 pd += io->size;
2569 }
2570 mutex_unlock(&vcpu->kvm->lock);
2571 }
2572
2573 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2574 gpa_t addr, int len,
2575 int is_write)
2576 {
2577 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2578 }
2579
2580 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2581 int size, unsigned port)
2582 {
2583 struct kvm_io_device *pio_dev;
2584 unsigned long val;
2585
2586 vcpu->run->exit_reason = KVM_EXIT_IO;
2587 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2588 vcpu->run->io.size = vcpu->arch.pio.size = size;
2589 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2590 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2591 vcpu->run->io.port = vcpu->arch.pio.port = port;
2592 vcpu->arch.pio.in = in;
2593 vcpu->arch.pio.string = 0;
2594 vcpu->arch.pio.down = 0;
2595 vcpu->arch.pio.rep = 0;
2596
2597 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2598 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2599 handler);
2600 else
2601 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2602 handler);
2603
2604 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2605 memcpy(vcpu->arch.pio_data, &val, 4);
2606
2607 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2608 if (pio_dev) {
2609 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2610 complete_pio(vcpu);
2611 return 1;
2612 }
2613 return 0;
2614 }
2615 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2616
2617 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2618 int size, unsigned long count, int down,
2619 gva_t address, int rep, unsigned port)
2620 {
2621 unsigned now, in_page;
2622 int ret = 0;
2623 struct kvm_io_device *pio_dev;
2624
2625 vcpu->run->exit_reason = KVM_EXIT_IO;
2626 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2627 vcpu->run->io.size = vcpu->arch.pio.size = size;
2628 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2629 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2630 vcpu->run->io.port = vcpu->arch.pio.port = port;
2631 vcpu->arch.pio.in = in;
2632 vcpu->arch.pio.string = 1;
2633 vcpu->arch.pio.down = down;
2634 vcpu->arch.pio.rep = rep;
2635
2636 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2637 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2638 handler);
2639 else
2640 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2641 handler);
2642
2643 if (!count) {
2644 kvm_x86_ops->skip_emulated_instruction(vcpu);
2645 return 1;
2646 }
2647
2648 if (!down)
2649 in_page = PAGE_SIZE - offset_in_page(address);
2650 else
2651 in_page = offset_in_page(address) + size;
2652 now = min(count, (unsigned long)in_page / size);
2653 if (!now)
2654 now = 1;
2655 if (down) {
2656 /*
2657 * String I/O in reverse. Yuck. Kill the guest, fix later.
2658 */
2659 pr_unimpl(vcpu, "guest string pio down\n");
2660 kvm_inject_gp(vcpu, 0);
2661 return 1;
2662 }
2663 vcpu->run->io.count = now;
2664 vcpu->arch.pio.cur_count = now;
2665
2666 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2667 kvm_x86_ops->skip_emulated_instruction(vcpu);
2668
2669 vcpu->arch.pio.guest_gva = address;
2670
2671 pio_dev = vcpu_find_pio_dev(vcpu, port,
2672 vcpu->arch.pio.cur_count,
2673 !vcpu->arch.pio.in);
2674 if (!vcpu->arch.pio.in) {
2675 /* string PIO write */
2676 ret = pio_copy_data(vcpu);
2677 if (ret == X86EMUL_PROPAGATE_FAULT) {
2678 kvm_inject_gp(vcpu, 0);
2679 return 1;
2680 }
2681 if (ret == 0 && pio_dev) {
2682 pio_string_write(pio_dev, vcpu);
2683 complete_pio(vcpu);
2684 if (vcpu->arch.pio.count == 0)
2685 ret = 1;
2686 }
2687 } else if (pio_dev)
2688 pr_unimpl(vcpu, "no string pio read support yet, "
2689 "port %x size %d count %ld\n",
2690 port, size, count);
2691
2692 return ret;
2693 }
2694 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2695
2696 static void bounce_off(void *info)
2697 {
2698 /* nothing */
2699 }
2700
2701 static unsigned int ref_freq;
2702 static unsigned long tsc_khz_ref;
2703
2704 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2705 void *data)
2706 {
2707 struct cpufreq_freqs *freq = data;
2708 struct kvm *kvm;
2709 struct kvm_vcpu *vcpu;
2710 int i, send_ipi = 0;
2711
2712 if (!ref_freq)
2713 ref_freq = freq->old;
2714
2715 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2716 return 0;
2717 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2718 return 0;
2719 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2720
2721 spin_lock(&kvm_lock);
2722 list_for_each_entry(kvm, &vm_list, vm_list) {
2723 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2724 vcpu = kvm->vcpus[i];
2725 if (!vcpu)
2726 continue;
2727 if (vcpu->cpu != freq->cpu)
2728 continue;
2729 if (!kvm_request_guest_time_update(vcpu))
2730 continue;
2731 if (vcpu->cpu != smp_processor_id())
2732 send_ipi++;
2733 }
2734 }
2735 spin_unlock(&kvm_lock);
2736
2737 if (freq->old < freq->new && send_ipi) {
2738 /*
2739 * We upscale the frequency. Must make the guest
2740 * doesn't see old kvmclock values while running with
2741 * the new frequency, otherwise we risk the guest sees
2742 * time go backwards.
2743 *
2744 * In case we update the frequency for another cpu
2745 * (which might be in guest context) send an interrupt
2746 * to kick the cpu out of guest context. Next time
2747 * guest context is entered kvmclock will be updated,
2748 * so the guest will not see stale values.
2749 */
2750 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2751 }
2752 return 0;
2753 }
2754
2755 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2756 .notifier_call = kvmclock_cpufreq_notifier
2757 };
2758
2759 int kvm_arch_init(void *opaque)
2760 {
2761 int r, cpu;
2762 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2763
2764 if (kvm_x86_ops) {
2765 printk(KERN_ERR "kvm: already loaded the other module\n");
2766 r = -EEXIST;
2767 goto out;
2768 }
2769
2770 if (!ops->cpu_has_kvm_support()) {
2771 printk(KERN_ERR "kvm: no hardware support\n");
2772 r = -EOPNOTSUPP;
2773 goto out;
2774 }
2775 if (ops->disabled_by_bios()) {
2776 printk(KERN_ERR "kvm: disabled by bios\n");
2777 r = -EOPNOTSUPP;
2778 goto out;
2779 }
2780
2781 r = kvm_mmu_module_init();
2782 if (r)
2783 goto out;
2784
2785 kvm_init_msr_list();
2786
2787 kvm_x86_ops = ops;
2788 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2789 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2790 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2791 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2792
2793 for_each_possible_cpu(cpu)
2794 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2795 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2796 tsc_khz_ref = tsc_khz;
2797 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2798 CPUFREQ_TRANSITION_NOTIFIER);
2799 }
2800
2801 return 0;
2802
2803 out:
2804 return r;
2805 }
2806
2807 void kvm_arch_exit(void)
2808 {
2809 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2810 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2811 CPUFREQ_TRANSITION_NOTIFIER);
2812 kvm_x86_ops = NULL;
2813 kvm_mmu_module_exit();
2814 }
2815
2816 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2817 {
2818 ++vcpu->stat.halt_exits;
2819 KVMTRACE_0D(HLT, vcpu, handler);
2820 if (irqchip_in_kernel(vcpu->kvm)) {
2821 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2822 return 1;
2823 } else {
2824 vcpu->run->exit_reason = KVM_EXIT_HLT;
2825 return 0;
2826 }
2827 }
2828 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2829
2830 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2831 unsigned long a1)
2832 {
2833 if (is_long_mode(vcpu))
2834 return a0;
2835 else
2836 return a0 | ((gpa_t)a1 << 32);
2837 }
2838
2839 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2840 {
2841 unsigned long nr, a0, a1, a2, a3, ret;
2842 int r = 1;
2843
2844 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2845 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2846 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2847 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2848 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2849
2850 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2851
2852 if (!is_long_mode(vcpu)) {
2853 nr &= 0xFFFFFFFF;
2854 a0 &= 0xFFFFFFFF;
2855 a1 &= 0xFFFFFFFF;
2856 a2 &= 0xFFFFFFFF;
2857 a3 &= 0xFFFFFFFF;
2858 }
2859
2860 switch (nr) {
2861 case KVM_HC_VAPIC_POLL_IRQ:
2862 ret = 0;
2863 break;
2864 case KVM_HC_MMU_OP:
2865 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2866 break;
2867 default:
2868 ret = -KVM_ENOSYS;
2869 break;
2870 }
2871 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2872 ++vcpu->stat.hypercalls;
2873 return r;
2874 }
2875 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2876
2877 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2878 {
2879 char instruction[3];
2880 int ret = 0;
2881 unsigned long rip = kvm_rip_read(vcpu);
2882
2883
2884 /*
2885 * Blow out the MMU to ensure that no other VCPU has an active mapping
2886 * to ensure that the updated hypercall appears atomically across all
2887 * VCPUs.
2888 */
2889 kvm_mmu_zap_all(vcpu->kvm);
2890
2891 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2892 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2893 != X86EMUL_CONTINUE)
2894 ret = -EFAULT;
2895
2896 return ret;
2897 }
2898
2899 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2900 {
2901 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2902 }
2903
2904 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2905 {
2906 struct descriptor_table dt = { limit, base };
2907
2908 kvm_x86_ops->set_gdt(vcpu, &dt);
2909 }
2910
2911 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2912 {
2913 struct descriptor_table dt = { limit, base };
2914
2915 kvm_x86_ops->set_idt(vcpu, &dt);
2916 }
2917
2918 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2919 unsigned long *rflags)
2920 {
2921 kvm_lmsw(vcpu, msw);
2922 *rflags = kvm_x86_ops->get_rflags(vcpu);
2923 }
2924
2925 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2926 {
2927 unsigned long value;
2928
2929 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2930 switch (cr) {
2931 case 0:
2932 value = vcpu->arch.cr0;
2933 break;
2934 case 2:
2935 value = vcpu->arch.cr2;
2936 break;
2937 case 3:
2938 value = vcpu->arch.cr3;
2939 break;
2940 case 4:
2941 value = vcpu->arch.cr4;
2942 break;
2943 case 8:
2944 value = kvm_get_cr8(vcpu);
2945 break;
2946 default:
2947 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2948 return 0;
2949 }
2950 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2951 (u32)((u64)value >> 32), handler);
2952
2953 return value;
2954 }
2955
2956 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2957 unsigned long *rflags)
2958 {
2959 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2960 (u32)((u64)val >> 32), handler);
2961
2962 switch (cr) {
2963 case 0:
2964 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2965 *rflags = kvm_x86_ops->get_rflags(vcpu);
2966 break;
2967 case 2:
2968 vcpu->arch.cr2 = val;
2969 break;
2970 case 3:
2971 kvm_set_cr3(vcpu, val);
2972 break;
2973 case 4:
2974 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2975 break;
2976 case 8:
2977 kvm_set_cr8(vcpu, val & 0xfUL);
2978 break;
2979 default:
2980 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2981 }
2982 }
2983
2984 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2985 {
2986 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2987 int j, nent = vcpu->arch.cpuid_nent;
2988
2989 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2990 /* when no next entry is found, the current entry[i] is reselected */
2991 for (j = i + 1; ; j = (j + 1) % nent) {
2992 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2993 if (ej->function == e->function) {
2994 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2995 return j;
2996 }
2997 }
2998 return 0; /* silence gcc, even though control never reaches here */
2999 }
3000
3001 /* find an entry with matching function, matching index (if needed), and that
3002 * should be read next (if it's stateful) */
3003 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3004 u32 function, u32 index)
3005 {
3006 if (e->function != function)
3007 return 0;
3008 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3009 return 0;
3010 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3011 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3012 return 0;
3013 return 1;
3014 }
3015
3016 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3017 u32 function, u32 index)
3018 {
3019 int i;
3020 struct kvm_cpuid_entry2 *best = NULL;
3021
3022 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3023 struct kvm_cpuid_entry2 *e;
3024
3025 e = &vcpu->arch.cpuid_entries[i];
3026 if (is_matching_cpuid_entry(e, function, index)) {
3027 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3028 move_to_next_stateful_cpuid_entry(vcpu, i);
3029 best = e;
3030 break;
3031 }
3032 /*
3033 * Both basic or both extended?
3034 */
3035 if (((e->function ^ function) & 0x80000000) == 0)
3036 if (!best || e->function > best->function)
3037 best = e;
3038 }
3039 return best;
3040 }
3041
3042 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3043 {
3044 struct kvm_cpuid_entry2 *best;
3045
3046 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3047 if (best)
3048 return best->eax & 0xff;
3049 return 36;
3050 }
3051
3052 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3053 {
3054 u32 function, index;
3055 struct kvm_cpuid_entry2 *best;
3056
3057 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3058 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3059 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3060 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3061 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3062 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3063 best = kvm_find_cpuid_entry(vcpu, function, index);
3064 if (best) {
3065 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3066 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3067 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3068 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3069 }
3070 kvm_x86_ops->skip_emulated_instruction(vcpu);
3071 KVMTRACE_5D(CPUID, vcpu, function,
3072 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3073 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3074 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3075 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3076 }
3077 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3078
3079 /*
3080 * Check if userspace requested an interrupt window, and that the
3081 * interrupt window is open.
3082 *
3083 * No need to exit to userspace if we already have an interrupt queued.
3084 */
3085 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3086 struct kvm_run *kvm_run)
3087 {
3088 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3089 kvm_run->request_interrupt_window &&
3090 kvm_arch_interrupt_allowed(vcpu));
3091 }
3092
3093 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3094 struct kvm_run *kvm_run)
3095 {
3096 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3097 kvm_run->cr8 = kvm_get_cr8(vcpu);
3098 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3099 if (irqchip_in_kernel(vcpu->kvm))
3100 kvm_run->ready_for_interrupt_injection = 1;
3101 else
3102 kvm_run->ready_for_interrupt_injection =
3103 kvm_arch_interrupt_allowed(vcpu) &&
3104 !kvm_cpu_has_interrupt(vcpu) &&
3105 !kvm_event_needs_reinjection(vcpu);
3106 }
3107
3108 static void vapic_enter(struct kvm_vcpu *vcpu)
3109 {
3110 struct kvm_lapic *apic = vcpu->arch.apic;
3111 struct page *page;
3112
3113 if (!apic || !apic->vapic_addr)
3114 return;
3115
3116 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3117
3118 vcpu->arch.apic->vapic_page = page;
3119 }
3120
3121 static void vapic_exit(struct kvm_vcpu *vcpu)
3122 {
3123 struct kvm_lapic *apic = vcpu->arch.apic;
3124
3125 if (!apic || !apic->vapic_addr)
3126 return;
3127
3128 down_read(&vcpu->kvm->slots_lock);
3129 kvm_release_page_dirty(apic->vapic_page);
3130 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3131 up_read(&vcpu->kvm->slots_lock);
3132 }
3133
3134 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3135 {
3136 int max_irr, tpr;
3137
3138 if (!kvm_x86_ops->update_cr8_intercept)
3139 return;
3140
3141 if (!vcpu->arch.apic->vapic_addr)
3142 max_irr = kvm_lapic_find_highest_irr(vcpu);
3143 else
3144 max_irr = -1;
3145
3146 if (max_irr != -1)
3147 max_irr >>= 4;
3148
3149 tpr = kvm_lapic_get_cr8(vcpu);
3150
3151 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3152 }
3153
3154 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3155 {
3156 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3157 kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
3158
3159 /* try to reinject previous events if any */
3160 if (vcpu->arch.nmi_injected) {
3161 kvm_x86_ops->set_nmi(vcpu);
3162 return;
3163 }
3164
3165 if (vcpu->arch.interrupt.pending) {
3166 kvm_x86_ops->set_irq(vcpu);
3167 return;
3168 }
3169
3170 /* try to inject new event if pending */
3171 if (vcpu->arch.nmi_pending) {
3172 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3173 vcpu->arch.nmi_pending = false;
3174 vcpu->arch.nmi_injected = true;
3175 kvm_x86_ops->set_nmi(vcpu);
3176 }
3177 } else if (kvm_cpu_has_interrupt(vcpu)) {
3178 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3179 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3180 false);
3181 kvm_x86_ops->set_irq(vcpu);
3182 }
3183 }
3184 }
3185
3186 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3187 {
3188 int r;
3189 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3190 kvm_run->request_interrupt_window;
3191
3192 if (vcpu->requests)
3193 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3194 kvm_mmu_unload(vcpu);
3195
3196 r = kvm_mmu_reload(vcpu);
3197 if (unlikely(r))
3198 goto out;
3199
3200 if (vcpu->requests) {
3201 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3202 __kvm_migrate_timers(vcpu);
3203 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3204 kvm_write_guest_time(vcpu);
3205 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3206 kvm_mmu_sync_roots(vcpu);
3207 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3208 kvm_x86_ops->tlb_flush(vcpu);
3209 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3210 &vcpu->requests)) {
3211 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3212 r = 0;
3213 goto out;
3214 }
3215 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3216 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3217 r = 0;
3218 goto out;
3219 }
3220 }
3221
3222 preempt_disable();
3223
3224 kvm_x86_ops->prepare_guest_switch(vcpu);
3225 kvm_load_guest_fpu(vcpu);
3226
3227 local_irq_disable();
3228
3229 clear_bit(KVM_REQ_KICK, &vcpu->requests);
3230 smp_mb__after_clear_bit();
3231
3232 if (vcpu->requests || need_resched() || signal_pending(current)) {
3233 local_irq_enable();
3234 preempt_enable();
3235 r = 1;
3236 goto out;
3237 }
3238
3239 if (vcpu->arch.exception.pending)
3240 __queue_exception(vcpu);
3241 else
3242 inject_pending_irq(vcpu, kvm_run);
3243
3244 /* enable NMI/IRQ window open exits if needed */
3245 if (vcpu->arch.nmi_pending)
3246 kvm_x86_ops->enable_nmi_window(vcpu);
3247 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3248 kvm_x86_ops->enable_irq_window(vcpu);
3249
3250 if (kvm_lapic_enabled(vcpu)) {
3251 update_cr8_intercept(vcpu);
3252 kvm_lapic_sync_to_vapic(vcpu);
3253 }
3254
3255 up_read(&vcpu->kvm->slots_lock);
3256
3257 kvm_guest_enter();
3258
3259 get_debugreg(vcpu->arch.host_dr6, 6);
3260 get_debugreg(vcpu->arch.host_dr7, 7);
3261 if (unlikely(vcpu->arch.switch_db_regs)) {
3262 get_debugreg(vcpu->arch.host_db[0], 0);
3263 get_debugreg(vcpu->arch.host_db[1], 1);
3264 get_debugreg(vcpu->arch.host_db[2], 2);
3265 get_debugreg(vcpu->arch.host_db[3], 3);
3266
3267 set_debugreg(0, 7);
3268 set_debugreg(vcpu->arch.eff_db[0], 0);
3269 set_debugreg(vcpu->arch.eff_db[1], 1);
3270 set_debugreg(vcpu->arch.eff_db[2], 2);
3271 set_debugreg(vcpu->arch.eff_db[3], 3);
3272 }
3273
3274 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3275 kvm_x86_ops->run(vcpu, kvm_run);
3276
3277 if (unlikely(vcpu->arch.switch_db_regs)) {
3278 set_debugreg(0, 7);
3279 set_debugreg(vcpu->arch.host_db[0], 0);
3280 set_debugreg(vcpu->arch.host_db[1], 1);
3281 set_debugreg(vcpu->arch.host_db[2], 2);
3282 set_debugreg(vcpu->arch.host_db[3], 3);
3283 }
3284 set_debugreg(vcpu->arch.host_dr6, 6);
3285 set_debugreg(vcpu->arch.host_dr7, 7);
3286
3287 set_bit(KVM_REQ_KICK, &vcpu->requests);
3288 local_irq_enable();
3289
3290 ++vcpu->stat.exits;
3291
3292 /*
3293 * We must have an instruction between local_irq_enable() and
3294 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3295 * the interrupt shadow. The stat.exits increment will do nicely.
3296 * But we need to prevent reordering, hence this barrier():
3297 */
3298 barrier();
3299
3300 kvm_guest_exit();
3301
3302 preempt_enable();
3303
3304 down_read(&vcpu->kvm->slots_lock);
3305
3306 /*
3307 * Profile KVM exit RIPs:
3308 */
3309 if (unlikely(prof_on == KVM_PROFILING)) {
3310 unsigned long rip = kvm_rip_read(vcpu);
3311 profile_hit(KVM_PROFILING, (void *)rip);
3312 }
3313
3314
3315 kvm_lapic_sync_from_vapic(vcpu);
3316
3317 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3318 out:
3319 return r;
3320 }
3321
3322
3323 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3324 {
3325 int r;
3326
3327 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3328 pr_debug("vcpu %d received sipi with vector # %x\n",
3329 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3330 kvm_lapic_reset(vcpu);
3331 r = kvm_arch_vcpu_reset(vcpu);
3332 if (r)
3333 return r;
3334 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3335 }
3336
3337 down_read(&vcpu->kvm->slots_lock);
3338 vapic_enter(vcpu);
3339
3340 r = 1;
3341 while (r > 0) {
3342 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3343 r = vcpu_enter_guest(vcpu, kvm_run);
3344 else {
3345 up_read(&vcpu->kvm->slots_lock);
3346 kvm_vcpu_block(vcpu);
3347 down_read(&vcpu->kvm->slots_lock);
3348 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3349 {
3350 switch(vcpu->arch.mp_state) {
3351 case KVM_MP_STATE_HALTED:
3352 vcpu->arch.mp_state =
3353 KVM_MP_STATE_RUNNABLE;
3354 case KVM_MP_STATE_RUNNABLE:
3355 break;
3356 case KVM_MP_STATE_SIPI_RECEIVED:
3357 default:
3358 r = -EINTR;
3359 break;
3360 }
3361 }
3362 }
3363
3364 if (r <= 0)
3365 break;
3366
3367 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3368 if (kvm_cpu_has_pending_timer(vcpu))
3369 kvm_inject_pending_timer_irqs(vcpu);
3370
3371 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3372 r = -EINTR;
3373 kvm_run->exit_reason = KVM_EXIT_INTR;
3374 ++vcpu->stat.request_irq_exits;
3375 }
3376 if (signal_pending(current)) {
3377 r = -EINTR;
3378 kvm_run->exit_reason = KVM_EXIT_INTR;
3379 ++vcpu->stat.signal_exits;
3380 }
3381 if (need_resched()) {
3382 up_read(&vcpu->kvm->slots_lock);
3383 kvm_resched(vcpu);
3384 down_read(&vcpu->kvm->slots_lock);
3385 }
3386 }
3387
3388 up_read(&vcpu->kvm->slots_lock);
3389 post_kvm_run_save(vcpu, kvm_run);
3390
3391 vapic_exit(vcpu);
3392
3393 return r;
3394 }
3395
3396 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3397 {
3398 int r;
3399 sigset_t sigsaved;
3400
3401 vcpu_load(vcpu);
3402
3403 if (vcpu->sigset_active)
3404 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3405
3406 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3407 kvm_vcpu_block(vcpu);
3408 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3409 r = -EAGAIN;
3410 goto out;
3411 }
3412
3413 /* re-sync apic's tpr */
3414 if (!irqchip_in_kernel(vcpu->kvm))
3415 kvm_set_cr8(vcpu, kvm_run->cr8);
3416
3417 if (vcpu->arch.pio.cur_count) {
3418 r = complete_pio(vcpu);
3419 if (r)
3420 goto out;
3421 }
3422 #if CONFIG_HAS_IOMEM
3423 if (vcpu->mmio_needed) {
3424 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3425 vcpu->mmio_read_completed = 1;
3426 vcpu->mmio_needed = 0;
3427
3428 down_read(&vcpu->kvm->slots_lock);
3429 r = emulate_instruction(vcpu, kvm_run,
3430 vcpu->arch.mmio_fault_cr2, 0,
3431 EMULTYPE_NO_DECODE);
3432 up_read(&vcpu->kvm->slots_lock);
3433 if (r == EMULATE_DO_MMIO) {
3434 /*
3435 * Read-modify-write. Back to userspace.
3436 */
3437 r = 0;
3438 goto out;
3439 }
3440 }
3441 #endif
3442 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3443 kvm_register_write(vcpu, VCPU_REGS_RAX,
3444 kvm_run->hypercall.ret);
3445
3446 r = __vcpu_run(vcpu, kvm_run);
3447
3448 out:
3449 if (vcpu->sigset_active)
3450 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3451
3452 vcpu_put(vcpu);
3453 return r;
3454 }
3455
3456 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3457 {
3458 vcpu_load(vcpu);
3459
3460 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3461 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3462 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3463 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3464 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3465 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3466 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3467 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3468 #ifdef CONFIG_X86_64
3469 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3470 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3471 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3472 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3473 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3474 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3475 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3476 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3477 #endif
3478
3479 regs->rip = kvm_rip_read(vcpu);
3480 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3481
3482 /*
3483 * Don't leak debug flags in case they were set for guest debugging
3484 */
3485 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3486 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3487
3488 vcpu_put(vcpu);
3489
3490 return 0;
3491 }
3492
3493 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3494 {
3495 vcpu_load(vcpu);
3496
3497 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3498 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3499 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3500 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3501 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3502 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3503 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3504 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3505 #ifdef CONFIG_X86_64
3506 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3507 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3508 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3509 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3510 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3511 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3512 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3513 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3514
3515 #endif
3516
3517 kvm_rip_write(vcpu, regs->rip);
3518 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3519
3520
3521 vcpu->arch.exception.pending = false;
3522
3523 vcpu_put(vcpu);
3524
3525 return 0;
3526 }
3527
3528 void kvm_get_segment(struct kvm_vcpu *vcpu,
3529 struct kvm_segment *var, int seg)
3530 {
3531 kvm_x86_ops->get_segment(vcpu, var, seg);
3532 }
3533
3534 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3535 {
3536 struct kvm_segment cs;
3537
3538 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3539 *db = cs.db;
3540 *l = cs.l;
3541 }
3542 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3543
3544 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3545 struct kvm_sregs *sregs)
3546 {
3547 struct descriptor_table dt;
3548
3549 vcpu_load(vcpu);
3550
3551 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3552 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3553 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3554 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3555 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3556 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3557
3558 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3559 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3560
3561 kvm_x86_ops->get_idt(vcpu, &dt);
3562 sregs->idt.limit = dt.limit;
3563 sregs->idt.base = dt.base;
3564 kvm_x86_ops->get_gdt(vcpu, &dt);
3565 sregs->gdt.limit = dt.limit;
3566 sregs->gdt.base = dt.base;
3567
3568 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3569 sregs->cr0 = vcpu->arch.cr0;
3570 sregs->cr2 = vcpu->arch.cr2;
3571 sregs->cr3 = vcpu->arch.cr3;
3572 sregs->cr4 = vcpu->arch.cr4;
3573 sregs->cr8 = kvm_get_cr8(vcpu);
3574 sregs->efer = vcpu->arch.shadow_efer;
3575 sregs->apic_base = kvm_get_apic_base(vcpu);
3576
3577 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
3578
3579 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
3580 set_bit(vcpu->arch.interrupt.nr,
3581 (unsigned long *)sregs->interrupt_bitmap);
3582
3583 vcpu_put(vcpu);
3584
3585 return 0;
3586 }
3587
3588 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3589 struct kvm_mp_state *mp_state)
3590 {
3591 vcpu_load(vcpu);
3592 mp_state->mp_state = vcpu->arch.mp_state;
3593 vcpu_put(vcpu);
3594 return 0;
3595 }
3596
3597 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3598 struct kvm_mp_state *mp_state)
3599 {
3600 vcpu_load(vcpu);
3601 vcpu->arch.mp_state = mp_state->mp_state;
3602 vcpu_put(vcpu);
3603 return 0;
3604 }
3605
3606 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3607 struct kvm_segment *var, int seg)
3608 {
3609 kvm_x86_ops->set_segment(vcpu, var, seg);
3610 }
3611
3612 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3613 struct kvm_segment *kvm_desct)
3614 {
3615 kvm_desct->base = seg_desc->base0;
3616 kvm_desct->base |= seg_desc->base1 << 16;
3617 kvm_desct->base |= seg_desc->base2 << 24;
3618 kvm_desct->limit = seg_desc->limit0;
3619 kvm_desct->limit |= seg_desc->limit << 16;
3620 if (seg_desc->g) {
3621 kvm_desct->limit <<= 12;
3622 kvm_desct->limit |= 0xfff;
3623 }
3624 kvm_desct->selector = selector;
3625 kvm_desct->type = seg_desc->type;
3626 kvm_desct->present = seg_desc->p;
3627 kvm_desct->dpl = seg_desc->dpl;
3628 kvm_desct->db = seg_desc->d;
3629 kvm_desct->s = seg_desc->s;
3630 kvm_desct->l = seg_desc->l;
3631 kvm_desct->g = seg_desc->g;
3632 kvm_desct->avl = seg_desc->avl;
3633 if (!selector)
3634 kvm_desct->unusable = 1;
3635 else
3636 kvm_desct->unusable = 0;
3637 kvm_desct->padding = 0;
3638 }
3639
3640 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3641 u16 selector,
3642 struct descriptor_table *dtable)
3643 {
3644 if (selector & 1 << 2) {
3645 struct kvm_segment kvm_seg;
3646
3647 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3648
3649 if (kvm_seg.unusable)
3650 dtable->limit = 0;
3651 else
3652 dtable->limit = kvm_seg.limit;
3653 dtable->base = kvm_seg.base;
3654 }
3655 else
3656 kvm_x86_ops->get_gdt(vcpu, dtable);
3657 }
3658
3659 /* allowed just for 8 bytes segments */
3660 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3661 struct desc_struct *seg_desc)
3662 {
3663 gpa_t gpa;
3664 struct descriptor_table dtable;
3665 u16 index = selector >> 3;
3666
3667 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3668
3669 if (dtable.limit < index * 8 + 7) {
3670 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3671 return 1;
3672 }
3673 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3674 gpa += index * 8;
3675 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3676 }
3677
3678 /* allowed just for 8 bytes segments */
3679 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3680 struct desc_struct *seg_desc)
3681 {
3682 gpa_t gpa;
3683 struct descriptor_table dtable;
3684 u16 index = selector >> 3;
3685
3686 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3687
3688 if (dtable.limit < index * 8 + 7)
3689 return 1;
3690 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3691 gpa += index * 8;
3692 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3693 }
3694
3695 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3696 struct desc_struct *seg_desc)
3697 {
3698 u32 base_addr;
3699
3700 base_addr = seg_desc->base0;
3701 base_addr |= (seg_desc->base1 << 16);
3702 base_addr |= (seg_desc->base2 << 24);
3703
3704 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3705 }
3706
3707 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3708 {
3709 struct kvm_segment kvm_seg;
3710
3711 kvm_get_segment(vcpu, &kvm_seg, seg);
3712 return kvm_seg.selector;
3713 }
3714
3715 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3716 u16 selector,
3717 struct kvm_segment *kvm_seg)
3718 {
3719 struct desc_struct seg_desc;
3720
3721 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3722 return 1;
3723 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3724 return 0;
3725 }
3726
3727 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3728 {
3729 struct kvm_segment segvar = {
3730 .base = selector << 4,
3731 .limit = 0xffff,
3732 .selector = selector,
3733 .type = 3,
3734 .present = 1,
3735 .dpl = 3,
3736 .db = 0,
3737 .s = 1,
3738 .l = 0,
3739 .g = 0,
3740 .avl = 0,
3741 .unusable = 0,
3742 };
3743 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3744 return 0;
3745 }
3746
3747 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3748 int type_bits, int seg)
3749 {
3750 struct kvm_segment kvm_seg;
3751
3752 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3753 return kvm_load_realmode_segment(vcpu, selector, seg);
3754 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3755 return 1;
3756 kvm_seg.type |= type_bits;
3757
3758 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3759 seg != VCPU_SREG_LDTR)
3760 if (!kvm_seg.s)
3761 kvm_seg.unusable = 1;
3762
3763 kvm_set_segment(vcpu, &kvm_seg, seg);
3764 return 0;
3765 }
3766
3767 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3768 struct tss_segment_32 *tss)
3769 {
3770 tss->cr3 = vcpu->arch.cr3;
3771 tss->eip = kvm_rip_read(vcpu);
3772 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3773 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3774 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3775 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3776 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3777 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3778 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3779 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3780 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3781 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3782 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3783 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3784 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3785 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3786 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3787 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3788 }
3789
3790 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3791 struct tss_segment_32 *tss)
3792 {
3793 kvm_set_cr3(vcpu, tss->cr3);
3794
3795 kvm_rip_write(vcpu, tss->eip);
3796 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3797
3798 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3799 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3800 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3801 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3802 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3803 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3804 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3805 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3806
3807 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3808 return 1;
3809
3810 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3811 return 1;
3812
3813 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3814 return 1;
3815
3816 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3817 return 1;
3818
3819 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3820 return 1;
3821
3822 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3823 return 1;
3824
3825 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3826 return 1;
3827 return 0;
3828 }
3829
3830 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3831 struct tss_segment_16 *tss)
3832 {
3833 tss->ip = kvm_rip_read(vcpu);
3834 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3835 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3836 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3837 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3838 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3839 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3840 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3841 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3842 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3843
3844 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3845 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3846 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3847 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3848 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3849 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3850 }
3851
3852 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3853 struct tss_segment_16 *tss)
3854 {
3855 kvm_rip_write(vcpu, tss->ip);
3856 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3857 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3858 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3859 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3860 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3861 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3862 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3863 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3864 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3865
3866 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3867 return 1;
3868
3869 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3870 return 1;
3871
3872 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3873 return 1;
3874
3875 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3876 return 1;
3877
3878 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3879 return 1;
3880 return 0;
3881 }
3882
3883 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3884 u16 old_tss_sel, u32 old_tss_base,
3885 struct desc_struct *nseg_desc)
3886 {
3887 struct tss_segment_16 tss_segment_16;
3888 int ret = 0;
3889
3890 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3891 sizeof tss_segment_16))
3892 goto out;
3893
3894 save_state_to_tss16(vcpu, &tss_segment_16);
3895
3896 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3897 sizeof tss_segment_16))
3898 goto out;
3899
3900 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3901 &tss_segment_16, sizeof tss_segment_16))
3902 goto out;
3903
3904 if (old_tss_sel != 0xffff) {
3905 tss_segment_16.prev_task_link = old_tss_sel;
3906
3907 if (kvm_write_guest(vcpu->kvm,
3908 get_tss_base_addr(vcpu, nseg_desc),
3909 &tss_segment_16.prev_task_link,
3910 sizeof tss_segment_16.prev_task_link))
3911 goto out;
3912 }
3913
3914 if (load_state_from_tss16(vcpu, &tss_segment_16))
3915 goto out;
3916
3917 ret = 1;
3918 out:
3919 return ret;
3920 }
3921
3922 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3923 u16 old_tss_sel, u32 old_tss_base,
3924 struct desc_struct *nseg_desc)
3925 {
3926 struct tss_segment_32 tss_segment_32;
3927 int ret = 0;
3928
3929 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3930 sizeof tss_segment_32))
3931 goto out;
3932
3933 save_state_to_tss32(vcpu, &tss_segment_32);
3934
3935 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3936 sizeof tss_segment_32))
3937 goto out;
3938
3939 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3940 &tss_segment_32, sizeof tss_segment_32))
3941 goto out;
3942
3943 if (old_tss_sel != 0xffff) {
3944 tss_segment_32.prev_task_link = old_tss_sel;
3945
3946 if (kvm_write_guest(vcpu->kvm,
3947 get_tss_base_addr(vcpu, nseg_desc),
3948 &tss_segment_32.prev_task_link,
3949 sizeof tss_segment_32.prev_task_link))
3950 goto out;
3951 }
3952
3953 if (load_state_from_tss32(vcpu, &tss_segment_32))
3954 goto out;
3955
3956 ret = 1;
3957 out:
3958 return ret;
3959 }
3960
3961 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3962 {
3963 struct kvm_segment tr_seg;
3964 struct desc_struct cseg_desc;
3965 struct desc_struct nseg_desc;
3966 int ret = 0;
3967 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3968 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3969
3970 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3971
3972 /* FIXME: Handle errors. Failure to read either TSS or their
3973 * descriptors should generate a pagefault.
3974 */
3975 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3976 goto out;
3977
3978 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3979 goto out;
3980
3981 if (reason != TASK_SWITCH_IRET) {
3982 int cpl;
3983
3984 cpl = kvm_x86_ops->get_cpl(vcpu);
3985 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3986 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3987 return 1;
3988 }
3989 }
3990
3991 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3992 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3993 return 1;
3994 }
3995
3996 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3997 cseg_desc.type &= ~(1 << 1); //clear the B flag
3998 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3999 }
4000
4001 if (reason == TASK_SWITCH_IRET) {
4002 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4003 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4004 }
4005
4006 /* set back link to prev task only if NT bit is set in eflags
4007 note that old_tss_sel is not used afetr this point */
4008 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4009 old_tss_sel = 0xffff;
4010
4011 /* set back link to prev task only if NT bit is set in eflags
4012 note that old_tss_sel is not used afetr this point */
4013 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4014 old_tss_sel = 0xffff;
4015
4016 if (nseg_desc.type & 8)
4017 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4018 old_tss_base, &nseg_desc);
4019 else
4020 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4021 old_tss_base, &nseg_desc);
4022
4023 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4024 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4025 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4026 }
4027
4028 if (reason != TASK_SWITCH_IRET) {
4029 nseg_desc.type |= (1 << 1);
4030 save_guest_segment_descriptor(vcpu, tss_selector,
4031 &nseg_desc);
4032 }
4033
4034 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4035 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4036 tr_seg.type = 11;
4037 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4038 out:
4039 return ret;
4040 }
4041 EXPORT_SYMBOL_GPL(kvm_task_switch);
4042
4043 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4044 struct kvm_sregs *sregs)
4045 {
4046 int mmu_reset_needed = 0;
4047 int pending_vec, max_bits;
4048 struct descriptor_table dt;
4049
4050 vcpu_load(vcpu);
4051
4052 dt.limit = sregs->idt.limit;
4053 dt.base = sregs->idt.base;
4054 kvm_x86_ops->set_idt(vcpu, &dt);
4055 dt.limit = sregs->gdt.limit;
4056 dt.base = sregs->gdt.base;
4057 kvm_x86_ops->set_gdt(vcpu, &dt);
4058
4059 vcpu->arch.cr2 = sregs->cr2;
4060 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4061
4062 down_read(&vcpu->kvm->slots_lock);
4063 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4064 vcpu->arch.cr3 = sregs->cr3;
4065 else
4066 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4067 up_read(&vcpu->kvm->slots_lock);
4068
4069 kvm_set_cr8(vcpu, sregs->cr8);
4070
4071 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4072 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4073 kvm_set_apic_base(vcpu, sregs->apic_base);
4074
4075 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4076
4077 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4078 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4079 vcpu->arch.cr0 = sregs->cr0;
4080
4081 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4082 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4083 if (!is_long_mode(vcpu) && is_pae(vcpu))
4084 load_pdptrs(vcpu, vcpu->arch.cr3);
4085
4086 if (mmu_reset_needed)
4087 kvm_mmu_reset_context(vcpu);
4088
4089 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4090 pending_vec = find_first_bit(
4091 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4092 if (pending_vec < max_bits) {
4093 kvm_queue_interrupt(vcpu, pending_vec, false);
4094 pr_debug("Set back pending irq %d\n", pending_vec);
4095 if (irqchip_in_kernel(vcpu->kvm))
4096 kvm_pic_clear_isr_ack(vcpu->kvm);
4097 }
4098
4099 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4100 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4101 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4102 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4103 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4104 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4105
4106 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4107 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4108
4109 /* Older userspace won't unhalt the vcpu on reset. */
4110 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4111 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4112 !(vcpu->arch.cr0 & X86_CR0_PE))
4113 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4114
4115 vcpu_put(vcpu);
4116
4117 return 0;
4118 }
4119
4120 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4121 struct kvm_guest_debug *dbg)
4122 {
4123 int i, r;
4124
4125 vcpu_load(vcpu);
4126
4127 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4128 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4129 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4130 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4131 vcpu->arch.switch_db_regs =
4132 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4133 } else {
4134 for (i = 0; i < KVM_NR_DB_REGS; i++)
4135 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4136 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4137 }
4138
4139 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4140
4141 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4142 kvm_queue_exception(vcpu, DB_VECTOR);
4143 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4144 kvm_queue_exception(vcpu, BP_VECTOR);
4145
4146 vcpu_put(vcpu);
4147
4148 return r;
4149 }
4150
4151 /*
4152 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4153 * we have asm/x86/processor.h
4154 */
4155 struct fxsave {
4156 u16 cwd;
4157 u16 swd;
4158 u16 twd;
4159 u16 fop;
4160 u64 rip;
4161 u64 rdp;
4162 u32 mxcsr;
4163 u32 mxcsr_mask;
4164 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4165 #ifdef CONFIG_X86_64
4166 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4167 #else
4168 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4169 #endif
4170 };
4171
4172 /*
4173 * Translate a guest virtual address to a guest physical address.
4174 */
4175 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4176 struct kvm_translation *tr)
4177 {
4178 unsigned long vaddr = tr->linear_address;
4179 gpa_t gpa;
4180
4181 vcpu_load(vcpu);
4182 down_read(&vcpu->kvm->slots_lock);
4183 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4184 up_read(&vcpu->kvm->slots_lock);
4185 tr->physical_address = gpa;
4186 tr->valid = gpa != UNMAPPED_GVA;
4187 tr->writeable = 1;
4188 tr->usermode = 0;
4189 vcpu_put(vcpu);
4190
4191 return 0;
4192 }
4193
4194 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4195 {
4196 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4197
4198 vcpu_load(vcpu);
4199
4200 memcpy(fpu->fpr, fxsave->st_space, 128);
4201 fpu->fcw = fxsave->cwd;
4202 fpu->fsw = fxsave->swd;
4203 fpu->ftwx = fxsave->twd;
4204 fpu->last_opcode = fxsave->fop;
4205 fpu->last_ip = fxsave->rip;
4206 fpu->last_dp = fxsave->rdp;
4207 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4208
4209 vcpu_put(vcpu);
4210
4211 return 0;
4212 }
4213
4214 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4215 {
4216 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4217
4218 vcpu_load(vcpu);
4219
4220 memcpy(fxsave->st_space, fpu->fpr, 128);
4221 fxsave->cwd = fpu->fcw;
4222 fxsave->swd = fpu->fsw;
4223 fxsave->twd = fpu->ftwx;
4224 fxsave->fop = fpu->last_opcode;
4225 fxsave->rip = fpu->last_ip;
4226 fxsave->rdp = fpu->last_dp;
4227 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4228
4229 vcpu_put(vcpu);
4230
4231 return 0;
4232 }
4233
4234 void fx_init(struct kvm_vcpu *vcpu)
4235 {
4236 unsigned after_mxcsr_mask;
4237
4238 /*
4239 * Touch the fpu the first time in non atomic context as if
4240 * this is the first fpu instruction the exception handler
4241 * will fire before the instruction returns and it'll have to
4242 * allocate ram with GFP_KERNEL.
4243 */
4244 if (!used_math())
4245 kvm_fx_save(&vcpu->arch.host_fx_image);
4246
4247 /* Initialize guest FPU by resetting ours and saving into guest's */
4248 preempt_disable();
4249 kvm_fx_save(&vcpu->arch.host_fx_image);
4250 kvm_fx_finit();
4251 kvm_fx_save(&vcpu->arch.guest_fx_image);
4252 kvm_fx_restore(&vcpu->arch.host_fx_image);
4253 preempt_enable();
4254
4255 vcpu->arch.cr0 |= X86_CR0_ET;
4256 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4257 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4258 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4259 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4260 }
4261 EXPORT_SYMBOL_GPL(fx_init);
4262
4263 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4264 {
4265 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4266 return;
4267
4268 vcpu->guest_fpu_loaded = 1;
4269 kvm_fx_save(&vcpu->arch.host_fx_image);
4270 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4271 }
4272 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4273
4274 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4275 {
4276 if (!vcpu->guest_fpu_loaded)
4277 return;
4278
4279 vcpu->guest_fpu_loaded = 0;
4280 kvm_fx_save(&vcpu->arch.guest_fx_image);
4281 kvm_fx_restore(&vcpu->arch.host_fx_image);
4282 ++vcpu->stat.fpu_reload;
4283 }
4284 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4285
4286 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4287 {
4288 if (vcpu->arch.time_page) {
4289 kvm_release_page_dirty(vcpu->arch.time_page);
4290 vcpu->arch.time_page = NULL;
4291 }
4292
4293 kvm_x86_ops->vcpu_free(vcpu);
4294 }
4295
4296 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4297 unsigned int id)
4298 {
4299 return kvm_x86_ops->vcpu_create(kvm, id);
4300 }
4301
4302 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4303 {
4304 int r;
4305
4306 /* We do fxsave: this must be aligned. */
4307 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4308
4309 vcpu->arch.mtrr_state.have_fixed = 1;
4310 vcpu_load(vcpu);
4311 r = kvm_arch_vcpu_reset(vcpu);
4312 if (r == 0)
4313 r = kvm_mmu_setup(vcpu);
4314 vcpu_put(vcpu);
4315 if (r < 0)
4316 goto free_vcpu;
4317
4318 return 0;
4319 free_vcpu:
4320 kvm_x86_ops->vcpu_free(vcpu);
4321 return r;
4322 }
4323
4324 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4325 {
4326 vcpu_load(vcpu);
4327 kvm_mmu_unload(vcpu);
4328 vcpu_put(vcpu);
4329
4330 kvm_x86_ops->vcpu_free(vcpu);
4331 }
4332
4333 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4334 {
4335 vcpu->arch.nmi_pending = false;
4336 vcpu->arch.nmi_injected = false;
4337
4338 vcpu->arch.switch_db_regs = 0;
4339 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4340 vcpu->arch.dr6 = DR6_FIXED_1;
4341 vcpu->arch.dr7 = DR7_FIXED_1;
4342
4343 return kvm_x86_ops->vcpu_reset(vcpu);
4344 }
4345
4346 void kvm_arch_hardware_enable(void *garbage)
4347 {
4348 kvm_x86_ops->hardware_enable(garbage);
4349 }
4350
4351 void kvm_arch_hardware_disable(void *garbage)
4352 {
4353 kvm_x86_ops->hardware_disable(garbage);
4354 }
4355
4356 int kvm_arch_hardware_setup(void)
4357 {
4358 return kvm_x86_ops->hardware_setup();
4359 }
4360
4361 void kvm_arch_hardware_unsetup(void)
4362 {
4363 kvm_x86_ops->hardware_unsetup();
4364 }
4365
4366 void kvm_arch_check_processor_compat(void *rtn)
4367 {
4368 kvm_x86_ops->check_processor_compatibility(rtn);
4369 }
4370
4371 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4372 {
4373 struct page *page;
4374 struct kvm *kvm;
4375 int r;
4376
4377 BUG_ON(vcpu->kvm == NULL);
4378 kvm = vcpu->kvm;
4379
4380 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4381 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4382 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4383 else
4384 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4385
4386 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4387 if (!page) {
4388 r = -ENOMEM;
4389 goto fail;
4390 }
4391 vcpu->arch.pio_data = page_address(page);
4392
4393 r = kvm_mmu_create(vcpu);
4394 if (r < 0)
4395 goto fail_free_pio_data;
4396
4397 if (irqchip_in_kernel(kvm)) {
4398 r = kvm_create_lapic(vcpu);
4399 if (r < 0)
4400 goto fail_mmu_destroy;
4401 }
4402
4403 return 0;
4404
4405 fail_mmu_destroy:
4406 kvm_mmu_destroy(vcpu);
4407 fail_free_pio_data:
4408 free_page((unsigned long)vcpu->arch.pio_data);
4409 fail:
4410 return r;
4411 }
4412
4413 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4414 {
4415 kvm_free_lapic(vcpu);
4416 down_read(&vcpu->kvm->slots_lock);
4417 kvm_mmu_destroy(vcpu);
4418 up_read(&vcpu->kvm->slots_lock);
4419 free_page((unsigned long)vcpu->arch.pio_data);
4420 }
4421
4422 struct kvm *kvm_arch_create_vm(void)
4423 {
4424 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4425
4426 if (!kvm)
4427 return ERR_PTR(-ENOMEM);
4428
4429 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4430 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4431
4432 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4433 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4434
4435 rdtscll(kvm->arch.vm_init_tsc);
4436
4437 return kvm;
4438 }
4439
4440 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4441 {
4442 vcpu_load(vcpu);
4443 kvm_mmu_unload(vcpu);
4444 vcpu_put(vcpu);
4445 }
4446
4447 static void kvm_free_vcpus(struct kvm *kvm)
4448 {
4449 unsigned int i;
4450
4451 /*
4452 * Unpin any mmu pages first.
4453 */
4454 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4455 if (kvm->vcpus[i])
4456 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4457 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4458 if (kvm->vcpus[i]) {
4459 kvm_arch_vcpu_free(kvm->vcpus[i]);
4460 kvm->vcpus[i] = NULL;
4461 }
4462 }
4463
4464 }
4465
4466 void kvm_arch_sync_events(struct kvm *kvm)
4467 {
4468 kvm_free_all_assigned_devices(kvm);
4469 }
4470
4471 void kvm_arch_destroy_vm(struct kvm *kvm)
4472 {
4473 kvm_iommu_unmap_guest(kvm);
4474 kvm_free_pit(kvm);
4475 kfree(kvm->arch.vpic);
4476 kfree(kvm->arch.vioapic);
4477 kvm_free_vcpus(kvm);
4478 kvm_free_physmem(kvm);
4479 if (kvm->arch.apic_access_page)
4480 put_page(kvm->arch.apic_access_page);
4481 if (kvm->arch.ept_identity_pagetable)
4482 put_page(kvm->arch.ept_identity_pagetable);
4483 kfree(kvm);
4484 }
4485
4486 int kvm_arch_set_memory_region(struct kvm *kvm,
4487 struct kvm_userspace_memory_region *mem,
4488 struct kvm_memory_slot old,
4489 int user_alloc)
4490 {
4491 int npages = mem->memory_size >> PAGE_SHIFT;
4492 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4493
4494 /*To keep backward compatibility with older userspace,
4495 *x86 needs to hanlde !user_alloc case.
4496 */
4497 if (!user_alloc) {
4498 if (npages && !old.rmap) {
4499 unsigned long userspace_addr;
4500
4501 down_write(&current->mm->mmap_sem);
4502 userspace_addr = do_mmap(NULL, 0,
4503 npages * PAGE_SIZE,
4504 PROT_READ | PROT_WRITE,
4505 MAP_PRIVATE | MAP_ANONYMOUS,
4506 0);
4507 up_write(&current->mm->mmap_sem);
4508
4509 if (IS_ERR((void *)userspace_addr))
4510 return PTR_ERR((void *)userspace_addr);
4511
4512 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4513 spin_lock(&kvm->mmu_lock);
4514 memslot->userspace_addr = userspace_addr;
4515 spin_unlock(&kvm->mmu_lock);
4516 } else {
4517 if (!old.user_alloc && old.rmap) {
4518 int ret;
4519
4520 down_write(&current->mm->mmap_sem);
4521 ret = do_munmap(current->mm, old.userspace_addr,
4522 old.npages * PAGE_SIZE);
4523 up_write(&current->mm->mmap_sem);
4524 if (ret < 0)
4525 printk(KERN_WARNING
4526 "kvm_vm_ioctl_set_memory_region: "
4527 "failed to munmap memory\n");
4528 }
4529 }
4530 }
4531
4532 spin_lock(&kvm->mmu_lock);
4533 if (!kvm->arch.n_requested_mmu_pages) {
4534 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4535 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4536 }
4537
4538 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4539 spin_unlock(&kvm->mmu_lock);
4540 kvm_flush_remote_tlbs(kvm);
4541
4542 return 0;
4543 }
4544
4545 void kvm_arch_flush_shadow(struct kvm *kvm)
4546 {
4547 kvm_mmu_zap_all(kvm);
4548 kvm_reload_remote_mmus(kvm);
4549 }
4550
4551 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4552 {
4553 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4554 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4555 || vcpu->arch.nmi_pending;
4556 }
4557
4558 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4559 {
4560 int me;
4561 int cpu = vcpu->cpu;
4562
4563 if (waitqueue_active(&vcpu->wq)) {
4564 wake_up_interruptible(&vcpu->wq);
4565 ++vcpu->stat.halt_wakeup;
4566 }
4567
4568 me = get_cpu();
4569 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
4570 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
4571 smp_send_reschedule(cpu);
4572 put_cpu();
4573 }
4574
4575 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4576 {
4577 return kvm_x86_ops->interrupt_allowed(vcpu);
4578 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree