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KVM: MMU: allow more page become unsync at getting sp time
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kvm / mmu.c
blob07673487fd5d5daf723195cd7ad1f4aaf61bdf22
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 * Copyright 2010 Red Hat, Inc. and/or its affilates.
11 *
12 * Authors:
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Avi Kivity <avi@qumranet.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include "mmu.h"
22 #include "x86.h"
23 #include "kvm_cache_regs.h"
24
25 #include <linux/kvm_host.h>
26 #include <linux/types.h>
27 #include <linux/string.h>
28 #include <linux/mm.h>
29 #include <linux/highmem.h>
30 #include <linux/module.h>
31 #include <linux/swap.h>
32 #include <linux/hugetlb.h>
33 #include <linux/compiler.h>
34 #include <linux/srcu.h>
35 #include <linux/slab.h>
36 #include <linux/uaccess.h>
37
38 #include <asm/page.h>
39 #include <asm/cmpxchg.h>
40 #include <asm/io.h>
41 #include <asm/vmx.h>
42
43 /*
44 * When setting this variable to true it enables Two-Dimensional-Paging
45 * where the hardware walks 2 page tables:
46 * 1. the guest-virtual to guest-physical
47 * 2. while doing 1. it walks guest-physical to host-physical
48 * If the hardware supports that we don't need to do shadow paging.
49 */
50 bool tdp_enabled = false;
51
52 #undef MMU_DEBUG
53
54 #undef AUDIT
55
56 #ifdef AUDIT
57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
58 #else
59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #endif
61
62 #ifdef MMU_DEBUG
63
64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
66
67 #else
68
69 #define pgprintk(x...) do { } while (0)
70 #define rmap_printk(x...) do { } while (0)
71
72 #endif
73
74 #if defined(MMU_DEBUG) || defined(AUDIT)
75 static int dbg = 0;
76 module_param(dbg, bool, 0644);
77 #endif
78
79 static int oos_shadow = 1;
80 module_param(oos_shadow, bool, 0644);
81
82 #ifndef MMU_DEBUG
83 #define ASSERT(x) do { } while (0)
84 #else
85 #define ASSERT(x) \
86 if (!(x)) { \
87 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
88 __FILE__, __LINE__, #x); \
89 }
90 #endif
91
92 #define PT_FIRST_AVAIL_BITS_SHIFT 9
93 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
94
95 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
96
97 #define PT64_LEVEL_BITS 9
98
99 #define PT64_LEVEL_SHIFT(level) \
100 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
101
102 #define PT64_LEVEL_MASK(level) \
103 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
104
105 #define PT64_INDEX(address, level)\
106 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
107
108
109 #define PT32_LEVEL_BITS 10
110
111 #define PT32_LEVEL_SHIFT(level) \
112 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
113
114 #define PT32_LEVEL_MASK(level) \
115 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
116 #define PT32_LVL_OFFSET_MASK(level) \
117 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
118 * PT32_LEVEL_BITS))) - 1))
119
120 #define PT32_INDEX(address, level)\
121 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
122
123
124 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
125 #define PT64_DIR_BASE_ADDR_MASK \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
127 #define PT64_LVL_ADDR_MASK(level) \
128 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
129 * PT64_LEVEL_BITS))) - 1))
130 #define PT64_LVL_OFFSET_MASK(level) \
131 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
132 * PT64_LEVEL_BITS))) - 1))
133
134 #define PT32_BASE_ADDR_MASK PAGE_MASK
135 #define PT32_DIR_BASE_ADDR_MASK \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
137 #define PT32_LVL_ADDR_MASK(level) \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
139 * PT32_LEVEL_BITS))) - 1))
140
141 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
142 | PT64_NX_MASK)
143
144 #define RMAP_EXT 4
145
146 #define ACC_EXEC_MASK 1
147 #define ACC_WRITE_MASK PT_WRITABLE_MASK
148 #define ACC_USER_MASK PT_USER_MASK
149 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
150
151 #include <trace/events/kvm.h>
152
153 #define CREATE_TRACE_POINTS
154 #include "mmutrace.h"
155
156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
157
158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
159
160 struct kvm_rmap_desc {
161 u64 *sptes[RMAP_EXT];
162 struct kvm_rmap_desc *more;
163 };
164
165 struct kvm_shadow_walk_iterator {
166 u64 addr;
167 hpa_t shadow_addr;
168 int level;
169 u64 *sptep;
170 unsigned index;
171 };
172
173 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
174 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
175 shadow_walk_okay(&(_walker)); \
176 shadow_walk_next(&(_walker)))
177
178 typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
179
180 static struct kmem_cache *pte_chain_cache;
181 static struct kmem_cache *rmap_desc_cache;
182 static struct kmem_cache *mmu_page_header_cache;
183
184 static u64 __read_mostly shadow_trap_nonpresent_pte;
185 static u64 __read_mostly shadow_notrap_nonpresent_pte;
186 static u64 __read_mostly shadow_base_present_pte;
187 static u64 __read_mostly shadow_nx_mask;
188 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
189 static u64 __read_mostly shadow_user_mask;
190 static u64 __read_mostly shadow_accessed_mask;
191 static u64 __read_mostly shadow_dirty_mask;
192
193 static inline u64 rsvd_bits(int s, int e)
194 {
195 return ((1ULL << (e - s + 1)) - 1) << s;
196 }
197
198 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
199 {
200 shadow_trap_nonpresent_pte = trap_pte;
201 shadow_notrap_nonpresent_pte = notrap_pte;
202 }
203 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
204
205 void kvm_mmu_set_base_ptes(u64 base_pte)
206 {
207 shadow_base_present_pte = base_pte;
208 }
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
210
211 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
212 u64 dirty_mask, u64 nx_mask, u64 x_mask)
213 {
214 shadow_user_mask = user_mask;
215 shadow_accessed_mask = accessed_mask;
216 shadow_dirty_mask = dirty_mask;
217 shadow_nx_mask = nx_mask;
218 shadow_x_mask = x_mask;
219 }
220 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
221
222 static bool is_write_protection(struct kvm_vcpu *vcpu)
223 {
224 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
225 }
226
227 static int is_cpuid_PSE36(void)
228 {
229 return 1;
230 }
231
232 static int is_nx(struct kvm_vcpu *vcpu)
233 {
234 return vcpu->arch.efer & EFER_NX;
235 }
236
237 static int is_shadow_present_pte(u64 pte)
238 {
239 return pte != shadow_trap_nonpresent_pte
240 && pte != shadow_notrap_nonpresent_pte;
241 }
242
243 static int is_large_pte(u64 pte)
244 {
245 return pte & PT_PAGE_SIZE_MASK;
246 }
247
248 static int is_writable_pte(unsigned long pte)
249 {
250 return pte & PT_WRITABLE_MASK;
251 }
252
253 static int is_dirty_gpte(unsigned long pte)
254 {
255 return pte & PT_DIRTY_MASK;
256 }
257
258 static int is_rmap_spte(u64 pte)
259 {
260 return is_shadow_present_pte(pte);
261 }
262
263 static int is_last_spte(u64 pte, int level)
264 {
265 if (level == PT_PAGE_TABLE_LEVEL)
266 return 1;
267 if (is_large_pte(pte))
268 return 1;
269 return 0;
270 }
271
272 static pfn_t spte_to_pfn(u64 pte)
273 {
274 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
275 }
276
277 static gfn_t pse36_gfn_delta(u32 gpte)
278 {
279 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
280
281 return (gpte & PT32_DIR_PSE36_MASK) << shift;
282 }
283
284 static void __set_spte(u64 *sptep, u64 spte)
285 {
286 #ifdef CONFIG_X86_64
287 set_64bit((unsigned long *)sptep, spte);
288 #else
289 set_64bit((unsigned long long *)sptep, spte);
290 #endif
291 }
292
293 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
294 struct kmem_cache *base_cache, int min)
295 {
296 void *obj;
297
298 if (cache->nobjs >= min)
299 return 0;
300 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
301 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
302 if (!obj)
303 return -ENOMEM;
304 cache->objects[cache->nobjs++] = obj;
305 }
306 return 0;
307 }
308
309 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
310 struct kmem_cache *cache)
311 {
312 while (mc->nobjs)
313 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
314 }
315
316 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
317 int min)
318 {
319 struct page *page;
320
321 if (cache->nobjs >= min)
322 return 0;
323 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
324 page = alloc_page(GFP_KERNEL);
325 if (!page)
326 return -ENOMEM;
327 cache->objects[cache->nobjs++] = page_address(page);
328 }
329 return 0;
330 }
331
332 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
333 {
334 while (mc->nobjs)
335 free_page((unsigned long)mc->objects[--mc->nobjs]);
336 }
337
338 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
339 {
340 int r;
341
342 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
343 pte_chain_cache, 4);
344 if (r)
345 goto out;
346 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
347 rmap_desc_cache, 4);
348 if (r)
349 goto out;
350 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
351 if (r)
352 goto out;
353 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
354 mmu_page_header_cache, 4);
355 out:
356 return r;
357 }
358
359 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
360 {
361 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
362 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
363 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
365 mmu_page_header_cache);
366 }
367
368 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
369 size_t size)
370 {
371 void *p;
372
373 BUG_ON(!mc->nobjs);
374 p = mc->objects[--mc->nobjs];
375 return p;
376 }
377
378 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
379 {
380 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
381 sizeof(struct kvm_pte_chain));
382 }
383
384 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
385 {
386 kmem_cache_free(pte_chain_cache, pc);
387 }
388
389 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
390 {
391 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
392 sizeof(struct kvm_rmap_desc));
393 }
394
395 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
396 {
397 kmem_cache_free(rmap_desc_cache, rd);
398 }
399
400 /*
401 * Return the pointer to the largepage write count for a given
402 * gfn, handling slots that are not large page aligned.
403 */
404 static int *slot_largepage_idx(gfn_t gfn,
405 struct kvm_memory_slot *slot,
406 int level)
407 {
408 unsigned long idx;
409
410 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
411 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
412 return &slot->lpage_info[level - 2][idx].write_count;
413 }
414
415 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
416 {
417 struct kvm_memory_slot *slot;
418 int *write_count;
419 int i;
420
421 gfn = unalias_gfn(kvm, gfn);
422
423 slot = gfn_to_memslot_unaliased(kvm, gfn);
424 for (i = PT_DIRECTORY_LEVEL;
425 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
426 write_count = slot_largepage_idx(gfn, slot, i);
427 *write_count += 1;
428 }
429 }
430
431 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
432 {
433 struct kvm_memory_slot *slot;
434 int *write_count;
435 int i;
436
437 gfn = unalias_gfn(kvm, gfn);
438 slot = gfn_to_memslot_unaliased(kvm, gfn);
439 for (i = PT_DIRECTORY_LEVEL;
440 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
441 write_count = slot_largepage_idx(gfn, slot, i);
442 *write_count -= 1;
443 WARN_ON(*write_count < 0);
444 }
445 }
446
447 static int has_wrprotected_page(struct kvm *kvm,
448 gfn_t gfn,
449 int level)
450 {
451 struct kvm_memory_slot *slot;
452 int *largepage_idx;
453
454 gfn = unalias_gfn(kvm, gfn);
455 slot = gfn_to_memslot_unaliased(kvm, gfn);
456 if (slot) {
457 largepage_idx = slot_largepage_idx(gfn, slot, level);
458 return *largepage_idx;
459 }
460
461 return 1;
462 }
463
464 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
465 {
466 unsigned long page_size;
467 int i, ret = 0;
468
469 page_size = kvm_host_page_size(kvm, gfn);
470
471 for (i = PT_PAGE_TABLE_LEVEL;
472 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
473 if (page_size >= KVM_HPAGE_SIZE(i))
474 ret = i;
475 else
476 break;
477 }
478
479 return ret;
480 }
481
482 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
483 {
484 struct kvm_memory_slot *slot;
485 int host_level, level, max_level;
486
487 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
488 if (slot && slot->dirty_bitmap)
489 return PT_PAGE_TABLE_LEVEL;
490
491 host_level = host_mapping_level(vcpu->kvm, large_gfn);
492
493 if (host_level == PT_PAGE_TABLE_LEVEL)
494 return host_level;
495
496 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
497 kvm_x86_ops->get_lpage_level() : host_level;
498
499 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
500 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
501 break;
502
503 return level - 1;
504 }
505
506 /*
507 * Take gfn and return the reverse mapping to it.
508 * Note: gfn must be unaliased before this function get called
509 */
510
511 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
512 {
513 struct kvm_memory_slot *slot;
514 unsigned long idx;
515
516 slot = gfn_to_memslot(kvm, gfn);
517 if (likely(level == PT_PAGE_TABLE_LEVEL))
518 return &slot->rmap[gfn - slot->base_gfn];
519
520 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
521 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
522
523 return &slot->lpage_info[level - 2][idx].rmap_pde;
524 }
525
526 /*
527 * Reverse mapping data structures:
528 *
529 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
530 * that points to page_address(page).
531 *
532 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
533 * containing more mappings.
534 *
535 * Returns the number of rmap entries before the spte was added or zero if
536 * the spte was not added.
537 *
538 */
539 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
540 {
541 struct kvm_mmu_page *sp;
542 struct kvm_rmap_desc *desc;
543 unsigned long *rmapp;
544 int i, count = 0;
545
546 if (!is_rmap_spte(*spte))
547 return count;
548 gfn = unalias_gfn(vcpu->kvm, gfn);
549 sp = page_header(__pa(spte));
550 sp->gfns[spte - sp->spt] = gfn;
551 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
552 if (!*rmapp) {
553 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
554 *rmapp = (unsigned long)spte;
555 } else if (!(*rmapp & 1)) {
556 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
557 desc = mmu_alloc_rmap_desc(vcpu);
558 desc->sptes[0] = (u64 *)*rmapp;
559 desc->sptes[1] = spte;
560 *rmapp = (unsigned long)desc | 1;
561 } else {
562 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
563 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
564 while (desc->sptes[RMAP_EXT-1] && desc->more) {
565 desc = desc->more;
566 count += RMAP_EXT;
567 }
568 if (desc->sptes[RMAP_EXT-1]) {
569 desc->more = mmu_alloc_rmap_desc(vcpu);
570 desc = desc->more;
571 }
572 for (i = 0; desc->sptes[i]; ++i)
573 ;
574 desc->sptes[i] = spte;
575 }
576 return count;
577 }
578
579 static void rmap_desc_remove_entry(unsigned long *rmapp,
580 struct kvm_rmap_desc *desc,
581 int i,
582 struct kvm_rmap_desc *prev_desc)
583 {
584 int j;
585
586 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
587 ;
588 desc->sptes[i] = desc->sptes[j];
589 desc->sptes[j] = NULL;
590 if (j != 0)
591 return;
592 if (!prev_desc && !desc->more)
593 *rmapp = (unsigned long)desc->sptes[0];
594 else
595 if (prev_desc)
596 prev_desc->more = desc->more;
597 else
598 *rmapp = (unsigned long)desc->more | 1;
599 mmu_free_rmap_desc(desc);
600 }
601
602 static void rmap_remove(struct kvm *kvm, u64 *spte)
603 {
604 struct kvm_rmap_desc *desc;
605 struct kvm_rmap_desc *prev_desc;
606 struct kvm_mmu_page *sp;
607 pfn_t pfn;
608 unsigned long *rmapp;
609 int i;
610
611 if (!is_rmap_spte(*spte))
612 return;
613 sp = page_header(__pa(spte));
614 pfn = spte_to_pfn(*spte);
615 if (*spte & shadow_accessed_mask)
616 kvm_set_pfn_accessed(pfn);
617 if (is_writable_pte(*spte))
618 kvm_set_pfn_dirty(pfn);
619 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
620 if (!*rmapp) {
621 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
622 BUG();
623 } else if (!(*rmapp & 1)) {
624 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
625 if ((u64 *)*rmapp != spte) {
626 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
627 spte, *spte);
628 BUG();
629 }
630 *rmapp = 0;
631 } else {
632 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
633 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
634 prev_desc = NULL;
635 while (desc) {
636 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
637 if (desc->sptes[i] == spte) {
638 rmap_desc_remove_entry(rmapp,
639 desc, i,
640 prev_desc);
641 return;
642 }
643 prev_desc = desc;
644 desc = desc->more;
645 }
646 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
647 BUG();
648 }
649 }
650
651 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
652 {
653 struct kvm_rmap_desc *desc;
654 u64 *prev_spte;
655 int i;
656
657 if (!*rmapp)
658 return NULL;
659 else if (!(*rmapp & 1)) {
660 if (!spte)
661 return (u64 *)*rmapp;
662 return NULL;
663 }
664 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
665 prev_spte = NULL;
666 while (desc) {
667 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
668 if (prev_spte == spte)
669 return desc->sptes[i];
670 prev_spte = desc->sptes[i];
671 }
672 desc = desc->more;
673 }
674 return NULL;
675 }
676
677 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
678 {
679 unsigned long *rmapp;
680 u64 *spte;
681 int i, write_protected = 0;
682
683 gfn = unalias_gfn(kvm, gfn);
684 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
685
686 spte = rmap_next(kvm, rmapp, NULL);
687 while (spte) {
688 BUG_ON(!spte);
689 BUG_ON(!(*spte & PT_PRESENT_MASK));
690 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
691 if (is_writable_pte(*spte)) {
692 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
693 write_protected = 1;
694 }
695 spte = rmap_next(kvm, rmapp, spte);
696 }
697 if (write_protected) {
698 pfn_t pfn;
699
700 spte = rmap_next(kvm, rmapp, NULL);
701 pfn = spte_to_pfn(*spte);
702 kvm_set_pfn_dirty(pfn);
703 }
704
705 /* check for huge page mappings */
706 for (i = PT_DIRECTORY_LEVEL;
707 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
708 rmapp = gfn_to_rmap(kvm, gfn, i);
709 spte = rmap_next(kvm, rmapp, NULL);
710 while (spte) {
711 BUG_ON(!spte);
712 BUG_ON(!(*spte & PT_PRESENT_MASK));
713 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
714 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
715 if (is_writable_pte(*spte)) {
716 rmap_remove(kvm, spte);
717 --kvm->stat.lpages;
718 __set_spte(spte, shadow_trap_nonpresent_pte);
719 spte = NULL;
720 write_protected = 1;
721 }
722 spte = rmap_next(kvm, rmapp, spte);
723 }
724 }
725
726 return write_protected;
727 }
728
729 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
730 unsigned long data)
731 {
732 u64 *spte;
733 int need_tlb_flush = 0;
734
735 while ((spte = rmap_next(kvm, rmapp, NULL))) {
736 BUG_ON(!(*spte & PT_PRESENT_MASK));
737 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
738 rmap_remove(kvm, spte);
739 __set_spte(spte, shadow_trap_nonpresent_pte);
740 need_tlb_flush = 1;
741 }
742 return need_tlb_flush;
743 }
744
745 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
746 unsigned long data)
747 {
748 int need_flush = 0;
749 u64 *spte, new_spte;
750 pte_t *ptep = (pte_t *)data;
751 pfn_t new_pfn;
752
753 WARN_ON(pte_huge(*ptep));
754 new_pfn = pte_pfn(*ptep);
755 spte = rmap_next(kvm, rmapp, NULL);
756 while (spte) {
757 BUG_ON(!is_shadow_present_pte(*spte));
758 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
759 need_flush = 1;
760 if (pte_write(*ptep)) {
761 rmap_remove(kvm, spte);
762 __set_spte(spte, shadow_trap_nonpresent_pte);
763 spte = rmap_next(kvm, rmapp, NULL);
764 } else {
765 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
766 new_spte |= (u64)new_pfn << PAGE_SHIFT;
767
768 new_spte &= ~PT_WRITABLE_MASK;
769 new_spte &= ~SPTE_HOST_WRITEABLE;
770 if (is_writable_pte(*spte))
771 kvm_set_pfn_dirty(spte_to_pfn(*spte));
772 __set_spte(spte, new_spte);
773 spte = rmap_next(kvm, rmapp, spte);
774 }
775 }
776 if (need_flush)
777 kvm_flush_remote_tlbs(kvm);
778
779 return 0;
780 }
781
782 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
783 unsigned long data,
784 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
785 unsigned long data))
786 {
787 int i, j;
788 int ret;
789 int retval = 0;
790 struct kvm_memslots *slots;
791
792 slots = kvm_memslots(kvm);
793
794 for (i = 0; i < slots->nmemslots; i++) {
795 struct kvm_memory_slot *memslot = &slots->memslots[i];
796 unsigned long start = memslot->userspace_addr;
797 unsigned long end;
798
799 end = start + (memslot->npages << PAGE_SHIFT);
800 if (hva >= start && hva < end) {
801 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
802
803 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
804
805 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
806 int idx = gfn_offset;
807 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
808 ret |= handler(kvm,
809 &memslot->lpage_info[j][idx].rmap_pde,
810 data);
811 }
812 trace_kvm_age_page(hva, memslot, ret);
813 retval |= ret;
814 }
815 }
816
817 return retval;
818 }
819
820 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
821 {
822 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
823 }
824
825 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
826 {
827 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
828 }
829
830 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
831 unsigned long data)
832 {
833 u64 *spte;
834 int young = 0;
835
836 /*
837 * Emulate the accessed bit for EPT, by checking if this page has
838 * an EPT mapping, and clearing it if it does. On the next access,
839 * a new EPT mapping will be established.
840 * This has some overhead, but not as much as the cost of swapping
841 * out actively used pages or breaking up actively used hugepages.
842 */
843 if (!shadow_accessed_mask)
844 return kvm_unmap_rmapp(kvm, rmapp, data);
845
846 spte = rmap_next(kvm, rmapp, NULL);
847 while (spte) {
848 int _young;
849 u64 _spte = *spte;
850 BUG_ON(!(_spte & PT_PRESENT_MASK));
851 _young = _spte & PT_ACCESSED_MASK;
852 if (_young) {
853 young = 1;
854 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
855 }
856 spte = rmap_next(kvm, rmapp, spte);
857 }
858 return young;
859 }
860
861 #define RMAP_RECYCLE_THRESHOLD 1000
862
863 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
864 {
865 unsigned long *rmapp;
866 struct kvm_mmu_page *sp;
867
868 sp = page_header(__pa(spte));
869
870 gfn = unalias_gfn(vcpu->kvm, gfn);
871 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
872
873 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
874 kvm_flush_remote_tlbs(vcpu->kvm);
875 }
876
877 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
878 {
879 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
880 }
881
882 #ifdef MMU_DEBUG
883 static int is_empty_shadow_page(u64 *spt)
884 {
885 u64 *pos;
886 u64 *end;
887
888 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
889 if (is_shadow_present_pte(*pos)) {
890 printk(KERN_ERR "%s: %p %llx\n", __func__,
891 pos, *pos);
892 return 0;
893 }
894 return 1;
895 }
896 #endif
897
898 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
899 {
900 ASSERT(is_empty_shadow_page(sp->spt));
901 list_del(&sp->link);
902 __free_page(virt_to_page(sp->spt));
903 __free_page(virt_to_page(sp->gfns));
904 kmem_cache_free(mmu_page_header_cache, sp);
905 ++kvm->arch.n_free_mmu_pages;
906 }
907
908 static unsigned kvm_page_table_hashfn(gfn_t gfn)
909 {
910 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
911 }
912
913 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
914 u64 *parent_pte)
915 {
916 struct kvm_mmu_page *sp;
917
918 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
919 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
920 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
921 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
922 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
923 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
924 sp->multimapped = 0;
925 sp->parent_pte = parent_pte;
926 --vcpu->kvm->arch.n_free_mmu_pages;
927 return sp;
928 }
929
930 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
931 struct kvm_mmu_page *sp, u64 *parent_pte)
932 {
933 struct kvm_pte_chain *pte_chain;
934 struct hlist_node *node;
935 int i;
936
937 if (!parent_pte)
938 return;
939 if (!sp->multimapped) {
940 u64 *old = sp->parent_pte;
941
942 if (!old) {
943 sp->parent_pte = parent_pte;
944 return;
945 }
946 sp->multimapped = 1;
947 pte_chain = mmu_alloc_pte_chain(vcpu);
948 INIT_HLIST_HEAD(&sp->parent_ptes);
949 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
950 pte_chain->parent_ptes[0] = old;
951 }
952 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
953 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
954 continue;
955 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
956 if (!pte_chain->parent_ptes[i]) {
957 pte_chain->parent_ptes[i] = parent_pte;
958 return;
959 }
960 }
961 pte_chain = mmu_alloc_pte_chain(vcpu);
962 BUG_ON(!pte_chain);
963 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
964 pte_chain->parent_ptes[0] = parent_pte;
965 }
966
967 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
968 u64 *parent_pte)
969 {
970 struct kvm_pte_chain *pte_chain;
971 struct hlist_node *node;
972 int i;
973
974 if (!sp->multimapped) {
975 BUG_ON(sp->parent_pte != parent_pte);
976 sp->parent_pte = NULL;
977 return;
978 }
979 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
980 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
981 if (!pte_chain->parent_ptes[i])
982 break;
983 if (pte_chain->parent_ptes[i] != parent_pte)
984 continue;
985 while (i + 1 < NR_PTE_CHAIN_ENTRIES
986 && pte_chain->parent_ptes[i + 1]) {
987 pte_chain->parent_ptes[i]
988 = pte_chain->parent_ptes[i + 1];
989 ++i;
990 }
991 pte_chain->parent_ptes[i] = NULL;
992 if (i == 0) {
993 hlist_del(&pte_chain->link);
994 mmu_free_pte_chain(pte_chain);
995 if (hlist_empty(&sp->parent_ptes)) {
996 sp->multimapped = 0;
997 sp->parent_pte = NULL;
998 }
999 }
1000 return;
1001 }
1002 BUG();
1003 }
1004
1005
1006 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1007 {
1008 struct kvm_pte_chain *pte_chain;
1009 struct hlist_node *node;
1010 struct kvm_mmu_page *parent_sp;
1011 int i;
1012
1013 if (!sp->multimapped && sp->parent_pte) {
1014 parent_sp = page_header(__pa(sp->parent_pte));
1015 fn(parent_sp);
1016 mmu_parent_walk(parent_sp, fn);
1017 return;
1018 }
1019 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1020 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1021 if (!pte_chain->parent_ptes[i])
1022 break;
1023 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1024 fn(parent_sp);
1025 mmu_parent_walk(parent_sp, fn);
1026 }
1027 }
1028
1029 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1030 {
1031 unsigned int index;
1032 struct kvm_mmu_page *sp = page_header(__pa(spte));
1033
1034 index = spte - sp->spt;
1035 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1036 sp->unsync_children++;
1037 WARN_ON(!sp->unsync_children);
1038 }
1039
1040 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1041 {
1042 struct kvm_pte_chain *pte_chain;
1043 struct hlist_node *node;
1044 int i;
1045
1046 if (!sp->parent_pte)
1047 return;
1048
1049 if (!sp->multimapped) {
1050 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1051 return;
1052 }
1053
1054 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1055 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1056 if (!pte_chain->parent_ptes[i])
1057 break;
1058 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1059 }
1060 }
1061
1062 static int unsync_walk_fn(struct kvm_mmu_page *sp)
1063 {
1064 kvm_mmu_update_parents_unsync(sp);
1065 return 1;
1066 }
1067
1068 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1069 {
1070 mmu_parent_walk(sp, unsync_walk_fn);
1071 kvm_mmu_update_parents_unsync(sp);
1072 }
1073
1074 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1075 struct kvm_mmu_page *sp)
1076 {
1077 int i;
1078
1079 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1080 sp->spt[i] = shadow_trap_nonpresent_pte;
1081 }
1082
1083 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1084 struct kvm_mmu_page *sp)
1085 {
1086 return 1;
1087 }
1088
1089 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1090 {
1091 }
1092
1093 #define KVM_PAGE_ARRAY_NR 16
1094
1095 struct kvm_mmu_pages {
1096 struct mmu_page_and_offset {
1097 struct kvm_mmu_page *sp;
1098 unsigned int idx;
1099 } page[KVM_PAGE_ARRAY_NR];
1100 unsigned int nr;
1101 };
1102
1103 #define for_each_unsync_children(bitmap, idx) \
1104 for (idx = find_first_bit(bitmap, 512); \
1105 idx < 512; \
1106 idx = find_next_bit(bitmap, 512, idx+1))
1107
1108 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1109 int idx)
1110 {
1111 int i;
1112
1113 if (sp->unsync)
1114 for (i=0; i < pvec->nr; i++)
1115 if (pvec->page[i].sp == sp)
1116 return 0;
1117
1118 pvec->page[pvec->nr].sp = sp;
1119 pvec->page[pvec->nr].idx = idx;
1120 pvec->nr++;
1121 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1122 }
1123
1124 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1125 struct kvm_mmu_pages *pvec)
1126 {
1127 int i, ret, nr_unsync_leaf = 0;
1128
1129 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1130 u64 ent = sp->spt[i];
1131
1132 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1133 struct kvm_mmu_page *child;
1134 child = page_header(ent & PT64_BASE_ADDR_MASK);
1135
1136 if (child->unsync_children) {
1137 if (mmu_pages_add(pvec, child, i))
1138 return -ENOSPC;
1139
1140 ret = __mmu_unsync_walk(child, pvec);
1141 if (!ret)
1142 __clear_bit(i, sp->unsync_child_bitmap);
1143 else if (ret > 0)
1144 nr_unsync_leaf += ret;
1145 else
1146 return ret;
1147 }
1148
1149 if (child->unsync) {
1150 nr_unsync_leaf++;
1151 if (mmu_pages_add(pvec, child, i))
1152 return -ENOSPC;
1153 }
1154 }
1155 }
1156
1157 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1158 sp->unsync_children = 0;
1159
1160 return nr_unsync_leaf;
1161 }
1162
1163 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1164 struct kvm_mmu_pages *pvec)
1165 {
1166 if (!sp->unsync_children)
1167 return 0;
1168
1169 mmu_pages_add(pvec, sp, 0);
1170 return __mmu_unsync_walk(sp, pvec);
1171 }
1172
1173 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1174 {
1175 WARN_ON(!sp->unsync);
1176 trace_kvm_mmu_sync_page(sp);
1177 sp->unsync = 0;
1178 --kvm->stat.mmu_unsync;
1179 }
1180
1181 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1182
1183 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1184 bool clear_unsync)
1185 {
1186 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1187 kvm_mmu_zap_page(vcpu->kvm, sp);
1188 return 1;
1189 }
1190
1191 if (clear_unsync) {
1192 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1193 kvm_flush_remote_tlbs(vcpu->kvm);
1194 kvm_unlink_unsync_page(vcpu->kvm, sp);
1195 }
1196
1197 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1198 kvm_mmu_zap_page(vcpu->kvm, sp);
1199 return 1;
1200 }
1201
1202 kvm_mmu_flush_tlb(vcpu);
1203 return 0;
1204 }
1205
1206 static void mmu_convert_notrap(struct kvm_mmu_page *sp);
1207 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1208 struct kvm_mmu_page *sp)
1209 {
1210 int ret;
1211
1212 ret = __kvm_sync_page(vcpu, sp, false);
1213 if (!ret)
1214 mmu_convert_notrap(sp);
1215 return ret;
1216 }
1217
1218 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1219 {
1220 return __kvm_sync_page(vcpu, sp, true);
1221 }
1222
1223 /* @gfn should be write-protected at the call site */
1224 static void kvm_sync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1225 {
1226 struct hlist_head *bucket;
1227 struct kvm_mmu_page *s;
1228 struct hlist_node *node, *n;
1229 unsigned index;
1230 bool flush = false;
1231
1232 index = kvm_page_table_hashfn(gfn);
1233 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1234 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1235 if (s->gfn != gfn || !s->unsync || s->role.invalid)
1236 continue;
1237
1238 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1239 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1240 (vcpu->arch.mmu.sync_page(vcpu, s))) {
1241 kvm_mmu_zap_page(vcpu->kvm, s);
1242 continue;
1243 }
1244 kvm_unlink_unsync_page(vcpu->kvm, s);
1245 flush = true;
1246 }
1247
1248 if (flush)
1249 kvm_mmu_flush_tlb(vcpu);
1250 }
1251
1252 struct mmu_page_path {
1253 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1254 unsigned int idx[PT64_ROOT_LEVEL-1];
1255 };
1256
1257 #define for_each_sp(pvec, sp, parents, i) \
1258 for (i = mmu_pages_next(&pvec, &parents, -1), \
1259 sp = pvec.page[i].sp; \
1260 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1261 i = mmu_pages_next(&pvec, &parents, i))
1262
1263 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1264 struct mmu_page_path *parents,
1265 int i)
1266 {
1267 int n;
1268
1269 for (n = i+1; n < pvec->nr; n++) {
1270 struct kvm_mmu_page *sp = pvec->page[n].sp;
1271
1272 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1273 parents->idx[0] = pvec->page[n].idx;
1274 return n;
1275 }
1276
1277 parents->parent[sp->role.level-2] = sp;
1278 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1279 }
1280
1281 return n;
1282 }
1283
1284 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1285 {
1286 struct kvm_mmu_page *sp;
1287 unsigned int level = 0;
1288
1289 do {
1290 unsigned int idx = parents->idx[level];
1291
1292 sp = parents->parent[level];
1293 if (!sp)
1294 return;
1295
1296 --sp->unsync_children;
1297 WARN_ON((int)sp->unsync_children < 0);
1298 __clear_bit(idx, sp->unsync_child_bitmap);
1299 level++;
1300 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1301 }
1302
1303 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1304 struct mmu_page_path *parents,
1305 struct kvm_mmu_pages *pvec)
1306 {
1307 parents->parent[parent->role.level-1] = NULL;
1308 pvec->nr = 0;
1309 }
1310
1311 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1312 struct kvm_mmu_page *parent)
1313 {
1314 int i;
1315 struct kvm_mmu_page *sp;
1316 struct mmu_page_path parents;
1317 struct kvm_mmu_pages pages;
1318
1319 kvm_mmu_pages_init(parent, &parents, &pages);
1320 while (mmu_unsync_walk(parent, &pages)) {
1321 int protected = 0;
1322
1323 for_each_sp(pages, sp, parents, i)
1324 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1325
1326 if (protected)
1327 kvm_flush_remote_tlbs(vcpu->kvm);
1328
1329 for_each_sp(pages, sp, parents, i) {
1330 kvm_sync_page(vcpu, sp);
1331 mmu_pages_clear_parents(&parents);
1332 }
1333 cond_resched_lock(&vcpu->kvm->mmu_lock);
1334 kvm_mmu_pages_init(parent, &parents, &pages);
1335 }
1336 }
1337
1338 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1339 gfn_t gfn,
1340 gva_t gaddr,
1341 unsigned level,
1342 int direct,
1343 unsigned access,
1344 u64 *parent_pte)
1345 {
1346 union kvm_mmu_page_role role;
1347 unsigned index;
1348 unsigned quadrant;
1349 struct hlist_head *bucket;
1350 struct kvm_mmu_page *sp;
1351 struct hlist_node *node, *tmp;
1352 bool need_sync = false;
1353
1354 role = vcpu->arch.mmu.base_role;
1355 role.level = level;
1356 role.direct = direct;
1357 if (role.direct)
1358 role.cr4_pae = 0;
1359 role.access = access;
1360 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1361 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1362 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1363 role.quadrant = quadrant;
1364 }
1365 index = kvm_page_table_hashfn(gfn);
1366 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1367 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1368 if (sp->gfn == gfn) {
1369 if (!need_sync && sp->unsync)
1370 need_sync = true;
1371
1372 if (sp->role.word != role.word)
1373 continue;
1374
1375 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1376 break;
1377
1378 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1379 if (sp->unsync_children) {
1380 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1381 kvm_mmu_mark_parents_unsync(sp);
1382 } else if (sp->unsync)
1383 kvm_mmu_mark_parents_unsync(sp);
1384
1385 trace_kvm_mmu_get_page(sp, false);
1386 return sp;
1387 }
1388 ++vcpu->kvm->stat.mmu_cache_miss;
1389 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1390 if (!sp)
1391 return sp;
1392 sp->gfn = gfn;
1393 sp->role = role;
1394 hlist_add_head(&sp->hash_link, bucket);
1395 if (!direct) {
1396 if (rmap_write_protect(vcpu->kvm, gfn))
1397 kvm_flush_remote_tlbs(vcpu->kvm);
1398 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1399 kvm_sync_pages(vcpu, gfn);
1400
1401 account_shadowed(vcpu->kvm, gfn);
1402 }
1403 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1404 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1405 else
1406 nonpaging_prefetch_page(vcpu, sp);
1407 trace_kvm_mmu_get_page(sp, true);
1408 return sp;
1409 }
1410
1411 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1412 struct kvm_vcpu *vcpu, u64 addr)
1413 {
1414 iterator->addr = addr;
1415 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1416 iterator->level = vcpu->arch.mmu.shadow_root_level;
1417 if (iterator->level == PT32E_ROOT_LEVEL) {
1418 iterator->shadow_addr
1419 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1420 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1421 --iterator->level;
1422 if (!iterator->shadow_addr)
1423 iterator->level = 0;
1424 }
1425 }
1426
1427 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1428 {
1429 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1430 return false;
1431
1432 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1433 if (is_large_pte(*iterator->sptep))
1434 return false;
1435
1436 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1437 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1438 return true;
1439 }
1440
1441 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1442 {
1443 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1444 --iterator->level;
1445 }
1446
1447 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1448 struct kvm_mmu_page *sp)
1449 {
1450 unsigned i;
1451 u64 *pt;
1452 u64 ent;
1453
1454 pt = sp->spt;
1455
1456 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1457 ent = pt[i];
1458
1459 if (is_shadow_present_pte(ent)) {
1460 if (!is_last_spte(ent, sp->role.level)) {
1461 ent &= PT64_BASE_ADDR_MASK;
1462 mmu_page_remove_parent_pte(page_header(ent),
1463 &pt[i]);
1464 } else {
1465 if (is_large_pte(ent))
1466 --kvm->stat.lpages;
1467 rmap_remove(kvm, &pt[i]);
1468 }
1469 }
1470 pt[i] = shadow_trap_nonpresent_pte;
1471 }
1472 }
1473
1474 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1475 {
1476 mmu_page_remove_parent_pte(sp, parent_pte);
1477 }
1478
1479 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1480 {
1481 int i;
1482 struct kvm_vcpu *vcpu;
1483
1484 kvm_for_each_vcpu(i, vcpu, kvm)
1485 vcpu->arch.last_pte_updated = NULL;
1486 }
1487
1488 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1489 {
1490 u64 *parent_pte;
1491
1492 while (sp->multimapped || sp->parent_pte) {
1493 if (!sp->multimapped)
1494 parent_pte = sp->parent_pte;
1495 else {
1496 struct kvm_pte_chain *chain;
1497
1498 chain = container_of(sp->parent_ptes.first,
1499 struct kvm_pte_chain, link);
1500 parent_pte = chain->parent_ptes[0];
1501 }
1502 BUG_ON(!parent_pte);
1503 kvm_mmu_put_page(sp, parent_pte);
1504 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1505 }
1506 }
1507
1508 static int mmu_zap_unsync_children(struct kvm *kvm,
1509 struct kvm_mmu_page *parent)
1510 {
1511 int i, zapped = 0;
1512 struct mmu_page_path parents;
1513 struct kvm_mmu_pages pages;
1514
1515 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1516 return 0;
1517
1518 kvm_mmu_pages_init(parent, &parents, &pages);
1519 while (mmu_unsync_walk(parent, &pages)) {
1520 struct kvm_mmu_page *sp;
1521
1522 for_each_sp(pages, sp, parents, i) {
1523 kvm_mmu_zap_page(kvm, sp);
1524 mmu_pages_clear_parents(&parents);
1525 zapped++;
1526 }
1527 kvm_mmu_pages_init(parent, &parents, &pages);
1528 }
1529
1530 return zapped;
1531 }
1532
1533 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1534 {
1535 int ret;
1536
1537 trace_kvm_mmu_zap_page(sp);
1538 ++kvm->stat.mmu_shadow_zapped;
1539 ret = mmu_zap_unsync_children(kvm, sp);
1540 kvm_mmu_page_unlink_children(kvm, sp);
1541 kvm_mmu_unlink_parents(kvm, sp);
1542 kvm_flush_remote_tlbs(kvm);
1543 if (!sp->role.invalid && !sp->role.direct)
1544 unaccount_shadowed(kvm, sp->gfn);
1545 if (sp->unsync)
1546 kvm_unlink_unsync_page(kvm, sp);
1547 if (!sp->root_count) {
1548 /* Count self */
1549 ret++;
1550 hlist_del(&sp->hash_link);
1551 kvm_mmu_free_page(kvm, sp);
1552 } else {
1553 sp->role.invalid = 1;
1554 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1555 kvm_reload_remote_mmus(kvm);
1556 }
1557 kvm_mmu_reset_last_pte_updated(kvm);
1558 return ret;
1559 }
1560
1561 /*
1562 * Changing the number of mmu pages allocated to the vm
1563 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1564 */
1565 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1566 {
1567 int used_pages;
1568
1569 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1570 used_pages = max(0, used_pages);
1571
1572 /*
1573 * If we set the number of mmu pages to be smaller be than the
1574 * number of actived pages , we must to free some mmu pages before we
1575 * change the value
1576 */
1577
1578 if (used_pages > kvm_nr_mmu_pages) {
1579 while (used_pages > kvm_nr_mmu_pages &&
1580 !list_empty(&kvm->arch.active_mmu_pages)) {
1581 struct kvm_mmu_page *page;
1582
1583 page = container_of(kvm->arch.active_mmu_pages.prev,
1584 struct kvm_mmu_page, link);
1585 used_pages -= kvm_mmu_zap_page(kvm, page);
1586 }
1587 kvm_nr_mmu_pages = used_pages;
1588 kvm->arch.n_free_mmu_pages = 0;
1589 }
1590 else
1591 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1592 - kvm->arch.n_alloc_mmu_pages;
1593
1594 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1595 }
1596
1597 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1598 {
1599 unsigned index;
1600 struct hlist_head *bucket;
1601 struct kvm_mmu_page *sp;
1602 struct hlist_node *node, *n;
1603 int r;
1604
1605 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1606 r = 0;
1607 index = kvm_page_table_hashfn(gfn);
1608 bucket = &kvm->arch.mmu_page_hash[index];
1609 restart:
1610 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1611 if (sp->gfn == gfn && !sp->role.direct) {
1612 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1613 sp->role.word);
1614 r = 1;
1615 if (kvm_mmu_zap_page(kvm, sp))
1616 goto restart;
1617 }
1618 return r;
1619 }
1620
1621 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1622 {
1623 unsigned index;
1624 struct hlist_head *bucket;
1625 struct kvm_mmu_page *sp;
1626 struct hlist_node *node, *nn;
1627
1628 index = kvm_page_table_hashfn(gfn);
1629 bucket = &kvm->arch.mmu_page_hash[index];
1630 restart:
1631 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1632 if (sp->gfn == gfn && !sp->role.direct
1633 && !sp->role.invalid) {
1634 pgprintk("%s: zap %lx %x\n",
1635 __func__, gfn, sp->role.word);
1636 if (kvm_mmu_zap_page(kvm, sp))
1637 goto restart;
1638 }
1639 }
1640 }
1641
1642 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1643 {
1644 int slot = memslot_id(kvm, gfn);
1645 struct kvm_mmu_page *sp = page_header(__pa(pte));
1646
1647 __set_bit(slot, sp->slot_bitmap);
1648 }
1649
1650 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1651 {
1652 int i;
1653 u64 *pt = sp->spt;
1654
1655 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1656 return;
1657
1658 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1659 if (pt[i] == shadow_notrap_nonpresent_pte)
1660 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1661 }
1662 }
1663
1664 /*
1665 * The function is based on mtrr_type_lookup() in
1666 * arch/x86/kernel/cpu/mtrr/generic.c
1667 */
1668 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1669 u64 start, u64 end)
1670 {
1671 int i;
1672 u64 base, mask;
1673 u8 prev_match, curr_match;
1674 int num_var_ranges = KVM_NR_VAR_MTRR;
1675
1676 if (!mtrr_state->enabled)
1677 return 0xFF;
1678
1679 /* Make end inclusive end, instead of exclusive */
1680 end--;
1681
1682 /* Look in fixed ranges. Just return the type as per start */
1683 if (mtrr_state->have_fixed && (start < 0x100000)) {
1684 int idx;
1685
1686 if (start < 0x80000) {
1687 idx = 0;
1688 idx += (start >> 16);
1689 return mtrr_state->fixed_ranges[idx];
1690 } else if (start < 0xC0000) {
1691 idx = 1 * 8;
1692 idx += ((start - 0x80000) >> 14);
1693 return mtrr_state->fixed_ranges[idx];
1694 } else if (start < 0x1000000) {
1695 idx = 3 * 8;
1696 idx += ((start - 0xC0000) >> 12);
1697 return mtrr_state->fixed_ranges[idx];
1698 }
1699 }
1700
1701 /*
1702 * Look in variable ranges
1703 * Look of multiple ranges matching this address and pick type
1704 * as per MTRR precedence
1705 */
1706 if (!(mtrr_state->enabled & 2))
1707 return mtrr_state->def_type;
1708
1709 prev_match = 0xFF;
1710 for (i = 0; i < num_var_ranges; ++i) {
1711 unsigned short start_state, end_state;
1712
1713 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1714 continue;
1715
1716 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1717 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1718 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1719 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1720
1721 start_state = ((start & mask) == (base & mask));
1722 end_state = ((end & mask) == (base & mask));
1723 if (start_state != end_state)
1724 return 0xFE;
1725
1726 if ((start & mask) != (base & mask))
1727 continue;
1728
1729 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1730 if (prev_match == 0xFF) {
1731 prev_match = curr_match;
1732 continue;
1733 }
1734
1735 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1736 curr_match == MTRR_TYPE_UNCACHABLE)
1737 return MTRR_TYPE_UNCACHABLE;
1738
1739 if ((prev_match == MTRR_TYPE_WRBACK &&
1740 curr_match == MTRR_TYPE_WRTHROUGH) ||
1741 (prev_match == MTRR_TYPE_WRTHROUGH &&
1742 curr_match == MTRR_TYPE_WRBACK)) {
1743 prev_match = MTRR_TYPE_WRTHROUGH;
1744 curr_match = MTRR_TYPE_WRTHROUGH;
1745 }
1746
1747 if (prev_match != curr_match)
1748 return MTRR_TYPE_UNCACHABLE;
1749 }
1750
1751 if (prev_match != 0xFF)
1752 return prev_match;
1753
1754 return mtrr_state->def_type;
1755 }
1756
1757 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1758 {
1759 u8 mtrr;
1760
1761 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1762 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1763 if (mtrr == 0xfe || mtrr == 0xff)
1764 mtrr = MTRR_TYPE_WRBACK;
1765 return mtrr;
1766 }
1767 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1768
1769 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1770 {
1771 trace_kvm_mmu_unsync_page(sp);
1772 ++vcpu->kvm->stat.mmu_unsync;
1773 sp->unsync = 1;
1774
1775 kvm_mmu_mark_parents_unsync(sp);
1776 mmu_convert_notrap(sp);
1777 }
1778
1779 static void kvm_unsync_pages(struct kvm_vcpu *vcpu, gfn_t gfn)
1780 {
1781 struct hlist_head *bucket;
1782 struct kvm_mmu_page *s;
1783 struct hlist_node *node, *n;
1784 unsigned index;
1785
1786 index = kvm_page_table_hashfn(gfn);
1787 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1788
1789 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1790 if (s->gfn != gfn || s->role.direct || s->unsync ||
1791 s->role.invalid)
1792 continue;
1793 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1794 __kvm_unsync_page(vcpu, s);
1795 }
1796 }
1797
1798 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1799 bool can_unsync)
1800 {
1801 unsigned index;
1802 struct hlist_head *bucket;
1803 struct kvm_mmu_page *s;
1804 struct hlist_node *node, *n;
1805 bool need_unsync = false;
1806
1807 index = kvm_page_table_hashfn(gfn);
1808 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1809 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1810 if (s->gfn != gfn || s->role.direct || s->role.invalid)
1811 continue;
1812
1813 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1814 return 1;
1815
1816 if (!need_unsync && !s->unsync) {
1817 if (!can_unsync || !oos_shadow)
1818 return 1;
1819 need_unsync = true;
1820 }
1821 }
1822 if (need_unsync)
1823 kvm_unsync_pages(vcpu, gfn);
1824 return 0;
1825 }
1826
1827 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1828 unsigned pte_access, int user_fault,
1829 int write_fault, int dirty, int level,
1830 gfn_t gfn, pfn_t pfn, bool speculative,
1831 bool can_unsync, bool reset_host_protection)
1832 {
1833 u64 spte;
1834 int ret = 0;
1835
1836 /*
1837 * We don't set the accessed bit, since we sometimes want to see
1838 * whether the guest actually used the pte (in order to detect
1839 * demand paging).
1840 */
1841 spte = shadow_base_present_pte | shadow_dirty_mask;
1842 if (!speculative)
1843 spte |= shadow_accessed_mask;
1844 if (!dirty)
1845 pte_access &= ~ACC_WRITE_MASK;
1846 if (pte_access & ACC_EXEC_MASK)
1847 spte |= shadow_x_mask;
1848 else
1849 spte |= shadow_nx_mask;
1850 if (pte_access & ACC_USER_MASK)
1851 spte |= shadow_user_mask;
1852 if (level > PT_PAGE_TABLE_LEVEL)
1853 spte |= PT_PAGE_SIZE_MASK;
1854 if (tdp_enabled)
1855 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1856 kvm_is_mmio_pfn(pfn));
1857
1858 if (reset_host_protection)
1859 spte |= SPTE_HOST_WRITEABLE;
1860
1861 spte |= (u64)pfn << PAGE_SHIFT;
1862
1863 if ((pte_access & ACC_WRITE_MASK)
1864 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1865
1866 if (level > PT_PAGE_TABLE_LEVEL &&
1867 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1868 ret = 1;
1869 rmap_remove(vcpu->kvm, sptep);
1870 spte = shadow_trap_nonpresent_pte;
1871 goto set_pte;
1872 }
1873
1874 spte |= PT_WRITABLE_MASK;
1875
1876 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1877 spte &= ~PT_USER_MASK;
1878
1879 /*
1880 * Optimization: for pte sync, if spte was writable the hash
1881 * lookup is unnecessary (and expensive). Write protection
1882 * is responsibility of mmu_get_page / kvm_sync_page.
1883 * Same reasoning can be applied to dirty page accounting.
1884 */
1885 if (!can_unsync && is_writable_pte(*sptep))
1886 goto set_pte;
1887
1888 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1889 pgprintk("%s: found shadow page for %lx, marking ro\n",
1890 __func__, gfn);
1891 ret = 1;
1892 pte_access &= ~ACC_WRITE_MASK;
1893 if (is_writable_pte(spte))
1894 spte &= ~PT_WRITABLE_MASK;
1895 }
1896 }
1897
1898 if (pte_access & ACC_WRITE_MASK)
1899 mark_page_dirty(vcpu->kvm, gfn);
1900
1901 set_pte:
1902 __set_spte(sptep, spte);
1903 return ret;
1904 }
1905
1906 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1907 unsigned pt_access, unsigned pte_access,
1908 int user_fault, int write_fault, int dirty,
1909 int *ptwrite, int level, gfn_t gfn,
1910 pfn_t pfn, bool speculative,
1911 bool reset_host_protection)
1912 {
1913 int was_rmapped = 0;
1914 int was_writable = is_writable_pte(*sptep);
1915 int rmap_count;
1916
1917 pgprintk("%s: spte %llx access %x write_fault %d"
1918 " user_fault %d gfn %lx\n",
1919 __func__, *sptep, pt_access,
1920 write_fault, user_fault, gfn);
1921
1922 if (is_rmap_spte(*sptep)) {
1923 /*
1924 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1925 * the parent of the now unreachable PTE.
1926 */
1927 if (level > PT_PAGE_TABLE_LEVEL &&
1928 !is_large_pte(*sptep)) {
1929 struct kvm_mmu_page *child;
1930 u64 pte = *sptep;
1931
1932 child = page_header(pte & PT64_BASE_ADDR_MASK);
1933 mmu_page_remove_parent_pte(child, sptep);
1934 __set_spte(sptep, shadow_trap_nonpresent_pte);
1935 kvm_flush_remote_tlbs(vcpu->kvm);
1936 } else if (pfn != spte_to_pfn(*sptep)) {
1937 pgprintk("hfn old %lx new %lx\n",
1938 spte_to_pfn(*sptep), pfn);
1939 rmap_remove(vcpu->kvm, sptep);
1940 __set_spte(sptep, shadow_trap_nonpresent_pte);
1941 kvm_flush_remote_tlbs(vcpu->kvm);
1942 } else
1943 was_rmapped = 1;
1944 }
1945
1946 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1947 dirty, level, gfn, pfn, speculative, true,
1948 reset_host_protection)) {
1949 if (write_fault)
1950 *ptwrite = 1;
1951 kvm_x86_ops->tlb_flush(vcpu);
1952 }
1953
1954 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1955 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1956 is_large_pte(*sptep)? "2MB" : "4kB",
1957 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1958 *sptep, sptep);
1959 if (!was_rmapped && is_large_pte(*sptep))
1960 ++vcpu->kvm->stat.lpages;
1961
1962 page_header_update_slot(vcpu->kvm, sptep, gfn);
1963 if (!was_rmapped) {
1964 rmap_count = rmap_add(vcpu, sptep, gfn);
1965 kvm_release_pfn_clean(pfn);
1966 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1967 rmap_recycle(vcpu, sptep, gfn);
1968 } else {
1969 if (was_writable)
1970 kvm_release_pfn_dirty(pfn);
1971 else
1972 kvm_release_pfn_clean(pfn);
1973 }
1974 if (speculative) {
1975 vcpu->arch.last_pte_updated = sptep;
1976 vcpu->arch.last_pte_gfn = gfn;
1977 }
1978 }
1979
1980 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1981 {
1982 }
1983
1984 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1985 int level, gfn_t gfn, pfn_t pfn)
1986 {
1987 struct kvm_shadow_walk_iterator iterator;
1988 struct kvm_mmu_page *sp;
1989 int pt_write = 0;
1990 gfn_t pseudo_gfn;
1991
1992 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1993 if (iterator.level == level) {
1994 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1995 0, write, 1, &pt_write,
1996 level, gfn, pfn, false, true);
1997 ++vcpu->stat.pf_fixed;
1998 break;
1999 }
2000
2001 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2002 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
2003 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2004 iterator.level - 1,
2005 1, ACC_ALL, iterator.sptep);
2006 if (!sp) {
2007 pgprintk("nonpaging_map: ENOMEM\n");
2008 kvm_release_pfn_clean(pfn);
2009 return -ENOMEM;
2010 }
2011
2012 __set_spte(iterator.sptep,
2013 __pa(sp->spt)
2014 | PT_PRESENT_MASK | PT_WRITABLE_MASK
2015 | shadow_user_mask | shadow_x_mask);
2016 }
2017 }
2018 return pt_write;
2019 }
2020
2021 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2022 {
2023 char buf[1];
2024 void __user *hva;
2025 int r;
2026
2027 /* Touch the page, so send SIGBUS */
2028 hva = (void __user *)gfn_to_hva(kvm, gfn);
2029 r = copy_from_user(buf, hva, 1);
2030 }
2031
2032 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2033 {
2034 kvm_release_pfn_clean(pfn);
2035 if (is_hwpoison_pfn(pfn)) {
2036 kvm_send_hwpoison_signal(kvm, gfn);
2037 return 0;
2038 }
2039 return 1;
2040 }
2041
2042 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2043 {
2044 int r;
2045 int level;
2046 pfn_t pfn;
2047 unsigned long mmu_seq;
2048
2049 level = mapping_level(vcpu, gfn);
2050
2051 /*
2052 * This path builds a PAE pagetable - so we can map 2mb pages at
2053 * maximum. Therefore check if the level is larger than that.
2054 */
2055 if (level > PT_DIRECTORY_LEVEL)
2056 level = PT_DIRECTORY_LEVEL;
2057
2058 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2059
2060 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2061 smp_rmb();
2062 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2063
2064 /* mmio */
2065 if (is_error_pfn(pfn))
2066 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2067
2068 spin_lock(&vcpu->kvm->mmu_lock);
2069 if (mmu_notifier_retry(vcpu, mmu_seq))
2070 goto out_unlock;
2071 kvm_mmu_free_some_pages(vcpu);
2072 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2073 spin_unlock(&vcpu->kvm->mmu_lock);
2074
2075
2076 return r;
2077
2078 out_unlock:
2079 spin_unlock(&vcpu->kvm->mmu_lock);
2080 kvm_release_pfn_clean(pfn);
2081 return 0;
2082 }
2083
2084
2085 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2086 {
2087 int i;
2088 struct kvm_mmu_page *sp;
2089
2090 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2091 return;
2092 spin_lock(&vcpu->kvm->mmu_lock);
2093 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2094 hpa_t root = vcpu->arch.mmu.root_hpa;
2095
2096 sp = page_header(root);
2097 --sp->root_count;
2098 if (!sp->root_count && sp->role.invalid)
2099 kvm_mmu_zap_page(vcpu->kvm, sp);
2100 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2101 spin_unlock(&vcpu->kvm->mmu_lock);
2102 return;
2103 }
2104 for (i = 0; i < 4; ++i) {
2105 hpa_t root = vcpu->arch.mmu.pae_root[i];
2106
2107 if (root) {
2108 root &= PT64_BASE_ADDR_MASK;
2109 sp = page_header(root);
2110 --sp->root_count;
2111 if (!sp->root_count && sp->role.invalid)
2112 kvm_mmu_zap_page(vcpu->kvm, sp);
2113 }
2114 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2115 }
2116 spin_unlock(&vcpu->kvm->mmu_lock);
2117 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2118 }
2119
2120 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2121 {
2122 int ret = 0;
2123
2124 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2125 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2126 ret = 1;
2127 }
2128
2129 return ret;
2130 }
2131
2132 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2133 {
2134 int i;
2135 gfn_t root_gfn;
2136 struct kvm_mmu_page *sp;
2137 int direct = 0;
2138 u64 pdptr;
2139
2140 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2141
2142 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2143 hpa_t root = vcpu->arch.mmu.root_hpa;
2144
2145 ASSERT(!VALID_PAGE(root));
2146 if (mmu_check_root(vcpu, root_gfn))
2147 return 1;
2148 if (tdp_enabled) {
2149 direct = 1;
2150 root_gfn = 0;
2151 }
2152 spin_lock(&vcpu->kvm->mmu_lock);
2153 kvm_mmu_free_some_pages(vcpu);
2154 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2155 PT64_ROOT_LEVEL, direct,
2156 ACC_ALL, NULL);
2157 root = __pa(sp->spt);
2158 ++sp->root_count;
2159 spin_unlock(&vcpu->kvm->mmu_lock);
2160 vcpu->arch.mmu.root_hpa = root;
2161 return 0;
2162 }
2163 direct = !is_paging(vcpu);
2164 for (i = 0; i < 4; ++i) {
2165 hpa_t root = vcpu->arch.mmu.pae_root[i];
2166
2167 ASSERT(!VALID_PAGE(root));
2168 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2169 pdptr = kvm_pdptr_read(vcpu, i);
2170 if (!is_present_gpte(pdptr)) {
2171 vcpu->arch.mmu.pae_root[i] = 0;
2172 continue;
2173 }
2174 root_gfn = pdptr >> PAGE_SHIFT;
2175 } else if (vcpu->arch.mmu.root_level == 0)
2176 root_gfn = 0;
2177 if (mmu_check_root(vcpu, root_gfn))
2178 return 1;
2179 if (tdp_enabled) {
2180 direct = 1;
2181 root_gfn = i << 30;
2182 }
2183 spin_lock(&vcpu->kvm->mmu_lock);
2184 kvm_mmu_free_some_pages(vcpu);
2185 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2186 PT32_ROOT_LEVEL, direct,
2187 ACC_ALL, NULL);
2188 root = __pa(sp->spt);
2189 ++sp->root_count;
2190 spin_unlock(&vcpu->kvm->mmu_lock);
2191
2192 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2193 }
2194 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2195 return 0;
2196 }
2197
2198 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2199 {
2200 int i;
2201 struct kvm_mmu_page *sp;
2202
2203 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2204 return;
2205 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2206 hpa_t root = vcpu->arch.mmu.root_hpa;
2207 sp = page_header(root);
2208 mmu_sync_children(vcpu, sp);
2209 return;
2210 }
2211 for (i = 0; i < 4; ++i) {
2212 hpa_t root = vcpu->arch.mmu.pae_root[i];
2213
2214 if (root && VALID_PAGE(root)) {
2215 root &= PT64_BASE_ADDR_MASK;
2216 sp = page_header(root);
2217 mmu_sync_children(vcpu, sp);
2218 }
2219 }
2220 }
2221
2222 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2223 {
2224 spin_lock(&vcpu->kvm->mmu_lock);
2225 mmu_sync_roots(vcpu);
2226 spin_unlock(&vcpu->kvm->mmu_lock);
2227 }
2228
2229 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2230 u32 access, u32 *error)
2231 {
2232 if (error)
2233 *error = 0;
2234 return vaddr;
2235 }
2236
2237 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2238 u32 error_code)
2239 {
2240 gfn_t gfn;
2241 int r;
2242
2243 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2244 r = mmu_topup_memory_caches(vcpu);
2245 if (r)
2246 return r;
2247
2248 ASSERT(vcpu);
2249 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2250
2251 gfn = gva >> PAGE_SHIFT;
2252
2253 return nonpaging_map(vcpu, gva & PAGE_MASK,
2254 error_code & PFERR_WRITE_MASK, gfn);
2255 }
2256
2257 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2258 u32 error_code)
2259 {
2260 pfn_t pfn;
2261 int r;
2262 int level;
2263 gfn_t gfn = gpa >> PAGE_SHIFT;
2264 unsigned long mmu_seq;
2265
2266 ASSERT(vcpu);
2267 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2268
2269 r = mmu_topup_memory_caches(vcpu);
2270 if (r)
2271 return r;
2272
2273 level = mapping_level(vcpu, gfn);
2274
2275 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2276
2277 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2278 smp_rmb();
2279 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2280 if (is_error_pfn(pfn))
2281 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2282 spin_lock(&vcpu->kvm->mmu_lock);
2283 if (mmu_notifier_retry(vcpu, mmu_seq))
2284 goto out_unlock;
2285 kvm_mmu_free_some_pages(vcpu);
2286 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2287 level, gfn, pfn);
2288 spin_unlock(&vcpu->kvm->mmu_lock);
2289
2290 return r;
2291
2292 out_unlock:
2293 spin_unlock(&vcpu->kvm->mmu_lock);
2294 kvm_release_pfn_clean(pfn);
2295 return 0;
2296 }
2297
2298 static void nonpaging_free(struct kvm_vcpu *vcpu)
2299 {
2300 mmu_free_roots(vcpu);
2301 }
2302
2303 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2304 {
2305 struct kvm_mmu *context = &vcpu->arch.mmu;
2306
2307 context->new_cr3 = nonpaging_new_cr3;
2308 context->page_fault = nonpaging_page_fault;
2309 context->gva_to_gpa = nonpaging_gva_to_gpa;
2310 context->free = nonpaging_free;
2311 context->prefetch_page = nonpaging_prefetch_page;
2312 context->sync_page = nonpaging_sync_page;
2313 context->invlpg = nonpaging_invlpg;
2314 context->root_level = 0;
2315 context->shadow_root_level = PT32E_ROOT_LEVEL;
2316 context->root_hpa = INVALID_PAGE;
2317 return 0;
2318 }
2319
2320 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2321 {
2322 ++vcpu->stat.tlb_flush;
2323 kvm_x86_ops->tlb_flush(vcpu);
2324 }
2325
2326 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2327 {
2328 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2329 mmu_free_roots(vcpu);
2330 }
2331
2332 static void inject_page_fault(struct kvm_vcpu *vcpu,
2333 u64 addr,
2334 u32 err_code)
2335 {
2336 kvm_inject_page_fault(vcpu, addr, err_code);
2337 }
2338
2339 static void paging_free(struct kvm_vcpu *vcpu)
2340 {
2341 nonpaging_free(vcpu);
2342 }
2343
2344 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2345 {
2346 int bit7;
2347
2348 bit7 = (gpte >> 7) & 1;
2349 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2350 }
2351
2352 #define PTTYPE 64
2353 #include "paging_tmpl.h"
2354 #undef PTTYPE
2355
2356 #define PTTYPE 32
2357 #include "paging_tmpl.h"
2358 #undef PTTYPE
2359
2360 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2361 {
2362 struct kvm_mmu *context = &vcpu->arch.mmu;
2363 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2364 u64 exb_bit_rsvd = 0;
2365
2366 if (!is_nx(vcpu))
2367 exb_bit_rsvd = rsvd_bits(63, 63);
2368 switch (level) {
2369 case PT32_ROOT_LEVEL:
2370 /* no rsvd bits for 2 level 4K page table entries */
2371 context->rsvd_bits_mask[0][1] = 0;
2372 context->rsvd_bits_mask[0][0] = 0;
2373 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2374
2375 if (!is_pse(vcpu)) {
2376 context->rsvd_bits_mask[1][1] = 0;
2377 break;
2378 }
2379
2380 if (is_cpuid_PSE36())
2381 /* 36bits PSE 4MB page */
2382 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2383 else
2384 /* 32 bits PSE 4MB page */
2385 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2386 break;
2387 case PT32E_ROOT_LEVEL:
2388 context->rsvd_bits_mask[0][2] =
2389 rsvd_bits(maxphyaddr, 63) |
2390 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2391 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2392 rsvd_bits(maxphyaddr, 62); /* PDE */
2393 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2394 rsvd_bits(maxphyaddr, 62); /* PTE */
2395 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2396 rsvd_bits(maxphyaddr, 62) |
2397 rsvd_bits(13, 20); /* large page */
2398 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2399 break;
2400 case PT64_ROOT_LEVEL:
2401 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2402 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2403 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2404 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2405 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2406 rsvd_bits(maxphyaddr, 51);
2407 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2408 rsvd_bits(maxphyaddr, 51);
2409 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2410 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2411 rsvd_bits(maxphyaddr, 51) |
2412 rsvd_bits(13, 29);
2413 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2414 rsvd_bits(maxphyaddr, 51) |
2415 rsvd_bits(13, 20); /* large page */
2416 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2417 break;
2418 }
2419 }
2420
2421 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2422 {
2423 struct kvm_mmu *context = &vcpu->arch.mmu;
2424
2425 ASSERT(is_pae(vcpu));
2426 context->new_cr3 = paging_new_cr3;
2427 context->page_fault = paging64_page_fault;
2428 context->gva_to_gpa = paging64_gva_to_gpa;
2429 context->prefetch_page = paging64_prefetch_page;
2430 context->sync_page = paging64_sync_page;
2431 context->invlpg = paging64_invlpg;
2432 context->free = paging_free;
2433 context->root_level = level;
2434 context->shadow_root_level = level;
2435 context->root_hpa = INVALID_PAGE;
2436 return 0;
2437 }
2438
2439 static int paging64_init_context(struct kvm_vcpu *vcpu)
2440 {
2441 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2442 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2443 }
2444
2445 static int paging32_init_context(struct kvm_vcpu *vcpu)
2446 {
2447 struct kvm_mmu *context = &vcpu->arch.mmu;
2448
2449 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2450 context->new_cr3 = paging_new_cr3;
2451 context->page_fault = paging32_page_fault;
2452 context->gva_to_gpa = paging32_gva_to_gpa;
2453 context->free = paging_free;
2454 context->prefetch_page = paging32_prefetch_page;
2455 context->sync_page = paging32_sync_page;
2456 context->invlpg = paging32_invlpg;
2457 context->root_level = PT32_ROOT_LEVEL;
2458 context->shadow_root_level = PT32E_ROOT_LEVEL;
2459 context->root_hpa = INVALID_PAGE;
2460 return 0;
2461 }
2462
2463 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2464 {
2465 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2466 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2467 }
2468
2469 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2470 {
2471 struct kvm_mmu *context = &vcpu->arch.mmu;
2472
2473 context->new_cr3 = nonpaging_new_cr3;
2474 context->page_fault = tdp_page_fault;
2475 context->free = nonpaging_free;
2476 context->prefetch_page = nonpaging_prefetch_page;
2477 context->sync_page = nonpaging_sync_page;
2478 context->invlpg = nonpaging_invlpg;
2479 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2480 context->root_hpa = INVALID_PAGE;
2481
2482 if (!is_paging(vcpu)) {
2483 context->gva_to_gpa = nonpaging_gva_to_gpa;
2484 context->root_level = 0;
2485 } else if (is_long_mode(vcpu)) {
2486 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2487 context->gva_to_gpa = paging64_gva_to_gpa;
2488 context->root_level = PT64_ROOT_LEVEL;
2489 } else if (is_pae(vcpu)) {
2490 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2491 context->gva_to_gpa = paging64_gva_to_gpa;
2492 context->root_level = PT32E_ROOT_LEVEL;
2493 } else {
2494 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2495 context->gva_to_gpa = paging32_gva_to_gpa;
2496 context->root_level = PT32_ROOT_LEVEL;
2497 }
2498
2499 return 0;
2500 }
2501
2502 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2503 {
2504 int r;
2505
2506 ASSERT(vcpu);
2507 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2508
2509 if (!is_paging(vcpu))
2510 r = nonpaging_init_context(vcpu);
2511 else if (is_long_mode(vcpu))
2512 r = paging64_init_context(vcpu);
2513 else if (is_pae(vcpu))
2514 r = paging32E_init_context(vcpu);
2515 else
2516 r = paging32_init_context(vcpu);
2517
2518 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2519 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2520
2521 return r;
2522 }
2523
2524 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2525 {
2526 vcpu->arch.update_pte.pfn = bad_pfn;
2527
2528 if (tdp_enabled)
2529 return init_kvm_tdp_mmu(vcpu);
2530 else
2531 return init_kvm_softmmu(vcpu);
2532 }
2533
2534 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2535 {
2536 ASSERT(vcpu);
2537 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2538 /* mmu.free() should set root_hpa = INVALID_PAGE */
2539 vcpu->arch.mmu.free(vcpu);
2540 }
2541
2542 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2543 {
2544 destroy_kvm_mmu(vcpu);
2545 return init_kvm_mmu(vcpu);
2546 }
2547 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2548
2549 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2550 {
2551 int r;
2552
2553 r = mmu_topup_memory_caches(vcpu);
2554 if (r)
2555 goto out;
2556 r = mmu_alloc_roots(vcpu);
2557 spin_lock(&vcpu->kvm->mmu_lock);
2558 mmu_sync_roots(vcpu);
2559 spin_unlock(&vcpu->kvm->mmu_lock);
2560 if (r)
2561 goto out;
2562 /* set_cr3() should ensure TLB has been flushed */
2563 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2564 out:
2565 return r;
2566 }
2567 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2568
2569 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2570 {
2571 mmu_free_roots(vcpu);
2572 }
2573
2574 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2575 struct kvm_mmu_page *sp,
2576 u64 *spte)
2577 {
2578 u64 pte;
2579 struct kvm_mmu_page *child;
2580
2581 pte = *spte;
2582 if (is_shadow_present_pte(pte)) {
2583 if (is_last_spte(pte, sp->role.level))
2584 rmap_remove(vcpu->kvm, spte);
2585 else {
2586 child = page_header(pte & PT64_BASE_ADDR_MASK);
2587 mmu_page_remove_parent_pte(child, spte);
2588 }
2589 }
2590 __set_spte(spte, shadow_trap_nonpresent_pte);
2591 if (is_large_pte(pte))
2592 --vcpu->kvm->stat.lpages;
2593 }
2594
2595 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2596 struct kvm_mmu_page *sp,
2597 u64 *spte,
2598 const void *new)
2599 {
2600 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2601 ++vcpu->kvm->stat.mmu_pde_zapped;
2602 return;
2603 }
2604
2605 ++vcpu->kvm->stat.mmu_pte_updated;
2606 if (!sp->role.cr4_pae)
2607 paging32_update_pte(vcpu, sp, spte, new);
2608 else
2609 paging64_update_pte(vcpu, sp, spte, new);
2610 }
2611
2612 static bool need_remote_flush(u64 old, u64 new)
2613 {
2614 if (!is_shadow_present_pte(old))
2615 return false;
2616 if (!is_shadow_present_pte(new))
2617 return true;
2618 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2619 return true;
2620 old ^= PT64_NX_MASK;
2621 new ^= PT64_NX_MASK;
2622 return (old & ~new & PT64_PERM_MASK) != 0;
2623 }
2624
2625 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2626 {
2627 if (need_remote_flush(old, new))
2628 kvm_flush_remote_tlbs(vcpu->kvm);
2629 else
2630 kvm_mmu_flush_tlb(vcpu);
2631 }
2632
2633 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2634 {
2635 u64 *spte = vcpu->arch.last_pte_updated;
2636
2637 return !!(spte && (*spte & shadow_accessed_mask));
2638 }
2639
2640 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2641 u64 gpte)
2642 {
2643 gfn_t gfn;
2644 pfn_t pfn;
2645
2646 if (!is_present_gpte(gpte))
2647 return;
2648 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2649
2650 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2651 smp_rmb();
2652 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2653
2654 if (is_error_pfn(pfn)) {
2655 kvm_release_pfn_clean(pfn);
2656 return;
2657 }
2658 vcpu->arch.update_pte.gfn = gfn;
2659 vcpu->arch.update_pte.pfn = pfn;
2660 }
2661
2662 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2663 {
2664 u64 *spte = vcpu->arch.last_pte_updated;
2665
2666 if (spte
2667 && vcpu->arch.last_pte_gfn == gfn
2668 && shadow_accessed_mask
2669 && !(*spte & shadow_accessed_mask)
2670 && is_shadow_present_pte(*spte))
2671 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2672 }
2673
2674 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2675 const u8 *new, int bytes,
2676 bool guest_initiated)
2677 {
2678 gfn_t gfn = gpa >> PAGE_SHIFT;
2679 struct kvm_mmu_page *sp;
2680 struct hlist_node *node, *n;
2681 struct hlist_head *bucket;
2682 unsigned index;
2683 u64 entry, gentry;
2684 u64 *spte;
2685 unsigned offset = offset_in_page(gpa);
2686 unsigned pte_size;
2687 unsigned page_offset;
2688 unsigned misaligned;
2689 unsigned quadrant;
2690 int level;
2691 int flooded = 0;
2692 int npte;
2693 int r;
2694 int invlpg_counter;
2695
2696 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2697
2698 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2699
2700 /*
2701 * Assume that the pte write on a page table of the same type
2702 * as the current vcpu paging mode. This is nearly always true
2703 * (might be false while changing modes). Note it is verified later
2704 * by update_pte().
2705 */
2706 if ((is_pae(vcpu) && bytes == 4) || !new) {
2707 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2708 if (is_pae(vcpu)) {
2709 gpa &= ~(gpa_t)7;
2710 bytes = 8;
2711 }
2712 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2713 if (r)
2714 gentry = 0;
2715 new = (const u8 *)&gentry;
2716 }
2717
2718 switch (bytes) {
2719 case 4:
2720 gentry = *(const u32 *)new;
2721 break;
2722 case 8:
2723 gentry = *(const u64 *)new;
2724 break;
2725 default:
2726 gentry = 0;
2727 break;
2728 }
2729
2730 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2731 spin_lock(&vcpu->kvm->mmu_lock);
2732 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2733 gentry = 0;
2734 kvm_mmu_access_page(vcpu, gfn);
2735 kvm_mmu_free_some_pages(vcpu);
2736 ++vcpu->kvm->stat.mmu_pte_write;
2737 kvm_mmu_audit(vcpu, "pre pte write");
2738 if (guest_initiated) {
2739 if (gfn == vcpu->arch.last_pt_write_gfn
2740 && !last_updated_pte_accessed(vcpu)) {
2741 ++vcpu->arch.last_pt_write_count;
2742 if (vcpu->arch.last_pt_write_count >= 3)
2743 flooded = 1;
2744 } else {
2745 vcpu->arch.last_pt_write_gfn = gfn;
2746 vcpu->arch.last_pt_write_count = 1;
2747 vcpu->arch.last_pte_updated = NULL;
2748 }
2749 }
2750 index = kvm_page_table_hashfn(gfn);
2751 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2752
2753 restart:
2754 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2755 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2756 continue;
2757 pte_size = sp->role.cr4_pae ? 8 : 4;
2758 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2759 misaligned |= bytes < 4;
2760 if (misaligned || flooded) {
2761 /*
2762 * Misaligned accesses are too much trouble to fix
2763 * up; also, they usually indicate a page is not used
2764 * as a page table.
2765 *
2766 * If we're seeing too many writes to a page,
2767 * it may no longer be a page table, or we may be
2768 * forking, in which case it is better to unmap the
2769 * page.
2770 */
2771 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2772 gpa, bytes, sp->role.word);
2773 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2774 goto restart;
2775 ++vcpu->kvm->stat.mmu_flooded;
2776 continue;
2777 }
2778 page_offset = offset;
2779 level = sp->role.level;
2780 npte = 1;
2781 if (!sp->role.cr4_pae) {
2782 page_offset <<= 1; /* 32->64 */
2783 /*
2784 * A 32-bit pde maps 4MB while the shadow pdes map
2785 * only 2MB. So we need to double the offset again
2786 * and zap two pdes instead of one.
2787 */
2788 if (level == PT32_ROOT_LEVEL) {
2789 page_offset &= ~7; /* kill rounding error */
2790 page_offset <<= 1;
2791 npte = 2;
2792 }
2793 quadrant = page_offset >> PAGE_SHIFT;
2794 page_offset &= ~PAGE_MASK;
2795 if (quadrant != sp->role.quadrant)
2796 continue;
2797 }
2798 spte = &sp->spt[page_offset / sizeof(*spte)];
2799 while (npte--) {
2800 entry = *spte;
2801 mmu_pte_write_zap_pte(vcpu, sp, spte);
2802 if (gentry)
2803 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2804 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2805 ++spte;
2806 }
2807 }
2808 kvm_mmu_audit(vcpu, "post pte write");
2809 spin_unlock(&vcpu->kvm->mmu_lock);
2810 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2811 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2812 vcpu->arch.update_pte.pfn = bad_pfn;
2813 }
2814 }
2815
2816 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2817 {
2818 gpa_t gpa;
2819 int r;
2820
2821 if (tdp_enabled)
2822 return 0;
2823
2824 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2825
2826 spin_lock(&vcpu->kvm->mmu_lock);
2827 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2828 spin_unlock(&vcpu->kvm->mmu_lock);
2829 return r;
2830 }
2831 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2832
2833 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2834 {
2835 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2836 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2837 struct kvm_mmu_page *sp;
2838
2839 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2840 struct kvm_mmu_page, link);
2841 kvm_mmu_zap_page(vcpu->kvm, sp);
2842 ++vcpu->kvm->stat.mmu_recycled;
2843 }
2844 }
2845
2846 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2847 {
2848 int r;
2849 enum emulation_result er;
2850
2851 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2852 if (r < 0)
2853 goto out;
2854
2855 if (!r) {
2856 r = 1;
2857 goto out;
2858 }
2859
2860 r = mmu_topup_memory_caches(vcpu);
2861 if (r)
2862 goto out;
2863
2864 er = emulate_instruction(vcpu, cr2, error_code, 0);
2865
2866 switch (er) {
2867 case EMULATE_DONE:
2868 return 1;
2869 case EMULATE_DO_MMIO:
2870 ++vcpu->stat.mmio_exits;
2871 /* fall through */
2872 case EMULATE_FAIL:
2873 return 0;
2874 default:
2875 BUG();
2876 }
2877 out:
2878 return r;
2879 }
2880 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2881
2882 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2883 {
2884 vcpu->arch.mmu.invlpg(vcpu, gva);
2885 kvm_mmu_flush_tlb(vcpu);
2886 ++vcpu->stat.invlpg;
2887 }
2888 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2889
2890 void kvm_enable_tdp(void)
2891 {
2892 tdp_enabled = true;
2893 }
2894 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2895
2896 void kvm_disable_tdp(void)
2897 {
2898 tdp_enabled = false;
2899 }
2900 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2901
2902 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2903 {
2904 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2905 }
2906
2907 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2908 {
2909 struct page *page;
2910 int i;
2911
2912 ASSERT(vcpu);
2913
2914 /*
2915 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2916 * Therefore we need to allocate shadow page tables in the first
2917 * 4GB of memory, which happens to fit the DMA32 zone.
2918 */
2919 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2920 if (!page)
2921 return -ENOMEM;
2922
2923 vcpu->arch.mmu.pae_root = page_address(page);
2924 for (i = 0; i < 4; ++i)
2925 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2926
2927 return 0;
2928 }
2929
2930 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2931 {
2932 ASSERT(vcpu);
2933 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2934
2935 return alloc_mmu_pages(vcpu);
2936 }
2937
2938 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2939 {
2940 ASSERT(vcpu);
2941 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2942
2943 return init_kvm_mmu(vcpu);
2944 }
2945
2946 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2947 {
2948 ASSERT(vcpu);
2949
2950 destroy_kvm_mmu(vcpu);
2951 free_mmu_pages(vcpu);
2952 mmu_free_memory_caches(vcpu);
2953 }
2954
2955 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2956 {
2957 struct kvm_mmu_page *sp;
2958
2959 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2960 int i;
2961 u64 *pt;
2962
2963 if (!test_bit(slot, sp->slot_bitmap))
2964 continue;
2965
2966 pt = sp->spt;
2967 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2968 /* avoid RMW */
2969 if (pt[i] & PT_WRITABLE_MASK)
2970 pt[i] &= ~PT_WRITABLE_MASK;
2971 }
2972 kvm_flush_remote_tlbs(kvm);
2973 }
2974
2975 void kvm_mmu_zap_all(struct kvm *kvm)
2976 {
2977 struct kvm_mmu_page *sp, *node;
2978
2979 spin_lock(&kvm->mmu_lock);
2980 restart:
2981 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2982 if (kvm_mmu_zap_page(kvm, sp))
2983 goto restart;
2984
2985 spin_unlock(&kvm->mmu_lock);
2986
2987 kvm_flush_remote_tlbs(kvm);
2988 }
2989
2990 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2991 {
2992 struct kvm_mmu_page *page;
2993
2994 page = container_of(kvm->arch.active_mmu_pages.prev,
2995 struct kvm_mmu_page, link);
2996 return kvm_mmu_zap_page(kvm, page);
2997 }
2998
2999 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3000 {
3001 struct kvm *kvm;
3002 struct kvm *kvm_freed = NULL;
3003 int cache_count = 0;
3004
3005 spin_lock(&kvm_lock);
3006
3007 list_for_each_entry(kvm, &vm_list, vm_list) {
3008 int npages, idx, freed_pages;
3009
3010 idx = srcu_read_lock(&kvm->srcu);
3011 spin_lock(&kvm->mmu_lock);
3012 npages = kvm->arch.n_alloc_mmu_pages -
3013 kvm->arch.n_free_mmu_pages;
3014 cache_count += npages;
3015 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
3016 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
3017 cache_count -= freed_pages;
3018 kvm_freed = kvm;
3019 }
3020 nr_to_scan--;
3021
3022 spin_unlock(&kvm->mmu_lock);
3023 srcu_read_unlock(&kvm->srcu, idx);
3024 }
3025 if (kvm_freed)
3026 list_move_tail(&kvm_freed->vm_list, &vm_list);
3027
3028 spin_unlock(&kvm_lock);
3029
3030 return cache_count;
3031 }
3032
3033 static struct shrinker mmu_shrinker = {
3034 .shrink = mmu_shrink,
3035 .seeks = DEFAULT_SEEKS * 10,
3036 };
3037
3038 static void mmu_destroy_caches(void)
3039 {
3040 if (pte_chain_cache)
3041 kmem_cache_destroy(pte_chain_cache);
3042 if (rmap_desc_cache)
3043 kmem_cache_destroy(rmap_desc_cache);
3044 if (mmu_page_header_cache)
3045 kmem_cache_destroy(mmu_page_header_cache);
3046 }
3047
3048 void kvm_mmu_module_exit(void)
3049 {
3050 mmu_destroy_caches();
3051 unregister_shrinker(&mmu_shrinker);
3052 }
3053
3054 int kvm_mmu_module_init(void)
3055 {
3056 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3057 sizeof(struct kvm_pte_chain),
3058 0, 0, NULL);
3059 if (!pte_chain_cache)
3060 goto nomem;
3061 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3062 sizeof(struct kvm_rmap_desc),
3063 0, 0, NULL);
3064 if (!rmap_desc_cache)
3065 goto nomem;
3066
3067 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3068 sizeof(struct kvm_mmu_page),
3069 0, 0, NULL);
3070 if (!mmu_page_header_cache)
3071 goto nomem;
3072
3073 register_shrinker(&mmu_shrinker);
3074
3075 return 0;
3076
3077 nomem:
3078 mmu_destroy_caches();
3079 return -ENOMEM;
3080 }
3081
3082 /*
3083 * Caculate mmu pages needed for kvm.
3084 */
3085 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3086 {
3087 int i;
3088 unsigned int nr_mmu_pages;
3089 unsigned int nr_pages = 0;
3090 struct kvm_memslots *slots;
3091
3092 slots = kvm_memslots(kvm);
3093
3094 for (i = 0; i < slots->nmemslots; i++)
3095 nr_pages += slots->memslots[i].npages;
3096
3097 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3098 nr_mmu_pages = max(nr_mmu_pages,
3099 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3100
3101 return nr_mmu_pages;
3102 }
3103
3104 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3105 unsigned len)
3106 {
3107 if (len > buffer->len)
3108 return NULL;
3109 return buffer->ptr;
3110 }
3111
3112 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3113 unsigned len)
3114 {
3115 void *ret;
3116
3117 ret = pv_mmu_peek_buffer(buffer, len);
3118 if (!ret)
3119 return ret;
3120 buffer->ptr += len;
3121 buffer->len -= len;
3122 buffer->processed += len;
3123 return ret;
3124 }
3125
3126 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3127 gpa_t addr, gpa_t value)
3128 {
3129 int bytes = 8;
3130 int r;
3131
3132 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3133 bytes = 4;
3134
3135 r = mmu_topup_memory_caches(vcpu);
3136 if (r)
3137 return r;
3138
3139 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3140 return -EFAULT;
3141
3142 return 1;
3143 }
3144
3145 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3146 {
3147 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3148 return 1;
3149 }
3150
3151 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3152 {
3153 spin_lock(&vcpu->kvm->mmu_lock);
3154 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3155 spin_unlock(&vcpu->kvm->mmu_lock);
3156 return 1;
3157 }
3158
3159 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3160 struct kvm_pv_mmu_op_buffer *buffer)
3161 {
3162 struct kvm_mmu_op_header *header;
3163
3164 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3165 if (!header)
3166 return 0;
3167 switch (header->op) {
3168 case KVM_MMU_OP_WRITE_PTE: {
3169 struct kvm_mmu_op_write_pte *wpte;
3170
3171 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3172 if (!wpte)
3173 return 0;
3174 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3175 wpte->pte_val);
3176 }
3177 case KVM_MMU_OP_FLUSH_TLB: {
3178 struct kvm_mmu_op_flush_tlb *ftlb;
3179
3180 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3181 if (!ftlb)
3182 return 0;
3183 return kvm_pv_mmu_flush_tlb(vcpu);
3184 }
3185 case KVM_MMU_OP_RELEASE_PT: {
3186 struct kvm_mmu_op_release_pt *rpt;
3187
3188 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3189 if (!rpt)
3190 return 0;
3191 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3192 }
3193 default: return 0;
3194 }
3195 }
3196
3197 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3198 gpa_t addr, unsigned long *ret)
3199 {
3200 int r;
3201 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3202
3203 buffer->ptr = buffer->buf;
3204 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3205 buffer->processed = 0;
3206
3207 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3208 if (r)
3209 goto out;
3210
3211 while (buffer->len) {
3212 r = kvm_pv_mmu_op_one(vcpu, buffer);
3213 if (r < 0)
3214 goto out;
3215 if (r == 0)
3216 break;
3217 }
3218
3219 r = 1;
3220 out:
3221 *ret = buffer->processed;
3222 return r;
3223 }
3224
3225 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3226 {
3227 struct kvm_shadow_walk_iterator iterator;
3228 int nr_sptes = 0;
3229
3230 spin_lock(&vcpu->kvm->mmu_lock);
3231 for_each_shadow_entry(vcpu, addr, iterator) {
3232 sptes[iterator.level-1] = *iterator.sptep;
3233 nr_sptes++;
3234 if (!is_shadow_present_pte(*iterator.sptep))
3235 break;
3236 }
3237 spin_unlock(&vcpu->kvm->mmu_lock);
3238
3239 return nr_sptes;
3240 }
3241 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3242
3243 #ifdef AUDIT
3244
3245 static const char *audit_msg;
3246
3247 static gva_t canonicalize(gva_t gva)
3248 {
3249 #ifdef CONFIG_X86_64
3250 gva = (long long)(gva << 16) >> 16;
3251 #endif
3252 return gva;
3253 }
3254
3255
3256 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3257
3258 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3259 inspect_spte_fn fn)
3260 {
3261 int i;
3262
3263 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3264 u64 ent = sp->spt[i];
3265
3266 if (is_shadow_present_pte(ent)) {
3267 if (!is_last_spte(ent, sp->role.level)) {
3268 struct kvm_mmu_page *child;
3269 child = page_header(ent & PT64_BASE_ADDR_MASK);
3270 __mmu_spte_walk(kvm, child, fn);
3271 } else
3272 fn(kvm, &sp->spt[i]);
3273 }
3274 }
3275 }
3276
3277 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3278 {
3279 int i;
3280 struct kvm_mmu_page *sp;
3281
3282 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3283 return;
3284 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3285 hpa_t root = vcpu->arch.mmu.root_hpa;
3286 sp = page_header(root);
3287 __mmu_spte_walk(vcpu->kvm, sp, fn);
3288 return;
3289 }
3290 for (i = 0; i < 4; ++i) {
3291 hpa_t root = vcpu->arch.mmu.pae_root[i];
3292
3293 if (root && VALID_PAGE(root)) {
3294 root &= PT64_BASE_ADDR_MASK;
3295 sp = page_header(root);
3296 __mmu_spte_walk(vcpu->kvm, sp, fn);
3297 }
3298 }
3299 return;
3300 }
3301
3302 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3303 gva_t va, int level)
3304 {
3305 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3306 int i;
3307 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3308
3309 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3310 u64 ent = pt[i];
3311
3312 if (ent == shadow_trap_nonpresent_pte)
3313 continue;
3314
3315 va = canonicalize(va);
3316 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3317 audit_mappings_page(vcpu, ent, va, level - 1);
3318 else {
3319 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3320 gfn_t gfn = gpa >> PAGE_SHIFT;
3321 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3322 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3323
3324 if (is_error_pfn(pfn)) {
3325 kvm_release_pfn_clean(pfn);
3326 continue;
3327 }
3328
3329 if (is_shadow_present_pte(ent)
3330 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3331 printk(KERN_ERR "xx audit error: (%s) levels %d"
3332 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3333 audit_msg, vcpu->arch.mmu.root_level,
3334 va, gpa, hpa, ent,
3335 is_shadow_present_pte(ent));
3336 else if (ent == shadow_notrap_nonpresent_pte
3337 && !is_error_hpa(hpa))
3338 printk(KERN_ERR "audit: (%s) notrap shadow,"
3339 " valid guest gva %lx\n", audit_msg, va);
3340 kvm_release_pfn_clean(pfn);
3341
3342 }
3343 }
3344 }
3345
3346 static void audit_mappings(struct kvm_vcpu *vcpu)
3347 {
3348 unsigned i;
3349
3350 if (vcpu->arch.mmu.root_level == 4)
3351 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3352 else
3353 for (i = 0; i < 4; ++i)
3354 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3355 audit_mappings_page(vcpu,
3356 vcpu->arch.mmu.pae_root[i],
3357 i << 30,
3358 2);
3359 }
3360
3361 static int count_rmaps(struct kvm_vcpu *vcpu)
3362 {
3363 struct kvm *kvm = vcpu->kvm;
3364 struct kvm_memslots *slots;
3365 int nmaps = 0;
3366 int i, j, k, idx;
3367
3368 idx = srcu_read_lock(&kvm->srcu);
3369 slots = kvm_memslots(kvm);
3370 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3371 struct kvm_memory_slot *m = &slots->memslots[i];
3372 struct kvm_rmap_desc *d;
3373
3374 for (j = 0; j < m->npages; ++j) {
3375 unsigned long *rmapp = &m->rmap[j];
3376
3377 if (!*rmapp)
3378 continue;
3379 if (!(*rmapp & 1)) {
3380 ++nmaps;
3381 continue;
3382 }
3383 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3384 while (d) {
3385 for (k = 0; k < RMAP_EXT; ++k)
3386 if (d->sptes[k])
3387 ++nmaps;
3388 else
3389 break;
3390 d = d->more;
3391 }
3392 }
3393 }
3394 srcu_read_unlock(&kvm->srcu, idx);
3395 return nmaps;
3396 }
3397
3398 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3399 {
3400 unsigned long *rmapp;
3401 struct kvm_mmu_page *rev_sp;
3402 gfn_t gfn;
3403
3404 if (*sptep & PT_WRITABLE_MASK) {
3405 rev_sp = page_header(__pa(sptep));
3406 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3407
3408 if (!gfn_to_memslot(kvm, gfn)) {
3409 if (!printk_ratelimit())
3410 return;
3411 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3412 audit_msg, gfn);
3413 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3414 audit_msg, (long int)(sptep - rev_sp->spt),
3415 rev_sp->gfn);
3416 dump_stack();
3417 return;
3418 }
3419
3420 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3421 rev_sp->role.level);
3422 if (!*rmapp) {
3423 if (!printk_ratelimit())
3424 return;
3425 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3426 audit_msg, *sptep);
3427 dump_stack();
3428 }
3429 }
3430
3431 }
3432
3433 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3434 {
3435 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3436 }
3437
3438 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3439 {
3440 struct kvm_mmu_page *sp;
3441 int i;
3442
3443 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3444 u64 *pt = sp->spt;
3445
3446 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3447 continue;
3448
3449 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3450 u64 ent = pt[i];
3451
3452 if (!(ent & PT_PRESENT_MASK))
3453 continue;
3454 if (!(ent & PT_WRITABLE_MASK))
3455 continue;
3456 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3457 }
3458 }
3459 return;
3460 }
3461
3462 static void audit_rmap(struct kvm_vcpu *vcpu)
3463 {
3464 check_writable_mappings_rmap(vcpu);
3465 count_rmaps(vcpu);
3466 }
3467
3468 static void audit_write_protection(struct kvm_vcpu *vcpu)
3469 {
3470 struct kvm_mmu_page *sp;
3471 struct kvm_memory_slot *slot;
3472 unsigned long *rmapp;
3473 u64 *spte;
3474 gfn_t gfn;
3475
3476 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3477 if (sp->role.direct)
3478 continue;
3479 if (sp->unsync)
3480 continue;
3481
3482 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3483 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3484 rmapp = &slot->rmap[gfn - slot->base_gfn];
3485
3486 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3487 while (spte) {
3488 if (*spte & PT_WRITABLE_MASK)
3489 printk(KERN_ERR "%s: (%s) shadow page has "
3490 "writable mappings: gfn %lx role %x\n",
3491 __func__, audit_msg, sp->gfn,
3492 sp->role.word);
3493 spte = rmap_next(vcpu->kvm, rmapp, spte);
3494 }
3495 }
3496 }
3497
3498 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3499 {
3500 int olddbg = dbg;
3501
3502 dbg = 0;
3503 audit_msg = msg;
3504 audit_rmap(vcpu);
3505 audit_write_protection(vcpu);
3506 if (strcmp("pre pte write", audit_msg) != 0)
3507 audit_mappings(vcpu);
3508 audit_writable_sptes_have_rmaps(vcpu);
3509 dbg = olddbg;
3510 }
3511
3512 #endif
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree