2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <sound/driver.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/pci.h>
37 #include <linux/slab.h>
38 #include <linux/vmalloc.h>
39 #include <linux/mutex.h>
42 #include <sound/core.h>
43 #include <sound/emu10k1.h>
48 /*************************************************************************
50 *************************************************************************/
52 void snd_emu10k1_voice_init(struct snd_emu10k1
* emu
, int ch
)
54 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
55 snd_emu10k1_ptr_write(emu
, IP
, ch
, 0);
56 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0xffff);
57 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0xffff);
58 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
59 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
60 snd_emu10k1_ptr_write(emu
, CCR
, ch
, 0);
62 snd_emu10k1_ptr_write(emu
, PSST
, ch
, 0);
63 snd_emu10k1_ptr_write(emu
, DSL
, ch
, 0x10);
64 snd_emu10k1_ptr_write(emu
, CCCA
, ch
, 0);
65 snd_emu10k1_ptr_write(emu
, Z1
, ch
, 0);
66 snd_emu10k1_ptr_write(emu
, Z2
, ch
, 0);
67 snd_emu10k1_ptr_write(emu
, FXRT
, ch
, 0x32100000);
69 snd_emu10k1_ptr_write(emu
, ATKHLDM
, ch
, 0);
70 snd_emu10k1_ptr_write(emu
, DCYSUSM
, ch
, 0);
71 snd_emu10k1_ptr_write(emu
, IFATN
, ch
, 0xffff);
72 snd_emu10k1_ptr_write(emu
, PEFE
, ch
, 0);
73 snd_emu10k1_ptr_write(emu
, FMMOD
, ch
, 0);
74 snd_emu10k1_ptr_write(emu
, TREMFRQ
, ch
, 24); /* 1 Hz */
75 snd_emu10k1_ptr_write(emu
, FM2FRQ2
, ch
, 24); /* 1 Hz */
76 snd_emu10k1_ptr_write(emu
, TEMPENV
, ch
, 0);
78 /*** these are last so OFF prevents writing ***/
79 snd_emu10k1_ptr_write(emu
, LFOVAL2
, ch
, 0);
80 snd_emu10k1_ptr_write(emu
, LFOVAL1
, ch
, 0);
81 snd_emu10k1_ptr_write(emu
, ATKHLDV
, ch
, 0);
82 snd_emu10k1_ptr_write(emu
, ENVVOL
, ch
, 0);
83 snd_emu10k1_ptr_write(emu
, ENVVAL
, ch
, 0);
85 /* Audigy extra stuffs */
87 snd_emu10k1_ptr_write(emu
, 0x4c, ch
, 0); /* ?? */
88 snd_emu10k1_ptr_write(emu
, 0x4d, ch
, 0); /* ?? */
89 snd_emu10k1_ptr_write(emu
, 0x4e, ch
, 0); /* ?? */
90 snd_emu10k1_ptr_write(emu
, 0x4f, ch
, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu
, A_FXRT1
, ch
, 0x03020100);
92 snd_emu10k1_ptr_write(emu
, A_FXRT2
, ch
, 0x3f3f3f3f);
93 snd_emu10k1_ptr_write(emu
, A_SENDAMOUNTS
, ch
, 0);
97 static unsigned int spi_dac_init
[] = {
121 static int snd_emu10k1_init(struct snd_emu10k1
*emu
, int enable_ir
, int resume
)
123 unsigned int silent_page
;
126 /* disable audio and lock cache */
127 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
,
130 /* reset recording buffers */
131 snd_emu10k1_ptr_write(emu
, MICBS
, 0, ADCBS_BUFSIZE_NONE
);
132 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
133 snd_emu10k1_ptr_write(emu
, FXBS
, 0, ADCBS_BUFSIZE_NONE
);
134 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
135 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
136 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
138 /* disable channel interrupt */
139 outl(0, emu
->port
+ INTE
);
140 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
141 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
142 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
143 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
146 /* set SPDIF bypass mode */
147 snd_emu10k1_ptr_write(emu
, SPBYPASS
, 0, SPBYPASS_FORMAT
);
148 /* enable rear left + rear right AC97 slots */
149 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_REAR_RIGHT
|
153 /* init envelope engine */
154 for (ch
= 0; ch
< NUM_G
; ch
++)
155 snd_emu10k1_voice_init(emu
, ch
);
157 snd_emu10k1_ptr_write(emu
, SPCS0
, 0, emu
->spdif_bits
[0]);
158 snd_emu10k1_ptr_write(emu
, SPCS1
, 0, emu
->spdif_bits
[1]);
159 snd_emu10k1_ptr_write(emu
, SPCS2
, 0, emu
->spdif_bits
[2]);
161 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
162 /* Hacks for Alice3 to work independent of haP16V driver */
165 //Setup SRCMulti_I2S SamplingRate
166 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
169 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
171 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
172 snd_emu10k1_ptr20_write(emu
, SRCSel
, 0, 0x14);
173 /* Setup SRCMulti Input Audio Enable */
174 /* Use 0xFFFFFFFF to enable P16V sounds. */
175 snd_emu10k1_ptr20_write(emu
, SRCMULTI_ENABLE
, 0, 0xFFFFFFFF);
177 /* Enabled Phased (8-channel) P16V playback */
178 outl(0x0201, emu
->port
+ HCFG2
);
179 /* Set playback routing. */
180 snd_emu10k1_ptr20_write(emu
, CAPTURE_P16V_SOURCE
, 0, 0x78e4);
182 if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 Value */
183 /* Hacks for Alice3 to work independent of haP16V driver */
186 snd_printk(KERN_INFO
"Audigy2 value: Special config.\n");
187 //Setup SRCMulti_I2S SamplingRate
188 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
191 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
193 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
194 outl(0x600000, emu
->port
+ 0x20);
195 outl(0x14, emu
->port
+ 0x24);
197 /* Setup SRCMulti Input Audio Enable */
198 outl(0x7b0000, emu
->port
+ 0x20);
199 outl(0xFF000000, emu
->port
+ 0x24);
201 /* Setup SPDIF Out Audio Enable */
202 /* The Audigy 2 Value has a separate SPDIF out,
203 * so no need for a mixer switch
205 outl(0x7a0000, emu
->port
+ 0x20);
206 outl(0xFF000000, emu
->port
+ 0x24);
207 tmp
= inl(emu
->port
+ A_IOCFG
) & ~0x8; /* Clear bit 3 */
208 outl(tmp
, emu
->port
+ A_IOCFG
);
210 if (emu
->card_capabilities
->spi_dac
) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
213 size
= ARRAY_SIZE(spi_dac_init
);
214 for (n
=0; n
< size
; n
++)
215 snd_emu10k1_spi_write(emu
, spi_dac_init
[n
]);
217 snd_emu10k1_ptr20_write(emu
, 0x60, 0, 0x10);
220 * GPIO1: Speakers-enabled.
223 * GPIO4: IEC958 Output on.
228 outl(0x76, emu
->port
+ A_IOCFG
); /* Windows uses 0x3f76 */
232 snd_emu10k1_ptr_write(emu
, PTB
, 0, emu
->ptb_pages
.addr
);
233 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0); /* taken from original driver */
234 snd_emu10k1_ptr_write(emu
, TCBS
, 0, 4); /* taken from original driver */
236 silent_page
= (emu
->silent_page
.addr
<< 1) | MAP_PTI_MASK
;
237 for (ch
= 0; ch
< NUM_G
; ch
++) {
238 snd_emu10k1_ptr_write(emu
, MAPA
, ch
, silent_page
);
239 snd_emu10k1_ptr_write(emu
, MAPB
, ch
, silent_page
);
244 * Mute Disable Audio = 0
245 * Lock Tank Memory = 1
246 * Lock Sound Memory = 0
250 if (emu
->revision
== 4) /* audigy2 */
251 outl(HCFG_AUDIOENABLE
|
252 HCFG_AC3ENABLE_CDSPDIF
|
253 HCFG_AC3ENABLE_GPSPDIF
|
254 HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
256 outl(HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
257 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
258 * e.g. card_capabilities->joystick */
259 } else if (emu
->model
== 0x20 ||
260 emu
->model
== 0xc400 ||
261 (emu
->model
== 0x21 && emu
->revision
< 6))
262 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
, emu
->port
+ HCFG
);
264 // With on-chip joystick
265 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
267 if (enable_ir
) { /* enable IR for SB Live */
268 if ( emu
->card_capabilities
->emu1212m
) {
269 ; /* Disable all access to A_IOCFG for the emu1212m */
270 } else if (emu
->audigy
) {
271 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
272 outl(reg
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
274 outl(reg
| A_IOCFG_GPOUT1
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
276 outl(reg
, emu
->port
+ A_IOCFG
);
278 unsigned int reg
= inl(emu
->port
+ HCFG
);
279 outl(reg
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
281 outl(reg
| HCFG_GPOUT1
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
283 outl(reg
, emu
->port
+ HCFG
);
287 if ( emu
->card_capabilities
->emu1212m
) {
288 ; /* Disable all access to A_IOCFG for the emu1212m */
289 } else if (emu
->audigy
) { /* enable analog output */
290 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
291 outl(reg
| A_IOCFG_GPOUT0
, emu
->port
+ A_IOCFG
);
297 static void snd_emu10k1_audio_enable(struct snd_emu10k1
*emu
)
300 * Enable the audio bit
302 outl(inl(emu
->port
+ HCFG
) | HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
304 /* Enable analog/digital outs on audigy */
305 if ( emu
->card_capabilities
->emu1212m
) {
306 ; /* Disable all access to A_IOCFG for the emu1212m */
307 } else if (emu
->audigy
) {
308 outl(inl(emu
->port
+ A_IOCFG
) & ~0x44, emu
->port
+ A_IOCFG
);
310 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
311 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
312 * This has to be done after init ALice3 I2SOut beyond 48KHz.
313 * So, sequence is important. */
314 outl(inl(emu
->port
+ A_IOCFG
) | 0x0040, emu
->port
+ A_IOCFG
);
315 } else if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 value */
316 /* Unmute Analog now. */
317 outl(inl(emu
->port
+ A_IOCFG
) | 0x0060, emu
->port
+ A_IOCFG
);
319 /* Disable routing from AC97 line out to Front speakers */
320 outl(inl(emu
->port
+ A_IOCFG
) | 0x0080, emu
->port
+ A_IOCFG
);
327 /* FIXME: the following routine disables LiveDrive-II !! */
330 tmp
= inl(emu
->port
+ HCFG
);
331 if (tmp
& (HCFG_GPINPUT0
| HCFG_GPINPUT1
)) {
332 outl(tmp
|0x800, emu
->port
+ HCFG
);
334 if (tmp
!= (inl(emu
->port
+ HCFG
) & ~0x800)) {
336 outl(tmp
, emu
->port
+ HCFG
);
342 snd_emu10k1_intr_enable(emu
, INTE_PCIERRORENABLE
);
345 int snd_emu10k1_done(struct snd_emu10k1
* emu
)
349 outl(0, emu
->port
+ INTE
);
354 for (ch
= 0; ch
< NUM_G
; ch
++)
355 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
356 for (ch
= 0; ch
< NUM_G
; ch
++) {
357 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0);
358 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0);
359 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
360 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
363 /* reset recording buffers */
364 snd_emu10k1_ptr_write(emu
, MICBS
, 0, 0);
365 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
366 snd_emu10k1_ptr_write(emu
, FXBS
, 0, 0);
367 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
368 snd_emu10k1_ptr_write(emu
, FXWC
, 0, 0);
369 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
370 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
371 snd_emu10k1_ptr_write(emu
, TCBS
, 0, TCBS_BUFFSIZE_16K
);
372 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0);
374 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, A_DBG_SINGLE_STEP
);
376 snd_emu10k1_ptr_write(emu
, DBG
, 0, EMU10K1_DBG_SINGLE_STEP
);
378 /* disable channel interrupt */
379 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
380 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
381 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
382 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
384 /* disable audio and lock cache */
385 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
386 snd_emu10k1_ptr_write(emu
, PTB
, 0, 0);
391 /*************************************************************************
392 * ECARD functional implementation
393 *************************************************************************/
395 /* In A1 Silicon, these bits are in the HC register */
396 #define HOOKN_BIT (1L << 12)
397 #define HANDN_BIT (1L << 11)
398 #define PULSEN_BIT (1L << 10)
400 #define EC_GDI1 (1 << 13)
401 #define EC_GDI0 (1 << 14)
403 #define EC_NUM_CONTROL_BITS 20
405 #define EC_AC3_DATA_SELN 0x0001L
406 #define EC_EE_DATA_SEL 0x0002L
407 #define EC_EE_CNTRL_SELN 0x0004L
408 #define EC_EECLK 0x0008L
409 #define EC_EECS 0x0010L
410 #define EC_EESDO 0x0020L
411 #define EC_TRIM_CSN 0x0040L
412 #define EC_TRIM_SCLK 0x0080L
413 #define EC_TRIM_SDATA 0x0100L
414 #define EC_TRIM_MUTEN 0x0200L
415 #define EC_ADCCAL 0x0400L
416 #define EC_ADCRSTN 0x0800L
417 #define EC_DACCAL 0x1000L
418 #define EC_DACMUTEN 0x2000L
419 #define EC_LEDN 0x4000L
421 #define EC_SPDIF0_SEL_SHIFT 15
422 #define EC_SPDIF1_SEL_SHIFT 17
423 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
424 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
425 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
426 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
427 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
428 * be incremented any time the EEPROM's
429 * format is changed. */
431 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
433 /* Addresses for special values stored in to EEPROM */
434 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
435 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
436 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
438 #define EC_LAST_PROMFILE_ADDR 0x2f
440 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
441 * can be up to 30 characters in length
442 * and is stored as a NULL-terminated
443 * ASCII string. Any unused bytes must be
444 * filled with zeros */
445 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
448 /* Most of this stuff is pretty self-evident. According to the hardware
449 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
450 * offset problem. Weird.
452 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
456 #define EC_DEFAULT_ADC_GAIN 0xC4C4
457 #define EC_DEFAULT_SPDIF0_SEL 0x0
458 #define EC_DEFAULT_SPDIF1_SEL 0x4
460 /**************************************************************************
461 * @func Clock bits into the Ecard's control latch. The Ecard uses a
462 * control latch will is loaded bit-serially by toggling the Modem control
463 * lines from function 2 on the E8010. This function hides these details
464 * and presents the illusion that we are actually writing to a distinct
468 static void snd_emu10k1_ecard_write(struct snd_emu10k1
* emu
, unsigned int value
)
470 unsigned short count
;
472 unsigned long hc_port
;
473 unsigned int hc_value
;
475 hc_port
= emu
->port
+ HCFG
;
476 hc_value
= inl(hc_port
) & ~(HOOKN_BIT
| HANDN_BIT
| PULSEN_BIT
);
477 outl(hc_value
, hc_port
);
479 for (count
= 0; count
< EC_NUM_CONTROL_BITS
; count
++) {
481 /* Set up the value */
482 data
= ((value
& 0x1) ? PULSEN_BIT
: 0);
485 outl(hc_value
| data
, hc_port
);
487 /* Clock the shift register */
488 outl(hc_value
| data
| HANDN_BIT
, hc_port
);
489 outl(hc_value
| data
, hc_port
);
493 outl(hc_value
| HOOKN_BIT
, hc_port
);
494 outl(hc_value
, hc_port
);
497 /**************************************************************************
498 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
499 * trim value consists of a 16bit value which is composed of two
500 * 8 bit gain/trim values, one for the left channel and one for the
501 * right channel. The following table maps from the Gain/Attenuation
502 * value in decibels into the corresponding bit pattern for a single
506 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1
* emu
,
511 /* Enable writing to the TRIM registers */
512 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
514 /* Do it again to insure that we meet hold time requirements */
515 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
517 for (bit
= (1 << 15); bit
; bit
>>= 1) {
520 value
= emu
->ecard_ctrl
& ~(EC_TRIM_CSN
| EC_TRIM_SDATA
);
523 value
|= EC_TRIM_SDATA
;
526 snd_emu10k1_ecard_write(emu
, value
);
527 snd_emu10k1_ecard_write(emu
, value
| EC_TRIM_SCLK
);
528 snd_emu10k1_ecard_write(emu
, value
);
531 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
534 static int snd_emu10k1_ecard_init(struct snd_emu10k1
* emu
)
536 unsigned int hc_value
;
538 /* Set up the initial settings */
539 emu
->ecard_ctrl
= EC_RAW_RUN_MODE
|
540 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL
) |
541 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL
);
543 /* Step 0: Set the codec type in the hardware control register
544 * and enable audio output */
545 hc_value
= inl(emu
->port
+ HCFG
);
546 outl(hc_value
| HCFG_AUDIOENABLE
| HCFG_CODECFORMAT_I2S
, emu
->port
+ HCFG
);
547 inl(emu
->port
+ HCFG
);
549 /* Step 1: Turn off the led and deassert TRIM_CS */
550 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
552 /* Step 2: Calibrate the ADC and DAC */
553 snd_emu10k1_ecard_write(emu
, EC_DACCAL
| EC_LEDN
| EC_TRIM_CSN
);
555 /* Step 3: Wait for awhile; XXX We can't get away with this
556 * under a real operating system; we'll need to block and wait that
558 snd_emu10k1_wait(emu
, 48000);
560 /* Step 4: Switch off the DAC and ADC calibration. Note
561 * That ADC_CAL is actually an inverted signal, so we assert
562 * it here to stop calibration. */
563 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
565 /* Step 4: Switch into run mode */
566 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
568 /* Step 5: Set the analog input gain */
569 snd_emu10k1_ecard_setadcgain(emu
, EC_DEFAULT_ADC_GAIN
);
574 static int snd_emu10k1_cardbus_init(struct snd_emu10k1
* emu
)
576 unsigned long special_port
;
579 /* Special initialisation routine
580 * before the rest of the IO-Ports become active.
582 special_port
= emu
->port
+ 0x38;
583 value
= inl(special_port
);
584 outl(0x00d00000, special_port
);
585 value
= inl(special_port
);
586 outl(0x00d00001, special_port
);
587 value
= inl(special_port
);
588 outl(0x00d0005f, special_port
);
589 value
= inl(special_port
);
590 outl(0x00d0007f, special_port
);
591 value
= inl(special_port
);
592 outl(0x0090007f, special_port
);
593 value
= inl(special_port
);
595 snd_emu10k1_ptr20_write(emu
, TINA2_VOLUME
, 0, 0xfefefefe); /* Defaults to 0x30303030 */
599 static int snd_emu1212m_fpga_write(struct snd_emu10k1
* emu
, int reg
, int value
)
601 if (reg
<0 || reg
>0x3f)
603 reg
+=0x40; /* 0x40 upwards are registers. */
604 if (value
<0 || value
>0x3f) /* 0 to 0x3f are values */
606 outl(reg
, emu
->port
+ A_IOCFG
);
607 outl(reg
| 0x80, emu
->port
+ A_IOCFG
); /* High bit clocks the value into the fpga. */
608 outl(value
, emu
->port
+ A_IOCFG
);
609 outl(value
| 0x80 , emu
->port
+ A_IOCFG
); /* High bit clocks the value into the fpga. */
614 static int snd_emu1212m_fpga_read(struct snd_emu10k1
* emu
, int reg
, int *value
)
616 if (reg
<0 || reg
>0x3f)
618 reg
+=0x40; /* 0x40 upwards are registers. */
619 outl(reg
, emu
->port
+ A_IOCFG
);
620 outl(reg
| 0x80, emu
->port
+ A_IOCFG
); /* High bit clocks the value into the fpga. */
621 *value
= inl(emu
->port
+ A_IOCFG
);
626 static int snd_emu1212m_fpga_netlist_write(struct snd_emu10k1
* emu
, int reg
, int value
)
628 snd_emu1212m_fpga_write(emu
, 0x00, ((reg
>> 8) & 0x3f) );
629 snd_emu1212m_fpga_write(emu
, 0x01, (reg
& 0x3f) );
630 snd_emu1212m_fpga_write(emu
, 0x02, ((value
>> 8) & 0x3f) );
631 snd_emu1212m_fpga_write(emu
, 0x03, (value
& 0x3f) );
636 static int snd_emu10k1_emu1212m_init(struct snd_emu10k1
* emu
)
641 snd_printk(KERN_ERR
"emu1212m: Special config.\n");
642 outl(0x0005a00c, emu
->port
+ HCFG
);
643 outl(0x0005a004, emu
->port
+ HCFG
);
644 outl(0x0005a000, emu
->port
+ HCFG
);
645 outl(0x0005a000, emu
->port
+ HCFG
);
647 snd_emu1212m_fpga_read(emu
, 0x22, &tmp
);
648 snd_emu1212m_fpga_read(emu
, 0x23, &tmp
);
649 snd_emu1212m_fpga_read(emu
, 0x24, &tmp
);
650 snd_emu1212m_fpga_write(emu
, 0x04, 0x01 );
651 snd_emu1212m_fpga_read(emu
, 0x0b, &tmp
);
652 snd_emu1212m_fpga_write(emu
, 0x0b, 0x01 );
653 snd_emu1212m_fpga_read(emu
, 0x10, &tmp
);
654 snd_emu1212m_fpga_write(emu
, 0x10, 0x00 );
655 snd_emu1212m_fpga_read(emu
, 0x11, &tmp
);
656 snd_emu1212m_fpga_write(emu
, 0x11, 0x30 );
657 snd_emu1212m_fpga_read(emu
, 0x13, &tmp
);
658 snd_emu1212m_fpga_write(emu
, 0x13, 0x0f );
659 snd_emu1212m_fpga_read(emu
, 0x11, &tmp
);
660 snd_emu1212m_fpga_write(emu
, 0x11, 0x30 );
661 snd_emu1212m_fpga_read(emu
, 0x0a, &tmp
);
662 snd_emu1212m_fpga_write(emu
, 0x0a, 0x10 );
663 snd_emu1212m_fpga_write(emu
, 0x0c, 0x19 );
664 snd_emu1212m_fpga_write(emu
, 0x12, 0x0c );
665 snd_emu1212m_fpga_write(emu
, 0x09, 0x0f );
666 snd_emu1212m_fpga_write(emu
, 0x06, 0x00 );
667 snd_emu1212m_fpga_write(emu
, 0x05, 0x00 );
668 snd_emu1212m_fpga_write(emu
, 0x0e, 0x12 );
669 snd_emu1212m_fpga_netlist_write(emu
, 0x0000, 0x0200);
670 snd_emu1212m_fpga_netlist_write(emu
, 0x0001, 0x0201);
671 snd_emu1212m_fpga_netlist_write(emu
, 0x0002, 0x0500);
672 snd_emu1212m_fpga_netlist_write(emu
, 0x0003, 0x0501);
673 snd_emu1212m_fpga_netlist_write(emu
, 0x0004, 0x0400);
674 snd_emu1212m_fpga_netlist_write(emu
, 0x0005, 0x0401);
675 snd_emu1212m_fpga_netlist_write(emu
, 0x0006, 0x0402);
676 snd_emu1212m_fpga_netlist_write(emu
, 0x0007, 0x0403);
677 snd_emu1212m_fpga_netlist_write(emu
, 0x0008, 0x0404);
678 snd_emu1212m_fpga_netlist_write(emu
, 0x0009, 0x0405);
679 snd_emu1212m_fpga_netlist_write(emu
, 0x000a, 0x0406);
680 snd_emu1212m_fpga_netlist_write(emu
, 0x000b, 0x0407);
681 snd_emu1212m_fpga_netlist_write(emu
, 0x000c, 0x0100);
682 snd_emu1212m_fpga_netlist_write(emu
, 0x000d, 0x0104);
683 snd_emu1212m_fpga_netlist_write(emu
, 0x000e, 0x0200);
684 snd_emu1212m_fpga_netlist_write(emu
, 0x000f, 0x0201);
685 for (i
=0;i
< 0x20;i
++) {
686 snd_emu1212m_fpga_netlist_write(emu
, 0x0100+i
, 0x0000);
688 for (i
=0;i
< 4;i
++) {
689 snd_emu1212m_fpga_netlist_write(emu
, 0x0200+i
, 0x0000);
691 for (i
=0;i
< 7;i
++) {
692 snd_emu1212m_fpga_netlist_write(emu
, 0x0300+i
, 0x0000);
694 for (i
=0;i
< 7;i
++) {
695 snd_emu1212m_fpga_netlist_write(emu
, 0x0400+i
, 0x0000);
697 snd_emu1212m_fpga_netlist_write(emu
, 0x0500, 0x0108);
698 snd_emu1212m_fpga_netlist_write(emu
, 0x0501, 0x010c);
699 snd_emu1212m_fpga_netlist_write(emu
, 0x0600, 0x0110);
700 snd_emu1212m_fpga_netlist_write(emu
, 0x0601, 0x0114);
701 snd_emu1212m_fpga_netlist_write(emu
, 0x0700, 0x0118);
702 snd_emu1212m_fpga_netlist_write(emu
, 0x0701, 0x011c);
703 snd_emu1212m_fpga_write(emu
, 0x07, 0x01 );
705 snd_emu1212m_fpga_read(emu
, 0x21, &tmp
);
707 outl(0x0000a000, emu
->port
+ HCFG
);
708 outl(0x0000a001, emu
->port
+ HCFG
);
709 /* Initial boot complete. Now patches */
711 snd_emu1212m_fpga_read(emu
, 0x21, &tmp
);
712 snd_emu1212m_fpga_write(emu
, 0x0c, 0x19 );
713 snd_emu1212m_fpga_write(emu
, 0x12, 0x0c );
714 snd_emu1212m_fpga_write(emu
, 0x0c, 0x19 );
715 snd_emu1212m_fpga_write(emu
, 0x12, 0x0c );
716 snd_emu1212m_fpga_read(emu
, 0x0a, &tmp
);
717 snd_emu1212m_fpga_write(emu
, 0x0a, 0x10 );
719 snd_emu1212m_fpga_read(emu
, 0x20, &tmp
);
720 snd_emu1212m_fpga_read(emu
, 0x21, &tmp
);
722 snd_emu1212m_fpga_netlist_write(emu
, 0x0300, 0x0312);
723 snd_emu1212m_fpga_netlist_write(emu
, 0x0301, 0x0313);
724 snd_emu1212m_fpga_netlist_write(emu
, 0x0200, 0x0302);
725 snd_emu1212m_fpga_netlist_write(emu
, 0x0201, 0x0303);
730 * Create the EMU10K1 instance
734 static int alloc_pm_buffer(struct snd_emu10k1
*emu
);
735 static void free_pm_buffer(struct snd_emu10k1
*emu
);
738 static int snd_emu10k1_free(struct snd_emu10k1
*emu
)
740 if (emu
->port
) { /* avoid access to already used hardware */
741 snd_emu10k1_fx8010_tram_setup(emu
, 0);
742 snd_emu10k1_done(emu
);
743 /* remove reserved page */
744 if (emu
->reserved_page
) {
745 snd_emu10k1_synth_free(emu
, (struct snd_util_memblk
*)emu
->reserved_page
);
746 emu
->reserved_page
= NULL
;
748 snd_emu10k1_free_efx(emu
);
751 snd_util_memhdr_free(emu
->memhdr
);
752 if (emu
->silent_page
.area
)
753 snd_dma_free_pages(&emu
->silent_page
);
754 if (emu
->ptb_pages
.area
)
755 snd_dma_free_pages(&emu
->ptb_pages
);
756 vfree(emu
->page_ptr_table
);
757 vfree(emu
->page_addr_table
);
762 free_irq(emu
->irq
, (void *)emu
);
764 pci_release_regions(emu
->pci
);
765 if (emu
->card_capabilities
->ca0151_chip
) /* P16V */
767 pci_disable_device(emu
->pci
);
772 static int snd_emu10k1_dev_free(struct snd_device
*device
)
774 struct snd_emu10k1
*emu
= device
->device_data
;
775 return snd_emu10k1_free(emu
);
778 static struct snd_emu_chip_details emu_chip_details
[] = {
779 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
780 /* Tested by James@superbug.co.uk 3rd July 2005 */
787 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10011102,
788 .driver
= "Audigy2", .name
= "Audigy 2 Value [SB0400]",
794 /* Audigy4 (Not PRO) SB0610 */
795 /* Tested by James@superbug.co.uk 4th April 2006 */
801 * 3: 0 - Digital Out, 1 - Line in
809 * A: Green jack sense (Front)
811 * C: Black jack sense (Rear/Side Right)
812 * D: Yellow jack sense (Center/LFE/Side Left)
816 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
820 /* Mic input not tested.
821 * Analog CD input not tested
822 * Digital Out not tested.
824 * Audio output 5.1 working. Side outputs not working.
826 /* DSP: CA10300-IAT LF
827 * DAC: Cirrus Logic CS4382-KQZ
829 * AC97: Sigmatel STAC9750
832 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10211102,
833 .driver
= "Audigy2", .name
= "Audigy 4 [SB0610]",
838 .adc_1361t
= 1, /* 24 bit capture instead of 16bit */
840 /* Audigy 2 ZS Notebook Cardbus card.*/
841 /* Tested by James@superbug.co.uk 22th December 2005 */
842 /* Audio output 7.1/Headphones working.
843 * Digital output working. (AC3 not checked, only PCM)
844 * Audio inputs not tested.
847 * DAC: Wolfson WM8768/WM8568
848 * ADC: Wolfson WM8775
852 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x20011102,
853 .driver
= "Audigy2", .name
= "Audigy 2 ZS Notebook [SB0530]",
857 .ca_cardbus_chip
= 1,
860 {.vendor
= 0x1102, .device
= 0x0008,
861 .driver
= "Audigy2", .name
= "Audigy 2 Value [Unknown]",
866 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
867 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x40011102,
868 .driver
= "Audigy2", .name
= "E-mu 1212m [4001]",
873 /* Tested by James@superbug.co.uk 3rd July 2005 */
874 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20071102,
875 .driver
= "Audigy2", .name
= "Audigy 4 PRO [SB0380]",
883 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
884 /* The 0x20061102 does have SB0350 written on it
885 * Just like 0x20021102
887 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20061102,
888 .driver
= "Audigy2", .name
= "Audigy 2 [SB0350b]",
896 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20021102,
897 .driver
= "Audigy2", .name
= "Audigy 2 ZS [SB0350]",
905 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20011102,
906 .driver
= "Audigy2", .name
= "Audigy 2 ZS [2001]",
915 /* Tested by James@superbug.co.uk 3rd July 2005 */
922 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10071102,
923 .driver
= "Audigy2", .name
= "Audigy 2 [SB0240]",
931 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10051102,
932 .driver
= "Audigy2", .name
= "Audigy 2 EX [1005]",
939 /* Dell OEM/Creative Labs Audigy 2 ZS */
940 /* See ALSA bug#1365 */
941 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10031102,
942 .driver
= "Audigy2", .name
= "Audigy 2 ZS [SB0353]",
950 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10021102,
951 .driver
= "Audigy2", .name
= "Audigy 2 Platinum [SB0240P]",
959 {.vendor
= 0x1102, .device
= 0x0004, .revision
= 0x04,
960 .driver
= "Audigy2", .name
= "Audigy 2 [Unknown]",
967 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00531102,
968 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
973 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00521102,
974 .driver
= "Audigy", .name
= "Audigy 1 ES [SB0160]",
980 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00511102,
981 .driver
= "Audigy", .name
= "Audigy 1 [SB0090]",
986 {.vendor
= 0x1102, .device
= 0x0004,
987 .driver
= "Audigy", .name
= "Audigy 1 [Unknown]",
992 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806B1102,
993 .driver
= "EMU10K1", .name
= "SBLive! [SB0105]",
998 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806A1102,
999 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0103]",
1004 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80691102,
1005 .driver
= "EMU10K1", .name
= "SBLive! Value [SB0101]",
1010 /* Tested by ALSA bug#1680 26th December 2005 */
1011 /* note: It really has SB0220 written on the card. */
1012 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80661102,
1013 .driver
= "EMU10K1", .name
= "SB Live 5.1 Dell OEM [SB0220]",
1018 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1019 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80651102,
1020 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
1025 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x100a1102,
1026 .driver
= "EMU10K1", .name
= "SB Live 5.1 [SB0220]",
1031 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80641102,
1032 .driver
= "EMU10K1", .name
= "SB Live 5.1",
1037 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1038 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80611102,
1039 .driver
= "EMU10K1", .name
= "SBLive 5.1 [SB0060]",
1042 .ac97_chip
= 2, /* ac97 is optional; both SBLive 5.1 and platinum
1043 * share the same IDs!
1046 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80511102,
1047 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4850]",
1052 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80401102,
1053 .driver
= "EMU10K1", .name
= "SBLive! Platinum [CT4760P]",
1057 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80321102,
1058 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4871]",
1063 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80311102,
1064 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4831]",
1069 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80281102,
1070 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4870]",
1075 /* Tested by James@superbug.co.uk 3rd July 2005 */
1076 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80271102,
1077 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4832]",
1082 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80261102,
1083 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4830]",
1088 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80231102,
1089 .driver
= "EMU10K1", .name
= "SB PCI512 [CT4790]",
1094 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80221102,
1095 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4780]",
1100 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x40011102,
1101 .driver
= "EMU10K1", .name
= "E-mu APS [4001]",
1105 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00211102,
1106 .driver
= "EMU10K1", .name
= "SBLive! [CT4620]",
1111 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00201102,
1112 .driver
= "EMU10K1", .name
= "SBLive! Value [CT4670]",
1117 {.vendor
= 0x1102, .device
= 0x0002,
1118 .driver
= "EMU10K1", .name
= "SB Live [Unknown]",
1123 { } /* terminator */
1126 int __devinit
snd_emu10k1_create(struct snd_card
*card
,
1127 struct pci_dev
* pci
,
1128 unsigned short extin_mask
,
1129 unsigned short extout_mask
,
1130 long max_cache_bytes
,
1133 struct snd_emu10k1
** remu
)
1135 struct snd_emu10k1
*emu
;
1138 unsigned char revision
;
1139 unsigned int silent_page
;
1140 const struct snd_emu_chip_details
*c
;
1141 static struct snd_device_ops ops
= {
1142 .dev_free
= snd_emu10k1_dev_free
,
1147 /* enable PCI device */
1148 if ((err
= pci_enable_device(pci
)) < 0)
1151 emu
= kzalloc(sizeof(*emu
), GFP_KERNEL
);
1153 pci_disable_device(pci
);
1157 spin_lock_init(&emu
->reg_lock
);
1158 spin_lock_init(&emu
->emu_lock
);
1159 spin_lock_init(&emu
->voice_lock
);
1160 spin_lock_init(&emu
->synth_lock
);
1161 spin_lock_init(&emu
->memblk_lock
);
1162 mutex_init(&emu
->fx8010
.lock
);
1163 INIT_LIST_HEAD(&emu
->mapped_link_head
);
1164 INIT_LIST_HEAD(&emu
->mapped_order_link_head
);
1168 emu
->get_synth_voice
= NULL
;
1169 /* read revision & serial */
1170 pci_read_config_byte(pci
, PCI_REVISION_ID
, &revision
);
1171 emu
->revision
= revision
;
1172 pci_read_config_dword(pci
, PCI_SUBSYSTEM_VENDOR_ID
, &emu
->serial
);
1173 pci_read_config_word(pci
, PCI_SUBSYSTEM_ID
, &emu
->model
);
1174 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci
->vendor
, pci
->device
, emu
->serial
, emu
->model
);
1176 for (c
= emu_chip_details
; c
->vendor
; c
++) {
1177 if (c
->vendor
== pci
->vendor
&& c
->device
== pci
->device
) {
1179 if (c
->subsystem
&& (c
->subsystem
== subsystem
) ) {
1183 if (c
->subsystem
&& (c
->subsystem
!= emu
->serial
) )
1185 if (c
->revision
&& c
->revision
!= emu
->revision
)
1191 if (c
->vendor
== 0) {
1192 snd_printk(KERN_ERR
"emu10k1: Card not recognised\n");
1194 pci_disable_device(pci
);
1197 emu
->card_capabilities
= c
;
1198 if (c
->subsystem
&& !subsystem
)
1199 snd_printdd("Sound card name=%s\n", c
->name
);
1201 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1202 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
, c
->subsystem
);
1204 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1205 c
->name
, pci
->vendor
, pci
->device
, emu
->serial
);
1207 if (!*card
->id
&& c
->id
) {
1209 strlcpy(card
->id
, c
->id
, sizeof(card
->id
));
1211 for (i
= 0; i
< snd_ecards_limit
; i
++) {
1212 if (snd_cards
[i
] && !strcmp(snd_cards
[i
]->id
, card
->id
))
1215 if (i
>= snd_ecards_limit
)
1218 if (n
>= SNDRV_CARDS
)
1220 snprintf(card
->id
, sizeof(card
->id
), "%s_%d", c
->id
, n
);
1224 is_audigy
= emu
->audigy
= c
->emu10k2_chip
;
1226 /* set the DMA transfer mask */
1227 emu
->dma_mask
= is_audigy
? AUDIGY_DMA_MASK
: EMU10K1_DMA_MASK
;
1228 if (pci_set_dma_mask(pci
, emu
->dma_mask
) < 0 ||
1229 pci_set_consistent_dma_mask(pci
, emu
->dma_mask
) < 0) {
1230 snd_printk(KERN_ERR
"architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu
->dma_mask
);
1232 pci_disable_device(pci
);
1236 emu
->gpr_base
= A_FXGPREGBASE
;
1238 emu
->gpr_base
= FXGPREGBASE
;
1240 if ((err
= pci_request_regions(pci
, "EMU10K1")) < 0) {
1242 pci_disable_device(pci
);
1245 emu
->port
= pci_resource_start(pci
, 0);
1247 if (request_irq(pci
->irq
, snd_emu10k1_interrupt
, IRQF_DISABLED
|IRQF_SHARED
, "EMU10K1", (void *)emu
)) {
1251 emu
->irq
= pci
->irq
;
1253 emu
->max_cache_pages
= max_cache_bytes
>> PAGE_SHIFT
;
1254 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1255 32 * 1024, &emu
->ptb_pages
) < 0) {
1260 emu
->page_ptr_table
= (void **)vmalloc(emu
->max_cache_pages
* sizeof(void*));
1261 emu
->page_addr_table
= (unsigned long*)vmalloc(emu
->max_cache_pages
* sizeof(unsigned long));
1262 if (emu
->page_ptr_table
== NULL
|| emu
->page_addr_table
== NULL
) {
1267 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1268 EMUPAGESIZE
, &emu
->silent_page
) < 0) {
1272 emu
->memhdr
= snd_util_memhdr_new(emu
->max_cache_pages
* PAGE_SIZE
);
1273 if (emu
->memhdr
== NULL
) {
1277 emu
->memhdr
->block_extra_size
= sizeof(struct snd_emu10k1_memblk
) -
1278 sizeof(struct snd_util_memblk
);
1280 pci_set_master(pci
);
1282 emu
->fx8010
.fxbus_mask
= 0x303f;
1283 if (extin_mask
== 0)
1284 extin_mask
= 0x3fcf;
1285 if (extout_mask
== 0)
1286 extout_mask
= 0x7fff;
1287 emu
->fx8010
.extin_mask
= extin_mask
;
1288 emu
->fx8010
.extout_mask
= extout_mask
;
1289 emu
->enable_ir
= enable_ir
;
1291 if (emu
->card_capabilities
->ecard
) {
1292 if ((err
= snd_emu10k1_ecard_init(emu
)) < 0)
1294 } else if (emu
->card_capabilities
->ca_cardbus_chip
) {
1295 if ((err
= snd_emu10k1_cardbus_init(emu
)) < 0)
1297 } else if (emu
->card_capabilities
->emu1212m
) {
1298 if ((err
= snd_emu10k1_emu1212m_init(emu
)) < 0) {
1299 snd_emu10k1_free(emu
);
1303 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1304 does not support this, it shouldn't do any harm */
1305 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1308 /* initialize TRAM setup */
1309 emu
->fx8010
.itram_size
= (16 * 1024)/2;
1310 emu
->fx8010
.etram_pages
.area
= NULL
;
1311 emu
->fx8010
.etram_pages
.bytes
= 0;
1314 * Init to 0x02109204 :
1315 * Clock accuracy = 0 (1000ppm)
1316 * Sample Rate = 2 (48kHz)
1317 * Audio Channel = 1 (Left of 2)
1318 * Source Number = 0 (Unspecified)
1319 * Generation Status = 1 (Original for Cat Code 12)
1320 * Cat Code = 12 (Digital Signal Mixer)
1322 * Emphasis = 0 (None)
1323 * CP = 1 (Copyright unasserted)
1324 * AN = 0 (Audio data)
1327 emu
->spdif_bits
[0] = emu
->spdif_bits
[1] =
1328 emu
->spdif_bits
[2] = SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
1329 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
1330 SPCS_GENERATIONSTATUS
| 0x00001200 |
1331 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
;
1333 emu
->reserved_page
= (struct snd_emu10k1_memblk
*)
1334 snd_emu10k1_synth_alloc(emu
, 4096);
1335 if (emu
->reserved_page
)
1336 emu
->reserved_page
->map_locked
= 1;
1338 /* Clear silent pages and set up pointers */
1339 memset(emu
->silent_page
.area
, 0, PAGE_SIZE
);
1340 silent_page
= emu
->silent_page
.addr
<< 1;
1341 for (idx
= 0; idx
< MAXPAGES
; idx
++)
1342 ((u32
*)emu
->ptb_pages
.area
)[idx
] = cpu_to_le32(silent_page
| idx
);
1344 /* set up voice indices */
1345 for (idx
= 0; idx
< NUM_G
; idx
++) {
1346 emu
->voices
[idx
].emu
= emu
;
1347 emu
->voices
[idx
].number
= idx
;
1350 if ((err
= snd_emu10k1_init(emu
, enable_ir
, 0)) < 0)
1353 if ((err
= alloc_pm_buffer(emu
)) < 0)
1357 /* Initialize the effect engine */
1358 if ((err
= snd_emu10k1_init_efx(emu
)) < 0)
1360 snd_emu10k1_audio_enable(emu
);
1362 if ((err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, emu
, &ops
)) < 0)
1365 #ifdef CONFIG_PROC_FS
1366 snd_emu10k1_proc_init(emu
);
1369 snd_card_set_dev(card
, &pci
->dev
);
1374 snd_emu10k1_free(emu
);
1379 static unsigned char saved_regs
[] = {
1380 CPF
, PTRX
, CVCF
, VTFT
, Z1
, Z2
, PSST
, DSL
, CCCA
, CCR
, CLP
,
1381 FXRT
, MAPA
, MAPB
, ENVVOL
, ATKHLDV
, DCYSUSV
, LFOVAL1
, ENVVAL
,
1382 ATKHLDM
, DCYSUSM
, LFOVAL2
, IP
, IFATN
, PEFE
, FMMOD
, TREMFRQ
, FM2FRQ2
,
1383 TEMPENV
, ADCCR
, FXWC
, MICBA
, ADCBA
, FXBA
,
1384 MICBS
, ADCBS
, FXBS
, CDCS
, GPSCS
, SPCS0
, SPCS1
, SPCS2
,
1385 SPBYPASS
, AC97SLOT
, CDSRCS
, GPSRCS
, ZVSRCS
, MICIDX
, ADCIDX
, FXIDX
,
1388 static unsigned char saved_regs_audigy
[] = {
1389 A_ADCIDX
, A_MICIDX
, A_FXWC1
, A_FXWC2
, A_SAMPLE_RATE
,
1390 A_FXRT2
, A_SENDAMOUNTS
, A_FXRT1
,
1394 static int __devinit
alloc_pm_buffer(struct snd_emu10k1
*emu
)
1398 size
= ARRAY_SIZE(saved_regs
);
1400 size
+= ARRAY_SIZE(saved_regs_audigy
);
1401 emu
->saved_ptr
= vmalloc(4 * NUM_G
* size
);
1402 if (! emu
->saved_ptr
)
1404 if (snd_emu10k1_efx_alloc_pm_buffer(emu
) < 0)
1406 if (emu
->card_capabilities
->ca0151_chip
&&
1407 snd_p16v_alloc_pm_buffer(emu
) < 0)
1412 static void free_pm_buffer(struct snd_emu10k1
*emu
)
1414 vfree(emu
->saved_ptr
);
1415 snd_emu10k1_efx_free_pm_buffer(emu
);
1416 if (emu
->card_capabilities
->ca0151_chip
)
1417 snd_p16v_free_pm_buffer(emu
);
1420 void snd_emu10k1_suspend_regs(struct snd_emu10k1
*emu
)
1426 val
= emu
->saved_ptr
;
1427 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
1428 for (i
= 0; i
< NUM_G
; i
++, val
++)
1429 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
1431 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
1432 for (i
= 0; i
< NUM_G
; i
++, val
++)
1433 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
1436 emu
->saved_a_iocfg
= inl(emu
->port
+ A_IOCFG
);
1437 emu
->saved_hcfg
= inl(emu
->port
+ HCFG
);
1440 void snd_emu10k1_resume_init(struct snd_emu10k1
*emu
)
1442 if (emu
->card_capabilities
->ecard
)
1443 snd_emu10k1_ecard_init(emu
);
1444 else if (emu
->card_capabilities
->ca_cardbus_chip
)
1445 snd_emu10k1_cardbus_init(emu
);
1446 else if (emu
->card_capabilities
->emu1212m
)
1447 snd_emu10k1_emu1212m_init(emu
);
1449 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
1450 snd_emu10k1_init(emu
, emu
->enable_ir
, 1);
1453 void snd_emu10k1_resume_regs(struct snd_emu10k1
*emu
)
1459 snd_emu10k1_audio_enable(emu
);
1461 /* resore for spdif */
1463 outl(emu
->saved_a_iocfg
, emu
->port
+ A_IOCFG
);
1464 outl(emu
->saved_hcfg
, emu
->port
+ HCFG
);
1466 val
= emu
->saved_ptr
;
1467 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
1468 for (i
= 0; i
< NUM_G
; i
++, val
++)
1469 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);
1471 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
1472 for (i
= 0; i
< NUM_G
; i
++, val
++)
1473 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);