2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
66 #define emul_to_vcpu(ctxt) \
67 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
70 * - enable syscall per default because its emulated by KVM
71 * - enable LME and LMA per default on 64 bit KVM
75 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
77 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
85 struct kvm_cpuid_entry2 __user
*entries
);
87 struct kvm_x86_ops
*kvm_x86_ops
;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
91 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
93 bool kvm_has_tsc_control
;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
95 u32 kvm_max_guest_tsc_khz
;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
98 #define KVM_NR_SHARED_MSRS 16
100 struct kvm_shared_msrs_global
{
102 u32 msrs
[KVM_NR_SHARED_MSRS
];
105 struct kvm_shared_msrs
{
106 struct user_return_notifier urn
;
108 struct kvm_shared_msr_values
{
111 } values
[KVM_NR_SHARED_MSRS
];
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
117 struct kvm_stats_debugfs_item debugfs_entries
[] = {
118 { "pf_fixed", VCPU_STAT(pf_fixed
) },
119 { "pf_guest", VCPU_STAT(pf_guest
) },
120 { "tlb_flush", VCPU_STAT(tlb_flush
) },
121 { "invlpg", VCPU_STAT(invlpg
) },
122 { "exits", VCPU_STAT(exits
) },
123 { "io_exits", VCPU_STAT(io_exits
) },
124 { "mmio_exits", VCPU_STAT(mmio_exits
) },
125 { "signal_exits", VCPU_STAT(signal_exits
) },
126 { "irq_window", VCPU_STAT(irq_window_exits
) },
127 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
128 { "halt_exits", VCPU_STAT(halt_exits
) },
129 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
130 { "hypercalls", VCPU_STAT(hypercalls
) },
131 { "request_irq", VCPU_STAT(request_irq_exits
) },
132 { "irq_exits", VCPU_STAT(irq_exits
) },
133 { "host_state_reload", VCPU_STAT(host_state_reload
) },
134 { "efer_reload", VCPU_STAT(efer_reload
) },
135 { "fpu_reload", VCPU_STAT(fpu_reload
) },
136 { "insn_emulation", VCPU_STAT(insn_emulation
) },
137 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
138 { "irq_injections", VCPU_STAT(irq_injections
) },
139 { "nmi_injections", VCPU_STAT(nmi_injections
) },
140 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
141 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
142 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
143 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
144 { "mmu_flooded", VM_STAT(mmu_flooded
) },
145 { "mmu_recycled", VM_STAT(mmu_recycled
) },
146 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
147 { "mmu_unsync", VM_STAT(mmu_unsync
) },
148 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
149 { "largepages", VM_STAT(lpages
) },
153 u64 __read_mostly host_xcr0
;
155 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
160 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
161 vcpu
->arch
.apf
.gfns
[i
] = ~0;
164 static void kvm_on_user_return(struct user_return_notifier
*urn
)
167 struct kvm_shared_msrs
*locals
168 = container_of(urn
, struct kvm_shared_msrs
, urn
);
169 struct kvm_shared_msr_values
*values
;
171 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
172 values
= &locals
->values
[slot
];
173 if (values
->host
!= values
->curr
) {
174 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
175 values
->curr
= values
->host
;
178 locals
->registered
= false;
179 user_return_notifier_unregister(urn
);
182 static void shared_msr_update(unsigned slot
, u32 msr
)
184 struct kvm_shared_msrs
*smsr
;
187 smsr
= &__get_cpu_var(shared_msrs
);
188 /* only read, and nobody should modify it at this time,
189 * so don't need lock */
190 if (slot
>= shared_msrs_global
.nr
) {
191 printk(KERN_ERR
"kvm: invalid MSR slot!");
194 rdmsrl_safe(msr
, &value
);
195 smsr
->values
[slot
].host
= value
;
196 smsr
->values
[slot
].curr
= value
;
199 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
201 if (slot
>= shared_msrs_global
.nr
)
202 shared_msrs_global
.nr
= slot
+ 1;
203 shared_msrs_global
.msrs
[slot
] = msr
;
204 /* we need ensured the shared_msr_global have been updated */
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
209 static void kvm_shared_msr_cpu_online(void)
213 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
214 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
217 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
219 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
221 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
223 smsr
->values
[slot
].curr
= value
;
224 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
225 if (!smsr
->registered
) {
226 smsr
->urn
.on_user_return
= kvm_on_user_return
;
227 user_return_notifier_register(&smsr
->urn
);
228 smsr
->registered
= true;
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
233 static void drop_user_return_notifiers(void *ignore
)
235 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
237 if (smsr
->registered
)
238 kvm_on_user_return(&smsr
->urn
);
241 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
243 if (irqchip_in_kernel(vcpu
->kvm
))
244 return vcpu
->arch
.apic_base
;
246 return vcpu
->arch
.apic_base
;
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
250 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
252 /* TODO: reserve bits check */
253 if (irqchip_in_kernel(vcpu
->kvm
))
254 kvm_lapic_set_base(vcpu
, data
);
256 vcpu
->arch
.apic_base
= data
;
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
260 #define EXCPT_BENIGN 0
261 #define EXCPT_CONTRIBUTORY 1
264 static int exception_class(int vector
)
274 return EXCPT_CONTRIBUTORY
;
281 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
282 unsigned nr
, bool has_error
, u32 error_code
,
288 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
290 if (!vcpu
->arch
.exception
.pending
) {
292 vcpu
->arch
.exception
.pending
= true;
293 vcpu
->arch
.exception
.has_error_code
= has_error
;
294 vcpu
->arch
.exception
.nr
= nr
;
295 vcpu
->arch
.exception
.error_code
= error_code
;
296 vcpu
->arch
.exception
.reinject
= reinject
;
300 /* to check exception */
301 prev_nr
= vcpu
->arch
.exception
.nr
;
302 if (prev_nr
== DF_VECTOR
) {
303 /* triple fault -> shutdown */
304 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
307 class1
= exception_class(prev_nr
);
308 class2
= exception_class(nr
);
309 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
310 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
311 /* generate double fault per SDM Table 5-5 */
312 vcpu
->arch
.exception
.pending
= true;
313 vcpu
->arch
.exception
.has_error_code
= true;
314 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
315 vcpu
->arch
.exception
.error_code
= 0;
317 /* replace previous exception with a new one in a hope
318 that instruction re-execution will regenerate lost
323 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
325 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
327 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
329 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
331 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
335 void kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
338 kvm_inject_gp(vcpu
, 0);
340 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
344 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
346 ++vcpu
->stat
.pf_guest
;
347 vcpu
->arch
.cr2
= fault
->address
;
348 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
352 void kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
354 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
355 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
357 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
360 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
362 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
363 vcpu
->arch
.nmi_pending
= 1;
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
367 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
369 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
373 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
375 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
380 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
381 * a #GP and return false.
383 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
385 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
387 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
390 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
393 * This function will be used to read from the physical memory of the currently
394 * running guest. The difference to kvm_read_guest_page is that this function
395 * can read from guest physical or from the guest's guest physical memory.
397 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
398 gfn_t ngfn
, void *data
, int offset
, int len
,
404 ngpa
= gfn_to_gpa(ngfn
);
405 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
406 if (real_gfn
== UNMAPPED_GVA
)
409 real_gfn
= gpa_to_gfn(real_gfn
);
411 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
415 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
416 void *data
, int offset
, int len
, u32 access
)
418 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
419 data
, offset
, len
, access
);
423 * Load the pae pdptrs. Return true is they are all valid.
425 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
427 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
428 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
431 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
433 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
434 offset
* sizeof(u64
), sizeof(pdpte
),
435 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
440 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
441 if (is_present_gpte(pdpte
[i
]) &&
442 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
449 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
450 __set_bit(VCPU_EXREG_PDPTR
,
451 (unsigned long *)&vcpu
->arch
.regs_avail
);
452 __set_bit(VCPU_EXREG_PDPTR
,
453 (unsigned long *)&vcpu
->arch
.regs_dirty
);
458 EXPORT_SYMBOL_GPL(load_pdptrs
);
460 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
462 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
468 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
471 if (!test_bit(VCPU_EXREG_PDPTR
,
472 (unsigned long *)&vcpu
->arch
.regs_avail
))
475 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
476 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
477 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
478 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
481 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
487 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
489 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
490 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
491 X86_CR0_CD
| X86_CR0_NW
;
496 if (cr0
& 0xffffffff00000000UL
)
500 cr0
&= ~CR0_RESERVED_BITS
;
502 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
505 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
508 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
510 if ((vcpu
->arch
.efer
& EFER_LME
)) {
515 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
520 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
525 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
527 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
528 kvm_clear_async_pf_completion_queue(vcpu
);
529 kvm_async_pf_hash_reset(vcpu
);
532 if ((cr0
^ old_cr0
) & update_bits
)
533 kvm_mmu_reset_context(vcpu
);
536 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
538 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
540 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
542 EXPORT_SYMBOL_GPL(kvm_lmsw
);
544 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
548 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
549 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
552 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
554 if (!(xcr0
& XSTATE_FP
))
556 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
558 if (xcr0
& ~host_xcr0
)
560 vcpu
->arch
.xcr0
= xcr0
;
561 vcpu
->guest_xcr0_loaded
= 0;
565 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
567 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
568 kvm_inject_gp(vcpu
, 0);
573 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
577 struct kvm_cpuid_entry2
*best
;
579 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
580 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
583 static void update_cpuid(struct kvm_vcpu
*vcpu
)
585 struct kvm_cpuid_entry2
*best
;
587 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
591 /* Update OSXSAVE bit */
592 if (cpu_has_xsave
&& best
->function
== 0x1) {
593 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
594 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
595 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
599 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
601 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
602 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
604 if (cr4
& CR4_RESERVED_BITS
)
607 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
610 if (is_long_mode(vcpu
)) {
611 if (!(cr4
& X86_CR4_PAE
))
613 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
614 && ((cr4
^ old_cr4
) & pdptr_bits
)
615 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
619 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
622 if ((cr4
^ old_cr4
) & pdptr_bits
)
623 kvm_mmu_reset_context(vcpu
);
625 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
630 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
632 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
634 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
635 kvm_mmu_sync_roots(vcpu
);
636 kvm_mmu_flush_tlb(vcpu
);
640 if (is_long_mode(vcpu
)) {
641 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
645 if (cr3
& CR3_PAE_RESERVED_BITS
)
647 if (is_paging(vcpu
) &&
648 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
652 * We don't check reserved bits in nonpae mode, because
653 * this isn't enforced, and VMware depends on this.
658 * Does the new cr3 value map to physical memory? (Note, we
659 * catch an invalid cr3 even in real-mode, because it would
660 * cause trouble later on when we turn on paging anyway.)
662 * A real CPU would silently accept an invalid cr3 and would
663 * attempt to use it - with largely undefined (and often hard
664 * to debug) behavior on the guest side.
666 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
668 vcpu
->arch
.cr3
= cr3
;
669 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
670 vcpu
->arch
.mmu
.new_cr3(vcpu
);
673 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
675 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
677 if (cr8
& CR8_RESERVED_BITS
)
679 if (irqchip_in_kernel(vcpu
->kvm
))
680 kvm_lapic_set_tpr(vcpu
, cr8
);
682 vcpu
->arch
.cr8
= cr8
;
685 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
687 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
689 if (irqchip_in_kernel(vcpu
->kvm
))
690 return kvm_lapic_get_cr8(vcpu
);
692 return vcpu
->arch
.cr8
;
694 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
696 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
700 vcpu
->arch
.db
[dr
] = val
;
701 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
702 vcpu
->arch
.eff_db
[dr
] = val
;
705 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
709 if (val
& 0xffffffff00000000ULL
)
711 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
714 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
718 if (val
& 0xffffffff00000000ULL
)
720 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
721 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
722 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
723 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
731 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
735 res
= __kvm_set_dr(vcpu
, dr
, val
);
737 kvm_queue_exception(vcpu
, UD_VECTOR
);
739 kvm_inject_gp(vcpu
, 0);
743 EXPORT_SYMBOL_GPL(kvm_set_dr
);
745 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
749 *val
= vcpu
->arch
.db
[dr
];
752 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
756 *val
= vcpu
->arch
.dr6
;
759 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
763 *val
= vcpu
->arch
.dr7
;
770 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
772 if (_kvm_get_dr(vcpu
, dr
, val
)) {
773 kvm_queue_exception(vcpu
, UD_VECTOR
);
778 EXPORT_SYMBOL_GPL(kvm_get_dr
);
781 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
782 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
784 * This list is modified at module load time to reflect the
785 * capabilities of the host cpu. This capabilities test skips MSRs that are
786 * kvm-specific. Those are put in the beginning of the list.
789 #define KVM_SAVE_MSRS_BEGIN 8
790 static u32 msrs_to_save
[] = {
791 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
792 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
793 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
794 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
,
795 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
798 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
800 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
803 static unsigned num_msrs_to_save
;
805 static u32 emulated_msrs
[] = {
806 MSR_IA32_MISC_ENABLE
,
811 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
813 u64 old_efer
= vcpu
->arch
.efer
;
815 if (efer
& efer_reserved_bits
)
819 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
822 if (efer
& EFER_FFXSR
) {
823 struct kvm_cpuid_entry2
*feat
;
825 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
826 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
830 if (efer
& EFER_SVME
) {
831 struct kvm_cpuid_entry2
*feat
;
833 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
834 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
839 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
841 kvm_x86_ops
->set_efer(vcpu
, efer
);
843 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
845 /* Update reserved bits */
846 if ((efer
^ old_efer
) & EFER_NX
)
847 kvm_mmu_reset_context(vcpu
);
852 void kvm_enable_efer_bits(u64 mask
)
854 efer_reserved_bits
&= ~mask
;
856 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
860 * Writes msr value into into the appropriate "register".
861 * Returns 0 on success, non-0 otherwise.
862 * Assumes vcpu_load() was already called.
864 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
866 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
870 * Adapt set_msr() to msr_io()'s calling convention
872 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
874 return kvm_set_msr(vcpu
, index
, *data
);
877 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
881 struct pvclock_wall_clock wc
;
882 struct timespec boot
;
887 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
892 ++version
; /* first time write, random junk */
896 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
899 * The guest calculates current wall clock time by adding
900 * system time (updated by kvm_guest_time_update below) to the
901 * wall clock specified here. guest system time equals host
902 * system time for us, thus we must fill in host boot time here.
906 wc
.sec
= boot
.tv_sec
;
907 wc
.nsec
= boot
.tv_nsec
;
908 wc
.version
= version
;
910 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
913 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
916 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
918 uint32_t quotient
, remainder
;
920 /* Don't try to replace with do_div(), this one calculates
921 * "(dividend << 32) / divisor" */
923 : "=a" (quotient
), "=d" (remainder
)
924 : "0" (0), "1" (dividend
), "r" (divisor
) );
928 static void kvm_get_time_scale(uint32_t scaled_khz
, uint32_t base_khz
,
929 s8
*pshift
, u32
*pmultiplier
)
936 tps64
= base_khz
* 1000LL;
937 scaled64
= scaled_khz
* 1000LL;
938 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
943 tps32
= (uint32_t)tps64
;
944 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
945 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
953 *pmultiplier
= div_frac(scaled64
, tps32
);
955 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
956 __func__
, base_khz
, scaled_khz
, shift
, *pmultiplier
);
959 static inline u64
get_kernel_ns(void)
963 WARN_ON(preemptible());
965 monotonic_to_bootbased(&ts
);
966 return timespec_to_ns(&ts
);
969 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
970 unsigned long max_tsc_khz
;
972 static inline int kvm_tsc_changes_freq(void)
975 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
976 cpufreq_quick_get(cpu
) != 0;
981 static u64
vcpu_tsc_khz(struct kvm_vcpu
*vcpu
)
983 if (vcpu
->arch
.virtual_tsc_khz
)
984 return vcpu
->arch
.virtual_tsc_khz
;
986 return __this_cpu_read(cpu_tsc_khz
);
989 static inline u64
nsec_to_cycles(struct kvm_vcpu
*vcpu
, u64 nsec
)
993 WARN_ON(preemptible());
994 if (kvm_tsc_changes_freq())
995 printk_once(KERN_WARNING
996 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
997 ret
= nsec
* vcpu_tsc_khz(vcpu
);
998 do_div(ret
, USEC_PER_SEC
);
1002 static void kvm_init_tsc_catchup(struct kvm_vcpu
*vcpu
, u32 this_tsc_khz
)
1004 /* Compute a scale to convert nanoseconds in TSC cycles */
1005 kvm_get_time_scale(this_tsc_khz
, NSEC_PER_SEC
/ 1000,
1006 &vcpu
->arch
.tsc_catchup_shift
,
1007 &vcpu
->arch
.tsc_catchup_mult
);
1010 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1012 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.last_tsc_nsec
,
1013 vcpu
->arch
.tsc_catchup_mult
,
1014 vcpu
->arch
.tsc_catchup_shift
);
1015 tsc
+= vcpu
->arch
.last_tsc_write
;
1019 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
1021 struct kvm
*kvm
= vcpu
->kvm
;
1022 u64 offset
, ns
, elapsed
;
1023 unsigned long flags
;
1026 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1027 offset
= kvm_x86_ops
->compute_tsc_offset(vcpu
, data
);
1028 ns
= get_kernel_ns();
1029 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1030 sdiff
= data
- kvm
->arch
.last_tsc_write
;
1035 * Special case: close write to TSC within 5 seconds of
1036 * another CPU is interpreted as an attempt to synchronize
1037 * The 5 seconds is to accommodate host load / swapping as
1038 * well as any reset of TSC during the boot process.
1040 * In that case, for a reliable TSC, we can match TSC offsets,
1041 * or make a best guest using elapsed value.
1043 if (sdiff
< nsec_to_cycles(vcpu
, 5ULL * NSEC_PER_SEC
) &&
1044 elapsed
< 5ULL * NSEC_PER_SEC
) {
1045 if (!check_tsc_unstable()) {
1046 offset
= kvm
->arch
.last_tsc_offset
;
1047 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1049 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1051 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1053 ns
= kvm
->arch
.last_tsc_nsec
;
1055 kvm
->arch
.last_tsc_nsec
= ns
;
1056 kvm
->arch
.last_tsc_write
= data
;
1057 kvm
->arch
.last_tsc_offset
= offset
;
1058 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1059 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1061 /* Reset of TSC must disable overshoot protection below */
1062 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1063 vcpu
->arch
.last_tsc_write
= data
;
1064 vcpu
->arch
.last_tsc_nsec
= ns
;
1066 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1068 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1070 unsigned long flags
;
1071 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1073 unsigned long this_tsc_khz
;
1074 s64 kernel_ns
, max_kernel_ns
;
1077 /* Keep irq disabled to prevent changes to the clock */
1078 local_irq_save(flags
);
1079 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1080 kernel_ns
= get_kernel_ns();
1081 this_tsc_khz
= vcpu_tsc_khz(v
);
1082 if (unlikely(this_tsc_khz
== 0)) {
1083 local_irq_restore(flags
);
1084 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1089 * We may have to catch up the TSC to match elapsed wall clock
1090 * time for two reasons, even if kvmclock is used.
1091 * 1) CPU could have been running below the maximum TSC rate
1092 * 2) Broken TSC compensation resets the base at each VCPU
1093 * entry to avoid unknown leaps of TSC even when running
1094 * again on the same CPU. This may cause apparent elapsed
1095 * time to disappear, and the guest to stand still or run
1098 if (vcpu
->tsc_catchup
) {
1099 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1100 if (tsc
> tsc_timestamp
) {
1101 kvm_x86_ops
->adjust_tsc_offset(v
, tsc
- tsc_timestamp
);
1102 tsc_timestamp
= tsc
;
1106 local_irq_restore(flags
);
1108 if (!vcpu
->time_page
)
1112 * Time as measured by the TSC may go backwards when resetting the base
1113 * tsc_timestamp. The reason for this is that the TSC resolution is
1114 * higher than the resolution of the other clock scales. Thus, many
1115 * possible measurments of the TSC correspond to one measurement of any
1116 * other clock, and so a spread of values is possible. This is not a
1117 * problem for the computation of the nanosecond clock; with TSC rates
1118 * around 1GHZ, there can only be a few cycles which correspond to one
1119 * nanosecond value, and any path through this code will inevitably
1120 * take longer than that. However, with the kernel_ns value itself,
1121 * the precision may be much lower, down to HZ granularity. If the
1122 * first sampling of TSC against kernel_ns ends in the low part of the
1123 * range, and the second in the high end of the range, we can get:
1125 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1127 * As the sampling errors potentially range in the thousands of cycles,
1128 * it is possible such a time value has already been observed by the
1129 * guest. To protect against this, we must compute the system time as
1130 * observed by the guest and ensure the new system time is greater.
1133 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1134 max_kernel_ns
= vcpu
->last_guest_tsc
-
1135 vcpu
->hv_clock
.tsc_timestamp
;
1136 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1137 vcpu
->hv_clock
.tsc_to_system_mul
,
1138 vcpu
->hv_clock
.tsc_shift
);
1139 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1142 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1143 kvm_get_time_scale(NSEC_PER_SEC
/ 1000, this_tsc_khz
,
1144 &vcpu
->hv_clock
.tsc_shift
,
1145 &vcpu
->hv_clock
.tsc_to_system_mul
);
1146 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1149 if (max_kernel_ns
> kernel_ns
)
1150 kernel_ns
= max_kernel_ns
;
1152 /* With all the info we got, fill in the values */
1153 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1154 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1155 vcpu
->last_kernel_ns
= kernel_ns
;
1156 vcpu
->last_guest_tsc
= tsc_timestamp
;
1157 vcpu
->hv_clock
.flags
= 0;
1160 * The interface expects us to write an even number signaling that the
1161 * update is finished. Since the guest won't see the intermediate
1162 * state, we just increase by 2 at the end.
1164 vcpu
->hv_clock
.version
+= 2;
1166 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1168 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1169 sizeof(vcpu
->hv_clock
));
1171 kunmap_atomic(shared_kaddr
, KM_USER0
);
1173 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1177 static bool msr_mtrr_valid(unsigned msr
)
1180 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1181 case MSR_MTRRfix64K_00000
:
1182 case MSR_MTRRfix16K_80000
:
1183 case MSR_MTRRfix16K_A0000
:
1184 case MSR_MTRRfix4K_C0000
:
1185 case MSR_MTRRfix4K_C8000
:
1186 case MSR_MTRRfix4K_D0000
:
1187 case MSR_MTRRfix4K_D8000
:
1188 case MSR_MTRRfix4K_E0000
:
1189 case MSR_MTRRfix4K_E8000
:
1190 case MSR_MTRRfix4K_F0000
:
1191 case MSR_MTRRfix4K_F8000
:
1192 case MSR_MTRRdefType
:
1193 case MSR_IA32_CR_PAT
:
1201 static bool valid_pat_type(unsigned t
)
1203 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1206 static bool valid_mtrr_type(unsigned t
)
1208 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1211 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1215 if (!msr_mtrr_valid(msr
))
1218 if (msr
== MSR_IA32_CR_PAT
) {
1219 for (i
= 0; i
< 8; i
++)
1220 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1223 } else if (msr
== MSR_MTRRdefType
) {
1226 return valid_mtrr_type(data
& 0xff);
1227 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1228 for (i
= 0; i
< 8 ; i
++)
1229 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1234 /* variable MTRRs */
1235 return valid_mtrr_type(data
& 0xff);
1238 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1240 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1242 if (!mtrr_valid(vcpu
, msr
, data
))
1245 if (msr
== MSR_MTRRdefType
) {
1246 vcpu
->arch
.mtrr_state
.def_type
= data
;
1247 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1248 } else if (msr
== MSR_MTRRfix64K_00000
)
1250 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1251 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1252 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1253 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1254 else if (msr
== MSR_IA32_CR_PAT
)
1255 vcpu
->arch
.pat
= data
;
1256 else { /* Variable MTRRs */
1257 int idx
, is_mtrr_mask
;
1260 idx
= (msr
- 0x200) / 2;
1261 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1264 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1267 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1271 kvm_mmu_reset_context(vcpu
);
1275 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1277 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1278 unsigned bank_num
= mcg_cap
& 0xff;
1281 case MSR_IA32_MCG_STATUS
:
1282 vcpu
->arch
.mcg_status
= data
;
1284 case MSR_IA32_MCG_CTL
:
1285 if (!(mcg_cap
& MCG_CTL_P
))
1287 if (data
!= 0 && data
!= ~(u64
)0)
1289 vcpu
->arch
.mcg_ctl
= data
;
1292 if (msr
>= MSR_IA32_MC0_CTL
&&
1293 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1294 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1295 /* only 0 or all 1s can be written to IA32_MCi_CTL
1296 * some Linux kernels though clear bit 10 in bank 4 to
1297 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1298 * this to avoid an uncatched #GP in the guest
1300 if ((offset
& 0x3) == 0 &&
1301 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1303 vcpu
->arch
.mce_banks
[offset
] = data
;
1311 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1313 struct kvm
*kvm
= vcpu
->kvm
;
1314 int lm
= is_long_mode(vcpu
);
1315 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1316 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1317 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1318 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1319 u32 page_num
= data
& ~PAGE_MASK
;
1320 u64 page_addr
= data
& PAGE_MASK
;
1325 if (page_num
>= blob_size
)
1328 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1332 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1334 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1343 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1345 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1348 static bool kvm_hv_msr_partition_wide(u32 msr
)
1352 case HV_X64_MSR_GUEST_OS_ID
:
1353 case HV_X64_MSR_HYPERCALL
:
1361 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1363 struct kvm
*kvm
= vcpu
->kvm
;
1366 case HV_X64_MSR_GUEST_OS_ID
:
1367 kvm
->arch
.hv_guest_os_id
= data
;
1368 /* setting guest os id to zero disables hypercall page */
1369 if (!kvm
->arch
.hv_guest_os_id
)
1370 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1372 case HV_X64_MSR_HYPERCALL
: {
1377 /* if guest os id is not set hypercall should remain disabled */
1378 if (!kvm
->arch
.hv_guest_os_id
)
1380 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1381 kvm
->arch
.hv_hypercall
= data
;
1384 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1385 addr
= gfn_to_hva(kvm
, gfn
);
1386 if (kvm_is_error_hva(addr
))
1388 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1389 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1390 if (__copy_to_user((void __user
*)addr
, instructions
, 4))
1392 kvm
->arch
.hv_hypercall
= data
;
1396 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1397 "data 0x%llx\n", msr
, data
);
1403 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1406 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1409 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1410 vcpu
->arch
.hv_vapic
= data
;
1413 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1414 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1415 if (kvm_is_error_hva(addr
))
1417 if (__clear_user((void __user
*)addr
, PAGE_SIZE
))
1419 vcpu
->arch
.hv_vapic
= data
;
1422 case HV_X64_MSR_EOI
:
1423 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1424 case HV_X64_MSR_ICR
:
1425 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1426 case HV_X64_MSR_TPR
:
1427 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1429 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1430 "data 0x%llx\n", msr
, data
);
1437 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
1439 gpa_t gpa
= data
& ~0x3f;
1441 /* Bits 2:5 are resrved, Should be zero */
1445 vcpu
->arch
.apf
.msr_val
= data
;
1447 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
1448 kvm_clear_async_pf_completion_queue(vcpu
);
1449 kvm_async_pf_hash_reset(vcpu
);
1453 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
))
1456 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
1457 kvm_async_pf_wakeup_all(vcpu
);
1461 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
1463 if (vcpu
->arch
.time_page
) {
1464 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1465 vcpu
->arch
.time_page
= NULL
;
1469 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1473 return set_efer(vcpu
, data
);
1475 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1476 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1478 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1483 case MSR_FAM10H_MMIO_CONF_BASE
:
1485 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1490 case MSR_AMD64_NB_CFG
:
1492 case MSR_IA32_DEBUGCTLMSR
:
1494 /* We support the non-activated case already */
1496 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1497 /* Values other than LBR and BTF are vendor-specific,
1498 thus reserved and should throw a #GP */
1501 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1504 case MSR_IA32_UCODE_REV
:
1505 case MSR_IA32_UCODE_WRITE
:
1506 case MSR_VM_HSAVE_PA
:
1507 case MSR_AMD64_PATCH_LOADER
:
1509 case 0x200 ... 0x2ff:
1510 return set_msr_mtrr(vcpu
, msr
, data
);
1511 case MSR_IA32_APICBASE
:
1512 kvm_set_apic_base(vcpu
, data
);
1514 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1515 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1516 case MSR_IA32_MISC_ENABLE
:
1517 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1519 case MSR_KVM_WALL_CLOCK_NEW
:
1520 case MSR_KVM_WALL_CLOCK
:
1521 vcpu
->kvm
->arch
.wall_clock
= data
;
1522 kvm_write_wall_clock(vcpu
->kvm
, data
);
1524 case MSR_KVM_SYSTEM_TIME_NEW
:
1525 case MSR_KVM_SYSTEM_TIME
: {
1526 kvmclock_reset(vcpu
);
1528 vcpu
->arch
.time
= data
;
1529 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1531 /* we verify if the enable bit is set... */
1535 /* ...but clean it before doing the actual write */
1536 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1538 vcpu
->arch
.time_page
=
1539 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1541 if (is_error_page(vcpu
->arch
.time_page
)) {
1542 kvm_release_page_clean(vcpu
->arch
.time_page
);
1543 vcpu
->arch
.time_page
= NULL
;
1547 case MSR_KVM_ASYNC_PF_EN
:
1548 if (kvm_pv_enable_async_pf(vcpu
, data
))
1551 case MSR_IA32_MCG_CTL
:
1552 case MSR_IA32_MCG_STATUS
:
1553 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1554 return set_msr_mce(vcpu
, msr
, data
);
1556 /* Performance counters are not protected by a CPUID bit,
1557 * so we should check all of them in the generic path for the sake of
1558 * cross vendor migration.
1559 * Writing a zero into the event select MSRs disables them,
1560 * which we perfectly emulate ;-). Any other value should be at least
1561 * reported, some guests depend on them.
1563 case MSR_P6_EVNTSEL0
:
1564 case MSR_P6_EVNTSEL1
:
1565 case MSR_K7_EVNTSEL0
:
1566 case MSR_K7_EVNTSEL1
:
1567 case MSR_K7_EVNTSEL2
:
1568 case MSR_K7_EVNTSEL3
:
1570 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1571 "0x%x data 0x%llx\n", msr
, data
);
1573 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1574 * so we ignore writes to make it happy.
1576 case MSR_P6_PERFCTR0
:
1577 case MSR_P6_PERFCTR1
:
1578 case MSR_K7_PERFCTR0
:
1579 case MSR_K7_PERFCTR1
:
1580 case MSR_K7_PERFCTR2
:
1581 case MSR_K7_PERFCTR3
:
1582 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1583 "0x%x data 0x%llx\n", msr
, data
);
1585 case MSR_K7_CLK_CTL
:
1587 * Ignore all writes to this no longer documented MSR.
1588 * Writes are only relevant for old K7 processors,
1589 * all pre-dating SVM, but a recommended workaround from
1590 * AMD for these chips. It is possible to speicify the
1591 * affected processor models on the command line, hence
1592 * the need to ignore the workaround.
1595 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1596 if (kvm_hv_msr_partition_wide(msr
)) {
1598 mutex_lock(&vcpu
->kvm
->lock
);
1599 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1600 mutex_unlock(&vcpu
->kvm
->lock
);
1603 return set_msr_hyperv(vcpu
, msr
, data
);
1605 case MSR_IA32_BBL_CR_CTL3
:
1606 /* Drop writes to this legacy MSR -- see rdmsr
1607 * counterpart for further detail.
1609 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n", msr
, data
);
1612 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1613 return xen_hvm_config(vcpu
, data
);
1615 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1619 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1626 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1630 * Reads an msr value (of 'msr_index') into 'pdata'.
1631 * Returns 0 on success, non-0 otherwise.
1632 * Assumes vcpu_load() was already called.
1634 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1636 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1639 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1641 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1643 if (!msr_mtrr_valid(msr
))
1646 if (msr
== MSR_MTRRdefType
)
1647 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1648 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1649 else if (msr
== MSR_MTRRfix64K_00000
)
1651 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1652 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1653 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1654 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1655 else if (msr
== MSR_IA32_CR_PAT
)
1656 *pdata
= vcpu
->arch
.pat
;
1657 else { /* Variable MTRRs */
1658 int idx
, is_mtrr_mask
;
1661 idx
= (msr
- 0x200) / 2;
1662 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1665 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1668 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1675 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1678 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1679 unsigned bank_num
= mcg_cap
& 0xff;
1682 case MSR_IA32_P5_MC_ADDR
:
1683 case MSR_IA32_P5_MC_TYPE
:
1686 case MSR_IA32_MCG_CAP
:
1687 data
= vcpu
->arch
.mcg_cap
;
1689 case MSR_IA32_MCG_CTL
:
1690 if (!(mcg_cap
& MCG_CTL_P
))
1692 data
= vcpu
->arch
.mcg_ctl
;
1694 case MSR_IA32_MCG_STATUS
:
1695 data
= vcpu
->arch
.mcg_status
;
1698 if (msr
>= MSR_IA32_MC0_CTL
&&
1699 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1700 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1701 data
= vcpu
->arch
.mce_banks
[offset
];
1710 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1713 struct kvm
*kvm
= vcpu
->kvm
;
1716 case HV_X64_MSR_GUEST_OS_ID
:
1717 data
= kvm
->arch
.hv_guest_os_id
;
1719 case HV_X64_MSR_HYPERCALL
:
1720 data
= kvm
->arch
.hv_hypercall
;
1723 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1731 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1736 case HV_X64_MSR_VP_INDEX
: {
1739 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1744 case HV_X64_MSR_EOI
:
1745 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1746 case HV_X64_MSR_ICR
:
1747 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1748 case HV_X64_MSR_TPR
:
1749 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1751 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1758 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1763 case MSR_IA32_PLATFORM_ID
:
1764 case MSR_IA32_UCODE_REV
:
1765 case MSR_IA32_EBL_CR_POWERON
:
1766 case MSR_IA32_DEBUGCTLMSR
:
1767 case MSR_IA32_LASTBRANCHFROMIP
:
1768 case MSR_IA32_LASTBRANCHTOIP
:
1769 case MSR_IA32_LASTINTFROMIP
:
1770 case MSR_IA32_LASTINTTOIP
:
1773 case MSR_VM_HSAVE_PA
:
1774 case MSR_P6_PERFCTR0
:
1775 case MSR_P6_PERFCTR1
:
1776 case MSR_P6_EVNTSEL0
:
1777 case MSR_P6_EVNTSEL1
:
1778 case MSR_K7_EVNTSEL0
:
1779 case MSR_K7_PERFCTR0
:
1780 case MSR_K8_INT_PENDING_MSG
:
1781 case MSR_AMD64_NB_CFG
:
1782 case MSR_FAM10H_MMIO_CONF_BASE
:
1786 data
= 0x500 | KVM_NR_VAR_MTRR
;
1788 case 0x200 ... 0x2ff:
1789 return get_msr_mtrr(vcpu
, msr
, pdata
);
1790 case 0xcd: /* fsb frequency */
1794 * MSR_EBC_FREQUENCY_ID
1795 * Conservative value valid for even the basic CPU models.
1796 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1797 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1798 * and 266MHz for model 3, or 4. Set Core Clock
1799 * Frequency to System Bus Frequency Ratio to 1 (bits
1800 * 31:24) even though these are only valid for CPU
1801 * models > 2, however guests may end up dividing or
1802 * multiplying by zero otherwise.
1804 case MSR_EBC_FREQUENCY_ID
:
1807 case MSR_IA32_APICBASE
:
1808 data
= kvm_get_apic_base(vcpu
);
1810 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1811 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1813 case MSR_IA32_MISC_ENABLE
:
1814 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1816 case MSR_IA32_PERF_STATUS
:
1817 /* TSC increment by tick */
1819 /* CPU multiplier */
1820 data
|= (((uint64_t)4ULL) << 40);
1823 data
= vcpu
->arch
.efer
;
1825 case MSR_KVM_WALL_CLOCK
:
1826 case MSR_KVM_WALL_CLOCK_NEW
:
1827 data
= vcpu
->kvm
->arch
.wall_clock
;
1829 case MSR_KVM_SYSTEM_TIME
:
1830 case MSR_KVM_SYSTEM_TIME_NEW
:
1831 data
= vcpu
->arch
.time
;
1833 case MSR_KVM_ASYNC_PF_EN
:
1834 data
= vcpu
->arch
.apf
.msr_val
;
1836 case MSR_IA32_P5_MC_ADDR
:
1837 case MSR_IA32_P5_MC_TYPE
:
1838 case MSR_IA32_MCG_CAP
:
1839 case MSR_IA32_MCG_CTL
:
1840 case MSR_IA32_MCG_STATUS
:
1841 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1842 return get_msr_mce(vcpu
, msr
, pdata
);
1843 case MSR_K7_CLK_CTL
:
1845 * Provide expected ramp-up count for K7. All other
1846 * are set to zero, indicating minimum divisors for
1849 * This prevents guest kernels on AMD host with CPU
1850 * type 6, model 8 and higher from exploding due to
1851 * the rdmsr failing.
1855 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1856 if (kvm_hv_msr_partition_wide(msr
)) {
1858 mutex_lock(&vcpu
->kvm
->lock
);
1859 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1860 mutex_unlock(&vcpu
->kvm
->lock
);
1863 return get_msr_hyperv(vcpu
, msr
, pdata
);
1865 case MSR_IA32_BBL_CR_CTL3
:
1866 /* This legacy MSR exists but isn't fully documented in current
1867 * silicon. It is however accessed by winxp in very narrow
1868 * scenarios where it sets bit #19, itself documented as
1869 * a "reserved" bit. Best effort attempt to source coherent
1870 * read data here should the balance of the register be
1871 * interpreted by the guest:
1873 * L2 cache control register 3: 64GB range, 256KB size,
1874 * enabled, latency 0x1, configured
1880 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1883 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1891 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1894 * Read or write a bunch of msrs. All parameters are kernel addresses.
1896 * @return number of msrs set successfully.
1898 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1899 struct kvm_msr_entry
*entries
,
1900 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1901 unsigned index
, u64
*data
))
1905 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1906 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1907 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1909 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1915 * Read or write a bunch of msrs. Parameters are user addresses.
1917 * @return number of msrs set successfully.
1919 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1920 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1921 unsigned index
, u64
*data
),
1924 struct kvm_msrs msrs
;
1925 struct kvm_msr_entry
*entries
;
1930 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1934 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1938 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1939 entries
= kmalloc(size
, GFP_KERNEL
);
1944 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1947 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1952 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1963 int kvm_dev_ioctl_check_extension(long ext
)
1968 case KVM_CAP_IRQCHIP
:
1970 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1971 case KVM_CAP_SET_TSS_ADDR
:
1972 case KVM_CAP_EXT_CPUID
:
1973 case KVM_CAP_CLOCKSOURCE
:
1975 case KVM_CAP_NOP_IO_DELAY
:
1976 case KVM_CAP_MP_STATE
:
1977 case KVM_CAP_SYNC_MMU
:
1978 case KVM_CAP_USER_NMI
:
1979 case KVM_CAP_REINJECT_CONTROL
:
1980 case KVM_CAP_IRQ_INJECT_STATUS
:
1981 case KVM_CAP_ASSIGN_DEV_IRQ
:
1983 case KVM_CAP_IOEVENTFD
:
1985 case KVM_CAP_PIT_STATE2
:
1986 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1987 case KVM_CAP_XEN_HVM
:
1988 case KVM_CAP_ADJUST_CLOCK
:
1989 case KVM_CAP_VCPU_EVENTS
:
1990 case KVM_CAP_HYPERV
:
1991 case KVM_CAP_HYPERV_VAPIC
:
1992 case KVM_CAP_HYPERV_SPIN
:
1993 case KVM_CAP_PCI_SEGMENT
:
1994 case KVM_CAP_DEBUGREGS
:
1995 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1997 case KVM_CAP_ASYNC_PF
:
1998 case KVM_CAP_GET_TSC_KHZ
:
2001 case KVM_CAP_COALESCED_MMIO
:
2002 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2005 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2007 case KVM_CAP_NR_VCPUS
:
2010 case KVM_CAP_NR_MEMSLOTS
:
2011 r
= KVM_MEMORY_SLOTS
;
2013 case KVM_CAP_PV_MMU
: /* obsolete */
2020 r
= KVM_MAX_MCE_BANKS
;
2025 case KVM_CAP_TSC_CONTROL
:
2026 r
= kvm_has_tsc_control
;
2036 long kvm_arch_dev_ioctl(struct file
*filp
,
2037 unsigned int ioctl
, unsigned long arg
)
2039 void __user
*argp
= (void __user
*)arg
;
2043 case KVM_GET_MSR_INDEX_LIST
: {
2044 struct kvm_msr_list __user
*user_msr_list
= argp
;
2045 struct kvm_msr_list msr_list
;
2049 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2052 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
2053 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2056 if (n
< msr_list
.nmsrs
)
2059 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2060 num_msrs_to_save
* sizeof(u32
)))
2062 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2064 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
2069 case KVM_GET_SUPPORTED_CPUID
: {
2070 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2071 struct kvm_cpuid2 cpuid
;
2074 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2076 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
2077 cpuid_arg
->entries
);
2082 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2087 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2090 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
2092 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
2104 static void wbinvd_ipi(void *garbage
)
2109 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2111 return vcpu
->kvm
->arch
.iommu_domain
&&
2112 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
2115 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2117 /* Address WBINVD may be executed by guest */
2118 if (need_emulate_wbinvd(vcpu
)) {
2119 if (kvm_x86_ops
->has_wbinvd_exit())
2120 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2121 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2122 smp_call_function_single(vcpu
->cpu
,
2123 wbinvd_ipi
, NULL
, 1);
2126 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2127 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2128 /* Make sure TSC doesn't go backwards */
2132 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &tsc
);
2133 tsc_delta
= !vcpu
->arch
.last_guest_tsc
? 0 :
2134 tsc
- vcpu
->arch
.last_guest_tsc
;
2137 mark_tsc_unstable("KVM discovered backwards TSC");
2138 if (check_tsc_unstable()) {
2139 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2140 vcpu
->arch
.tsc_catchup
= 1;
2142 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2143 if (vcpu
->cpu
!= cpu
)
2144 kvm_migrate_timers(vcpu
);
2149 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2151 kvm_x86_ops
->vcpu_put(vcpu
);
2152 kvm_put_guest_fpu(vcpu
);
2153 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
2156 static int is_efer_nx(void)
2158 unsigned long long efer
= 0;
2160 rdmsrl_safe(MSR_EFER
, &efer
);
2161 return efer
& EFER_NX
;
2164 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2167 struct kvm_cpuid_entry2
*e
, *entry
;
2170 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2171 e
= &vcpu
->arch
.cpuid_entries
[i
];
2172 if (e
->function
== 0x80000001) {
2177 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2178 entry
->edx
&= ~(1 << 20);
2179 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2183 /* when an old userspace process fills a new kernel module */
2184 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2185 struct kvm_cpuid
*cpuid
,
2186 struct kvm_cpuid_entry __user
*entries
)
2189 struct kvm_cpuid_entry
*cpuid_entries
;
2192 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2195 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2199 if (copy_from_user(cpuid_entries
, entries
,
2200 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2202 for (i
= 0; i
< cpuid
->nent
; i
++) {
2203 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2204 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2205 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2206 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2207 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2208 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2209 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2210 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2211 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2212 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2214 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2215 cpuid_fix_nx_cap(vcpu
);
2217 kvm_apic_set_version(vcpu
);
2218 kvm_x86_ops
->cpuid_update(vcpu
);
2222 vfree(cpuid_entries
);
2227 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2228 struct kvm_cpuid2
*cpuid
,
2229 struct kvm_cpuid_entry2 __user
*entries
)
2234 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2237 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2238 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2240 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2241 kvm_apic_set_version(vcpu
);
2242 kvm_x86_ops
->cpuid_update(vcpu
);
2250 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2251 struct kvm_cpuid2
*cpuid
,
2252 struct kvm_cpuid_entry2 __user
*entries
)
2257 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2260 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2261 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2266 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2270 static void cpuid_mask(u32
*word
, int wordnum
)
2272 *word
&= boot_cpu_data
.x86_capability
[wordnum
];
2275 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2278 entry
->function
= function
;
2279 entry
->index
= index
;
2280 cpuid_count(entry
->function
, entry
->index
,
2281 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2285 static bool supported_xcr0_bit(unsigned bit
)
2287 u64 mask
= ((u64
)1 << bit
);
2289 return mask
& (XSTATE_FP
| XSTATE_SSE
| XSTATE_YMM
) & host_xcr0
;
2292 #define F(x) bit(X86_FEATURE_##x)
2294 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2295 u32 index
, int *nent
, int maxnent
)
2297 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2298 #ifdef CONFIG_X86_64
2299 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2301 unsigned f_lm
= F(LM
);
2303 unsigned f_gbpages
= 0;
2306 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2309 const u32 kvm_supported_word0_x86_features
=
2310 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2311 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2312 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2313 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2314 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2315 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2316 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2317 0 /* HTT, TM, Reserved, PBE */;
2318 /* cpuid 0x80000001.edx */
2319 const u32 kvm_supported_word1_x86_features
=
2320 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2321 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2322 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2323 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2324 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2325 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2326 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2327 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2329 const u32 kvm_supported_word4_x86_features
=
2330 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2331 0 /* DS-CPL, VMX, SMX, EST */ |
2332 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2333 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2334 0 /* Reserved, DCA */ | F(XMM4_1
) |
2335 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2336 0 /* Reserved*/ | F(AES
) | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
) |
2338 /* cpuid 0x80000001.ecx */
2339 const u32 kvm_supported_word6_x86_features
=
2340 F(LAHF_LM
) | F(CMP_LEGACY
) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2341 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2342 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP
) |
2343 0 /* SKINIT, WDT, LWP */ | F(FMA4
) | F(TBM
);
2345 /* cpuid 0xC0000001.edx */
2346 const u32 kvm_supported_word5_x86_features
=
2347 F(XSTORE
) | F(XSTORE_EN
) | F(XCRYPT
) | F(XCRYPT_EN
) |
2348 F(ACE2
) | F(ACE2_EN
) | F(PHE
) | F(PHE_EN
) |
2351 /* all calls to cpuid_count() should be made on the same cpu */
2353 do_cpuid_1_ent(entry
, function
, index
);
2358 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2361 entry
->edx
&= kvm_supported_word0_x86_features
;
2362 cpuid_mask(&entry
->edx
, 0);
2363 entry
->ecx
&= kvm_supported_word4_x86_features
;
2364 cpuid_mask(&entry
->ecx
, 4);
2365 /* we support x2apic emulation even if host does not support
2366 * it since we emulate x2apic in software */
2367 entry
->ecx
|= F(X2APIC
);
2369 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2370 * may return different values. This forces us to get_cpu() before
2371 * issuing the first command, and also to emulate this annoying behavior
2372 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2374 int t
, times
= entry
->eax
& 0xff;
2376 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2377 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2378 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2379 do_cpuid_1_ent(&entry
[t
], function
, 0);
2380 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2385 /* function 4 and 0xb have additional index. */
2389 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2390 /* read more entries until cache_type is zero */
2391 for (i
= 1; *nent
< maxnent
; ++i
) {
2392 cache_type
= entry
[i
- 1].eax
& 0x1f;
2395 do_cpuid_1_ent(&entry
[i
], function
, i
);
2397 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2407 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2408 /* read more entries until level_type is zero */
2409 for (i
= 1; *nent
< maxnent
; ++i
) {
2410 level_type
= entry
[i
- 1].ecx
& 0xff00;
2413 do_cpuid_1_ent(&entry
[i
], function
, i
);
2415 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2423 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2424 for (i
= 1; *nent
< maxnent
&& i
< 64; ++i
) {
2425 if (entry
[i
].eax
== 0 || !supported_xcr0_bit(i
))
2427 do_cpuid_1_ent(&entry
[i
], function
, i
);
2429 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2434 case KVM_CPUID_SIGNATURE
: {
2435 char signature
[12] = "KVMKVMKVM\0\0";
2436 u32
*sigptr
= (u32
*)signature
;
2438 entry
->ebx
= sigptr
[0];
2439 entry
->ecx
= sigptr
[1];
2440 entry
->edx
= sigptr
[2];
2443 case KVM_CPUID_FEATURES
:
2444 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2445 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2446 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2447 (1 << KVM_FEATURE_ASYNC_PF
) |
2448 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2454 entry
->eax
= min(entry
->eax
, 0x8000001a);
2457 entry
->edx
&= kvm_supported_word1_x86_features
;
2458 cpuid_mask(&entry
->edx
, 1);
2459 entry
->ecx
&= kvm_supported_word6_x86_features
;
2460 cpuid_mask(&entry
->ecx
, 6);
2463 unsigned g_phys_as
= (entry
->eax
>> 16) & 0xff;
2464 unsigned virt_as
= max((entry
->eax
>> 8) & 0xff, 48U);
2465 unsigned phys_as
= entry
->eax
& 0xff;
2468 g_phys_as
= phys_as
;
2469 entry
->eax
= g_phys_as
| (virt_as
<< 8);
2470 entry
->ebx
= entry
->edx
= 0;
2474 entry
->ecx
= entry
->edx
= 0;
2480 /*Add support for Centaur's CPUID instruction*/
2482 /*Just support up to 0xC0000004 now*/
2483 entry
->eax
= min(entry
->eax
, 0xC0000004);
2486 entry
->edx
&= kvm_supported_word5_x86_features
;
2487 cpuid_mask(&entry
->edx
, 5);
2489 case 3: /* Processor serial number */
2490 case 5: /* MONITOR/MWAIT */
2491 case 6: /* Thermal management */
2492 case 0xA: /* Architectural Performance Monitoring */
2493 case 0x80000007: /* Advanced power management */
2498 entry
->eax
= entry
->ebx
= entry
->ecx
= entry
->edx
= 0;
2502 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2509 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2510 struct kvm_cpuid_entry2 __user
*entries
)
2512 struct kvm_cpuid_entry2
*cpuid_entries
;
2513 int limit
, nent
= 0, r
= -E2BIG
;
2516 if (cpuid
->nent
< 1)
2518 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2519 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2521 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2525 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2526 limit
= cpuid_entries
[0].eax
;
2527 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2528 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2529 &nent
, cpuid
->nent
);
2531 if (nent
>= cpuid
->nent
)
2534 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2535 limit
= cpuid_entries
[nent
- 1].eax
;
2536 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2537 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2538 &nent
, cpuid
->nent
);
2543 if (nent
>= cpuid
->nent
)
2546 /* Add support for Centaur's CPUID instruction. */
2547 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_CENTAUR
) {
2548 do_cpuid_ent(&cpuid_entries
[nent
], 0xC0000000, 0,
2549 &nent
, cpuid
->nent
);
2552 if (nent
>= cpuid
->nent
)
2555 limit
= cpuid_entries
[nent
- 1].eax
;
2556 for (func
= 0xC0000001;
2557 func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2558 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2559 &nent
, cpuid
->nent
);
2562 if (nent
>= cpuid
->nent
)
2566 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2570 if (nent
>= cpuid
->nent
)
2573 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2577 if (nent
>= cpuid
->nent
)
2581 if (copy_to_user(entries
, cpuid_entries
,
2582 nent
* sizeof(struct kvm_cpuid_entry2
)))
2588 vfree(cpuid_entries
);
2593 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2594 struct kvm_lapic_state
*s
)
2596 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2601 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2602 struct kvm_lapic_state
*s
)
2604 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2605 kvm_apic_post_state_restore(vcpu
);
2606 update_cr8_intercept(vcpu
);
2611 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2612 struct kvm_interrupt
*irq
)
2614 if (irq
->irq
< 0 || irq
->irq
>= 256)
2616 if (irqchip_in_kernel(vcpu
->kvm
))
2619 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2620 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2625 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2627 kvm_inject_nmi(vcpu
);
2632 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2633 struct kvm_tpr_access_ctl
*tac
)
2637 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2641 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2645 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2648 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2650 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2653 vcpu
->arch
.mcg_cap
= mcg_cap
;
2654 /* Init IA32_MCG_CTL to all 1s */
2655 if (mcg_cap
& MCG_CTL_P
)
2656 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2657 /* Init IA32_MCi_CTL to all 1s */
2658 for (bank
= 0; bank
< bank_num
; bank
++)
2659 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2664 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2665 struct kvm_x86_mce
*mce
)
2667 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2668 unsigned bank_num
= mcg_cap
& 0xff;
2669 u64
*banks
= vcpu
->arch
.mce_banks
;
2671 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2674 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2675 * reporting is disabled
2677 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2678 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2680 banks
+= 4 * mce
->bank
;
2682 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2683 * reporting is disabled for the bank
2685 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2687 if (mce
->status
& MCI_STATUS_UC
) {
2688 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2689 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2690 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2693 if (banks
[1] & MCI_STATUS_VAL
)
2694 mce
->status
|= MCI_STATUS_OVER
;
2695 banks
[2] = mce
->addr
;
2696 banks
[3] = mce
->misc
;
2697 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2698 banks
[1] = mce
->status
;
2699 kvm_queue_exception(vcpu
, MC_VECTOR
);
2700 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2701 || !(banks
[1] & MCI_STATUS_UC
)) {
2702 if (banks
[1] & MCI_STATUS_VAL
)
2703 mce
->status
|= MCI_STATUS_OVER
;
2704 banks
[2] = mce
->addr
;
2705 banks
[3] = mce
->misc
;
2706 banks
[1] = mce
->status
;
2708 banks
[1] |= MCI_STATUS_OVER
;
2712 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2713 struct kvm_vcpu_events
*events
)
2715 events
->exception
.injected
=
2716 vcpu
->arch
.exception
.pending
&&
2717 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2718 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2719 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2720 events
->exception
.pad
= 0;
2721 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2723 events
->interrupt
.injected
=
2724 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2725 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2726 events
->interrupt
.soft
= 0;
2727 events
->interrupt
.shadow
=
2728 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2729 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2731 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2732 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2733 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2734 events
->nmi
.pad
= 0;
2736 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2738 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2739 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2740 | KVM_VCPUEVENT_VALID_SHADOW
);
2741 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
2744 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2745 struct kvm_vcpu_events
*events
)
2747 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2748 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2749 | KVM_VCPUEVENT_VALID_SHADOW
))
2752 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2753 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2754 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2755 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2757 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2758 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2759 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2760 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2761 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2762 events
->interrupt
.shadow
);
2764 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2765 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2766 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2767 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2769 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2770 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2772 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2777 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2778 struct kvm_debugregs
*dbgregs
)
2780 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2781 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2782 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2784 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
2787 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2788 struct kvm_debugregs
*dbgregs
)
2793 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2794 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2795 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2800 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2801 struct kvm_xsave
*guest_xsave
)
2804 memcpy(guest_xsave
->region
,
2805 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2808 memcpy(guest_xsave
->region
,
2809 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2810 sizeof(struct i387_fxsave_struct
));
2811 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2816 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2817 struct kvm_xsave
*guest_xsave
)
2820 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2823 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2824 guest_xsave
->region
, xstate_size
);
2826 if (xstate_bv
& ~XSTATE_FPSSE
)
2828 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2829 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2834 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2835 struct kvm_xcrs
*guest_xcrs
)
2837 if (!cpu_has_xsave
) {
2838 guest_xcrs
->nr_xcrs
= 0;
2842 guest_xcrs
->nr_xcrs
= 1;
2843 guest_xcrs
->flags
= 0;
2844 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2845 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2848 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2849 struct kvm_xcrs
*guest_xcrs
)
2856 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2859 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2860 /* Only support XCR0 currently */
2861 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2862 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2863 guest_xcrs
->xcrs
[0].value
);
2871 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2872 unsigned int ioctl
, unsigned long arg
)
2874 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2875 void __user
*argp
= (void __user
*)arg
;
2878 struct kvm_lapic_state
*lapic
;
2879 struct kvm_xsave
*xsave
;
2880 struct kvm_xcrs
*xcrs
;
2886 case KVM_GET_LAPIC
: {
2888 if (!vcpu
->arch
.apic
)
2890 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2895 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2899 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2904 case KVM_SET_LAPIC
: {
2906 if (!vcpu
->arch
.apic
)
2908 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2913 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2915 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2921 case KVM_INTERRUPT
: {
2922 struct kvm_interrupt irq
;
2925 if (copy_from_user(&irq
, argp
, sizeof irq
))
2927 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2934 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2940 case KVM_SET_CPUID
: {
2941 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2942 struct kvm_cpuid cpuid
;
2945 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2947 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2952 case KVM_SET_CPUID2
: {
2953 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2954 struct kvm_cpuid2 cpuid
;
2957 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2959 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2960 cpuid_arg
->entries
);
2965 case KVM_GET_CPUID2
: {
2966 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2967 struct kvm_cpuid2 cpuid
;
2970 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2972 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2973 cpuid_arg
->entries
);
2977 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2983 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2986 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2988 case KVM_TPR_ACCESS_REPORTING
: {
2989 struct kvm_tpr_access_ctl tac
;
2992 if (copy_from_user(&tac
, argp
, sizeof tac
))
2994 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2998 if (copy_to_user(argp
, &tac
, sizeof tac
))
3003 case KVM_SET_VAPIC_ADDR
: {
3004 struct kvm_vapic_addr va
;
3007 if (!irqchip_in_kernel(vcpu
->kvm
))
3010 if (copy_from_user(&va
, argp
, sizeof va
))
3013 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3016 case KVM_X86_SETUP_MCE
: {
3020 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3022 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3025 case KVM_X86_SET_MCE
: {
3026 struct kvm_x86_mce mce
;
3029 if (copy_from_user(&mce
, argp
, sizeof mce
))
3031 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3034 case KVM_GET_VCPU_EVENTS
: {
3035 struct kvm_vcpu_events events
;
3037 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3040 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3045 case KVM_SET_VCPU_EVENTS
: {
3046 struct kvm_vcpu_events events
;
3049 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3052 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3055 case KVM_GET_DEBUGREGS
: {
3056 struct kvm_debugregs dbgregs
;
3058 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3061 if (copy_to_user(argp
, &dbgregs
,
3062 sizeof(struct kvm_debugregs
)))
3067 case KVM_SET_DEBUGREGS
: {
3068 struct kvm_debugregs dbgregs
;
3071 if (copy_from_user(&dbgregs
, argp
,
3072 sizeof(struct kvm_debugregs
)))
3075 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3078 case KVM_GET_XSAVE
: {
3079 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3084 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3087 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3092 case KVM_SET_XSAVE
: {
3093 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3099 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
3102 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3105 case KVM_GET_XCRS
: {
3106 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3111 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3114 if (copy_to_user(argp
, u
.xcrs
,
3115 sizeof(struct kvm_xcrs
)))
3120 case KVM_SET_XCRS
: {
3121 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3127 if (copy_from_user(u
.xcrs
, argp
,
3128 sizeof(struct kvm_xcrs
)))
3131 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3134 case KVM_SET_TSC_KHZ
: {
3138 if (!kvm_has_tsc_control
)
3141 user_tsc_khz
= (u32
)arg
;
3143 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3146 kvm_x86_ops
->set_tsc_khz(vcpu
, user_tsc_khz
);
3151 case KVM_GET_TSC_KHZ
: {
3153 if (check_tsc_unstable())
3156 r
= vcpu_tsc_khz(vcpu
);
3168 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3172 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3174 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3178 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3181 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3185 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3186 u32 kvm_nr_mmu_pages
)
3188 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3191 mutex_lock(&kvm
->slots_lock
);
3192 spin_lock(&kvm
->mmu_lock
);
3194 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3195 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3197 spin_unlock(&kvm
->mmu_lock
);
3198 mutex_unlock(&kvm
->slots_lock
);
3202 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3204 return kvm
->arch
.n_max_mmu_pages
;
3207 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3212 switch (chip
->chip_id
) {
3213 case KVM_IRQCHIP_PIC_MASTER
:
3214 memcpy(&chip
->chip
.pic
,
3215 &pic_irqchip(kvm
)->pics
[0],
3216 sizeof(struct kvm_pic_state
));
3218 case KVM_IRQCHIP_PIC_SLAVE
:
3219 memcpy(&chip
->chip
.pic
,
3220 &pic_irqchip(kvm
)->pics
[1],
3221 sizeof(struct kvm_pic_state
));
3223 case KVM_IRQCHIP_IOAPIC
:
3224 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3233 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3238 switch (chip
->chip_id
) {
3239 case KVM_IRQCHIP_PIC_MASTER
:
3240 spin_lock(&pic_irqchip(kvm
)->lock
);
3241 memcpy(&pic_irqchip(kvm
)->pics
[0],
3243 sizeof(struct kvm_pic_state
));
3244 spin_unlock(&pic_irqchip(kvm
)->lock
);
3246 case KVM_IRQCHIP_PIC_SLAVE
:
3247 spin_lock(&pic_irqchip(kvm
)->lock
);
3248 memcpy(&pic_irqchip(kvm
)->pics
[1],
3250 sizeof(struct kvm_pic_state
));
3251 spin_unlock(&pic_irqchip(kvm
)->lock
);
3253 case KVM_IRQCHIP_IOAPIC
:
3254 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3260 kvm_pic_update_irq(pic_irqchip(kvm
));
3264 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3268 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3269 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3270 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3274 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3278 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3279 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3280 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3281 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3285 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3289 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3290 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3291 sizeof(ps
->channels
));
3292 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3293 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3294 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3298 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3300 int r
= 0, start
= 0;
3301 u32 prev_legacy
, cur_legacy
;
3302 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3303 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3304 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3305 if (!prev_legacy
&& cur_legacy
)
3307 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3308 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3309 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3310 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3311 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3315 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3316 struct kvm_reinject_control
*control
)
3318 if (!kvm
->arch
.vpit
)
3320 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3321 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3322 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3327 * Get (and clear) the dirty memory log for a memory slot.
3329 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3330 struct kvm_dirty_log
*log
)
3333 struct kvm_memory_slot
*memslot
;
3335 unsigned long is_dirty
= 0;
3337 mutex_lock(&kvm
->slots_lock
);
3340 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3343 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3345 if (!memslot
->dirty_bitmap
)
3348 n
= kvm_dirty_bitmap_bytes(memslot
);
3350 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3351 is_dirty
= memslot
->dirty_bitmap
[i
];
3353 /* If nothing is dirty, don't bother messing with page tables. */
3355 struct kvm_memslots
*slots
, *old_slots
;
3356 unsigned long *dirty_bitmap
;
3358 dirty_bitmap
= memslot
->dirty_bitmap_head
;
3359 if (memslot
->dirty_bitmap
== dirty_bitmap
)
3360 dirty_bitmap
+= n
/ sizeof(long);
3361 memset(dirty_bitmap
, 0, n
);
3364 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3367 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3368 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3369 slots
->generation
++;
3371 old_slots
= kvm
->memslots
;
3372 rcu_assign_pointer(kvm
->memslots
, slots
);
3373 synchronize_srcu_expedited(&kvm
->srcu
);
3374 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3377 spin_lock(&kvm
->mmu_lock
);
3378 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3379 spin_unlock(&kvm
->mmu_lock
);
3382 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
))
3386 if (clear_user(log
->dirty_bitmap
, n
))
3392 mutex_unlock(&kvm
->slots_lock
);
3396 long kvm_arch_vm_ioctl(struct file
*filp
,
3397 unsigned int ioctl
, unsigned long arg
)
3399 struct kvm
*kvm
= filp
->private_data
;
3400 void __user
*argp
= (void __user
*)arg
;
3403 * This union makes it completely explicit to gcc-3.x
3404 * that these two variables' stack usage should be
3405 * combined, not added together.
3408 struct kvm_pit_state ps
;
3409 struct kvm_pit_state2 ps2
;
3410 struct kvm_pit_config pit_config
;
3414 case KVM_SET_TSS_ADDR
:
3415 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3419 case KVM_SET_IDENTITY_MAP_ADDR
: {
3423 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3425 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3430 case KVM_SET_NR_MMU_PAGES
:
3431 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3435 case KVM_GET_NR_MMU_PAGES
:
3436 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3438 case KVM_CREATE_IRQCHIP
: {
3439 struct kvm_pic
*vpic
;
3441 mutex_lock(&kvm
->lock
);
3444 goto create_irqchip_unlock
;
3446 vpic
= kvm_create_pic(kvm
);
3448 r
= kvm_ioapic_init(kvm
);
3450 mutex_lock(&kvm
->slots_lock
);
3451 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3453 mutex_unlock(&kvm
->slots_lock
);
3455 goto create_irqchip_unlock
;
3458 goto create_irqchip_unlock
;
3460 kvm
->arch
.vpic
= vpic
;
3462 r
= kvm_setup_default_irq_routing(kvm
);
3464 mutex_lock(&kvm
->slots_lock
);
3465 mutex_lock(&kvm
->irq_lock
);
3466 kvm_ioapic_destroy(kvm
);
3467 kvm_destroy_pic(kvm
);
3468 mutex_unlock(&kvm
->irq_lock
);
3469 mutex_unlock(&kvm
->slots_lock
);
3471 create_irqchip_unlock
:
3472 mutex_unlock(&kvm
->lock
);
3475 case KVM_CREATE_PIT
:
3476 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3478 case KVM_CREATE_PIT2
:
3480 if (copy_from_user(&u
.pit_config
, argp
,
3481 sizeof(struct kvm_pit_config
)))
3484 mutex_lock(&kvm
->slots_lock
);
3487 goto create_pit_unlock
;
3489 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3493 mutex_unlock(&kvm
->slots_lock
);
3495 case KVM_IRQ_LINE_STATUS
:
3496 case KVM_IRQ_LINE
: {
3497 struct kvm_irq_level irq_event
;
3500 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3503 if (irqchip_in_kernel(kvm
)) {
3505 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3506 irq_event
.irq
, irq_event
.level
);
3507 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3509 irq_event
.status
= status
;
3510 if (copy_to_user(argp
, &irq_event
,
3518 case KVM_GET_IRQCHIP
: {
3519 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3520 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3526 if (copy_from_user(chip
, argp
, sizeof *chip
))
3527 goto get_irqchip_out
;
3529 if (!irqchip_in_kernel(kvm
))
3530 goto get_irqchip_out
;
3531 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3533 goto get_irqchip_out
;
3535 if (copy_to_user(argp
, chip
, sizeof *chip
))
3536 goto get_irqchip_out
;
3544 case KVM_SET_IRQCHIP
: {
3545 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3546 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3552 if (copy_from_user(chip
, argp
, sizeof *chip
))
3553 goto set_irqchip_out
;
3555 if (!irqchip_in_kernel(kvm
))
3556 goto set_irqchip_out
;
3557 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3559 goto set_irqchip_out
;
3569 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3572 if (!kvm
->arch
.vpit
)
3574 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3578 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3585 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3588 if (!kvm
->arch
.vpit
)
3590 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3596 case KVM_GET_PIT2
: {
3598 if (!kvm
->arch
.vpit
)
3600 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3604 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3609 case KVM_SET_PIT2
: {
3611 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3614 if (!kvm
->arch
.vpit
)
3616 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3622 case KVM_REINJECT_CONTROL
: {
3623 struct kvm_reinject_control control
;
3625 if (copy_from_user(&control
, argp
, sizeof(control
)))
3627 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3633 case KVM_XEN_HVM_CONFIG
: {
3635 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3636 sizeof(struct kvm_xen_hvm_config
)))
3639 if (kvm
->arch
.xen_hvm_config
.flags
)
3644 case KVM_SET_CLOCK
: {
3645 struct kvm_clock_data user_ns
;
3650 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3658 local_irq_disable();
3659 now_ns
= get_kernel_ns();
3660 delta
= user_ns
.clock
- now_ns
;
3662 kvm
->arch
.kvmclock_offset
= delta
;
3665 case KVM_GET_CLOCK
: {
3666 struct kvm_clock_data user_ns
;
3669 local_irq_disable();
3670 now_ns
= get_kernel_ns();
3671 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3674 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
3677 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3690 static void kvm_init_msr_list(void)
3695 /* skip the first msrs in the list. KVM-specific */
3696 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3697 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3700 msrs_to_save
[j
] = msrs_to_save
[i
];
3703 num_msrs_to_save
= j
;
3706 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3714 if (!(vcpu
->arch
.apic
&&
3715 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3716 && kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3727 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3734 if (!(vcpu
->arch
.apic
&&
3735 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, n
, v
))
3736 && kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, n
, v
))
3738 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
3748 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3749 struct kvm_segment
*var
, int seg
)
3751 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3754 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3755 struct kvm_segment
*var
, int seg
)
3757 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3760 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3765 static gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3768 struct x86_exception exception
;
3770 BUG_ON(!mmu_is_nested(vcpu
));
3772 /* NPT walks are always user-walks */
3773 access
|= PFERR_USER_MASK
;
3774 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, &exception
);
3779 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
3780 struct x86_exception
*exception
)
3782 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3783 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3786 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
3787 struct x86_exception
*exception
)
3789 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3790 access
|= PFERR_FETCH_MASK
;
3791 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3794 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
3795 struct x86_exception
*exception
)
3797 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3798 access
|= PFERR_WRITE_MASK
;
3799 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
3802 /* uses this to access any guest's mapped memory without checking CPL */
3803 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
3804 struct x86_exception
*exception
)
3806 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
3809 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3810 struct kvm_vcpu
*vcpu
, u32 access
,
3811 struct x86_exception
*exception
)
3814 int r
= X86EMUL_CONTINUE
;
3817 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3819 unsigned offset
= addr
& (PAGE_SIZE
-1);
3820 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3823 if (gpa
== UNMAPPED_GVA
)
3824 return X86EMUL_PROPAGATE_FAULT
;
3825 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3827 r
= X86EMUL_IO_NEEDED
;
3839 /* used for instruction fetching */
3840 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3841 gva_t addr
, void *val
, unsigned int bytes
,
3842 struct x86_exception
*exception
)
3844 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3845 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3847 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3848 access
| PFERR_FETCH_MASK
,
3852 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
3853 gva_t addr
, void *val
, unsigned int bytes
,
3854 struct x86_exception
*exception
)
3856 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3857 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3859 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3862 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
3864 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3865 gva_t addr
, void *val
, unsigned int bytes
,
3866 struct x86_exception
*exception
)
3868 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3869 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
3872 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
3873 gva_t addr
, void *val
,
3875 struct x86_exception
*exception
)
3877 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3879 int r
= X86EMUL_CONTINUE
;
3882 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3885 unsigned offset
= addr
& (PAGE_SIZE
-1);
3886 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3889 if (gpa
== UNMAPPED_GVA
)
3890 return X86EMUL_PROPAGATE_FAULT
;
3891 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3893 r
= X86EMUL_IO_NEEDED
;
3904 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
3906 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
3910 struct x86_exception
*exception
)
3912 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
3916 if (vcpu
->mmio_read_completed
) {
3917 memcpy(val
, vcpu
->mmio_data
, bytes
);
3918 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3919 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3920 vcpu
->mmio_read_completed
= 0;
3921 return X86EMUL_CONTINUE
;
3924 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, exception
);
3926 if (gpa
== UNMAPPED_GVA
)
3927 return X86EMUL_PROPAGATE_FAULT
;
3929 /* For APIC access vmexit */
3930 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3933 if (kvm_read_guest_virt(ctxt
, addr
, val
, bytes
, exception
)
3934 == X86EMUL_CONTINUE
)
3935 return X86EMUL_CONTINUE
;
3939 * Is this MMIO handled locally?
3941 handled
= vcpu_mmio_read(vcpu
, gpa
, bytes
, val
);
3943 if (handled
== bytes
)
3944 return X86EMUL_CONTINUE
;
3950 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3952 vcpu
->mmio_needed
= 1;
3953 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3954 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3955 vcpu
->mmio_size
= bytes
;
3956 vcpu
->run
->mmio
.len
= min(vcpu
->mmio_size
, 8);
3957 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3958 vcpu
->mmio_index
= 0;
3960 return X86EMUL_IO_NEEDED
;
3963 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3964 const void *val
, int bytes
)
3968 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3971 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3975 static int emulator_write_emulated_onepage(unsigned long addr
,
3978 struct x86_exception
*exception
,
3979 struct kvm_vcpu
*vcpu
)
3984 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, exception
);
3986 if (gpa
== UNMAPPED_GVA
)
3987 return X86EMUL_PROPAGATE_FAULT
;
3989 /* For APIC access vmexit */
3990 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3993 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3994 return X86EMUL_CONTINUE
;
3997 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3999 * Is this MMIO handled locally?
4001 handled
= vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4002 if (handled
== bytes
)
4003 return X86EMUL_CONTINUE
;
4009 vcpu
->mmio_needed
= 1;
4010 memcpy(vcpu
->mmio_data
, val
, bytes
);
4011 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4012 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
4013 vcpu
->mmio_size
= bytes
;
4014 vcpu
->run
->mmio
.len
= min(vcpu
->mmio_size
, 8);
4015 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
4016 memcpy(vcpu
->run
->mmio
.data
, vcpu
->mmio_data
, 8);
4017 vcpu
->mmio_index
= 0;
4019 return X86EMUL_CONTINUE
;
4022 int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4026 struct x86_exception
*exception
)
4028 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4030 /* Crossing a page boundary? */
4031 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4034 now
= -addr
& ~PAGE_MASK
;
4035 rc
= emulator_write_emulated_onepage(addr
, val
, now
, exception
,
4037 if (rc
!= X86EMUL_CONTINUE
)
4043 return emulator_write_emulated_onepage(addr
, val
, bytes
, exception
,
4047 #define CMPXCHG_TYPE(t, ptr, old, new) \
4048 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4050 #ifdef CONFIG_X86_64
4051 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4053 # define CMPXCHG64(ptr, old, new) \
4054 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4057 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4062 struct x86_exception
*exception
)
4064 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4070 /* guests cmpxchg8b have to be emulated atomically */
4071 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4074 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4076 if (gpa
== UNMAPPED_GVA
||
4077 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4080 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4083 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
4084 if (is_error_page(page
)) {
4085 kvm_release_page_clean(page
);
4089 kaddr
= kmap_atomic(page
, KM_USER0
);
4090 kaddr
+= offset_in_page(gpa
);
4093 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4096 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4099 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4102 exchanged
= CMPXCHG64(kaddr
, old
, new);
4107 kunmap_atomic(kaddr
, KM_USER0
);
4108 kvm_release_page_dirty(page
);
4111 return X86EMUL_CMPXCHG_FAILED
;
4113 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
4115 return X86EMUL_CONTINUE
;
4118 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4120 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4123 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4125 /* TODO: String I/O for in kernel device */
4128 if (vcpu
->arch
.pio
.in
)
4129 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4130 vcpu
->arch
.pio
.size
, pd
);
4132 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
4133 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4139 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4140 int size
, unsigned short port
, void *val
,
4143 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4145 if (vcpu
->arch
.pio
.count
)
4148 trace_kvm_pio(0, port
, size
, count
);
4150 vcpu
->arch
.pio
.port
= port
;
4151 vcpu
->arch
.pio
.in
= 1;
4152 vcpu
->arch
.pio
.count
= count
;
4153 vcpu
->arch
.pio
.size
= size
;
4155 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4157 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4158 vcpu
->arch
.pio
.count
= 0;
4162 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4163 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
4164 vcpu
->run
->io
.size
= size
;
4165 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4166 vcpu
->run
->io
.count
= count
;
4167 vcpu
->run
->io
.port
= port
;
4172 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4173 int size
, unsigned short port
,
4174 const void *val
, unsigned int count
)
4176 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4178 trace_kvm_pio(1, port
, size
, count
);
4180 vcpu
->arch
.pio
.port
= port
;
4181 vcpu
->arch
.pio
.in
= 0;
4182 vcpu
->arch
.pio
.count
= count
;
4183 vcpu
->arch
.pio
.size
= size
;
4185 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4187 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4188 vcpu
->arch
.pio
.count
= 0;
4192 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4193 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
4194 vcpu
->run
->io
.size
= size
;
4195 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4196 vcpu
->run
->io
.count
= count
;
4197 vcpu
->run
->io
.port
= port
;
4202 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4204 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4207 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4209 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4212 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4214 if (!need_emulate_wbinvd(vcpu
))
4215 return X86EMUL_CONTINUE
;
4217 if (kvm_x86_ops
->has_wbinvd_exit()) {
4218 int cpu
= get_cpu();
4220 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4221 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4222 wbinvd_ipi
, NULL
, 1);
4224 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4227 return X86EMUL_CONTINUE
;
4229 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4231 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4233 kvm_emulate_wbinvd(emul_to_vcpu(ctxt
));
4236 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
4238 return _kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4241 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
4244 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4247 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4249 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4252 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4254 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4255 unsigned long value
;
4259 value
= kvm_read_cr0(vcpu
);
4262 value
= vcpu
->arch
.cr2
;
4265 value
= kvm_read_cr3(vcpu
);
4268 value
= kvm_read_cr4(vcpu
);
4271 value
= kvm_get_cr8(vcpu
);
4274 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4281 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4283 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4288 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4291 vcpu
->arch
.cr2
= val
;
4294 res
= kvm_set_cr3(vcpu
, val
);
4297 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4300 res
= kvm_set_cr8(vcpu
, val
);
4303 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
4310 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4312 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4315 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4317 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4320 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4322 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4325 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4327 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4330 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4332 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4335 static unsigned long emulator_get_cached_segment_base(
4336 struct x86_emulate_ctxt
*ctxt
, int seg
)
4338 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4341 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4342 struct desc_struct
*desc
, u32
*base3
,
4345 struct kvm_segment var
;
4347 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
4348 *selector
= var
.selector
;
4355 set_desc_limit(desc
, var
.limit
);
4356 set_desc_base(desc
, (unsigned long)var
.base
);
4357 #ifdef CONFIG_X86_64
4359 *base3
= var
.base
>> 32;
4361 desc
->type
= var
.type
;
4363 desc
->dpl
= var
.dpl
;
4364 desc
->p
= var
.present
;
4365 desc
->avl
= var
.avl
;
4373 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
4374 struct desc_struct
*desc
, u32 base3
,
4377 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4378 struct kvm_segment var
;
4380 var
.selector
= selector
;
4381 var
.base
= get_desc_base(desc
);
4382 #ifdef CONFIG_X86_64
4383 var
.base
|= ((u64
)base3
) << 32;
4385 var
.limit
= get_desc_limit(desc
);
4387 var
.limit
= (var
.limit
<< 12) | 0xfff;
4388 var
.type
= desc
->type
;
4389 var
.present
= desc
->p
;
4390 var
.dpl
= desc
->dpl
;
4395 var
.avl
= desc
->avl
;
4396 var
.present
= desc
->p
;
4397 var
.unusable
= !var
.present
;
4400 kvm_set_segment(vcpu
, &var
, seg
);
4404 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
4405 u32 msr_index
, u64
*pdata
)
4407 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
4410 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
4411 u32 msr_index
, u64 data
)
4413 return kvm_set_msr(emul_to_vcpu(ctxt
), msr_index
, data
);
4416 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
4418 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
4421 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
4424 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
4426 * CR0.TS may reference the host fpu state, not the guest fpu state,
4427 * so it may be clear at this point.
4432 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
4437 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
4438 struct x86_instruction_info
*info
,
4439 enum x86_intercept_stage stage
)
4441 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
4444 static struct x86_emulate_ops emulate_ops
= {
4445 .read_std
= kvm_read_guest_virt_system
,
4446 .write_std
= kvm_write_guest_virt_system
,
4447 .fetch
= kvm_fetch_guest_virt
,
4448 .read_emulated
= emulator_read_emulated
,
4449 .write_emulated
= emulator_write_emulated
,
4450 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4451 .invlpg
= emulator_invlpg
,
4452 .pio_in_emulated
= emulator_pio_in_emulated
,
4453 .pio_out_emulated
= emulator_pio_out_emulated
,
4454 .get_segment
= emulator_get_segment
,
4455 .set_segment
= emulator_set_segment
,
4456 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4457 .get_gdt
= emulator_get_gdt
,
4458 .get_idt
= emulator_get_idt
,
4459 .set_gdt
= emulator_set_gdt
,
4460 .set_idt
= emulator_set_idt
,
4461 .get_cr
= emulator_get_cr
,
4462 .set_cr
= emulator_set_cr
,
4463 .cpl
= emulator_get_cpl
,
4464 .get_dr
= emulator_get_dr
,
4465 .set_dr
= emulator_set_dr
,
4466 .set_msr
= emulator_set_msr
,
4467 .get_msr
= emulator_get_msr
,
4468 .halt
= emulator_halt
,
4469 .wbinvd
= emulator_wbinvd
,
4470 .fix_hypercall
= emulator_fix_hypercall
,
4471 .get_fpu
= emulator_get_fpu
,
4472 .put_fpu
= emulator_put_fpu
,
4473 .intercept
= emulator_intercept
,
4476 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4478 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4479 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4480 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4481 vcpu
->arch
.regs_dirty
= ~0;
4484 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4486 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4488 * an sti; sti; sequence only disable interrupts for the first
4489 * instruction. So, if the last instruction, be it emulated or
4490 * not, left the system with the INT_STI flag enabled, it
4491 * means that the last instruction is an sti. We should not
4492 * leave the flag on in this case. The same goes for mov ss
4494 if (!(int_shadow
& mask
))
4495 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4498 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4500 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4501 if (ctxt
->exception
.vector
== PF_VECTOR
)
4502 kvm_propagate_fault(vcpu
, &ctxt
->exception
);
4503 else if (ctxt
->exception
.error_code_valid
)
4504 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
4505 ctxt
->exception
.error_code
);
4507 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
4510 static void init_decode_cache(struct x86_emulate_ctxt
*ctxt
,
4511 const unsigned long *regs
)
4513 memset(&ctxt
->twobyte
, 0,
4514 (void *)&ctxt
->regs
- (void *)&ctxt
->twobyte
);
4515 memcpy(ctxt
->regs
, regs
, sizeof(ctxt
->regs
));
4517 ctxt
->fetch
.start
= 0;
4518 ctxt
->fetch
.end
= 0;
4519 ctxt
->io_read
.pos
= 0;
4520 ctxt
->io_read
.end
= 0;
4521 ctxt
->mem_read
.pos
= 0;
4522 ctxt
->mem_read
.end
= 0;
4525 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4527 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4531 * TODO: fix emulate.c to use guest_read/write_register
4532 * instead of direct ->regs accesses, can save hundred cycles
4533 * on Intel for instructions that don't read/change RSP, for
4536 cache_all_regs(vcpu
);
4538 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4540 ctxt
->eflags
= kvm_get_rflags(vcpu
);
4541 ctxt
->eip
= kvm_rip_read(vcpu
);
4542 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4543 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
4544 cs_l
? X86EMUL_MODE_PROT64
:
4545 cs_db
? X86EMUL_MODE_PROT32
:
4546 X86EMUL_MODE_PROT16
;
4547 ctxt
->guest_mode
= is_guest_mode(vcpu
);
4549 init_decode_cache(ctxt
, vcpu
->arch
.regs
);
4550 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4553 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
4555 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4558 init_emulate_ctxt(vcpu
);
4562 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
4563 ret
= emulate_int_real(ctxt
, irq
);
4565 if (ret
!= X86EMUL_CONTINUE
)
4566 return EMULATE_FAIL
;
4568 ctxt
->eip
= ctxt
->_eip
;
4569 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
4570 kvm_rip_write(vcpu
, ctxt
->eip
);
4571 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4573 if (irq
== NMI_VECTOR
)
4574 vcpu
->arch
.nmi_pending
= false;
4576 vcpu
->arch
.interrupt
.pending
= false;
4578 return EMULATE_DONE
;
4580 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
4582 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4584 int r
= EMULATE_DONE
;
4586 ++vcpu
->stat
.insn_emulation_fail
;
4587 trace_kvm_emulate_insn_failed(vcpu
);
4588 if (!is_guest_mode(vcpu
)) {
4589 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4590 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4591 vcpu
->run
->internal
.ndata
= 0;
4594 kvm_queue_exception(vcpu
, UD_VECTOR
);
4599 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4607 * if emulation was due to access to shadowed page table
4608 * and it failed try to unshadow page and re-entetr the
4609 * guest to let CPU execute the instruction.
4611 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4614 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4616 if (gpa
== UNMAPPED_GVA
)
4617 return true; /* let cpu generate fault */
4619 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4625 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
4632 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4633 bool writeback
= true;
4635 kvm_clear_exception_queue(vcpu
);
4637 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4638 init_emulate_ctxt(vcpu
);
4639 ctxt
->interruptibility
= 0;
4640 ctxt
->have_exception
= false;
4641 ctxt
->perm_ok
= false;
4643 ctxt
->only_vendor_specific_insn
4644 = emulation_type
& EMULTYPE_TRAP_UD
;
4646 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
4648 trace_kvm_emulate_insn_start(vcpu
);
4649 ++vcpu
->stat
.insn_emulation
;
4651 if (emulation_type
& EMULTYPE_TRAP_UD
)
4652 return EMULATE_FAIL
;
4653 if (reexecute_instruction(vcpu
, cr2
))
4654 return EMULATE_DONE
;
4655 if (emulation_type
& EMULTYPE_SKIP
)
4656 return EMULATE_FAIL
;
4657 return handle_emulation_failure(vcpu
);
4661 if (emulation_type
& EMULTYPE_SKIP
) {
4662 kvm_rip_write(vcpu
, ctxt
->_eip
);
4663 return EMULATE_DONE
;
4666 /* this is needed for vmware backdoor interface to work since it
4667 changes registers values during IO operation */
4668 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
4669 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
4670 memcpy(ctxt
->regs
, vcpu
->arch
.regs
, sizeof ctxt
->regs
);
4674 r
= x86_emulate_insn(ctxt
);
4676 if (r
== EMULATION_INTERCEPTED
)
4677 return EMULATE_DONE
;
4679 if (r
== EMULATION_FAILED
) {
4680 if (reexecute_instruction(vcpu
, cr2
))
4681 return EMULATE_DONE
;
4683 return handle_emulation_failure(vcpu
);
4686 if (ctxt
->have_exception
) {
4687 inject_emulated_exception(vcpu
);
4689 } else if (vcpu
->arch
.pio
.count
) {
4690 if (!vcpu
->arch
.pio
.in
)
4691 vcpu
->arch
.pio
.count
= 0;
4694 r
= EMULATE_DO_MMIO
;
4695 } else if (vcpu
->mmio_needed
) {
4696 if (!vcpu
->mmio_is_write
)
4698 r
= EMULATE_DO_MMIO
;
4699 } else if (r
== EMULATION_RESTART
)
4705 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
4706 kvm_set_rflags(vcpu
, ctxt
->eflags
);
4707 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4708 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
4709 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
4710 kvm_rip_write(vcpu
, ctxt
->eip
);
4712 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
4716 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
4718 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4720 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4721 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
4722 size
, port
, &val
, 1);
4723 /* do not return to emulator after return from userspace */
4724 vcpu
->arch
.pio
.count
= 0;
4727 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4729 static void tsc_bad(void *info
)
4731 __this_cpu_write(cpu_tsc_khz
, 0);
4734 static void tsc_khz_changed(void *data
)
4736 struct cpufreq_freqs
*freq
= data
;
4737 unsigned long khz
= 0;
4741 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4742 khz
= cpufreq_quick_get(raw_smp_processor_id());
4745 __this_cpu_write(cpu_tsc_khz
, khz
);
4748 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4751 struct cpufreq_freqs
*freq
= data
;
4753 struct kvm_vcpu
*vcpu
;
4754 int i
, send_ipi
= 0;
4757 * We allow guests to temporarily run on slowing clocks,
4758 * provided we notify them after, or to run on accelerating
4759 * clocks, provided we notify them before. Thus time never
4762 * However, we have a problem. We can't atomically update
4763 * the frequency of a given CPU from this function; it is
4764 * merely a notifier, which can be called from any CPU.
4765 * Changing the TSC frequency at arbitrary points in time
4766 * requires a recomputation of local variables related to
4767 * the TSC for each VCPU. We must flag these local variables
4768 * to be updated and be sure the update takes place with the
4769 * new frequency before any guests proceed.
4771 * Unfortunately, the combination of hotplug CPU and frequency
4772 * change creates an intractable locking scenario; the order
4773 * of when these callouts happen is undefined with respect to
4774 * CPU hotplug, and they can race with each other. As such,
4775 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4776 * undefined; you can actually have a CPU frequency change take
4777 * place in between the computation of X and the setting of the
4778 * variable. To protect against this problem, all updates of
4779 * the per_cpu tsc_khz variable are done in an interrupt
4780 * protected IPI, and all callers wishing to update the value
4781 * must wait for a synchronous IPI to complete (which is trivial
4782 * if the caller is on the CPU already). This establishes the
4783 * necessary total order on variable updates.
4785 * Note that because a guest time update may take place
4786 * anytime after the setting of the VCPU's request bit, the
4787 * correct TSC value must be set before the request. However,
4788 * to ensure the update actually makes it to any guest which
4789 * starts running in hardware virtualization between the set
4790 * and the acquisition of the spinlock, we must also ping the
4791 * CPU after setting the request bit.
4795 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4797 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4800 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4802 raw_spin_lock(&kvm_lock
);
4803 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4804 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4805 if (vcpu
->cpu
!= freq
->cpu
)
4807 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4808 if (vcpu
->cpu
!= smp_processor_id())
4812 raw_spin_unlock(&kvm_lock
);
4814 if (freq
->old
< freq
->new && send_ipi
) {
4816 * We upscale the frequency. Must make the guest
4817 * doesn't see old kvmclock values while running with
4818 * the new frequency, otherwise we risk the guest sees
4819 * time go backwards.
4821 * In case we update the frequency for another cpu
4822 * (which might be in guest context) send an interrupt
4823 * to kick the cpu out of guest context. Next time
4824 * guest context is entered kvmclock will be updated,
4825 * so the guest will not see stale values.
4827 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4832 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4833 .notifier_call
= kvmclock_cpufreq_notifier
4836 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4837 unsigned long action
, void *hcpu
)
4839 unsigned int cpu
= (unsigned long)hcpu
;
4843 case CPU_DOWN_FAILED
:
4844 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4846 case CPU_DOWN_PREPARE
:
4847 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4853 static struct notifier_block kvmclock_cpu_notifier_block
= {
4854 .notifier_call
= kvmclock_cpu_notifier
,
4855 .priority
= -INT_MAX
4858 static void kvm_timer_init(void)
4862 max_tsc_khz
= tsc_khz
;
4863 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4864 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4865 #ifdef CONFIG_CPU_FREQ
4866 struct cpufreq_policy policy
;
4867 memset(&policy
, 0, sizeof(policy
));
4869 cpufreq_get_policy(&policy
, cpu
);
4870 if (policy
.cpuinfo
.max_freq
)
4871 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
4874 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4875 CPUFREQ_TRANSITION_NOTIFIER
);
4877 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
4878 for_each_online_cpu(cpu
)
4879 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4882 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4884 static int kvm_is_in_guest(void)
4886 return percpu_read(current_vcpu
) != NULL
;
4889 static int kvm_is_user_mode(void)
4893 if (percpu_read(current_vcpu
))
4894 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4896 return user_mode
!= 0;
4899 static unsigned long kvm_get_guest_ip(void)
4901 unsigned long ip
= 0;
4903 if (percpu_read(current_vcpu
))
4904 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4909 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4910 .is_in_guest
= kvm_is_in_guest
,
4911 .is_user_mode
= kvm_is_user_mode
,
4912 .get_guest_ip
= kvm_get_guest_ip
,
4915 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4917 percpu_write(current_vcpu
, vcpu
);
4919 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4921 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4923 percpu_write(current_vcpu
, NULL
);
4925 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4927 int kvm_arch_init(void *opaque
)
4930 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4933 printk(KERN_ERR
"kvm: already loaded the other module\n");
4938 if (!ops
->cpu_has_kvm_support()) {
4939 printk(KERN_ERR
"kvm: no hardware support\n");
4943 if (ops
->disabled_by_bios()) {
4944 printk(KERN_ERR
"kvm: disabled by bios\n");
4949 r
= kvm_mmu_module_init();
4953 kvm_init_msr_list();
4956 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4957 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4958 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4962 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4965 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4973 void kvm_arch_exit(void)
4975 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4977 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4978 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4979 CPUFREQ_TRANSITION_NOTIFIER
);
4980 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4982 kvm_mmu_module_exit();
4985 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4987 ++vcpu
->stat
.halt_exits
;
4988 if (irqchip_in_kernel(vcpu
->kvm
)) {
4989 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4992 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4996 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4998 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
5001 if (is_long_mode(vcpu
))
5004 return a0
| ((gpa_t
)a1
<< 32);
5007 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
5009 u64 param
, ingpa
, outgpa
, ret
;
5010 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
5011 bool fast
, longmode
;
5015 * hypercall generates UD from non zero cpl and real mode
5018 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
5019 kvm_queue_exception(vcpu
, UD_VECTOR
);
5023 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5024 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
5027 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
5028 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
5029 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
5030 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
5031 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
5032 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
5034 #ifdef CONFIG_X86_64
5036 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5037 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5038 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5042 code
= param
& 0xffff;
5043 fast
= (param
>> 16) & 0x1;
5044 rep_cnt
= (param
>> 32) & 0xfff;
5045 rep_idx
= (param
>> 48) & 0xfff;
5047 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
5050 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
5051 kvm_vcpu_on_spin(vcpu
);
5054 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
5058 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
5060 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5062 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
5063 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
5069 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
5071 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
5074 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
5075 return kvm_hv_hypercall(vcpu
);
5077 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5078 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5079 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5080 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5081 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5083 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
5085 if (!is_long_mode(vcpu
)) {
5093 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
5099 case KVM_HC_VAPIC_POLL_IRQ
:
5103 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
5110 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
5111 ++vcpu
->stat
.hypercalls
;
5114 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
5116 int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
5118 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5119 char instruction
[3];
5120 unsigned long rip
= kvm_rip_read(vcpu
);
5123 * Blow out the MMU to ensure that no other VCPU has an active mapping
5124 * to ensure that the updated hypercall appears atomically across all
5127 kvm_mmu_zap_all(vcpu
->kvm
);
5129 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
5131 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
5134 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
5136 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
5137 int j
, nent
= vcpu
->arch
.cpuid_nent
;
5139 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
5140 /* when no next entry is found, the current entry[i] is reselected */
5141 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
5142 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
5143 if (ej
->function
== e
->function
) {
5144 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
5148 return 0; /* silence gcc, even though control never reaches here */
5151 /* find an entry with matching function, matching index (if needed), and that
5152 * should be read next (if it's stateful) */
5153 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
5154 u32 function
, u32 index
)
5156 if (e
->function
!= function
)
5158 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
5160 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
5161 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
5166 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
5167 u32 function
, u32 index
)
5170 struct kvm_cpuid_entry2
*best
= NULL
;
5172 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
5173 struct kvm_cpuid_entry2
*e
;
5175 e
= &vcpu
->arch
.cpuid_entries
[i
];
5176 if (is_matching_cpuid_entry(e
, function
, index
)) {
5177 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
5178 move_to_next_stateful_cpuid_entry(vcpu
, i
);
5185 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
5187 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
5189 struct kvm_cpuid_entry2
*best
;
5191 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
5192 if (!best
|| best
->eax
< 0x80000008)
5194 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
5196 return best
->eax
& 0xff;
5202 * If no match is found, check whether we exceed the vCPU's limit
5203 * and return the content of the highest valid _standard_ leaf instead.
5204 * This is to satisfy the CPUID specification.
5206 static struct kvm_cpuid_entry2
* check_cpuid_limit(struct kvm_vcpu
*vcpu
,
5207 u32 function
, u32 index
)
5209 struct kvm_cpuid_entry2
*maxlevel
;
5211 maxlevel
= kvm_find_cpuid_entry(vcpu
, function
& 0x80000000, 0);
5212 if (!maxlevel
|| maxlevel
->eax
>= function
)
5214 if (function
& 0x80000000) {
5215 maxlevel
= kvm_find_cpuid_entry(vcpu
, 0, 0);
5219 return kvm_find_cpuid_entry(vcpu
, maxlevel
->eax
, index
);
5222 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
5224 u32 function
, index
;
5225 struct kvm_cpuid_entry2
*best
;
5227 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5228 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5229 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
5230 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
5231 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
5232 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
5233 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
5236 best
= check_cpuid_limit(vcpu
, function
, index
);
5239 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
5240 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
5241 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
5242 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
5244 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5245 trace_kvm_cpuid(function
,
5246 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
5247 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
5248 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
5249 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
5251 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
5254 * Check if userspace requested an interrupt window, and that the
5255 * interrupt window is open.
5257 * No need to exit to userspace if we already have an interrupt queued.
5259 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
5261 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
5262 vcpu
->run
->request_interrupt_window
&&
5263 kvm_arch_interrupt_allowed(vcpu
));
5266 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
5268 struct kvm_run
*kvm_run
= vcpu
->run
;
5270 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
5271 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
5272 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
5273 if (irqchip_in_kernel(vcpu
->kvm
))
5274 kvm_run
->ready_for_interrupt_injection
= 1;
5276 kvm_run
->ready_for_interrupt_injection
=
5277 kvm_arch_interrupt_allowed(vcpu
) &&
5278 !kvm_cpu_has_interrupt(vcpu
) &&
5279 !kvm_event_needs_reinjection(vcpu
);
5282 static void vapic_enter(struct kvm_vcpu
*vcpu
)
5284 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5287 if (!apic
|| !apic
->vapic_addr
)
5290 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5292 vcpu
->arch
.apic
->vapic_page
= page
;
5295 static void vapic_exit(struct kvm_vcpu
*vcpu
)
5297 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
5300 if (!apic
|| !apic
->vapic_addr
)
5303 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5304 kvm_release_page_dirty(apic
->vapic_page
);
5305 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
5306 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5309 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
5313 if (!kvm_x86_ops
->update_cr8_intercept
)
5316 if (!vcpu
->arch
.apic
)
5319 if (!vcpu
->arch
.apic
->vapic_addr
)
5320 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
5327 tpr
= kvm_lapic_get_cr8(vcpu
);
5329 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
5332 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
5334 /* try to reinject previous events if any */
5335 if (vcpu
->arch
.exception
.pending
) {
5336 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
5337 vcpu
->arch
.exception
.has_error_code
,
5338 vcpu
->arch
.exception
.error_code
);
5339 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
5340 vcpu
->arch
.exception
.has_error_code
,
5341 vcpu
->arch
.exception
.error_code
,
5342 vcpu
->arch
.exception
.reinject
);
5346 if (vcpu
->arch
.nmi_injected
) {
5347 kvm_x86_ops
->set_nmi(vcpu
);
5351 if (vcpu
->arch
.interrupt
.pending
) {
5352 kvm_x86_ops
->set_irq(vcpu
);
5356 /* try to inject new event if pending */
5357 if (vcpu
->arch
.nmi_pending
) {
5358 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
5359 vcpu
->arch
.nmi_pending
= false;
5360 vcpu
->arch
.nmi_injected
= true;
5361 kvm_x86_ops
->set_nmi(vcpu
);
5363 } else if (kvm_cpu_has_interrupt(vcpu
)) {
5364 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
5365 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
5367 kvm_x86_ops
->set_irq(vcpu
);
5372 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
5374 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
5375 !vcpu
->guest_xcr0_loaded
) {
5376 /* kvm_set_xcr() also depends on this */
5377 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
5378 vcpu
->guest_xcr0_loaded
= 1;
5382 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
5384 if (vcpu
->guest_xcr0_loaded
) {
5385 if (vcpu
->arch
.xcr0
!= host_xcr0
)
5386 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
5387 vcpu
->guest_xcr0_loaded
= 0;
5391 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
5395 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
5396 vcpu
->run
->request_interrupt_window
;
5398 if (vcpu
->requests
) {
5399 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
5400 kvm_mmu_unload(vcpu
);
5401 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
5402 __kvm_migrate_timers(vcpu
);
5403 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
5404 r
= kvm_guest_time_update(vcpu
);
5408 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
5409 kvm_mmu_sync_roots(vcpu
);
5410 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
5411 kvm_x86_ops
->tlb_flush(vcpu
);
5412 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
5413 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
5417 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
5418 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
5422 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
5423 vcpu
->fpu_active
= 0;
5424 kvm_x86_ops
->fpu_deactivate(vcpu
);
5426 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
5427 /* Page is swapped out. Do synthetic halt */
5428 vcpu
->arch
.apf
.halted
= true;
5434 r
= kvm_mmu_reload(vcpu
);
5439 * An NMI can be injected between local nmi_pending read and
5440 * vcpu->arch.nmi_pending read inside inject_pending_event().
5441 * But in that case, KVM_REQ_EVENT will be set, which makes
5442 * the race described above benign.
5444 nmi_pending
= ACCESS_ONCE(vcpu
->arch
.nmi_pending
);
5446 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
5447 inject_pending_event(vcpu
);
5449 /* enable NMI/IRQ window open exits if needed */
5451 kvm_x86_ops
->enable_nmi_window(vcpu
);
5452 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5453 kvm_x86_ops
->enable_irq_window(vcpu
);
5455 if (kvm_lapic_enabled(vcpu
)) {
5456 update_cr8_intercept(vcpu
);
5457 kvm_lapic_sync_to_vapic(vcpu
);
5463 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5464 if (vcpu
->fpu_active
)
5465 kvm_load_guest_fpu(vcpu
);
5466 kvm_load_guest_xcr0(vcpu
);
5468 vcpu
->mode
= IN_GUEST_MODE
;
5470 /* We should set ->mode before check ->requests,
5471 * see the comment in make_all_cpus_request.
5475 local_irq_disable();
5477 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
5478 || need_resched() || signal_pending(current
)) {
5479 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5483 kvm_x86_ops
->cancel_injection(vcpu
);
5488 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5492 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5494 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5495 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5496 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5497 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5500 trace_kvm_entry(vcpu
->vcpu_id
);
5501 kvm_x86_ops
->run(vcpu
);
5504 * If the guest has used debug registers, at least dr7
5505 * will be disabled while returning to the host.
5506 * If we don't have active breakpoints in the host, we don't
5507 * care about the messed up debug address registers. But if
5508 * we have some of them active, restore the old state.
5510 if (hw_breakpoint_active())
5511 hw_breakpoint_restore();
5513 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5515 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
5522 * We must have an instruction between local_irq_enable() and
5523 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5524 * the interrupt shadow. The stat.exits increment will do nicely.
5525 * But we need to prevent reordering, hence this barrier():
5533 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5536 * Profile KVM exit RIPs:
5538 if (unlikely(prof_on
== KVM_PROFILING
)) {
5539 unsigned long rip
= kvm_rip_read(vcpu
);
5540 profile_hit(KVM_PROFILING
, (void *)rip
);
5544 kvm_lapic_sync_from_vapic(vcpu
);
5546 r
= kvm_x86_ops
->handle_exit(vcpu
);
5552 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5555 struct kvm
*kvm
= vcpu
->kvm
;
5557 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5558 pr_debug("vcpu %d received sipi with vector # %x\n",
5559 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5560 kvm_lapic_reset(vcpu
);
5561 r
= kvm_arch_vcpu_reset(vcpu
);
5564 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5567 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5572 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
5573 !vcpu
->arch
.apf
.halted
)
5574 r
= vcpu_enter_guest(vcpu
);
5576 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5577 kvm_vcpu_block(vcpu
);
5578 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5579 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5581 switch(vcpu
->arch
.mp_state
) {
5582 case KVM_MP_STATE_HALTED
:
5583 vcpu
->arch
.mp_state
=
5584 KVM_MP_STATE_RUNNABLE
;
5585 case KVM_MP_STATE_RUNNABLE
:
5586 vcpu
->arch
.apf
.halted
= false;
5588 case KVM_MP_STATE_SIPI_RECEIVED
:
5599 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5600 if (kvm_cpu_has_pending_timer(vcpu
))
5601 kvm_inject_pending_timer_irqs(vcpu
);
5603 if (dm_request_for_irq_injection(vcpu
)) {
5605 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5606 ++vcpu
->stat
.request_irq_exits
;
5609 kvm_check_async_pf_completion(vcpu
);
5611 if (signal_pending(current
)) {
5613 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5614 ++vcpu
->stat
.signal_exits
;
5616 if (need_resched()) {
5617 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5619 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5623 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5630 static int complete_mmio(struct kvm_vcpu
*vcpu
)
5632 struct kvm_run
*run
= vcpu
->run
;
5635 if (!(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
))
5638 if (vcpu
->mmio_needed
) {
5639 vcpu
->mmio_needed
= 0;
5640 if (!vcpu
->mmio_is_write
)
5641 memcpy(vcpu
->mmio_data
+ vcpu
->mmio_index
,
5643 vcpu
->mmio_index
+= 8;
5644 if (vcpu
->mmio_index
< vcpu
->mmio_size
) {
5645 run
->exit_reason
= KVM_EXIT_MMIO
;
5646 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
+ vcpu
->mmio_index
;
5647 memcpy(run
->mmio
.data
, vcpu
->mmio_data
+ vcpu
->mmio_index
, 8);
5648 run
->mmio
.len
= min(vcpu
->mmio_size
- vcpu
->mmio_index
, 8);
5649 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
5650 vcpu
->mmio_needed
= 1;
5653 if (vcpu
->mmio_is_write
)
5655 vcpu
->mmio_read_completed
= 1;
5657 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5658 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
5659 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5660 if (r
!= EMULATE_DONE
)
5665 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5670 if (!tsk_used_math(current
) && init_fpu(current
))
5673 if (vcpu
->sigset_active
)
5674 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5676 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5677 kvm_vcpu_block(vcpu
);
5678 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5683 /* re-sync apic's tpr */
5684 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5685 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
5691 r
= complete_mmio(vcpu
);
5695 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5696 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5697 kvm_run
->hypercall
.ret
);
5699 r
= __vcpu_run(vcpu
);
5702 post_kvm_run_save(vcpu
);
5703 if (vcpu
->sigset_active
)
5704 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5709 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5711 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
5713 * We are here if userspace calls get_regs() in the middle of
5714 * instruction emulation. Registers state needs to be copied
5715 * back from emulation context to vcpu. Usrapace shouldn't do
5716 * that usually, but some bad designed PV devices (vmware
5717 * backdoor interface) need this to work
5719 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5720 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
5721 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5723 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5724 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5725 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5726 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5727 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5728 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5729 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5730 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5731 #ifdef CONFIG_X86_64
5732 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5733 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5734 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5735 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5736 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5737 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5738 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5739 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5742 regs
->rip
= kvm_rip_read(vcpu
);
5743 regs
->rflags
= kvm_get_rflags(vcpu
);
5748 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5750 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
5751 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5753 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5754 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5755 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5756 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5757 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5758 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5759 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5760 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5761 #ifdef CONFIG_X86_64
5762 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5763 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5764 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5765 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5766 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5767 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5768 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5769 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5772 kvm_rip_write(vcpu
, regs
->rip
);
5773 kvm_set_rflags(vcpu
, regs
->rflags
);
5775 vcpu
->arch
.exception
.pending
= false;
5777 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5782 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5784 struct kvm_segment cs
;
5786 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5790 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5792 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5793 struct kvm_sregs
*sregs
)
5797 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5798 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5799 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5800 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5801 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5802 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5804 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5805 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5807 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5808 sregs
->idt
.limit
= dt
.size
;
5809 sregs
->idt
.base
= dt
.address
;
5810 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5811 sregs
->gdt
.limit
= dt
.size
;
5812 sregs
->gdt
.base
= dt
.address
;
5814 sregs
->cr0
= kvm_read_cr0(vcpu
);
5815 sregs
->cr2
= vcpu
->arch
.cr2
;
5816 sregs
->cr3
= kvm_read_cr3(vcpu
);
5817 sregs
->cr4
= kvm_read_cr4(vcpu
);
5818 sregs
->cr8
= kvm_get_cr8(vcpu
);
5819 sregs
->efer
= vcpu
->arch
.efer
;
5820 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5822 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5824 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5825 set_bit(vcpu
->arch
.interrupt
.nr
,
5826 (unsigned long *)sregs
->interrupt_bitmap
);
5831 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5832 struct kvm_mp_state
*mp_state
)
5834 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5838 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5839 struct kvm_mp_state
*mp_state
)
5841 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5842 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5846 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5847 bool has_error_code
, u32 error_code
)
5849 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5852 init_emulate_ctxt(vcpu
);
5854 ret
= emulator_task_switch(ctxt
, tss_selector
, reason
,
5855 has_error_code
, error_code
);
5858 return EMULATE_FAIL
;
5860 memcpy(vcpu
->arch
.regs
, ctxt
->regs
, sizeof ctxt
->regs
);
5861 kvm_rip_write(vcpu
, ctxt
->eip
);
5862 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5863 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5864 return EMULATE_DONE
;
5866 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5868 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5869 struct kvm_sregs
*sregs
)
5871 int mmu_reset_needed
= 0;
5872 int pending_vec
, max_bits
, idx
;
5875 dt
.size
= sregs
->idt
.limit
;
5876 dt
.address
= sregs
->idt
.base
;
5877 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5878 dt
.size
= sregs
->gdt
.limit
;
5879 dt
.address
= sregs
->gdt
.base
;
5880 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5882 vcpu
->arch
.cr2
= sregs
->cr2
;
5883 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
5884 vcpu
->arch
.cr3
= sregs
->cr3
;
5885 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
5887 kvm_set_cr8(vcpu
, sregs
->cr8
);
5889 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5890 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5891 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5893 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5894 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5895 vcpu
->arch
.cr0
= sregs
->cr0
;
5897 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5898 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5899 if (sregs
->cr4
& X86_CR4_OSXSAVE
)
5902 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5903 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5904 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
5905 mmu_reset_needed
= 1;
5907 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5909 if (mmu_reset_needed
)
5910 kvm_mmu_reset_context(vcpu
);
5912 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5913 pending_vec
= find_first_bit(
5914 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5915 if (pending_vec
< max_bits
) {
5916 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5917 pr_debug("Set back pending irq %d\n", pending_vec
);
5920 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5921 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5922 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5923 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5924 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5925 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5927 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5928 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5930 update_cr8_intercept(vcpu
);
5932 /* Older userspace won't unhalt the vcpu on reset. */
5933 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5934 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5936 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5938 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5943 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5944 struct kvm_guest_debug
*dbg
)
5946 unsigned long rflags
;
5949 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5951 if (vcpu
->arch
.exception
.pending
)
5953 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5954 kvm_queue_exception(vcpu
, DB_VECTOR
);
5956 kvm_queue_exception(vcpu
, BP_VECTOR
);
5960 * Read rflags as long as potentially injected trace flags are still
5963 rflags
= kvm_get_rflags(vcpu
);
5965 vcpu
->guest_debug
= dbg
->control
;
5966 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5967 vcpu
->guest_debug
= 0;
5969 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5970 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5971 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5972 vcpu
->arch
.switch_db_regs
=
5973 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5975 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5976 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5977 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5980 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5981 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5982 get_segment_base(vcpu
, VCPU_SREG_CS
);
5985 * Trigger an rflags update that will inject or remove the trace
5988 kvm_set_rflags(vcpu
, rflags
);
5990 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
6000 * Translate a guest virtual address to a guest physical address.
6002 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
6003 struct kvm_translation
*tr
)
6005 unsigned long vaddr
= tr
->linear_address
;
6009 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6010 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
6011 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6012 tr
->physical_address
= gpa
;
6013 tr
->valid
= gpa
!= UNMAPPED_GVA
;
6020 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6022 struct i387_fxsave_struct
*fxsave
=
6023 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6025 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
6026 fpu
->fcw
= fxsave
->cwd
;
6027 fpu
->fsw
= fxsave
->swd
;
6028 fpu
->ftwx
= fxsave
->twd
;
6029 fpu
->last_opcode
= fxsave
->fop
;
6030 fpu
->last_ip
= fxsave
->rip
;
6031 fpu
->last_dp
= fxsave
->rdp
;
6032 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
6037 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
6039 struct i387_fxsave_struct
*fxsave
=
6040 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
6042 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
6043 fxsave
->cwd
= fpu
->fcw
;
6044 fxsave
->swd
= fpu
->fsw
;
6045 fxsave
->twd
= fpu
->ftwx
;
6046 fxsave
->fop
= fpu
->last_opcode
;
6047 fxsave
->rip
= fpu
->last_ip
;
6048 fxsave
->rdp
= fpu
->last_dp
;
6049 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
6054 int fx_init(struct kvm_vcpu
*vcpu
)
6058 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
6062 fpu_finit(&vcpu
->arch
.guest_fpu
);
6065 * Ensure guest xcr0 is valid for loading
6067 vcpu
->arch
.xcr0
= XSTATE_FP
;
6069 vcpu
->arch
.cr0
|= X86_CR0_ET
;
6073 EXPORT_SYMBOL_GPL(fx_init
);
6075 static void fx_free(struct kvm_vcpu
*vcpu
)
6077 fpu_free(&vcpu
->arch
.guest_fpu
);
6080 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
6082 if (vcpu
->guest_fpu_loaded
)
6086 * Restore all possible states in the guest,
6087 * and assume host would use all available bits.
6088 * Guest xcr0 would be loaded later.
6090 kvm_put_guest_xcr0(vcpu
);
6091 vcpu
->guest_fpu_loaded
= 1;
6092 unlazy_fpu(current
);
6093 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
6097 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
6099 kvm_put_guest_xcr0(vcpu
);
6101 if (!vcpu
->guest_fpu_loaded
)
6104 vcpu
->guest_fpu_loaded
= 0;
6105 fpu_save_init(&vcpu
->arch
.guest_fpu
);
6106 ++vcpu
->stat
.fpu_reload
;
6107 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
6111 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
6113 kvmclock_reset(vcpu
);
6115 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
6117 kvm_x86_ops
->vcpu_free(vcpu
);
6120 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
6123 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
6124 printk_once(KERN_WARNING
6125 "kvm: SMP vm created on host with unstable TSC; "
6126 "guest TSC will not be reliable\n");
6127 return kvm_x86_ops
->vcpu_create(kvm
, id
);
6130 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
6134 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
6136 r
= kvm_arch_vcpu_reset(vcpu
);
6138 r
= kvm_mmu_setup(vcpu
);
6144 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
6146 vcpu
->arch
.apf
.msr_val
= 0;
6149 kvm_mmu_unload(vcpu
);
6153 kvm_x86_ops
->vcpu_free(vcpu
);
6156 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
6158 vcpu
->arch
.nmi_pending
= false;
6159 vcpu
->arch
.nmi_injected
= false;
6161 vcpu
->arch
.switch_db_regs
= 0;
6162 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
6163 vcpu
->arch
.dr6
= DR6_FIXED_1
;
6164 vcpu
->arch
.dr7
= DR7_FIXED_1
;
6166 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6167 vcpu
->arch
.apf
.msr_val
= 0;
6169 kvmclock_reset(vcpu
);
6171 kvm_clear_async_pf_completion_queue(vcpu
);
6172 kvm_async_pf_hash_reset(vcpu
);
6173 vcpu
->arch
.apf
.halted
= false;
6175 return kvm_x86_ops
->vcpu_reset(vcpu
);
6178 int kvm_arch_hardware_enable(void *garbage
)
6181 struct kvm_vcpu
*vcpu
;
6184 kvm_shared_msr_cpu_online();
6185 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6186 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6187 if (vcpu
->cpu
== smp_processor_id())
6188 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6189 return kvm_x86_ops
->hardware_enable(garbage
);
6192 void kvm_arch_hardware_disable(void *garbage
)
6194 kvm_x86_ops
->hardware_disable(garbage
);
6195 drop_user_return_notifiers(garbage
);
6198 int kvm_arch_hardware_setup(void)
6200 return kvm_x86_ops
->hardware_setup();
6203 void kvm_arch_hardware_unsetup(void)
6205 kvm_x86_ops
->hardware_unsetup();
6208 void kvm_arch_check_processor_compat(void *rtn
)
6210 kvm_x86_ops
->check_processor_compatibility(rtn
);
6213 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
6219 BUG_ON(vcpu
->kvm
== NULL
);
6222 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
6223 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
6224 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
6225 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
6226 vcpu
->arch
.nested_mmu
.translate_gpa
= translate_nested_gpa
;
6227 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
6228 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
6230 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
6232 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
6237 vcpu
->arch
.pio_data
= page_address(page
);
6239 kvm_init_tsc_catchup(vcpu
, max_tsc_khz
);
6241 r
= kvm_mmu_create(vcpu
);
6243 goto fail_free_pio_data
;
6245 if (irqchip_in_kernel(kvm
)) {
6246 r
= kvm_create_lapic(vcpu
);
6248 goto fail_mmu_destroy
;
6251 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
6253 if (!vcpu
->arch
.mce_banks
) {
6255 goto fail_free_lapic
;
6257 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
6259 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
6260 goto fail_free_mce_banks
;
6262 kvm_async_pf_hash_reset(vcpu
);
6265 fail_free_mce_banks
:
6266 kfree(vcpu
->arch
.mce_banks
);
6268 kvm_free_lapic(vcpu
);
6270 kvm_mmu_destroy(vcpu
);
6272 free_page((unsigned long)vcpu
->arch
.pio_data
);
6277 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
6281 kfree(vcpu
->arch
.mce_banks
);
6282 kvm_free_lapic(vcpu
);
6283 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6284 kvm_mmu_destroy(vcpu
);
6285 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6286 free_page((unsigned long)vcpu
->arch
.pio_data
);
6289 int kvm_arch_init_vm(struct kvm
*kvm
)
6291 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
6292 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
6294 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6295 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
6297 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
6302 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
6305 kvm_mmu_unload(vcpu
);
6309 static void kvm_free_vcpus(struct kvm
*kvm
)
6312 struct kvm_vcpu
*vcpu
;
6315 * Unpin any mmu pages first.
6317 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6318 kvm_clear_async_pf_completion_queue(vcpu
);
6319 kvm_unload_vcpu_mmu(vcpu
);
6321 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6322 kvm_arch_vcpu_free(vcpu
);
6324 mutex_lock(&kvm
->lock
);
6325 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
6326 kvm
->vcpus
[i
] = NULL
;
6328 atomic_set(&kvm
->online_vcpus
, 0);
6329 mutex_unlock(&kvm
->lock
);
6332 void kvm_arch_sync_events(struct kvm
*kvm
)
6334 kvm_free_all_assigned_devices(kvm
);
6338 void kvm_arch_destroy_vm(struct kvm
*kvm
)
6340 kvm_iommu_unmap_guest(kvm
);
6341 kfree(kvm
->arch
.vpic
);
6342 kfree(kvm
->arch
.vioapic
);
6343 kvm_free_vcpus(kvm
);
6344 if (kvm
->arch
.apic_access_page
)
6345 put_page(kvm
->arch
.apic_access_page
);
6346 if (kvm
->arch
.ept_identity_pagetable
)
6347 put_page(kvm
->arch
.ept_identity_pagetable
);
6350 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
6351 struct kvm_memory_slot
*memslot
,
6352 struct kvm_memory_slot old
,
6353 struct kvm_userspace_memory_region
*mem
,
6356 int npages
= memslot
->npages
;
6357 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
6359 /* Prevent internal slot pages from being moved by fork()/COW. */
6360 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
6361 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
6363 /*To keep backward compatibility with older userspace,
6364 *x86 needs to hanlde !user_alloc case.
6367 if (npages
&& !old
.rmap
) {
6368 unsigned long userspace_addr
;
6370 down_write(¤t
->mm
->mmap_sem
);
6371 userspace_addr
= do_mmap(NULL
, 0,
6373 PROT_READ
| PROT_WRITE
,
6376 up_write(¤t
->mm
->mmap_sem
);
6378 if (IS_ERR((void *)userspace_addr
))
6379 return PTR_ERR((void *)userspace_addr
);
6381 memslot
->userspace_addr
= userspace_addr
;
6389 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
6390 struct kvm_userspace_memory_region
*mem
,
6391 struct kvm_memory_slot old
,
6395 int nr_mmu_pages
= 0, npages
= mem
->memory_size
>> PAGE_SHIFT
;
6397 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
6400 down_write(¤t
->mm
->mmap_sem
);
6401 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
6402 old
.npages
* PAGE_SIZE
);
6403 up_write(¤t
->mm
->mmap_sem
);
6406 "kvm_vm_ioctl_set_memory_region: "
6407 "failed to munmap memory\n");
6410 if (!kvm
->arch
.n_requested_mmu_pages
)
6411 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
6413 spin_lock(&kvm
->mmu_lock
);
6415 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
6416 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
6417 spin_unlock(&kvm
->mmu_lock
);
6420 void kvm_arch_flush_shadow(struct kvm
*kvm
)
6422 kvm_mmu_zap_all(kvm
);
6423 kvm_reload_remote_mmus(kvm
);
6426 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
6428 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6429 !vcpu
->arch
.apf
.halted
)
6430 || !list_empty_careful(&vcpu
->async_pf
.done
)
6431 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
6432 || vcpu
->arch
.nmi_pending
||
6433 (kvm_arch_interrupt_allowed(vcpu
) &&
6434 kvm_cpu_has_interrupt(vcpu
));
6437 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
6440 int cpu
= vcpu
->cpu
;
6442 if (waitqueue_active(&vcpu
->wq
)) {
6443 wake_up_interruptible(&vcpu
->wq
);
6444 ++vcpu
->stat
.halt_wakeup
;
6448 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
6449 if (kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
)
6450 smp_send_reschedule(cpu
);
6454 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
6456 return kvm_x86_ops
->interrupt_allowed(vcpu
);
6459 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
6461 unsigned long current_rip
= kvm_rip_read(vcpu
) +
6462 get_segment_base(vcpu
, VCPU_SREG_CS
);
6464 return current_rip
== linear_rip
;
6466 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
6468 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
6470 unsigned long rflags
;
6472 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6473 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
6474 rflags
&= ~X86_EFLAGS_TF
;
6477 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
6479 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
6481 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
6482 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
6483 rflags
|= X86_EFLAGS_TF
;
6484 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
6485 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6487 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
6489 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
6493 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
6494 is_error_page(work
->page
))
6497 r
= kvm_mmu_reload(vcpu
);
6501 if (!vcpu
->arch
.mmu
.direct_map
&&
6502 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
6505 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
6508 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
6510 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
6513 static inline u32
kvm_async_pf_next_probe(u32 key
)
6515 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
6518 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6520 u32 key
= kvm_async_pf_hash_fn(gfn
);
6522 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
6523 key
= kvm_async_pf_next_probe(key
);
6525 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
6528 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6531 u32 key
= kvm_async_pf_hash_fn(gfn
);
6533 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
6534 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
6535 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
6536 key
= kvm_async_pf_next_probe(key
);
6541 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6543 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
6546 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
6550 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
6552 vcpu
->arch
.apf
.gfns
[i
] = ~0;
6554 j
= kvm_async_pf_next_probe(j
);
6555 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
6557 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
6559 * k lies cyclically in ]i,j]
6561 * |....j i.k.| or |.k..j i...|
6563 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
6564 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
6569 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
6572 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
6576 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
6577 struct kvm_async_pf
*work
)
6579 struct x86_exception fault
;
6581 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
6582 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6584 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
6585 (vcpu
->arch
.apf
.send_user_only
&&
6586 kvm_x86_ops
->get_cpl(vcpu
) == 0))
6587 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
6588 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
6589 fault
.vector
= PF_VECTOR
;
6590 fault
.error_code_valid
= true;
6591 fault
.error_code
= 0;
6592 fault
.nested_page_fault
= false;
6593 fault
.address
= work
->arch
.token
;
6594 kvm_inject_page_fault(vcpu
, &fault
);
6598 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
6599 struct kvm_async_pf
*work
)
6601 struct x86_exception fault
;
6603 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
6604 if (is_error_page(work
->page
))
6605 work
->arch
.token
= ~0; /* broadcast wakeup */
6607 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
6609 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
6610 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
6611 fault
.vector
= PF_VECTOR
;
6612 fault
.error_code_valid
= true;
6613 fault
.error_code
= 0;
6614 fault
.nested_page_fault
= false;
6615 fault
.address
= work
->arch
.token
;
6616 kvm_inject_page_fault(vcpu
, &fault
);
6618 vcpu
->arch
.apf
.halted
= false;
6621 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
6623 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
6626 return !kvm_event_needs_reinjection(vcpu
) &&
6627 kvm_x86_ops
->interrupt_allowed(vcpu
);
6630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
6631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
6632 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
6633 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
6634 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
6635 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
6636 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
6637 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
6638 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
6639 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
6640 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
6641 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);