include/asm-i386/mpspec.h

   1 #ifndef __ASM_MPSPEC_H
   2 #define __ASM_MPSPEC_H
   3
   4 #include <linux/cpumask.h>
   5 #include <asm/mpspec_def.h>
   6 #include <mach_mpspec.h>
   7
   8 extern int mp_bus_id_to_type [MAX_MP_BUSSES];
   9 extern int mp_bus_id_to_node [MAX_MP_BUSSES];
  10 extern int mp_bus_id_to_local [MAX_MP_BUSSES];
  11 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
  12 extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
  13
  14 extern unsigned int def_to_bigsmp;
  15 extern unsigned int boot_cpu_physical_apicid;
  16 extern int smp_found_config;
  17 extern void find_smp_config (void);
  18 extern void get_smp_config (void);
  19 extern int nr_ioapics;
  20 extern int apic_version [MAX_APICS];
  21 extern int mp_irq_entries;
  22 extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
  23 extern int mpc_default_type;
  24 extern unsigned long mp_lapic_addr;
  25 extern int pic_mode;
  26
  27 #ifdef CONFIG_ACPI
  28 extern void mp_register_lapic (u8 id, u8 enabled);
  29 extern void mp_register_lapic_address (u64 address);
  30 extern void mp_register_ioapic (u8 id, u32 address, u32 gsi_base);
  31 extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 gsi);
  32 extern void mp_config_acpi_legacy_irqs (void);
  33 extern int mp_register_gsi (u32 gsi, int edge_level, int active_high_low);
  34 #endif /* CONFIG_ACPI */
  35
  36 #define PHYSID_ARRAY_SIZE       BITS_TO_LONGS(MAX_APICS)
  37
  38 struct physid_mask
  39 {
  40         unsigned long mask[PHYSID_ARRAY_SIZE];
  41 };
  42
  43 typedef struct physid_mask physid_mask_t;
  44
  45 #define physid_set(physid, map)                 set_bit(physid, (map).mask)
  46 #define physid_clear(physid, map)               clear_bit(physid, (map).mask)
  47 #define physid_isset(physid, map)               test_bit(physid, (map).mask)
  48 #define physid_test_and_set(physid, map)        test_and_set_bit(physid, (map).mask)
  49
  50 #define physids_and(dst, src1, src2)            bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
  51 #define physids_or(dst, src1, src2)             bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
  52 #define physids_clear(map)                      bitmap_zero((map).mask, MAX_APICS)
  53 #define physids_complement(dst, src)            bitmap_complement((dst).mask,(src).mask, MAX_APICS)
  54 #define physids_empty(map)                      bitmap_empty((map).mask, MAX_APICS)
  55 #define physids_equal(map1, map2)               bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
  56 #define physids_weight(map)                     bitmap_weight((map).mask, MAX_APICS)
  57 #define physids_shift_right(d, s, n)            bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
  58 #define physids_shift_left(d, s, n)             bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
  59 #define physids_coerce(map)                     ((map).mask[0])
  60
  61 #define physids_promote(physids)                                                \
  62         ({                                                                      \
  63                 physid_mask_t __physid_mask = PHYSID_MASK_NONE;                 \
  64                 __physid_mask.mask[0] = physids;                                \
  65                 __physid_mask;                                                  \
  66         })
  67
  68 #define physid_mask_of_physid(physid)                                           \
  69         ({                                                                      \
  70                 physid_mask_t __physid_mask = PHYSID_MASK_NONE;                 \
  71                 physid_set(physid, __physid_mask);                              \
  72                 __physid_mask;                                                  \
  73         })
  74
  75 #define PHYSID_MASK_ALL         { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
  76 #define PHYSID_MASK_NONE        { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
  77
  78 extern physid_mask_t phys_cpu_present_map;
  79
  80 #endif
  81