2 * Copyright (C) 2000-2007, Axis Communications AB.
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
9 #include <linux/errno.h>
10 #include <linux/ptrace.h>
11 #include <linux/user.h>
12 #include <linux/signal.h>
13 #include <linux/security.h>
15 #include <asm/uaccess.h>
17 #include <asm/pgtable.h>
18 #include <asm/system.h>
19 #include <asm/processor.h>
20 #include <arch/hwregs/supp_reg.h>
23 * Determines which bits in CCS the user has access to.
24 * 1 = access, 0 = no access.
26 #define CCS_MASK 0x00087c00 /* SXNZVC */
28 #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
30 static int put_debugreg(long pid
, unsigned int regno
, long data
);
31 static long get_debugreg(long pid
, unsigned int regno
);
32 static unsigned long get_pseudo_pc(struct task_struct
*child
);
33 void deconfigure_bp(long pid
);
35 extern unsigned long cris_signal_return_page
;
38 * Get contents of register REGNO in task TASK.
40 long get_reg(struct task_struct
*task
, unsigned int regno
)
42 /* USP is a special case, it's not in the pt_regs struct but
43 * in the tasks thread struct
48 ret
= ((unsigned long *)task_pt_regs(task
))[regno
];
49 else if (regno
== PT_USP
)
50 ret
= task
->thread
.usp
;
51 else if (regno
== PT_PPC
)
52 ret
= get_pseudo_pc(task
);
53 else if (regno
<= PT_MAX
)
54 ret
= get_debugreg(task
->pid
, regno
);
62 * Write contents of register REGNO in task TASK.
64 int put_reg(struct task_struct
*task
, unsigned int regno
, unsigned long data
)
67 ((unsigned long *)task_pt_regs(task
))[regno
] = data
;
68 else if (regno
== PT_USP
)
69 task
->thread
.usp
= data
;
70 else if (regno
== PT_PPC
) {
71 /* Write pseudo-PC to ERP only if changed. */
72 if (data
!= get_pseudo_pc(task
))
73 task_pt_regs(task
)->erp
= data
;
74 } else if (regno
<= PT_MAX
)
75 return put_debugreg(task
->pid
, regno
, data
);
81 void user_enable_single_step(struct task_struct
*child
)
86 * Set up SPC if not set already (in which case we have no other
87 * choice but to trust it).
89 if (!get_reg(child
, PT_SPC
)) {
90 /* In case we're stopped in a delay slot. */
91 tmp
= get_reg(child
, PT_ERP
) & ~1;
92 put_reg(child
, PT_SPC
, tmp
);
94 tmp
= get_reg(child
, PT_CCS
) | SBIT_USER
;
95 put_reg(child
, PT_CCS
, tmp
);
98 void user_disable_single_step(struct task_struct
*child
)
100 put_reg(child
, PT_SPC
, 0);
102 if (!get_debugreg(child
->pid
, PT_BP_CTRL
)) {
104 /* If no h/w bp configured, disable S bit. */
105 tmp
= get_reg(child
, PT_CCS
) & ~SBIT_USER
;
106 put_reg(child
, PT_CCS
, tmp
);
111 * Called by kernel/ptrace.c when detaching.
113 * Make sure the single step bit is not set.
116 ptrace_disable(struct task_struct
*child
)
120 /* Deconfigure SPC and S-bit. */
121 user_disable_single_step(child
);
122 put_reg(child
, PT_SPC
, 0);
124 /* Deconfigure any watchpoints associated with the child. */
125 deconfigure_bp(child
->pid
);
129 long arch_ptrace(struct task_struct
*child
, long request
,
130 unsigned long addr
, unsigned long data
)
133 unsigned long __user
*datap
= (unsigned long __user
*)data
;
136 /* Read word at location address. */
137 case PTRACE_PEEKTEXT
:
138 case PTRACE_PEEKDATA
: {
144 /* The signal trampoline page is outside the normal user-addressable
145 * space but still accessible. This is hack to make it possible to
146 * access the signal handler code in GDB.
148 if ((addr
& PAGE_MASK
) == cris_signal_return_page
) {
149 /* The trampoline page is globally mapped, no page table to traverse.*/
150 tmp
= *(unsigned long*)addr
;
152 copied
= access_process_vm(child
, addr
, &tmp
, sizeof(tmp
), 0);
154 if (copied
!= sizeof(tmp
))
158 ret
= put_user(tmp
,datap
);
162 /* Read the word at location address in the USER area. */
163 case PTRACE_PEEKUSR
: {
167 if ((addr
& 3) || addr
< 0 || addr
> PT_MAX
<< 2)
170 tmp
= get_reg(child
, addr
>> 2);
171 ret
= put_user(tmp
, datap
);
175 /* Write the word at location address. */
176 case PTRACE_POKETEXT
:
177 case PTRACE_POKEDATA
:
178 ret
= generic_ptrace_pokedata(child
, addr
, data
);
181 /* Write the word at location address in the USER area. */
184 if ((addr
& 3) || addr
< 0 || addr
> PT_MAX
<< 2)
189 if (addr
== PT_CCS
) {
190 /* don't allow the tracing process to change stuff like
191 * interrupt enable, kernel/user bit, dma enables etc.
194 data
|= get_reg(child
, PT_CCS
) & ~CCS_MASK
;
196 if (put_reg(child
, addr
, data
))
201 /* Get all GP registers from the child. */
202 case PTRACE_GETREGS
: {
206 for (i
= 0; i
<= PT_MAX
; i
++) {
207 tmp
= get_reg(child
, i
);
209 if (put_user(tmp
, datap
)) {
221 /* Set all GP registers in the child. */
222 case PTRACE_SETREGS
: {
226 for (i
= 0; i
<= PT_MAX
; i
++) {
227 if (get_user(tmp
, datap
)) {
234 tmp
|= get_reg(child
, PT_CCS
) & ~CCS_MASK
;
237 put_reg(child
, i
, tmp
);
246 ret
= ptrace_request(child
, request
, addr
, data
);
254 void do_syscall_trace(void)
256 if (!test_thread_flag(TIF_SYSCALL_TRACE
))
259 if (!(current
->ptrace
& PT_PTRACED
))
262 /* the 0x80 provides a way for the tracing parent to distinguish
263 between a syscall stop and SIGTRAP delivery */
264 ptrace_notify(SIGTRAP
| ((current
->ptrace
& PT_TRACESYSGOOD
)
268 * This isn't the same as continuing with a signal, but it will do for
271 if (current
->exit_code
) {
272 send_sig(current
->exit_code
, current
, 1);
273 current
->exit_code
= 0;
277 /* Returns the size of an instruction that has a delay slot. */
279 static int insn_size(struct task_struct
*child
, unsigned long pc
)
281 unsigned long opcode
;
285 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
286 copied
= access_process_vm(child
, pc
, &opcode
, sizeof(opcode
), 0);
287 if (copied
!= sizeof(opcode
))
290 switch ((opcode
& 0x0f00) >> 8) {
301 /* Could be 4 or 6; check more bits. */
302 if ((opcode
& 0xff) == 0xff)
308 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
315 static unsigned long get_pseudo_pc(struct task_struct
*child
)
317 /* Default value for PC is ERP. */
318 unsigned long pc
= get_reg(child
, PT_ERP
);
321 unsigned long spc
= get_reg(child
, PT_SPC
);
322 /* Delay slot bit set. Report as stopped on proper
325 /* Rely on SPC if set. FIXME: We might want to check
326 that EXS indicates we stopped due to a single-step
330 /* Calculate the PC from the size of the instruction
331 that the delay slot we're in belongs to. */
332 pc
+= insn_size(child
, pc
& ~1) - 1;
338 static long bp_owner
= 0;
340 /* Reachable from exit_thread in signal.c, so not static. */
341 void deconfigure_bp(long pid
)
345 /* Only deconfigure if the pid is the owner. */
349 for (bp
= 0; bp
< 6; bp
++) {
351 /* Deconfigure start and end address (also gets rid of ownership). */
352 put_debugreg(pid
, PT_BP
+ 3 + (bp
* 2), 0);
353 put_debugreg(pid
, PT_BP
+ 4 + (bp
* 2), 0);
355 /* Deconfigure relevant bits in control register. */
356 tmp
= get_debugreg(pid
, PT_BP_CTRL
) & ~(3 << (2 + (bp
* 4)));
357 put_debugreg(pid
, PT_BP_CTRL
, tmp
);
363 static int put_debugreg(long pid
, unsigned int regno
, long data
)
366 register int old_srs
;
368 #ifdef CONFIG_ETRAX_KGDB
369 /* Ignore write, but pretend it was ok if value is 0
370 (we don't want POKEUSR/SETREGS failing unnessecarily). */
371 return (data
== 0) ? ret
: -1;
374 /* Simple owner management. */
377 else if (bp_owner
!= pid
) {
378 /* Ignore write, but pretend it was ok if value is 0
379 (we don't want POKEUSR/SETREGS failing unnessecarily). */
380 return (data
== 0) ? ret
: -1;
383 /* Remember old SRS. */
384 SPEC_REG_RD(SPEC_REG_SRS
, old_srs
);
385 /* Switch to BP bank. */
386 SUPP_BANK_SEL(BANK_BP
);
388 switch (regno
- PT_BP
) {
390 SUPP_REG_WR(0, data
); break;
397 SUPP_REG_WR(3, data
); break;
399 SUPP_REG_WR(4, data
); break;
401 SUPP_REG_WR(5, data
); break;
403 SUPP_REG_WR(6, data
); break;
405 SUPP_REG_WR(7, data
); break;
407 SUPP_REG_WR(8, data
); break;
409 SUPP_REG_WR(9, data
); break;
411 SUPP_REG_WR(10, data
); break;
413 SUPP_REG_WR(11, data
); break;
415 SUPP_REG_WR(12, data
); break;
417 SUPP_REG_WR(13, data
); break;
419 SUPP_REG_WR(14, data
); break;
426 SPEC_REG_WR(SPEC_REG_SRS
, old_srs
);
435 static long get_debugreg(long pid
, unsigned int regno
)
437 register int old_srs
;
440 if (pid
!= bp_owner
) {
444 /* Remember old SRS. */
445 SPEC_REG_RD(SPEC_REG_SRS
, old_srs
);
446 /* Switch to BP bank. */
447 SUPP_BANK_SEL(BANK_BP
);
449 switch (regno
- PT_BP
) {
451 SUPP_REG_RD(0, data
); break;
454 /* error return value? */
458 SUPP_REG_RD(3, data
); break;
460 SUPP_REG_RD(4, data
); break;
462 SUPP_REG_RD(5, data
); break;
464 SUPP_REG_RD(6, data
); break;
466 SUPP_REG_RD(7, data
); break;
468 SUPP_REG_RD(8, data
); break;
470 SUPP_REG_RD(9, data
); break;
472 SUPP_REG_RD(10, data
); break;
474 SUPP_REG_RD(11, data
); break;
476 SUPP_REG_RD(12, data
); break;
478 SUPP_REG_RD(13, data
); break;
480 SUPP_REG_RD(14, data
); break;
482 /* error return value? */
487 SPEC_REG_WR(SPEC_REG_SRS
, old_srs
);