ptrace: change signature of arch_ptrace()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / cris / arch-v32 / kernel / ptrace.c
blob3e058a1217535d6047f27d709206004061501a15
1 /*
2 * Copyright (C) 2000-2007, Axis Communications AB.
3 */
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
7 #include <linux/mm.h>
8 #include <linux/smp.h>
9 #include <linux/errno.h>
10 #include <linux/ptrace.h>
11 #include <linux/user.h>
12 #include <linux/signal.h>
13 #include <linux/security.h>
15 #include <asm/uaccess.h>
16 #include <asm/page.h>
17 #include <asm/pgtable.h>
18 #include <asm/system.h>
19 #include <asm/processor.h>
20 #include <arch/hwregs/supp_reg.h>
23 * Determines which bits in CCS the user has access to.
24 * 1 = access, 0 = no access.
26 #define CCS_MASK 0x00087c00 /* SXNZVC */
28 #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
30 static int put_debugreg(long pid, unsigned int regno, long data);
31 static long get_debugreg(long pid, unsigned int regno);
32 static unsigned long get_pseudo_pc(struct task_struct *child);
33 void deconfigure_bp(long pid);
35 extern unsigned long cris_signal_return_page;
38 * Get contents of register REGNO in task TASK.
40 long get_reg(struct task_struct *task, unsigned int regno)
42 /* USP is a special case, it's not in the pt_regs struct but
43 * in the tasks thread struct
45 unsigned long ret;
47 if (regno <= PT_EDA)
48 ret = ((unsigned long *)task_pt_regs(task))[regno];
49 else if (regno == PT_USP)
50 ret = task->thread.usp;
51 else if (regno == PT_PPC)
52 ret = get_pseudo_pc(task);
53 else if (regno <= PT_MAX)
54 ret = get_debugreg(task->pid, regno);
55 else
56 ret = 0;
58 return ret;
62 * Write contents of register REGNO in task TASK.
64 int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
66 if (regno <= PT_EDA)
67 ((unsigned long *)task_pt_regs(task))[regno] = data;
68 else if (regno == PT_USP)
69 task->thread.usp = data;
70 else if (regno == PT_PPC) {
71 /* Write pseudo-PC to ERP only if changed. */
72 if (data != get_pseudo_pc(task))
73 task_pt_regs(task)->erp = data;
74 } else if (regno <= PT_MAX)
75 return put_debugreg(task->pid, regno, data);
76 else
77 return -1;
78 return 0;
81 void user_enable_single_step(struct task_struct *child)
83 unsigned long tmp;
86 * Set up SPC if not set already (in which case we have no other
87 * choice but to trust it).
89 if (!get_reg(child, PT_SPC)) {
90 /* In case we're stopped in a delay slot. */
91 tmp = get_reg(child, PT_ERP) & ~1;
92 put_reg(child, PT_SPC, tmp);
94 tmp = get_reg(child, PT_CCS) | SBIT_USER;
95 put_reg(child, PT_CCS, tmp);
98 void user_disable_single_step(struct task_struct *child)
100 put_reg(child, PT_SPC, 0);
102 if (!get_debugreg(child->pid, PT_BP_CTRL)) {
103 unsigned long tmp;
104 /* If no h/w bp configured, disable S bit. */
105 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
106 put_reg(child, PT_CCS, tmp);
111 * Called by kernel/ptrace.c when detaching.
113 * Make sure the single step bit is not set.
115 void
116 ptrace_disable(struct task_struct *child)
118 unsigned long tmp;
120 /* Deconfigure SPC and S-bit. */
121 user_disable_single_step(child);
122 put_reg(child, PT_SPC, 0);
124 /* Deconfigure any watchpoints associated with the child. */
125 deconfigure_bp(child->pid);
129 long arch_ptrace(struct task_struct *child, long request,
130 unsigned long addr, unsigned long data)
132 int ret;
133 unsigned long __user *datap = (unsigned long __user *)data;
135 switch (request) {
136 /* Read word at location address. */
137 case PTRACE_PEEKTEXT:
138 case PTRACE_PEEKDATA: {
139 unsigned long tmp;
140 int copied;
142 ret = -EIO;
144 /* The signal trampoline page is outside the normal user-addressable
145 * space but still accessible. This is hack to make it possible to
146 * access the signal handler code in GDB.
148 if ((addr & PAGE_MASK) == cris_signal_return_page) {
149 /* The trampoline page is globally mapped, no page table to traverse.*/
150 tmp = *(unsigned long*)addr;
151 } else {
152 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
154 if (copied != sizeof(tmp))
155 break;
158 ret = put_user(tmp,datap);
159 break;
162 /* Read the word at location address in the USER area. */
163 case PTRACE_PEEKUSR: {
164 unsigned long tmp;
166 ret = -EIO;
167 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
168 break;
170 tmp = get_reg(child, addr >> 2);
171 ret = put_user(tmp, datap);
172 break;
175 /* Write the word at location address. */
176 case PTRACE_POKETEXT:
177 case PTRACE_POKEDATA:
178 ret = generic_ptrace_pokedata(child, addr, data);
179 break;
181 /* Write the word at location address in the USER area. */
182 case PTRACE_POKEUSR:
183 ret = -EIO;
184 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
185 break;
187 addr >>= 2;
189 if (addr == PT_CCS) {
190 /* don't allow the tracing process to change stuff like
191 * interrupt enable, kernel/user bit, dma enables etc.
193 data &= CCS_MASK;
194 data |= get_reg(child, PT_CCS) & ~CCS_MASK;
196 if (put_reg(child, addr, data))
197 break;
198 ret = 0;
199 break;
201 /* Get all GP registers from the child. */
202 case PTRACE_GETREGS: {
203 int i;
204 unsigned long tmp;
206 for (i = 0; i <= PT_MAX; i++) {
207 tmp = get_reg(child, i);
209 if (put_user(tmp, datap)) {
210 ret = -EFAULT;
211 goto out_tsk;
214 datap++;
217 ret = 0;
218 break;
221 /* Set all GP registers in the child. */
222 case PTRACE_SETREGS: {
223 int i;
224 unsigned long tmp;
226 for (i = 0; i <= PT_MAX; i++) {
227 if (get_user(tmp, datap)) {
228 ret = -EFAULT;
229 goto out_tsk;
232 if (i == PT_CCS) {
233 tmp &= CCS_MASK;
234 tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
237 put_reg(child, i, tmp);
238 datap++;
241 ret = 0;
242 break;
245 default:
246 ret = ptrace_request(child, request, addr, data);
247 break;
250 out_tsk:
251 return ret;
254 void do_syscall_trace(void)
256 if (!test_thread_flag(TIF_SYSCALL_TRACE))
257 return;
259 if (!(current->ptrace & PT_PTRACED))
260 return;
262 /* the 0x80 provides a way for the tracing parent to distinguish
263 between a syscall stop and SIGTRAP delivery */
264 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
265 ? 0x80 : 0));
268 * This isn't the same as continuing with a signal, but it will do for
269 * normal use.
271 if (current->exit_code) {
272 send_sig(current->exit_code, current, 1);
273 current->exit_code = 0;
277 /* Returns the size of an instruction that has a delay slot. */
279 static int insn_size(struct task_struct *child, unsigned long pc)
281 unsigned long opcode;
282 int copied;
283 int opsize = 0;
285 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
286 copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
287 if (copied != sizeof(opcode))
288 return 0;
290 switch ((opcode & 0x0f00) >> 8) {
291 case 0x0:
292 case 0x9:
293 case 0xb:
294 opsize = 2;
295 break;
296 case 0xe:
297 case 0xf:
298 opsize = 6;
299 break;
300 case 0xd:
301 /* Could be 4 or 6; check more bits. */
302 if ((opcode & 0xff) == 0xff)
303 opsize = 4;
304 else
305 opsize = 6;
306 break;
307 default:
308 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
309 opcode, pc);
312 return opsize;
315 static unsigned long get_pseudo_pc(struct task_struct *child)
317 /* Default value for PC is ERP. */
318 unsigned long pc = get_reg(child, PT_ERP);
320 if (pc & 0x1) {
321 unsigned long spc = get_reg(child, PT_SPC);
322 /* Delay slot bit set. Report as stopped on proper
323 instruction. */
324 if (spc) {
325 /* Rely on SPC if set. FIXME: We might want to check
326 that EXS indicates we stopped due to a single-step
327 exception. */
328 pc = spc;
329 } else {
330 /* Calculate the PC from the size of the instruction
331 that the delay slot we're in belongs to. */
332 pc += insn_size(child, pc & ~1) - 1;
335 return pc;
338 static long bp_owner = 0;
340 /* Reachable from exit_thread in signal.c, so not static. */
341 void deconfigure_bp(long pid)
343 int bp;
345 /* Only deconfigure if the pid is the owner. */
346 if (bp_owner != pid)
347 return;
349 for (bp = 0; bp < 6; bp++) {
350 unsigned long tmp;
351 /* Deconfigure start and end address (also gets rid of ownership). */
352 put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
353 put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
355 /* Deconfigure relevant bits in control register. */
356 tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
357 put_debugreg(pid, PT_BP_CTRL, tmp);
359 /* No owner now. */
360 bp_owner = 0;
363 static int put_debugreg(long pid, unsigned int regno, long data)
365 int ret = 0;
366 register int old_srs;
368 #ifdef CONFIG_ETRAX_KGDB
369 /* Ignore write, but pretend it was ok if value is 0
370 (we don't want POKEUSR/SETREGS failing unnessecarily). */
371 return (data == 0) ? ret : -1;
372 #endif
374 /* Simple owner management. */
375 if (!bp_owner)
376 bp_owner = pid;
377 else if (bp_owner != pid) {
378 /* Ignore write, but pretend it was ok if value is 0
379 (we don't want POKEUSR/SETREGS failing unnessecarily). */
380 return (data == 0) ? ret : -1;
383 /* Remember old SRS. */
384 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
385 /* Switch to BP bank. */
386 SUPP_BANK_SEL(BANK_BP);
388 switch (regno - PT_BP) {
389 case 0:
390 SUPP_REG_WR(0, data); break;
391 case 1:
392 case 2:
393 if (data)
394 ret = -1;
395 break;
396 case 3:
397 SUPP_REG_WR(3, data); break;
398 case 4:
399 SUPP_REG_WR(4, data); break;
400 case 5:
401 SUPP_REG_WR(5, data); break;
402 case 6:
403 SUPP_REG_WR(6, data); break;
404 case 7:
405 SUPP_REG_WR(7, data); break;
406 case 8:
407 SUPP_REG_WR(8, data); break;
408 case 9:
409 SUPP_REG_WR(9, data); break;
410 case 10:
411 SUPP_REG_WR(10, data); break;
412 case 11:
413 SUPP_REG_WR(11, data); break;
414 case 12:
415 SUPP_REG_WR(12, data); break;
416 case 13:
417 SUPP_REG_WR(13, data); break;
418 case 14:
419 SUPP_REG_WR(14, data); break;
420 default:
421 ret = -1;
422 break;
425 /* Restore SRS. */
426 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
427 /* Just for show. */
428 NOP();
429 NOP();
430 NOP();
432 return ret;
435 static long get_debugreg(long pid, unsigned int regno)
437 register int old_srs;
438 register long data;
440 if (pid != bp_owner) {
441 return 0;
444 /* Remember old SRS. */
445 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
446 /* Switch to BP bank. */
447 SUPP_BANK_SEL(BANK_BP);
449 switch (regno - PT_BP) {
450 case 0:
451 SUPP_REG_RD(0, data); break;
452 case 1:
453 case 2:
454 /* error return value? */
455 data = 0;
456 break;
457 case 3:
458 SUPP_REG_RD(3, data); break;
459 case 4:
460 SUPP_REG_RD(4, data); break;
461 case 5:
462 SUPP_REG_RD(5, data); break;
463 case 6:
464 SUPP_REG_RD(6, data); break;
465 case 7:
466 SUPP_REG_RD(7, data); break;
467 case 8:
468 SUPP_REG_RD(8, data); break;
469 case 9:
470 SUPP_REG_RD(9, data); break;
471 case 10:
472 SUPP_REG_RD(10, data); break;
473 case 11:
474 SUPP_REG_RD(11, data); break;
475 case 12:
476 SUPP_REG_RD(12, data); break;
477 case 13:
478 SUPP_REG_RD(13, data); break;
479 case 14:
480 SUPP_REG_RD(14, data); break;
481 default:
482 /* error return value? */
483 data = 0;
486 /* Restore SRS. */
487 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
488 /* Just for show. */
489 NOP();
490 NOP();
491 NOP();
493 return data;