2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
24 #include <asm/sizes.h>
26 #include <sound/driver.h>
27 #include <sound/core.h>
28 #include <sound/initval.h>
29 #include <sound/ac97_codec.h>
30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h>
36 #define DRIVER_NAME "aaci-pl041"
39 * PM support is not complete. Turn it off.
43 static void aaci_ac97_select_codec(struct aaci
*aaci
, struct snd_ac97
*ac97
)
45 u32 v
, maincr
= aaci
->maincr
| MAINCR_SCRA(ac97
->num
);
48 * Ensure that the slot 1/2 RX registers are empty.
50 v
= readl(aaci
->base
+ AACI_SLFR
);
52 readl(aaci
->base
+ AACI_SL2RX
);
54 readl(aaci
->base
+ AACI_SL1RX
);
56 writel(maincr
, aaci
->base
+ AACI_MAINCR
);
61 * The recommended use of programming the external codec through slot 1
62 * and slot 2 data is to use the channels during setup routines and the
63 * slot register at any other time. The data written into slot 1, slot 2
64 * and slot 12 registers is transmitted only when their corresponding
65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
68 static void aaci_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
,
71 struct aaci
*aaci
= ac97
->private_data
;
78 mutex_lock(&aaci
->ac97_sem
);
80 aaci_ac97_select_codec(aaci
, ac97
);
83 * P54: You must ensure that AACI_SL2TX is always written
84 * to, if required, before data is written to AACI_SL1TX.
86 writel(val
<< 4, aaci
->base
+ AACI_SL2TX
);
87 writel(reg
<< 12, aaci
->base
+ AACI_SL1TX
);
90 * Wait for the transmission of both slots to complete.
93 v
= readl(aaci
->base
+ AACI_SLFR
);
94 } while ((v
& (SLFR_1TXB
|SLFR_2TXB
)) && timeout
--);
97 dev_err(&aaci
->dev
->dev
,
98 "timeout waiting for write to complete\n");
100 mutex_unlock(&aaci
->ac97_sem
);
104 * Read an AC'97 register.
106 static unsigned short aaci_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
108 struct aaci
*aaci
= ac97
->private_data
;
116 mutex_lock(&aaci
->ac97_sem
);
118 aaci_ac97_select_codec(aaci
, ac97
);
121 * Write the register address to slot 1.
123 writel((reg
<< 12) | (1 << 19), aaci
->base
+ AACI_SL1TX
);
126 * Wait for the transmission to complete.
129 v
= readl(aaci
->base
+ AACI_SLFR
);
130 } while ((v
& SLFR_1TXB
) && timeout
--);
133 dev_err(&aaci
->dev
->dev
, "timeout on slot 1 TX busy\n");
139 * Give the AC'97 codec more than enough time
140 * to respond. (42us = ~2 frames at 48kHz.)
145 * Wait for slot 2 to indicate data.
150 v
= readl(aaci
->base
+ AACI_SLFR
) & (SLFR_1RXV
|SLFR_2RXV
);
151 } while ((v
!= (SLFR_1RXV
|SLFR_2RXV
)) && timeout
--);
154 dev_err(&aaci
->dev
->dev
, "timeout on RX valid\n");
160 v
= readl(aaci
->base
+ AACI_SL1RX
) >> 12;
162 v
= readl(aaci
->base
+ AACI_SL2RX
) >> 4;
164 } else if (--retries
) {
165 dev_warn(&aaci
->dev
->dev
,
166 "ac97 read back fail. retry\n");
169 dev_warn(&aaci
->dev
->dev
,
170 "wrong ac97 register read back (%x != %x)\n",
176 mutex_unlock(&aaci
->ac97_sem
);
180 static inline void aaci_chan_wait_ready(struct aaci_runtime
*aacirun
)
186 val
= readl(aacirun
->base
+ AACI_SR
);
187 } while (val
& (SR_TXB
|SR_RXB
) && timeout
--);
195 static void aaci_fifo_irq(struct aaci
*aaci
, int channel
, u32 mask
)
197 if (mask
& ISR_ORINTR
) {
198 dev_warn(&aaci
->dev
->dev
, "RX overrun on chan %d\n", channel
);
199 writel(ICLR_RXOEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
202 if (mask
& ISR_RXTOINTR
) {
203 dev_warn(&aaci
->dev
->dev
, "RX timeout on chan %d\n", channel
);
204 writel(ICLR_RXTOFEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
207 if (mask
& ISR_RXINTR
) {
208 struct aaci_runtime
*aacirun
= &aaci
->capture
;
211 if (!aacirun
->substream
|| !aacirun
->start
) {
212 dev_warn(&aaci
->dev
->dev
, "RX interrupt???\n");
213 writel(0, aacirun
->base
+ AACI_IE
);
219 unsigned int len
= aacirun
->fifosz
;
222 if (aacirun
->bytes
<= 0) {
223 aacirun
->bytes
+= aacirun
->period
;
225 spin_unlock(&aaci
->lock
);
226 snd_pcm_period_elapsed(aacirun
->substream
);
227 spin_lock(&aaci
->lock
);
229 if (!(aacirun
->cr
& CR_EN
))
232 val
= readl(aacirun
->base
+ AACI_SR
);
233 if (!(val
& SR_RXHF
))
235 if (!(val
& SR_RXFF
))
238 aacirun
->bytes
-= len
;
240 /* reading 16 bytes at a time */
241 for( ; len
> 0; len
-= 16) {
243 "ldmia %1, {r0, r1, r2, r3}\n\t"
244 "stmia %0!, {r0, r1, r2, r3}"
246 : "r" (aacirun
->fifo
)
247 : "r0", "r1", "r2", "r3", "cc");
249 if (ptr
>= aacirun
->end
)
250 ptr
= aacirun
->start
;
256 if (mask
& ISR_URINTR
) {
257 dev_dbg(&aaci
->dev
->dev
, "TX underrun on chan %d\n", channel
);
258 writel(ICLR_TXUEC1
<< channel
, aaci
->base
+ AACI_INTCLR
);
261 if (mask
& ISR_TXINTR
) {
262 struct aaci_runtime
*aacirun
= &aaci
->playback
;
265 if (!aacirun
->substream
|| !aacirun
->start
) {
266 dev_warn(&aaci
->dev
->dev
, "TX interrupt???\n");
267 writel(0, aacirun
->base
+ AACI_IE
);
273 unsigned int len
= aacirun
->fifosz
;
276 if (aacirun
->bytes
<= 0) {
277 aacirun
->bytes
+= aacirun
->period
;
279 spin_unlock(&aaci
->lock
);
280 snd_pcm_period_elapsed(aacirun
->substream
);
281 spin_lock(&aaci
->lock
);
283 if (!(aacirun
->cr
& CR_EN
))
286 val
= readl(aacirun
->base
+ AACI_SR
);
287 if (!(val
& SR_TXHE
))
289 if (!(val
& SR_TXFE
))
292 aacirun
->bytes
-= len
;
294 /* writing 16 bytes at a time */
295 for ( ; len
> 0; len
-= 16) {
297 "ldmia %0!, {r0, r1, r2, r3}\n\t"
298 "stmia %1, {r0, r1, r2, r3}"
300 : "r" (aacirun
->fifo
)
301 : "r0", "r1", "r2", "r3", "cc");
303 if (ptr
>= aacirun
->end
)
304 ptr
= aacirun
->start
;
312 static irqreturn_t
aaci_irq(int irq
, void *devid
)
314 struct aaci
*aaci
= devid
;
318 spin_lock(&aaci
->lock
);
319 mask
= readl(aaci
->base
+ AACI_ALLINTS
);
322 for (i
= 0; i
< 4; i
++, m
>>= 7) {
324 aaci_fifo_irq(aaci
, i
, m
);
328 spin_unlock(&aaci
->lock
);
330 return mask
? IRQ_HANDLED
: IRQ_NONE
;
340 unsigned char codec_idx
;
341 unsigned char rate_idx
;
344 static struct aaci_stream aaci_streams
[] = {
347 .rate_idx
= AC97_RATES_FRONT_DAC
,
349 [ACSTREAM_SURROUND
] = {
351 .rate_idx
= AC97_RATES_SURR_DAC
,
355 .rate_idx
= AC97_RATES_LFE_DAC
,
359 static inline unsigned int aaci_rate_mask(struct aaci
*aaci
, int streamid
)
361 struct aaci_stream
*s
= aaci_streams
+ streamid
;
362 return aaci
->ac97_bus
->codec
[s
->codec_idx
]->rates
[s
->rate_idx
];
365 static unsigned int rate_list
[] = {
366 5512, 8000, 11025, 16000, 22050, 32000, 44100,
367 48000, 64000, 88200, 96000, 176400, 192000
371 * Double-rate rule: we can support double rate iff channels == 2
375 aaci_rule_rate_by_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
377 struct aaci
*aaci
= rule
->private;
378 unsigned int rate_mask
= SNDRV_PCM_RATE_8000_48000
|SNDRV_PCM_RATE_5512
;
379 struct snd_interval
*c
= hw_param_interval(p
, SNDRV_PCM_HW_PARAM_CHANNELS
);
383 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_LFE
);
385 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_SURROUND
);
387 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_FRONT
);
390 return snd_interval_list(hw_param_interval(p
, rule
->var
),
391 ARRAY_SIZE(rate_list
), rate_list
,
395 static struct snd_pcm_hardware aaci_hw_info
= {
396 .info
= SNDRV_PCM_INFO_MMAP
|
397 SNDRV_PCM_INFO_MMAP_VALID
|
398 SNDRV_PCM_INFO_INTERLEAVED
|
399 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
400 SNDRV_PCM_INFO_RESUME
,
403 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
404 * words. It also doesn't support 12-bit at all.
406 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
408 /* should this be continuous or knot? */
409 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
414 .buffer_bytes_max
= 64 * 1024,
415 .period_bytes_min
= 256,
416 .period_bytes_max
= PAGE_SIZE
,
418 .periods_max
= PAGE_SIZE
/ 16,
421 static int __aaci_pcm_open(struct aaci
*aaci
,
422 struct snd_pcm_substream
*substream
,
423 struct aaci_runtime
*aacirun
)
425 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
428 aacirun
->substream
= substream
;
429 runtime
->private_data
= aacirun
;
430 runtime
->hw
= aaci_hw_info
;
433 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
434 * mode, each 32-bit word contains one sample. If we're in
435 * compact mode, each 32-bit word contains two samples, effectively
436 * halving the FIFO size. However, we don't know for sure which
437 * we'll be using at this point. We set this to the lower limit.
439 runtime
->hw
.fifo_size
= aaci
->fifosize
* 2;
442 * Add rule describing hardware rate dependency
443 * on the number of channels.
445 ret
= snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
446 aaci_rule_rate_by_channels
, aaci
,
447 SNDRV_PCM_HW_PARAM_CHANNELS
,
448 SNDRV_PCM_HW_PARAM_RATE
, -1);
452 ret
= request_irq(aaci
->dev
->irq
[0], aaci_irq
, IRQF_SHARED
|IRQF_DISABLED
,
467 static int aaci_pcm_close(struct snd_pcm_substream
*substream
)
469 struct aaci
*aaci
= substream
->private_data
;
470 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
472 WARN_ON(aacirun
->cr
& CR_EN
);
474 aacirun
->substream
= NULL
;
475 free_irq(aaci
->dev
->irq
[0], aaci
);
480 static int aaci_pcm_hw_free(struct snd_pcm_substream
*substream
)
482 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
485 * This must not be called with the device enabled.
487 WARN_ON(aacirun
->cr
& CR_EN
);
489 if (aacirun
->pcm_open
)
490 snd_ac97_pcm_close(aacirun
->pcm
);
491 aacirun
->pcm_open
= 0;
494 * Clear out the DMA and any allocated buffers.
496 devdma_hw_free(NULL
, substream
);
501 static int aaci_pcm_hw_params(struct snd_pcm_substream
*substream
,
502 struct aaci_runtime
*aacirun
,
503 struct snd_pcm_hw_params
*params
)
507 aaci_pcm_hw_free(substream
);
509 err
= devdma_hw_alloc(NULL
, substream
,
510 params_buffer_bytes(params
));
514 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
515 err
= snd_ac97_pcm_open(aacirun
->pcm
, params_rate(params
),
516 params_channels(params
),
517 aacirun
->pcm
->r
[0].slots
);
519 err
= snd_ac97_pcm_open(aacirun
->pcm
, params_rate(params
),
520 params_channels(params
),
521 aacirun
->pcm
->r
[1].slots
);
526 aacirun
->pcm_open
= 1;
532 static int aaci_pcm_prepare(struct snd_pcm_substream
*substream
)
534 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
535 struct aaci_runtime
*aacirun
= runtime
->private_data
;
537 aacirun
->start
= (void *)runtime
->dma_area
;
538 aacirun
->end
= aacirun
->start
+ runtime
->dma_bytes
;
539 aacirun
->ptr
= aacirun
->start
;
541 aacirun
->bytes
= frames_to_bytes(runtime
, runtime
->period_size
);
546 static snd_pcm_uframes_t
aaci_pcm_pointer(struct snd_pcm_substream
*substream
)
548 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
549 struct aaci_runtime
*aacirun
= runtime
->private_data
;
550 ssize_t bytes
= aacirun
->ptr
- aacirun
->start
;
552 return bytes_to_frames(runtime
, bytes
);
555 static int aaci_pcm_mmap(struct snd_pcm_substream
*substream
, struct vm_area_struct
*vma
)
557 return devdma_mmap(NULL
, substream
, vma
);
562 * Playback specific ALSA stuff
564 static const u32 channels_to_txmask
[] = {
565 [2] = CR_SL3
| CR_SL4
,
566 [4] = CR_SL3
| CR_SL4
| CR_SL7
| CR_SL8
,
567 [6] = CR_SL3
| CR_SL4
| CR_SL7
| CR_SL8
| CR_SL6
| CR_SL9
,
571 * We can support two and four channel audio. Unfortunately
572 * six channel audio requires a non-standard channel ordering:
574 * 4 -> FL(3), FR(4), SL(7), SR(8)
575 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
576 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
577 * This requires an ALSA configuration file to correct.
579 static unsigned int channel_list
[] = { 2, 4, 6 };
582 aaci_rule_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
584 struct aaci
*aaci
= rule
->private;
585 unsigned int chan_mask
= 1 << 0, slots
;
588 * pcms[0] is the our 5.1 PCM instance.
590 slots
= aaci
->ac97_bus
->pcms
[0].r
[0].slots
;
591 if (slots
& (1 << AC97_SLOT_PCM_SLEFT
)) {
593 if (slots
& (1 << AC97_SLOT_LFE
))
597 return snd_interval_list(hw_param_interval(p
, rule
->var
),
598 ARRAY_SIZE(channel_list
), channel_list
,
602 static int aaci_pcm_open(struct snd_pcm_substream
*substream
)
604 struct aaci
*aaci
= substream
->private_data
;
608 * Add rule describing channel dependency.
610 ret
= snd_pcm_hw_rule_add(substream
->runtime
, 0,
611 SNDRV_PCM_HW_PARAM_CHANNELS
,
612 aaci_rule_channels
, aaci
,
613 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
617 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
618 ret
= __aaci_pcm_open(aaci
, substream
, &aaci
->playback
);
620 ret
= __aaci_pcm_open(aaci
, substream
, &aaci
->capture
);
625 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream
*substream
,
626 struct snd_pcm_hw_params
*params
)
628 struct aaci
*aaci
= substream
->private_data
;
629 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
630 unsigned int channels
= params_channels(params
);
633 WARN_ON(channels
>= ARRAY_SIZE(channels_to_txmask
) ||
634 !channels_to_txmask
[channels
]);
636 ret
= aaci_pcm_hw_params(substream
, aacirun
, params
);
639 * Enable FIFO, compact mode, 16 bits per sample.
640 * FIXME: double rate slots?
643 aacirun
->cr
= CR_FEN
| CR_COMPACT
| CR_SZ16
;
644 aacirun
->cr
|= channels_to_txmask
[channels
];
646 aacirun
->fifosz
= aaci
->fifosize
* 4;
647 if (aacirun
->cr
& CR_COMPACT
)
648 aacirun
->fifosz
>>= 1;
653 static void aaci_pcm_playback_stop(struct aaci_runtime
*aacirun
)
657 ie
= readl(aacirun
->base
+ AACI_IE
);
658 ie
&= ~(IE_URIE
|IE_TXIE
);
659 writel(ie
, aacirun
->base
+ AACI_IE
);
660 aacirun
->cr
&= ~CR_EN
;
661 aaci_chan_wait_ready(aacirun
);
662 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
665 static void aaci_pcm_playback_start(struct aaci_runtime
*aacirun
)
669 aaci_chan_wait_ready(aacirun
);
670 aacirun
->cr
|= CR_EN
;
672 ie
= readl(aacirun
->base
+ AACI_IE
);
673 ie
|= IE_URIE
| IE_TXIE
;
674 writel(ie
, aacirun
->base
+ AACI_IE
);
675 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
678 static int aaci_pcm_playback_trigger(struct snd_pcm_substream
*substream
, int cmd
)
680 struct aaci
*aaci
= substream
->private_data
;
681 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
685 spin_lock_irqsave(&aaci
->lock
, flags
);
687 case SNDRV_PCM_TRIGGER_START
:
688 aaci_pcm_playback_start(aacirun
);
691 case SNDRV_PCM_TRIGGER_RESUME
:
692 aaci_pcm_playback_start(aacirun
);
695 case SNDRV_PCM_TRIGGER_STOP
:
696 aaci_pcm_playback_stop(aacirun
);
699 case SNDRV_PCM_TRIGGER_SUSPEND
:
700 aaci_pcm_playback_stop(aacirun
);
703 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
706 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
712 spin_unlock_irqrestore(&aaci
->lock
, flags
);
717 static struct snd_pcm_ops aaci_playback_ops
= {
718 .open
= aaci_pcm_open
,
719 .close
= aaci_pcm_close
,
720 .ioctl
= snd_pcm_lib_ioctl
,
721 .hw_params
= aaci_pcm_playback_hw_params
,
722 .hw_free
= aaci_pcm_hw_free
,
723 .prepare
= aaci_pcm_prepare
,
724 .trigger
= aaci_pcm_playback_trigger
,
725 .pointer
= aaci_pcm_pointer
,
726 .mmap
= aaci_pcm_mmap
,
729 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream
*substream
,
730 struct snd_pcm_hw_params
*params
)
732 struct aaci
*aaci
= substream
->private_data
;
733 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
736 ret
= aaci_pcm_hw_params(substream
, aacirun
, params
);
739 aacirun
->cr
= CR_FEN
| CR_COMPACT
| CR_SZ16
;
741 /* Line in record: slot 3 and 4 */
742 aacirun
->cr
|= CR_SL3
| CR_SL4
;
744 aacirun
->fifosz
= aaci
->fifosize
* 4;
746 if (aacirun
->cr
& CR_COMPACT
)
747 aacirun
->fifosz
>>= 1;
752 static void aaci_pcm_capture_stop(struct aaci_runtime
*aacirun
)
756 aaci_chan_wait_ready(aacirun
);
758 ie
= readl(aacirun
->base
+ AACI_IE
);
759 ie
&= ~(IE_ORIE
| IE_RXIE
);
760 writel(ie
, aacirun
->base
+AACI_IE
);
762 aacirun
->cr
&= ~CR_EN
;
764 writel(aacirun
->cr
, aacirun
->base
+ AACI_RXCR
);
767 static void aaci_pcm_capture_start(struct aaci_runtime
*aacirun
)
771 aaci_chan_wait_ready(aacirun
);
774 /* RX Timeout value: bits 28:17 in RXCR */
775 aacirun
->cr
|= 0xf << 17;
778 aacirun
->cr
|= CR_EN
;
779 writel(aacirun
->cr
, aacirun
->base
+ AACI_RXCR
);
781 ie
= readl(aacirun
->base
+ AACI_IE
);
782 ie
|= IE_ORIE
|IE_RXIE
; // overrun and rx interrupt -- half full
783 writel(ie
, aacirun
->base
+ AACI_IE
);
786 static int aaci_pcm_capture_trigger(struct snd_pcm_substream
*substream
, int cmd
)
788 struct aaci
*aaci
= substream
->private_data
;
789 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
793 spin_lock_irqsave(&aaci
->lock
, flags
);
796 case SNDRV_PCM_TRIGGER_START
:
797 aaci_pcm_capture_start(aacirun
);
800 case SNDRV_PCM_TRIGGER_RESUME
:
801 aaci_pcm_capture_start(aacirun
);
804 case SNDRV_PCM_TRIGGER_STOP
:
805 aaci_pcm_capture_stop(aacirun
);
808 case SNDRV_PCM_TRIGGER_SUSPEND
:
809 aaci_pcm_capture_stop(aacirun
);
812 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
815 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
822 spin_unlock_irqrestore(&aaci
->lock
, flags
);
827 static int aaci_pcm_capture_prepare(struct snd_pcm_substream
*substream
)
829 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
830 struct aaci
*aaci
= substream
->private_data
;
832 aaci_pcm_prepare(substream
);
834 /* allow changing of sample rate */
835 aaci_ac97_write(aaci
->ac97
, AC97_EXTENDED_STATUS
, 0x0001); /* VRA */
836 aaci_ac97_write(aaci
->ac97
, AC97_PCM_LR_ADC_RATE
, runtime
->rate
);
837 aaci_ac97_write(aaci
->ac97
, AC97_PCM_MIC_ADC_RATE
, runtime
->rate
);
839 /* Record select: Mic: 0, Aux: 3, Line: 4 */
840 aaci_ac97_write(aaci
->ac97
, AC97_REC_SEL
, 0x0404);
845 static struct snd_pcm_ops aaci_capture_ops
= {
846 .open
= aaci_pcm_open
,
847 .close
= aaci_pcm_close
,
848 .ioctl
= snd_pcm_lib_ioctl
,
849 .hw_params
= aaci_pcm_capture_hw_params
,
850 .hw_free
= aaci_pcm_hw_free
,
851 .prepare
= aaci_pcm_capture_prepare
,
852 .trigger
= aaci_pcm_capture_trigger
,
853 .pointer
= aaci_pcm_pointer
,
854 .mmap
= aaci_pcm_mmap
,
861 static int aaci_do_suspend(struct snd_card
*card
, unsigned int state
)
863 struct aaci
*aaci
= card
->private_data
;
864 snd_power_change_state(card
, SNDRV_CTL_POWER_D3cold
);
865 snd_pcm_suspend_all(aaci
->pcm
);
869 static int aaci_do_resume(struct snd_card
*card
, unsigned int state
)
871 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
875 static int aaci_suspend(struct amba_device
*dev
, pm_message_t state
)
877 struct snd_card
*card
= amba_get_drvdata(dev
);
878 return card
? aaci_do_suspend(card
) : 0;
881 static int aaci_resume(struct amba_device
*dev
)
883 struct snd_card
*card
= amba_get_drvdata(dev
);
884 return card
? aaci_do_resume(card
) : 0;
887 #define aaci_do_suspend NULL
888 #define aaci_do_resume NULL
889 #define aaci_suspend NULL
890 #define aaci_resume NULL
894 static struct ac97_pcm ac97_defs
[] __devinitdata
= {
895 [0] = { /* Front PCM */
899 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
900 (1 << AC97_SLOT_PCM_RIGHT
) |
901 (1 << AC97_SLOT_PCM_CENTER
) |
902 (1 << AC97_SLOT_PCM_SLEFT
) |
903 (1 << AC97_SLOT_PCM_SRIGHT
) |
904 (1 << AC97_SLOT_LFE
),
913 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
914 (1 << AC97_SLOT_PCM_RIGHT
),
923 .slots
= (1 << AC97_SLOT_MIC
),
929 static struct snd_ac97_bus_ops aaci_bus_ops
= {
930 .write
= aaci_ac97_write
,
931 .read
= aaci_ac97_read
,
934 static int __devinit
aaci_probe_ac97(struct aaci
*aaci
)
936 struct snd_ac97_template ac97_template
;
937 struct snd_ac97_bus
*ac97_bus
;
938 struct snd_ac97
*ac97
;
942 * Assert AACIRESET for 2us
944 writel(0, aaci
->base
+ AACI_RESET
);
946 writel(RESET_NRST
, aaci
->base
+ AACI_RESET
);
949 * Give the AC'97 codec more than enough time
950 * to wake up. (42us = ~2 frames at 48kHz.)
954 ret
= snd_ac97_bus(aaci
->card
, 0, &aaci_bus_ops
, aaci
, &ac97_bus
);
958 ac97_bus
->clock
= 48000;
959 aaci
->ac97_bus
= ac97_bus
;
961 memset(&ac97_template
, 0, sizeof(struct snd_ac97_template
));
962 ac97_template
.private_data
= aaci
;
963 ac97_template
.num
= 0;
964 ac97_template
.scaps
= AC97_SCAP_SKIP_MODEM
;
966 ret
= snd_ac97_mixer(ac97_bus
, &ac97_template
, &ac97
);
972 * Disable AC97 PC Beep input on audio codecs.
974 if (ac97_is_audio(ac97
))
975 snd_ac97_write_cache(ac97
, AC97_PC_BEEP
, 0x801e);
977 ret
= snd_ac97_pcm_assign(ac97_bus
, ARRAY_SIZE(ac97_defs
), ac97_defs
);
981 aaci
->playback
.pcm
= &ac97_bus
->pcms
[0];
982 aaci
->capture
.pcm
= &ac97_bus
->pcms
[1];
988 static void aaci_free_card(struct snd_card
*card
)
990 struct aaci
*aaci
= card
->private_data
;
995 static struct aaci
* __devinit
aaci_init_card(struct amba_device
*dev
)
998 struct snd_card
*card
;
1000 card
= snd_card_new(SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
,
1001 THIS_MODULE
, sizeof(struct aaci
));
1003 return ERR_PTR(-ENOMEM
);
1005 card
->private_free
= aaci_free_card
;
1007 strlcpy(card
->driver
, DRIVER_NAME
, sizeof(card
->driver
));
1008 strlcpy(card
->shortname
, "ARM AC'97 Interface", sizeof(card
->shortname
));
1009 snprintf(card
->longname
, sizeof(card
->longname
),
1010 "%s at 0x%016llx, irq %d",
1011 card
->shortname
, (unsigned long long)dev
->res
.start
,
1014 aaci
= card
->private_data
;
1015 mutex_init(&aaci
->ac97_sem
);
1016 spin_lock_init(&aaci
->lock
);
1020 /* Set MAINCR to allow slot 1 and 2 data IO */
1021 aaci
->maincr
= MAINCR_IE
| MAINCR_SL1RXEN
| MAINCR_SL1TXEN
|
1022 MAINCR_SL2RXEN
| MAINCR_SL2TXEN
;
1027 static int __devinit
aaci_init_pcm(struct aaci
*aaci
)
1029 struct snd_pcm
*pcm
;
1032 ret
= snd_pcm_new(aaci
->card
, "AACI AC'97", 0, 1, 1, &pcm
);
1035 pcm
->private_data
= aaci
;
1036 pcm
->info_flags
= 0;
1038 strlcpy(pcm
->name
, DRIVER_NAME
, sizeof(pcm
->name
));
1040 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &aaci_playback_ops
);
1041 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &aaci_capture_ops
);
1047 static unsigned int __devinit
aaci_size_fifo(struct aaci
*aaci
)
1049 struct aaci_runtime
*aacirun
= &aaci
->playback
;
1052 writel(CR_FEN
| CR_SZ16
| CR_EN
, aacirun
->base
+ AACI_TXCR
);
1054 for (i
= 0; !(readl(aacirun
->base
+ AACI_SR
) & SR_TXFF
) && i
< 4096; i
++)
1055 writel(0, aacirun
->fifo
);
1057 writel(0, aacirun
->base
+ AACI_TXCR
);
1060 * Re-initialise the AACI after the FIFO depth test, to
1061 * ensure that the FIFOs are empty. Unfortunately, merely
1062 * disabling the channel doesn't clear the FIFO.
1064 writel(aaci
->maincr
& ~MAINCR_IE
, aaci
->base
+ AACI_MAINCR
);
1065 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
1068 * If we hit 4096, we failed. Go back to the specified
1077 static int __devinit
aaci_probe(struct amba_device
*dev
, void *id
)
1082 ret
= amba_request_regions(dev
, NULL
);
1086 aaci
= aaci_init_card(dev
);
1088 ret
= PTR_ERR(aaci
);
1092 aaci
->base
= ioremap(dev
->res
.start
, SZ_4K
);
1099 * Playback uses AACI channel 0
1101 aaci
->playback
.base
= aaci
->base
+ AACI_CSCH1
;
1102 aaci
->playback
.fifo
= aaci
->base
+ AACI_DR1
;
1105 * Capture uses AACI channel 0
1107 aaci
->capture
.base
= aaci
->base
+ AACI_CSCH1
;
1108 aaci
->capture
.fifo
= aaci
->base
+ AACI_DR1
;
1110 for (i
= 0; i
< 4; i
++) {
1111 void __iomem
*base
= aaci
->base
+ i
* 0x14;
1113 writel(0, base
+ AACI_IE
);
1114 writel(0, base
+ AACI_TXCR
);
1115 writel(0, base
+ AACI_RXCR
);
1118 writel(0x1fff, aaci
->base
+ AACI_INTCLR
);
1119 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
1121 ret
= aaci_probe_ac97(aaci
);
1126 * Size the FIFOs (must be multiple of 16).
1128 aaci
->fifosize
= aaci_size_fifo(aaci
);
1129 if (aaci
->fifosize
& 15) {
1130 printk(KERN_WARNING
"AACI: fifosize = %d not supported\n",
1136 ret
= aaci_init_pcm(aaci
);
1140 snd_card_set_dev(aaci
->card
, &dev
->dev
);
1142 ret
= snd_card_register(aaci
->card
);
1144 dev_info(&dev
->dev
, "%s, fifo %d\n", aaci
->card
->longname
,
1146 amba_set_drvdata(dev
, aaci
->card
);
1152 snd_card_free(aaci
->card
);
1153 amba_release_regions(dev
);
1157 static int __devexit
aaci_remove(struct amba_device
*dev
)
1159 struct snd_card
*card
= amba_get_drvdata(dev
);
1161 amba_set_drvdata(dev
, NULL
);
1164 struct aaci
*aaci
= card
->private_data
;
1165 writel(0, aaci
->base
+ AACI_MAINCR
);
1167 snd_card_free(card
);
1168 amba_release_regions(dev
);
1174 static struct amba_id aaci_ids
[] = {
1182 static struct amba_driver aaci_driver
= {
1184 .name
= DRIVER_NAME
,
1186 .probe
= aaci_probe
,
1187 .remove
= __devexit_p(aaci_remove
),
1188 .suspend
= aaci_suspend
,
1189 .resume
= aaci_resume
,
1190 .id_table
= aaci_ids
,
1193 static int __init
aaci_init(void)
1195 return amba_driver_register(&aaci_driver
);
1198 static void __exit
aaci_exit(void)
1200 amba_driver_unregister(&aaci_driver
);
1203 module_init(aaci_init
);
1204 module_exit(aaci_exit
);
1206 MODULE_LICENSE("GPL");
1207 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");