USB: EHCI: defer reclamation of siTDs
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / ehci-sched.c
blob6746a8a794d40a2d3030ecd3469a9081ad586e18
1 /*
2 * Copyright (c) 2001-2004 by David Brownell
3 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 /* this file is part of ehci-hcd.c */
22 /*-------------------------------------------------------------------------*/
25 * EHCI scheduled transaction support: interrupt, iso, split iso
26 * These are called "periodic" transactions in the EHCI spec.
28 * Note that for interrupt transfers, the QH/QTD manipulation is shared
29 * with the "asynchronous" transaction support (control/bulk transfers).
30 * The only real difference is in how interrupt transfers are scheduled.
32 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
33 * It keeps track of every ITD (or SITD) that's linked, and holds enough
34 * pre-calculated schedule data to make appending to the queue be quick.
37 static int ehci_get_frame (struct usb_hcd *hcd);
39 /*-------------------------------------------------------------------------*/
42 * periodic_next_shadow - return "next" pointer on shadow list
43 * @periodic: host pointer to qh/itd/sitd
44 * @tag: hardware tag for type of this record
46 static union ehci_shadow *
47 periodic_next_shadow(struct ehci_hcd *ehci, union ehci_shadow *periodic,
48 __hc32 tag)
50 switch (hc32_to_cpu(ehci, tag)) {
51 case Q_TYPE_QH:
52 return &periodic->qh->qh_next;
53 case Q_TYPE_FSTN:
54 return &periodic->fstn->fstn_next;
55 case Q_TYPE_ITD:
56 return &periodic->itd->itd_next;
57 // case Q_TYPE_SITD:
58 default:
59 return &periodic->sitd->sitd_next;
63 static __hc32 *
64 shadow_next_periodic(struct ehci_hcd *ehci, union ehci_shadow *periodic,
65 __hc32 tag)
67 switch (hc32_to_cpu(ehci, tag)) {
68 /* our ehci_shadow.qh is actually software part */
69 case Q_TYPE_QH:
70 return &periodic->qh->hw->hw_next;
71 /* others are hw parts */
72 default:
73 return periodic->hw_next;
77 /* caller must hold ehci->lock */
78 static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr)
80 union ehci_shadow *prev_p = &ehci->pshadow[frame];
81 __hc32 *hw_p = &ehci->periodic[frame];
82 union ehci_shadow here = *prev_p;
84 /* find predecessor of "ptr"; hw and shadow lists are in sync */
85 while (here.ptr && here.ptr != ptr) {
86 prev_p = periodic_next_shadow(ehci, prev_p,
87 Q_NEXT_TYPE(ehci, *hw_p));
88 hw_p = shadow_next_periodic(ehci, &here,
89 Q_NEXT_TYPE(ehci, *hw_p));
90 here = *prev_p;
92 /* an interrupt entry (at list end) could have been shared */
93 if (!here.ptr)
94 return;
96 /* update shadow and hardware lists ... the old "next" pointers
97 * from ptr may still be in use, the caller updates them.
99 *prev_p = *periodic_next_shadow(ehci, &here,
100 Q_NEXT_TYPE(ehci, *hw_p));
101 *hw_p = *shadow_next_periodic(ehci, &here, Q_NEXT_TYPE(ehci, *hw_p));
104 /* how many of the uframe's 125 usecs are allocated? */
105 static unsigned short
106 periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe)
108 __hc32 *hw_p = &ehci->periodic [frame];
109 union ehci_shadow *q = &ehci->pshadow [frame];
110 unsigned usecs = 0;
111 struct ehci_qh_hw *hw;
113 while (q->ptr) {
114 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
115 case Q_TYPE_QH:
116 hw = q->qh->hw;
117 /* is it in the S-mask? */
118 if (hw->hw_info2 & cpu_to_hc32(ehci, 1 << uframe))
119 usecs += q->qh->usecs;
120 /* ... or C-mask? */
121 if (hw->hw_info2 & cpu_to_hc32(ehci,
122 1 << (8 + uframe)))
123 usecs += q->qh->c_usecs;
124 hw_p = &hw->hw_next;
125 q = &q->qh->qh_next;
126 break;
127 // case Q_TYPE_FSTN:
128 default:
129 /* for "save place" FSTNs, count the relevant INTR
130 * bandwidth from the previous frame
132 if (q->fstn->hw_prev != EHCI_LIST_END(ehci)) {
133 ehci_dbg (ehci, "ignoring FSTN cost ...\n");
135 hw_p = &q->fstn->hw_next;
136 q = &q->fstn->fstn_next;
137 break;
138 case Q_TYPE_ITD:
139 if (q->itd->hw_transaction[uframe])
140 usecs += q->itd->stream->usecs;
141 hw_p = &q->itd->hw_next;
142 q = &q->itd->itd_next;
143 break;
144 case Q_TYPE_SITD:
145 /* is it in the S-mask? (count SPLIT, DATA) */
146 if (q->sitd->hw_uframe & cpu_to_hc32(ehci,
147 1 << uframe)) {
148 if (q->sitd->hw_fullspeed_ep &
149 cpu_to_hc32(ehci, 1<<31))
150 usecs += q->sitd->stream->usecs;
151 else /* worst case for OUT start-split */
152 usecs += HS_USECS_ISO (188);
155 /* ... C-mask? (count CSPLIT, DATA) */
156 if (q->sitd->hw_uframe &
157 cpu_to_hc32(ehci, 1 << (8 + uframe))) {
158 /* worst case for IN complete-split */
159 usecs += q->sitd->stream->c_usecs;
162 hw_p = &q->sitd->hw_next;
163 q = &q->sitd->sitd_next;
164 break;
167 #ifdef DEBUG
168 if (usecs > 100)
169 ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",
170 frame * 8 + uframe, usecs);
171 #endif
172 return usecs;
175 /*-------------------------------------------------------------------------*/
177 static int same_tt (struct usb_device *dev1, struct usb_device *dev2)
179 if (!dev1->tt || !dev2->tt)
180 return 0;
181 if (dev1->tt != dev2->tt)
182 return 0;
183 if (dev1->tt->multi)
184 return dev1->ttport == dev2->ttport;
185 else
186 return 1;
189 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
191 /* Which uframe does the low/fullspeed transfer start in?
193 * The parameter is the mask of ssplits in "H-frame" terms
194 * and this returns the transfer start uframe in "B-frame" terms,
195 * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
196 * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
197 * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
199 static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
201 unsigned char smask = QH_SMASK & hc32_to_cpu(ehci, mask);
202 if (!smask) {
203 ehci_err(ehci, "invalid empty smask!\n");
204 /* uframe 7 can't have bw so this will indicate failure */
205 return 7;
207 return ffs(smask) - 1;
210 static const unsigned char
211 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
213 /* carryover low/fullspeed bandwidth that crosses uframe boundries */
214 static inline void carryover_tt_bandwidth(unsigned short tt_usecs[8])
216 int i;
217 for (i=0; i<7; i++) {
218 if (max_tt_usecs[i] < tt_usecs[i]) {
219 tt_usecs[i+1] += tt_usecs[i] - max_tt_usecs[i];
220 tt_usecs[i] = max_tt_usecs[i];
225 /* How many of the tt's periodic downstream 1000 usecs are allocated?
227 * While this measures the bandwidth in terms of usecs/uframe,
228 * the low/fullspeed bus has no notion of uframes, so any particular
229 * low/fullspeed transfer can "carry over" from one uframe to the next,
230 * since the TT just performs downstream transfers in sequence.
232 * For example two separate 100 usec transfers can start in the same uframe,
233 * and the second one would "carry over" 75 usecs into the next uframe.
235 static void
236 periodic_tt_usecs (
237 struct ehci_hcd *ehci,
238 struct usb_device *dev,
239 unsigned frame,
240 unsigned short tt_usecs[8]
243 __hc32 *hw_p = &ehci->periodic [frame];
244 union ehci_shadow *q = &ehci->pshadow [frame];
245 unsigned char uf;
247 memset(tt_usecs, 0, 16);
249 while (q->ptr) {
250 switch (hc32_to_cpu(ehci, Q_NEXT_TYPE(ehci, *hw_p))) {
251 case Q_TYPE_ITD:
252 hw_p = &q->itd->hw_next;
253 q = &q->itd->itd_next;
254 continue;
255 case Q_TYPE_QH:
256 if (same_tt(dev, q->qh->dev)) {
257 uf = tt_start_uframe(ehci, q->qh->hw->hw_info2);
258 tt_usecs[uf] += q->qh->tt_usecs;
260 hw_p = &q->qh->hw->hw_next;
261 q = &q->qh->qh_next;
262 continue;
263 case Q_TYPE_SITD:
264 if (same_tt(dev, q->sitd->urb->dev)) {
265 uf = tt_start_uframe(ehci, q->sitd->hw_uframe);
266 tt_usecs[uf] += q->sitd->stream->tt_usecs;
268 hw_p = &q->sitd->hw_next;
269 q = &q->sitd->sitd_next;
270 continue;
271 // case Q_TYPE_FSTN:
272 default:
273 ehci_dbg(ehci, "ignoring periodic frame %d FSTN\n",
274 frame);
275 hw_p = &q->fstn->hw_next;
276 q = &q->fstn->fstn_next;
280 carryover_tt_bandwidth(tt_usecs);
282 if (max_tt_usecs[7] < tt_usecs[7])
283 ehci_err(ehci, "frame %d tt sched overrun: %d usecs\n",
284 frame, tt_usecs[7] - max_tt_usecs[7]);
288 * Return true if the device's tt's downstream bus is available for a
289 * periodic transfer of the specified length (usecs), starting at the
290 * specified frame/uframe. Note that (as summarized in section 11.19
291 * of the usb 2.0 spec) TTs can buffer multiple transactions for each
292 * uframe.
294 * The uframe parameter is when the fullspeed/lowspeed transfer
295 * should be executed in "B-frame" terms, which is the same as the
296 * highspeed ssplit's uframe (which is in "H-frame" terms). For example
297 * a ssplit in "H-frame" 0 causes a transfer in "B-frame" 0.
298 * See the EHCI spec sec 4.5 and fig 4.7.
300 * This checks if the full/lowspeed bus, at the specified starting uframe,
301 * has the specified bandwidth available, according to rules listed
302 * in USB 2.0 spec section 11.18.1 fig 11-60.
304 * This does not check if the transfer would exceed the max ssplit
305 * limit of 16, specified in USB 2.0 spec section 11.18.4 requirement #4,
306 * since proper scheduling limits ssplits to less than 16 per uframe.
308 static int tt_available (
309 struct ehci_hcd *ehci,
310 unsigned period,
311 struct usb_device *dev,
312 unsigned frame,
313 unsigned uframe,
314 u16 usecs
317 if ((period == 0) || (uframe >= 7)) /* error */
318 return 0;
320 for (; frame < ehci->periodic_size; frame += period) {
321 unsigned short tt_usecs[8];
323 periodic_tt_usecs (ehci, dev, frame, tt_usecs);
325 ehci_vdbg(ehci, "tt frame %d check %d usecs start uframe %d in"
326 " schedule %d/%d/%d/%d/%d/%d/%d/%d\n",
327 frame, usecs, uframe,
328 tt_usecs[0], tt_usecs[1], tt_usecs[2], tt_usecs[3],
329 tt_usecs[4], tt_usecs[5], tt_usecs[6], tt_usecs[7]);
331 if (max_tt_usecs[uframe] <= tt_usecs[uframe]) {
332 ehci_vdbg(ehci, "frame %d uframe %d fully scheduled\n",
333 frame, uframe);
334 return 0;
337 /* special case for isoc transfers larger than 125us:
338 * the first and each subsequent fully used uframe
339 * must be empty, so as to not illegally delay
340 * already scheduled transactions
342 if (125 < usecs) {
343 int ufs = (usecs / 125);
344 int i;
345 for (i = uframe; i < (uframe + ufs) && i < 8; i++)
346 if (0 < tt_usecs[i]) {
347 ehci_vdbg(ehci,
348 "multi-uframe xfer can't fit "
349 "in frame %d uframe %d\n",
350 frame, i);
351 return 0;
355 tt_usecs[uframe] += usecs;
357 carryover_tt_bandwidth(tt_usecs);
359 /* fail if the carryover pushed bw past the last uframe's limit */
360 if (max_tt_usecs[7] < tt_usecs[7]) {
361 ehci_vdbg(ehci,
362 "tt unavailable usecs %d frame %d uframe %d\n",
363 usecs, frame, uframe);
364 return 0;
368 return 1;
371 #else
373 /* return true iff the device's transaction translator is available
374 * for a periodic transfer starting at the specified frame, using
375 * all the uframes in the mask.
377 static int tt_no_collision (
378 struct ehci_hcd *ehci,
379 unsigned period,
380 struct usb_device *dev,
381 unsigned frame,
382 u32 uf_mask
385 if (period == 0) /* error */
386 return 0;
388 /* note bandwidth wastage: split never follows csplit
389 * (different dev or endpoint) until the next uframe.
390 * calling convention doesn't make that distinction.
392 for (; frame < ehci->periodic_size; frame += period) {
393 union ehci_shadow here;
394 __hc32 type;
395 struct ehci_qh_hw *hw;
397 here = ehci->pshadow [frame];
398 type = Q_NEXT_TYPE(ehci, ehci->periodic [frame]);
399 while (here.ptr) {
400 switch (hc32_to_cpu(ehci, type)) {
401 case Q_TYPE_ITD:
402 type = Q_NEXT_TYPE(ehci, here.itd->hw_next);
403 here = here.itd->itd_next;
404 continue;
405 case Q_TYPE_QH:
406 hw = here.qh->hw;
407 if (same_tt (dev, here.qh->dev)) {
408 u32 mask;
410 mask = hc32_to_cpu(ehci,
411 hw->hw_info2);
412 /* "knows" no gap is needed */
413 mask |= mask >> 8;
414 if (mask & uf_mask)
415 break;
417 type = Q_NEXT_TYPE(ehci, hw->hw_next);
418 here = here.qh->qh_next;
419 continue;
420 case Q_TYPE_SITD:
421 if (same_tt (dev, here.sitd->urb->dev)) {
422 u16 mask;
424 mask = hc32_to_cpu(ehci, here.sitd
425 ->hw_uframe);
426 /* FIXME assumes no gap for IN! */
427 mask |= mask >> 8;
428 if (mask & uf_mask)
429 break;
431 type = Q_NEXT_TYPE(ehci, here.sitd->hw_next);
432 here = here.sitd->sitd_next;
433 continue;
434 // case Q_TYPE_FSTN:
435 default:
436 ehci_dbg (ehci,
437 "periodic frame %d bogus type %d\n",
438 frame, type);
441 /* collision or error */
442 return 0;
446 /* no collision */
447 return 1;
450 #endif /* CONFIG_USB_EHCI_TT_NEWSCHED */
452 /*-------------------------------------------------------------------------*/
454 static int enable_periodic (struct ehci_hcd *ehci)
456 u32 cmd;
457 int status;
459 if (ehci->periodic_sched++)
460 return 0;
462 /* did clearing PSE did take effect yet?
463 * takes effect only at frame boundaries...
465 status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
466 STS_PSS, 0, 9 * 125);
467 if (status)
468 return status;
470 cmd = ehci_readl(ehci, &ehci->regs->command) | CMD_PSE;
471 ehci_writel(ehci, cmd, &ehci->regs->command);
472 /* posted write ... PSS happens later */
473 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
475 /* make sure ehci_work scans these */
476 ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index)
477 % (ehci->periodic_size << 3);
478 if (unlikely(ehci->broken_periodic))
479 ehci->last_periodic_enable = ktime_get_real();
480 return 0;
483 static int disable_periodic (struct ehci_hcd *ehci)
485 u32 cmd;
486 int status;
488 if (--ehci->periodic_sched)
489 return 0;
491 if (unlikely(ehci->broken_periodic)) {
492 /* delay experimentally determined */
493 ktime_t safe = ktime_add_us(ehci->last_periodic_enable, 1000);
494 ktime_t now = ktime_get_real();
495 s64 delay = ktime_us_delta(safe, now);
497 if (unlikely(delay > 0))
498 udelay(delay);
501 /* did setting PSE not take effect yet?
502 * takes effect only at frame boundaries...
504 status = handshake_on_error_set_halt(ehci, &ehci->regs->status,
505 STS_PSS, STS_PSS, 9 * 125);
506 if (status)
507 return status;
509 cmd = ehci_readl(ehci, &ehci->regs->command) & ~CMD_PSE;
510 ehci_writel(ehci, cmd, &ehci->regs->command);
511 /* posted write ... */
513 ehci->next_uframe = -1;
514 return 0;
517 /*-------------------------------------------------------------------------*/
519 /* periodic schedule slots have iso tds (normal or split) first, then a
520 * sparse tree for active interrupt transfers.
522 * this just links in a qh; caller guarantees uframe masks are set right.
523 * no FSTN support (yet; ehci 0.96+)
525 static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
527 unsigned i;
528 unsigned period = qh->period;
530 dev_dbg (&qh->dev->dev,
531 "link qh%d-%04x/%p start %d [%d/%d us]\n",
532 period, hc32_to_cpup(ehci, &qh->hw->hw_info2)
533 & (QH_CMASK | QH_SMASK),
534 qh, qh->start, qh->usecs, qh->c_usecs);
536 /* high bandwidth, or otherwise every microframe */
537 if (period == 0)
538 period = 1;
540 for (i = qh->start; i < ehci->periodic_size; i += period) {
541 union ehci_shadow *prev = &ehci->pshadow[i];
542 __hc32 *hw_p = &ehci->periodic[i];
543 union ehci_shadow here = *prev;
544 __hc32 type = 0;
546 /* skip the iso nodes at list head */
547 while (here.ptr) {
548 type = Q_NEXT_TYPE(ehci, *hw_p);
549 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
550 break;
551 prev = periodic_next_shadow(ehci, prev, type);
552 hw_p = shadow_next_periodic(ehci, &here, type);
553 here = *prev;
556 /* sorting each branch by period (slow-->fast)
557 * enables sharing interior tree nodes
559 while (here.ptr && qh != here.qh) {
560 if (qh->period > here.qh->period)
561 break;
562 prev = &here.qh->qh_next;
563 hw_p = &here.qh->hw->hw_next;
564 here = *prev;
566 /* link in this qh, unless some earlier pass did that */
567 if (qh != here.qh) {
568 qh->qh_next = here;
569 if (here.qh)
570 qh->hw->hw_next = *hw_p;
571 wmb ();
572 prev->qh = qh;
573 *hw_p = QH_NEXT (ehci, qh->qh_dma);
576 qh->qh_state = QH_STATE_LINKED;
577 qh->xacterrs = 0;
578 qh_get (qh);
580 /* update per-qh bandwidth for usbfs */
581 ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period
582 ? ((qh->usecs + qh->c_usecs) / qh->period)
583 : (qh->usecs * 8);
585 /* maybe enable periodic schedule processing */
586 return enable_periodic(ehci);
589 static int qh_unlink_periodic(struct ehci_hcd *ehci, struct ehci_qh *qh)
591 unsigned i;
592 unsigned period;
594 // FIXME:
595 // IF this isn't high speed
596 // and this qh is active in the current uframe
597 // (and overlay token SplitXstate is false?)
598 // THEN
599 // qh->hw_info1 |= cpu_to_hc32(1 << 7 /* "ignore" */);
601 /* high bandwidth, or otherwise part of every microframe */
602 if ((period = qh->period) == 0)
603 period = 1;
605 for (i = qh->start; i < ehci->periodic_size; i += period)
606 periodic_unlink (ehci, i, qh);
608 /* update per-qh bandwidth for usbfs */
609 ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period
610 ? ((qh->usecs + qh->c_usecs) / qh->period)
611 : (qh->usecs * 8);
613 dev_dbg (&qh->dev->dev,
614 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
615 qh->period,
616 hc32_to_cpup(ehci, &qh->hw->hw_info2) & (QH_CMASK | QH_SMASK),
617 qh, qh->start, qh->usecs, qh->c_usecs);
619 /* qh->qh_next still "live" to HC */
620 qh->qh_state = QH_STATE_UNLINK;
621 qh->qh_next.ptr = NULL;
622 qh_put (qh);
624 /* maybe turn off periodic schedule */
625 return disable_periodic(ehci);
628 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
630 unsigned wait;
631 struct ehci_qh_hw *hw = qh->hw;
632 int rc;
634 /* If the QH isn't linked then there's nothing we can do
635 * unless we were called during a giveback, in which case
636 * qh_completions() has to deal with it.
638 if (qh->qh_state != QH_STATE_LINKED) {
639 if (qh->qh_state == QH_STATE_COMPLETING)
640 qh->needs_rescan = 1;
641 return;
644 qh_unlink_periodic (ehci, qh);
646 /* simple/paranoid: always delay, expecting the HC needs to read
647 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
648 * expect khubd to clean up after any CSPLITs we won't issue.
649 * active high speed queues may need bigger delays...
651 if (list_empty (&qh->qtd_list)
652 || (cpu_to_hc32(ehci, QH_CMASK)
653 & hw->hw_info2) != 0)
654 wait = 2;
655 else
656 wait = 55; /* worst case: 3 * 1024 */
658 udelay (wait);
659 qh->qh_state = QH_STATE_IDLE;
660 hw->hw_next = EHCI_LIST_END(ehci);
661 wmb ();
663 qh_completions(ehci, qh);
665 /* reschedule QH iff another request is queued */
666 if (!list_empty(&qh->qtd_list) &&
667 HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
668 rc = qh_schedule(ehci, qh);
670 /* An error here likely indicates handshake failure
671 * or no space left in the schedule. Neither fault
672 * should happen often ...
674 * FIXME kill the now-dysfunctional queued urbs
676 if (rc != 0)
677 ehci_err(ehci, "can't reschedule qh %p, err %d\n",
678 qh, rc);
682 /*-------------------------------------------------------------------------*/
684 static int check_period (
685 struct ehci_hcd *ehci,
686 unsigned frame,
687 unsigned uframe,
688 unsigned period,
689 unsigned usecs
691 int claimed;
693 /* complete split running into next frame?
694 * given FSTN support, we could sometimes check...
696 if (uframe >= 8)
697 return 0;
700 * 80% periodic == 100 usec/uframe available
701 * convert "usecs we need" to "max already claimed"
703 usecs = 100 - usecs;
705 /* we "know" 2 and 4 uframe intervals were rejected; so
706 * for period 0, check _every_ microframe in the schedule.
708 if (unlikely (period == 0)) {
709 do {
710 for (uframe = 0; uframe < 7; uframe++) {
711 claimed = periodic_usecs (ehci, frame, uframe);
712 if (claimed > usecs)
713 return 0;
715 } while ((frame += 1) < ehci->periodic_size);
717 /* just check the specified uframe, at that period */
718 } else {
719 do {
720 claimed = periodic_usecs (ehci, frame, uframe);
721 if (claimed > usecs)
722 return 0;
723 } while ((frame += period) < ehci->periodic_size);
726 // success!
727 return 1;
730 static int check_intr_schedule (
731 struct ehci_hcd *ehci,
732 unsigned frame,
733 unsigned uframe,
734 const struct ehci_qh *qh,
735 __hc32 *c_maskp
738 int retval = -ENOSPC;
739 u8 mask = 0;
741 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
742 goto done;
744 if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
745 goto done;
746 if (!qh->c_usecs) {
747 retval = 0;
748 *c_maskp = 0;
749 goto done;
752 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
753 if (tt_available (ehci, qh->period, qh->dev, frame, uframe,
754 qh->tt_usecs)) {
755 unsigned i;
757 /* TODO : this may need FSTN for SSPLIT in uframe 5. */
758 for (i=uframe+1; i<8 && i<uframe+4; i++)
759 if (!check_period (ehci, frame, i,
760 qh->period, qh->c_usecs))
761 goto done;
762 else
763 mask |= 1 << i;
765 retval = 0;
767 *c_maskp = cpu_to_hc32(ehci, mask << 8);
769 #else
770 /* Make sure this tt's buffer is also available for CSPLITs.
771 * We pessimize a bit; probably the typical full speed case
772 * doesn't need the second CSPLIT.
774 * NOTE: both SPLIT and CSPLIT could be checked in just
775 * one smart pass...
777 mask = 0x03 << (uframe + qh->gap_uf);
778 *c_maskp = cpu_to_hc32(ehci, mask << 8);
780 mask |= 1 << uframe;
781 if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {
782 if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
783 qh->period, qh->c_usecs))
784 goto done;
785 if (!check_period (ehci, frame, uframe + qh->gap_uf,
786 qh->period, qh->c_usecs))
787 goto done;
788 retval = 0;
790 #endif
791 done:
792 return retval;
795 /* "first fit" scheduling policy used the first time through,
796 * or when the previous schedule slot can't be re-used.
798 static int qh_schedule(struct ehci_hcd *ehci, struct ehci_qh *qh)
800 int status;
801 unsigned uframe;
802 __hc32 c_mask;
803 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
804 struct ehci_qh_hw *hw = qh->hw;
806 qh_refresh(ehci, qh);
807 hw->hw_next = EHCI_LIST_END(ehci);
808 frame = qh->start;
810 /* reuse the previous schedule slots, if we can */
811 if (frame < qh->period) {
812 uframe = ffs(hc32_to_cpup(ehci, &hw->hw_info2) & QH_SMASK);
813 status = check_intr_schedule (ehci, frame, --uframe,
814 qh, &c_mask);
815 } else {
816 uframe = 0;
817 c_mask = 0;
818 status = -ENOSPC;
821 /* else scan the schedule to find a group of slots such that all
822 * uframes have enough periodic bandwidth available.
824 if (status) {
825 /* "normal" case, uframing flexible except with splits */
826 if (qh->period) {
827 int i;
829 for (i = qh->period; status && i > 0; --i) {
830 frame = ++ehci->random_frame % qh->period;
831 for (uframe = 0; uframe < 8; uframe++) {
832 status = check_intr_schedule (ehci,
833 frame, uframe, qh,
834 &c_mask);
835 if (status == 0)
836 break;
840 /* qh->period == 0 means every uframe */
841 } else {
842 frame = 0;
843 status = check_intr_schedule (ehci, 0, 0, qh, &c_mask);
845 if (status)
846 goto done;
847 qh->start = frame;
849 /* reset S-frame and (maybe) C-frame masks */
850 hw->hw_info2 &= cpu_to_hc32(ehci, ~(QH_CMASK | QH_SMASK));
851 hw->hw_info2 |= qh->period
852 ? cpu_to_hc32(ehci, 1 << uframe)
853 : cpu_to_hc32(ehci, QH_SMASK);
854 hw->hw_info2 |= c_mask;
855 } else
856 ehci_dbg (ehci, "reused qh %p schedule\n", qh);
858 /* stuff into the periodic schedule */
859 status = qh_link_periodic (ehci, qh);
860 done:
861 return status;
864 static int intr_submit (
865 struct ehci_hcd *ehci,
866 struct urb *urb,
867 struct list_head *qtd_list,
868 gfp_t mem_flags
870 unsigned epnum;
871 unsigned long flags;
872 struct ehci_qh *qh;
873 int status;
874 struct list_head empty;
876 /* get endpoint and transfer/schedule data */
877 epnum = urb->ep->desc.bEndpointAddress;
879 spin_lock_irqsave (&ehci->lock, flags);
881 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
882 &ehci_to_hcd(ehci)->flags))) {
883 status = -ESHUTDOWN;
884 goto done_not_linked;
886 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
887 if (unlikely(status))
888 goto done_not_linked;
890 /* get qh and force any scheduling errors */
891 INIT_LIST_HEAD (&empty);
892 qh = qh_append_tds(ehci, urb, &empty, epnum, &urb->ep->hcpriv);
893 if (qh == NULL) {
894 status = -ENOMEM;
895 goto done;
897 if (qh->qh_state == QH_STATE_IDLE) {
898 if ((status = qh_schedule (ehci, qh)) != 0)
899 goto done;
902 /* then queue the urb's tds to the qh */
903 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
904 BUG_ON (qh == NULL);
906 /* ... update usbfs periodic stats */
907 ehci_to_hcd(ehci)->self.bandwidth_int_reqs++;
909 done:
910 if (unlikely(status))
911 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
912 done_not_linked:
913 spin_unlock_irqrestore (&ehci->lock, flags);
914 if (status)
915 qtd_list_free (ehci, urb, qtd_list);
917 return status;
920 /*-------------------------------------------------------------------------*/
922 /* ehci_iso_stream ops work with both ITD and SITD */
924 static struct ehci_iso_stream *
925 iso_stream_alloc (gfp_t mem_flags)
927 struct ehci_iso_stream *stream;
929 stream = kzalloc(sizeof *stream, mem_flags);
930 if (likely (stream != NULL)) {
931 INIT_LIST_HEAD(&stream->td_list);
932 INIT_LIST_HEAD(&stream->free_list);
933 stream->next_uframe = -1;
934 stream->refcount = 1;
936 return stream;
939 static void
940 iso_stream_init (
941 struct ehci_hcd *ehci,
942 struct ehci_iso_stream *stream,
943 struct usb_device *dev,
944 int pipe,
945 unsigned interval
948 static const u8 smask_out [] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f };
950 u32 buf1;
951 unsigned epnum, maxp;
952 int is_input;
953 long bandwidth;
956 * this might be a "high bandwidth" highspeed endpoint,
957 * as encoded in the ep descriptor's wMaxPacket field
959 epnum = usb_pipeendpoint (pipe);
960 is_input = usb_pipein (pipe) ? USB_DIR_IN : 0;
961 maxp = usb_maxpacket(dev, pipe, !is_input);
962 if (is_input) {
963 buf1 = (1 << 11);
964 } else {
965 buf1 = 0;
968 /* knows about ITD vs SITD */
969 if (dev->speed == USB_SPEED_HIGH) {
970 unsigned multi = hb_mult(maxp);
972 stream->highspeed = 1;
974 maxp = max_packet(maxp);
975 buf1 |= maxp;
976 maxp *= multi;
978 stream->buf0 = cpu_to_hc32(ehci, (epnum << 8) | dev->devnum);
979 stream->buf1 = cpu_to_hc32(ehci, buf1);
980 stream->buf2 = cpu_to_hc32(ehci, multi);
982 /* usbfs wants to report the average usecs per frame tied up
983 * when transfers on this endpoint are scheduled ...
985 stream->usecs = HS_USECS_ISO (maxp);
986 bandwidth = stream->usecs * 8;
987 bandwidth /= interval;
989 } else {
990 u32 addr;
991 int think_time;
992 int hs_transfers;
994 addr = dev->ttport << 24;
995 if (!ehci_is_TDI(ehci)
996 || (dev->tt->hub !=
997 ehci_to_hcd(ehci)->self.root_hub))
998 addr |= dev->tt->hub->devnum << 16;
999 addr |= epnum << 8;
1000 addr |= dev->devnum;
1001 stream->usecs = HS_USECS_ISO (maxp);
1002 think_time = dev->tt ? dev->tt->think_time : 0;
1003 stream->tt_usecs = NS_TO_US (think_time + usb_calc_bus_time (
1004 dev->speed, is_input, 1, maxp));
1005 hs_transfers = max (1u, (maxp + 187) / 188);
1006 if (is_input) {
1007 u32 tmp;
1009 addr |= 1 << 31;
1010 stream->c_usecs = stream->usecs;
1011 stream->usecs = HS_USECS_ISO (1);
1012 stream->raw_mask = 1;
1014 /* c-mask as specified in USB 2.0 11.18.4 3.c */
1015 tmp = (1 << (hs_transfers + 2)) - 1;
1016 stream->raw_mask |= tmp << (8 + 2);
1017 } else
1018 stream->raw_mask = smask_out [hs_transfers - 1];
1019 bandwidth = stream->usecs + stream->c_usecs;
1020 bandwidth /= interval << 3;
1022 /* stream->splits gets created from raw_mask later */
1023 stream->address = cpu_to_hc32(ehci, addr);
1025 stream->bandwidth = bandwidth;
1027 stream->udev = dev;
1029 stream->bEndpointAddress = is_input | epnum;
1030 stream->interval = interval;
1031 stream->maxp = maxp;
1034 static void
1035 iso_stream_put(struct ehci_hcd *ehci, struct ehci_iso_stream *stream)
1037 stream->refcount--;
1039 /* free whenever just a dev->ep reference remains.
1040 * not like a QH -- no persistent state (toggle, halt)
1042 if (stream->refcount == 1) {
1043 int is_in;
1045 // BUG_ON (!list_empty(&stream->td_list));
1047 while (!list_empty (&stream->free_list)) {
1048 struct list_head *entry;
1050 entry = stream->free_list.next;
1051 list_del (entry);
1053 /* knows about ITD vs SITD */
1054 if (stream->highspeed) {
1055 struct ehci_itd *itd;
1057 itd = list_entry (entry, struct ehci_itd,
1058 itd_list);
1059 dma_pool_free (ehci->itd_pool, itd,
1060 itd->itd_dma);
1061 } else {
1062 struct ehci_sitd *sitd;
1064 sitd = list_entry (entry, struct ehci_sitd,
1065 sitd_list);
1066 dma_pool_free (ehci->sitd_pool, sitd,
1067 sitd->sitd_dma);
1071 is_in = (stream->bEndpointAddress & USB_DIR_IN) ? 0x10 : 0;
1072 stream->bEndpointAddress &= 0x0f;
1073 if (stream->ep)
1074 stream->ep->hcpriv = NULL;
1076 if (stream->rescheduled) {
1077 ehci_info (ehci, "ep%d%s-iso rescheduled "
1078 "%lu times in %lu seconds\n",
1079 stream->bEndpointAddress, is_in ? "in" : "out",
1080 stream->rescheduled,
1081 ((jiffies - stream->start)/HZ)
1085 kfree(stream);
1089 static inline struct ehci_iso_stream *
1090 iso_stream_get (struct ehci_iso_stream *stream)
1092 if (likely (stream != NULL))
1093 stream->refcount++;
1094 return stream;
1097 static struct ehci_iso_stream *
1098 iso_stream_find (struct ehci_hcd *ehci, struct urb *urb)
1100 unsigned epnum;
1101 struct ehci_iso_stream *stream;
1102 struct usb_host_endpoint *ep;
1103 unsigned long flags;
1105 epnum = usb_pipeendpoint (urb->pipe);
1106 if (usb_pipein(urb->pipe))
1107 ep = urb->dev->ep_in[epnum];
1108 else
1109 ep = urb->dev->ep_out[epnum];
1111 spin_lock_irqsave (&ehci->lock, flags);
1112 stream = ep->hcpriv;
1114 if (unlikely (stream == NULL)) {
1115 stream = iso_stream_alloc(GFP_ATOMIC);
1116 if (likely (stream != NULL)) {
1117 /* dev->ep owns the initial refcount */
1118 ep->hcpriv = stream;
1119 stream->ep = ep;
1120 iso_stream_init(ehci, stream, urb->dev, urb->pipe,
1121 urb->interval);
1124 /* if dev->ep [epnum] is a QH, hw is set */
1125 } else if (unlikely (stream->hw != NULL)) {
1126 ehci_dbg (ehci, "dev %s ep%d%s, not iso??\n",
1127 urb->dev->devpath, epnum,
1128 usb_pipein(urb->pipe) ? "in" : "out");
1129 stream = NULL;
1132 /* caller guarantees an eventual matching iso_stream_put */
1133 stream = iso_stream_get (stream);
1135 spin_unlock_irqrestore (&ehci->lock, flags);
1136 return stream;
1139 /*-------------------------------------------------------------------------*/
1141 /* ehci_iso_sched ops can be ITD-only or SITD-only */
1143 static struct ehci_iso_sched *
1144 iso_sched_alloc (unsigned packets, gfp_t mem_flags)
1146 struct ehci_iso_sched *iso_sched;
1147 int size = sizeof *iso_sched;
1149 size += packets * sizeof (struct ehci_iso_packet);
1150 iso_sched = kzalloc(size, mem_flags);
1151 if (likely (iso_sched != NULL)) {
1152 INIT_LIST_HEAD (&iso_sched->td_list);
1154 return iso_sched;
1157 static inline void
1158 itd_sched_init(
1159 struct ehci_hcd *ehci,
1160 struct ehci_iso_sched *iso_sched,
1161 struct ehci_iso_stream *stream,
1162 struct urb *urb
1165 unsigned i;
1166 dma_addr_t dma = urb->transfer_dma;
1168 /* how many uframes are needed for these transfers */
1169 iso_sched->span = urb->number_of_packets * stream->interval;
1171 /* figure out per-uframe itd fields that we'll need later
1172 * when we fit new itds into the schedule.
1174 for (i = 0; i < urb->number_of_packets; i++) {
1175 struct ehci_iso_packet *uframe = &iso_sched->packet [i];
1176 unsigned length;
1177 dma_addr_t buf;
1178 u32 trans;
1180 length = urb->iso_frame_desc [i].length;
1181 buf = dma + urb->iso_frame_desc [i].offset;
1183 trans = EHCI_ISOC_ACTIVE;
1184 trans |= buf & 0x0fff;
1185 if (unlikely (((i + 1) == urb->number_of_packets))
1186 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1187 trans |= EHCI_ITD_IOC;
1188 trans |= length << 16;
1189 uframe->transaction = cpu_to_hc32(ehci, trans);
1191 /* might need to cross a buffer page within a uframe */
1192 uframe->bufp = (buf & ~(u64)0x0fff);
1193 buf += length;
1194 if (unlikely ((uframe->bufp != (buf & ~(u64)0x0fff))))
1195 uframe->cross = 1;
1199 static void
1200 iso_sched_free (
1201 struct ehci_iso_stream *stream,
1202 struct ehci_iso_sched *iso_sched
1205 if (!iso_sched)
1206 return;
1207 // caller must hold ehci->lock!
1208 list_splice (&iso_sched->td_list, &stream->free_list);
1209 kfree (iso_sched);
1212 static int
1213 itd_urb_transaction (
1214 struct ehci_iso_stream *stream,
1215 struct ehci_hcd *ehci,
1216 struct urb *urb,
1217 gfp_t mem_flags
1220 struct ehci_itd *itd;
1221 dma_addr_t itd_dma;
1222 int i;
1223 unsigned num_itds;
1224 struct ehci_iso_sched *sched;
1225 unsigned long flags;
1227 sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1228 if (unlikely (sched == NULL))
1229 return -ENOMEM;
1231 itd_sched_init(ehci, sched, stream, urb);
1233 if (urb->interval < 8)
1234 num_itds = 1 + (sched->span + 7) / 8;
1235 else
1236 num_itds = urb->number_of_packets;
1238 /* allocate/init ITDs */
1239 spin_lock_irqsave (&ehci->lock, flags);
1240 for (i = 0; i < num_itds; i++) {
1242 /* free_list.next might be cache-hot ... but maybe
1243 * the HC caches it too. avoid that issue for now.
1246 /* prefer previously-allocated itds */
1247 if (likely (!list_empty(&stream->free_list))) {
1248 itd = list_entry (stream->free_list.prev,
1249 struct ehci_itd, itd_list);
1250 list_del (&itd->itd_list);
1251 itd_dma = itd->itd_dma;
1252 } else {
1253 spin_unlock_irqrestore (&ehci->lock, flags);
1254 itd = dma_pool_alloc (ehci->itd_pool, mem_flags,
1255 &itd_dma);
1256 spin_lock_irqsave (&ehci->lock, flags);
1257 if (!itd) {
1258 iso_sched_free(stream, sched);
1259 spin_unlock_irqrestore(&ehci->lock, flags);
1260 return -ENOMEM;
1264 memset (itd, 0, sizeof *itd);
1265 itd->itd_dma = itd_dma;
1266 list_add (&itd->itd_list, &sched->td_list);
1268 spin_unlock_irqrestore (&ehci->lock, flags);
1270 /* temporarily store schedule info in hcpriv */
1271 urb->hcpriv = sched;
1272 urb->error_count = 0;
1273 return 0;
1276 /*-------------------------------------------------------------------------*/
1278 static inline int
1279 itd_slot_ok (
1280 struct ehci_hcd *ehci,
1281 u32 mod,
1282 u32 uframe,
1283 u8 usecs,
1284 u32 period
1287 uframe %= period;
1288 do {
1289 /* can't commit more than 80% periodic == 100 usec */
1290 if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7)
1291 > (100 - usecs))
1292 return 0;
1294 /* we know urb->interval is 2^N uframes */
1295 uframe += period;
1296 } while (uframe < mod);
1297 return 1;
1300 static inline int
1301 sitd_slot_ok (
1302 struct ehci_hcd *ehci,
1303 u32 mod,
1304 struct ehci_iso_stream *stream,
1305 u32 uframe,
1306 struct ehci_iso_sched *sched,
1307 u32 period_uframes
1310 u32 mask, tmp;
1311 u32 frame, uf;
1313 mask = stream->raw_mask << (uframe & 7);
1315 /* for IN, don't wrap CSPLIT into the next frame */
1316 if (mask & ~0xffff)
1317 return 0;
1319 /* this multi-pass logic is simple, but performance may
1320 * suffer when the schedule data isn't cached.
1323 /* check bandwidth */
1324 uframe %= period_uframes;
1325 do {
1326 u32 max_used;
1328 frame = uframe >> 3;
1329 uf = uframe & 7;
1331 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
1332 /* The tt's fullspeed bus bandwidth must be available.
1333 * tt_available scheduling guarantees 10+% for control/bulk.
1335 if (!tt_available (ehci, period_uframes << 3,
1336 stream->udev, frame, uf, stream->tt_usecs))
1337 return 0;
1338 #else
1339 /* tt must be idle for start(s), any gap, and csplit.
1340 * assume scheduling slop leaves 10+% for control/bulk.
1342 if (!tt_no_collision (ehci, period_uframes << 3,
1343 stream->udev, frame, mask))
1344 return 0;
1345 #endif
1347 /* check starts (OUT uses more than one) */
1348 max_used = 100 - stream->usecs;
1349 for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) {
1350 if (periodic_usecs (ehci, frame, uf) > max_used)
1351 return 0;
1354 /* for IN, check CSPLIT */
1355 if (stream->c_usecs) {
1356 uf = uframe & 7;
1357 max_used = 100 - stream->c_usecs;
1358 do {
1359 tmp = 1 << uf;
1360 tmp <<= 8;
1361 if ((stream->raw_mask & tmp) == 0)
1362 continue;
1363 if (periodic_usecs (ehci, frame, uf)
1364 > max_used)
1365 return 0;
1366 } while (++uf < 8);
1369 /* we know urb->interval is 2^N uframes */
1370 uframe += period_uframes;
1371 } while (uframe < mod);
1373 stream->splits = cpu_to_hc32(ehci, stream->raw_mask << (uframe & 7));
1374 return 1;
1378 * This scheduler plans almost as far into the future as it has actual
1379 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
1380 * "as small as possible" to be cache-friendlier.) That limits the size
1381 * transfers you can stream reliably; avoid more than 64 msec per urb.
1382 * Also avoid queue depths of less than ehci's worst irq latency (affected
1383 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
1384 * and other factors); or more than about 230 msec total (for portability,
1385 * given EHCI_TUNE_FLS and the slop). Or, write a smarter scheduler!
1388 #define SCHEDULE_SLOP 10 /* frames */
1390 static int
1391 iso_stream_schedule (
1392 struct ehci_hcd *ehci,
1393 struct urb *urb,
1394 struct ehci_iso_stream *stream
1397 u32 now, start, max, period;
1398 int status;
1399 unsigned mod = ehci->periodic_size << 3;
1400 struct ehci_iso_sched *sched = urb->hcpriv;
1402 if (sched->span > (mod - 8 * SCHEDULE_SLOP)) {
1403 ehci_dbg (ehci, "iso request %p too long\n", urb);
1404 status = -EFBIG;
1405 goto fail;
1408 if ((stream->depth + sched->span) > mod) {
1409 ehci_dbg (ehci, "request %p would overflow (%d+%d>%d)\n",
1410 urb, stream->depth, sched->span, mod);
1411 status = -EFBIG;
1412 goto fail;
1415 period = urb->interval;
1416 if (!stream->highspeed)
1417 period <<= 3;
1419 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1421 /* when's the last uframe this urb could start? */
1422 max = now + mod;
1424 /* Typical case: reuse current schedule, stream is still active.
1425 * Hopefully there are no gaps from the host falling behind
1426 * (irq delays etc), but if there are we'll take the next
1427 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
1429 if (likely (!list_empty (&stream->td_list))) {
1430 start = stream->next_uframe;
1431 if (start < now)
1432 start += mod;
1434 /* Fell behind (by up to twice the slop amount)? */
1435 if (start >= max - 2 * 8 * SCHEDULE_SLOP)
1436 start += period * DIV_ROUND_UP(
1437 max - start, period) - mod;
1439 /* Tried to schedule too far into the future? */
1440 if (unlikely((start + sched->span) >= max)) {
1441 status = -EFBIG;
1442 goto fail;
1444 stream->next_uframe = start;
1445 goto ready;
1448 /* need to schedule; when's the next (u)frame we could start?
1449 * this is bigger than ehci->i_thresh allows; scheduling itself
1450 * isn't free, the slop should handle reasonably slow cpus. it
1451 * can also help high bandwidth if the dma and irq loads don't
1452 * jump until after the queue is primed.
1454 start = SCHEDULE_SLOP * 8 + (now & ~0x07);
1455 start %= mod;
1456 stream->next_uframe = start;
1458 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1460 /* find a uframe slot with enough bandwidth */
1461 for (; start < (stream->next_uframe + period); start++) {
1462 int enough_space;
1464 /* check schedule: enough space? */
1465 if (stream->highspeed)
1466 enough_space = itd_slot_ok (ehci, mod, start,
1467 stream->usecs, period);
1468 else {
1469 if ((start % 8) >= 6)
1470 continue;
1471 enough_space = sitd_slot_ok (ehci, mod, stream,
1472 start, sched, period);
1475 /* schedule it here if there's enough bandwidth */
1476 if (enough_space) {
1477 stream->next_uframe = start % mod;
1478 goto ready;
1482 /* no room in the schedule */
1483 ehci_dbg (ehci, "iso %ssched full %p (now %d max %d)\n",
1484 list_empty (&stream->td_list) ? "" : "re",
1485 urb, now, max);
1486 status = -ENOSPC;
1488 fail:
1489 iso_sched_free (stream, sched);
1490 urb->hcpriv = NULL;
1491 return status;
1493 ready:
1494 /* report high speed start in uframes; full speed, in frames */
1495 urb->start_frame = stream->next_uframe;
1496 if (!stream->highspeed)
1497 urb->start_frame >>= 3;
1498 return 0;
1501 /*-------------------------------------------------------------------------*/
1503 static inline void
1504 itd_init(struct ehci_hcd *ehci, struct ehci_iso_stream *stream,
1505 struct ehci_itd *itd)
1507 int i;
1509 /* it's been recently zeroed */
1510 itd->hw_next = EHCI_LIST_END(ehci);
1511 itd->hw_bufp [0] = stream->buf0;
1512 itd->hw_bufp [1] = stream->buf1;
1513 itd->hw_bufp [2] = stream->buf2;
1515 for (i = 0; i < 8; i++)
1516 itd->index[i] = -1;
1518 /* All other fields are filled when scheduling */
1521 static inline void
1522 itd_patch(
1523 struct ehci_hcd *ehci,
1524 struct ehci_itd *itd,
1525 struct ehci_iso_sched *iso_sched,
1526 unsigned index,
1527 u16 uframe
1530 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1531 unsigned pg = itd->pg;
1533 // BUG_ON (pg == 6 && uf->cross);
1535 uframe &= 0x07;
1536 itd->index [uframe] = index;
1538 itd->hw_transaction[uframe] = uf->transaction;
1539 itd->hw_transaction[uframe] |= cpu_to_hc32(ehci, pg << 12);
1540 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, uf->bufp & ~(u32)0);
1541 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(uf->bufp >> 32));
1543 /* iso_frame_desc[].offset must be strictly increasing */
1544 if (unlikely (uf->cross)) {
1545 u64 bufp = uf->bufp + 4096;
1547 itd->pg = ++pg;
1548 itd->hw_bufp[pg] |= cpu_to_hc32(ehci, bufp & ~(u32)0);
1549 itd->hw_bufp_hi[pg] |= cpu_to_hc32(ehci, (u32)(bufp >> 32));
1553 static inline void
1554 itd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_itd *itd)
1556 union ehci_shadow *prev = &ehci->pshadow[frame];
1557 __hc32 *hw_p = &ehci->periodic[frame];
1558 union ehci_shadow here = *prev;
1559 __hc32 type = 0;
1561 /* skip any iso nodes which might belong to previous microframes */
1562 while (here.ptr) {
1563 type = Q_NEXT_TYPE(ehci, *hw_p);
1564 if (type == cpu_to_hc32(ehci, Q_TYPE_QH))
1565 break;
1566 prev = periodic_next_shadow(ehci, prev, type);
1567 hw_p = shadow_next_periodic(ehci, &here, type);
1568 here = *prev;
1571 itd->itd_next = here;
1572 itd->hw_next = *hw_p;
1573 prev->itd = itd;
1574 itd->frame = frame;
1575 wmb ();
1576 *hw_p = cpu_to_hc32(ehci, itd->itd_dma | Q_TYPE_ITD);
1579 /* fit urb's itds into the selected schedule slot; activate as needed */
1580 static int
1581 itd_link_urb (
1582 struct ehci_hcd *ehci,
1583 struct urb *urb,
1584 unsigned mod,
1585 struct ehci_iso_stream *stream
1588 int packet;
1589 unsigned next_uframe, uframe, frame;
1590 struct ehci_iso_sched *iso_sched = urb->hcpriv;
1591 struct ehci_itd *itd;
1593 next_uframe = stream->next_uframe % mod;
1595 if (unlikely (list_empty(&stream->td_list))) {
1596 ehci_to_hcd(ehci)->self.bandwidth_allocated
1597 += stream->bandwidth;
1598 ehci_vdbg (ehci,
1599 "schedule devp %s ep%d%s-iso period %d start %d.%d\n",
1600 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
1601 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
1602 urb->interval,
1603 next_uframe >> 3, next_uframe & 0x7);
1604 stream->start = jiffies;
1606 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
1608 /* fill iTDs uframe by uframe */
1609 for (packet = 0, itd = NULL; packet < urb->number_of_packets; ) {
1610 if (itd == NULL) {
1611 /* ASSERT: we have all necessary itds */
1612 // BUG_ON (list_empty (&iso_sched->td_list));
1614 /* ASSERT: no itds for this endpoint in this uframe */
1616 itd = list_entry (iso_sched->td_list.next,
1617 struct ehci_itd, itd_list);
1618 list_move_tail (&itd->itd_list, &stream->td_list);
1619 itd->stream = iso_stream_get (stream);
1620 itd->urb = urb;
1621 itd_init (ehci, stream, itd);
1624 uframe = next_uframe & 0x07;
1625 frame = next_uframe >> 3;
1627 itd_patch(ehci, itd, iso_sched, packet, uframe);
1629 next_uframe += stream->interval;
1630 stream->depth += stream->interval;
1631 next_uframe %= mod;
1632 packet++;
1634 /* link completed itds into the schedule */
1635 if (((next_uframe >> 3) != frame)
1636 || packet == urb->number_of_packets) {
1637 itd_link (ehci, frame % ehci->periodic_size, itd);
1638 itd = NULL;
1641 stream->next_uframe = next_uframe;
1643 /* don't need that schedule data any more */
1644 iso_sched_free (stream, iso_sched);
1645 urb->hcpriv = NULL;
1647 timer_action (ehci, TIMER_IO_WATCHDOG);
1648 return enable_periodic(ehci);
1651 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
1653 /* Process and recycle a completed ITD. Return true iff its urb completed,
1654 * and hence its completion callback probably added things to the hardware
1655 * schedule.
1657 * Note that we carefully avoid recycling this descriptor until after any
1658 * completion callback runs, so that it won't be reused quickly. That is,
1659 * assuming (a) no more than two urbs per frame on this endpoint, and also
1660 * (b) only this endpoint's completions submit URBs. It seems some silicon
1661 * corrupts things if you reuse completed descriptors very quickly...
1663 static unsigned
1664 itd_complete (
1665 struct ehci_hcd *ehci,
1666 struct ehci_itd *itd
1668 struct urb *urb = itd->urb;
1669 struct usb_iso_packet_descriptor *desc;
1670 u32 t;
1671 unsigned uframe;
1672 int urb_index = -1;
1673 struct ehci_iso_stream *stream = itd->stream;
1674 struct usb_device *dev;
1675 unsigned retval = false;
1677 /* for each uframe with a packet */
1678 for (uframe = 0; uframe < 8; uframe++) {
1679 if (likely (itd->index[uframe] == -1))
1680 continue;
1681 urb_index = itd->index[uframe];
1682 desc = &urb->iso_frame_desc [urb_index];
1684 t = hc32_to_cpup(ehci, &itd->hw_transaction [uframe]);
1685 itd->hw_transaction [uframe] = 0;
1686 stream->depth -= stream->interval;
1688 /* report transfer status */
1689 if (unlikely (t & ISO_ERRS)) {
1690 urb->error_count++;
1691 if (t & EHCI_ISOC_BUF_ERR)
1692 desc->status = usb_pipein (urb->pipe)
1693 ? -ENOSR /* hc couldn't read */
1694 : -ECOMM; /* hc couldn't write */
1695 else if (t & EHCI_ISOC_BABBLE)
1696 desc->status = -EOVERFLOW;
1697 else /* (t & EHCI_ISOC_XACTERR) */
1698 desc->status = -EPROTO;
1700 /* HC need not update length with this error */
1701 if (!(t & EHCI_ISOC_BABBLE)) {
1702 desc->actual_length = EHCI_ITD_LENGTH(t);
1703 urb->actual_length += desc->actual_length;
1705 } else if (likely ((t & EHCI_ISOC_ACTIVE) == 0)) {
1706 desc->status = 0;
1707 desc->actual_length = EHCI_ITD_LENGTH(t);
1708 urb->actual_length += desc->actual_length;
1709 } else {
1710 /* URB was too late */
1711 desc->status = -EXDEV;
1715 /* handle completion now? */
1716 if (likely ((urb_index + 1) != urb->number_of_packets))
1717 goto done;
1719 /* ASSERT: it's really the last itd for this urb
1720 list_for_each_entry (itd, &stream->td_list, itd_list)
1721 BUG_ON (itd->urb == urb);
1724 /* give urb back to the driver; completion often (re)submits */
1725 dev = urb->dev;
1726 ehci_urb_done(ehci, urb, 0);
1727 retval = true;
1728 urb = NULL;
1729 (void) disable_periodic(ehci);
1730 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
1732 if (unlikely(list_is_singular(&stream->td_list))) {
1733 ehci_to_hcd(ehci)->self.bandwidth_allocated
1734 -= stream->bandwidth;
1735 ehci_vdbg (ehci,
1736 "deschedule devp %s ep%d%s-iso\n",
1737 dev->devpath, stream->bEndpointAddress & 0x0f,
1738 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
1740 iso_stream_put (ehci, stream);
1742 done:
1743 itd->urb = NULL;
1744 if (ehci->clock_frame != itd->frame || itd->index[7] != -1) {
1745 /* OK to recycle this ITD now. */
1746 itd->stream = NULL;
1747 list_move(&itd->itd_list, &stream->free_list);
1748 iso_stream_put(ehci, stream);
1749 } else {
1750 /* HW might remember this ITD, so we can't recycle it yet.
1751 * Move it to a safe place until a new frame starts.
1753 list_move(&itd->itd_list, &ehci->cached_itd_list);
1754 if (stream->refcount == 2) {
1755 /* If iso_stream_put() were called here, stream
1756 * would be freed. Instead, just prevent reuse.
1758 stream->ep->hcpriv = NULL;
1759 stream->ep = NULL;
1762 return retval;
1765 /*-------------------------------------------------------------------------*/
1767 static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
1768 gfp_t mem_flags)
1770 int status = -EINVAL;
1771 unsigned long flags;
1772 struct ehci_iso_stream *stream;
1774 /* Get iso_stream head */
1775 stream = iso_stream_find (ehci, urb);
1776 if (unlikely (stream == NULL)) {
1777 ehci_dbg (ehci, "can't get iso stream\n");
1778 return -ENOMEM;
1780 if (unlikely (urb->interval != stream->interval)) {
1781 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
1782 stream->interval, urb->interval);
1783 goto done;
1786 #ifdef EHCI_URB_TRACE
1787 ehci_dbg (ehci,
1788 "%s %s urb %p ep%d%s len %d, %d pkts %d uframes [%p]\n",
1789 __func__, urb->dev->devpath, urb,
1790 usb_pipeendpoint (urb->pipe),
1791 usb_pipein (urb->pipe) ? "in" : "out",
1792 urb->transfer_buffer_length,
1793 urb->number_of_packets, urb->interval,
1794 stream);
1795 #endif
1797 /* allocate ITDs w/o locking anything */
1798 status = itd_urb_transaction (stream, ehci, urb, mem_flags);
1799 if (unlikely (status < 0)) {
1800 ehci_dbg (ehci, "can't init itds\n");
1801 goto done;
1804 /* schedule ... need to lock */
1805 spin_lock_irqsave (&ehci->lock, flags);
1806 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1807 &ehci_to_hcd(ehci)->flags))) {
1808 status = -ESHUTDOWN;
1809 goto done_not_linked;
1811 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
1812 if (unlikely(status))
1813 goto done_not_linked;
1814 status = iso_stream_schedule(ehci, urb, stream);
1815 if (likely (status == 0))
1816 itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
1817 else
1818 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
1819 done_not_linked:
1820 spin_unlock_irqrestore (&ehci->lock, flags);
1822 done:
1823 if (unlikely (status < 0))
1824 iso_stream_put (ehci, stream);
1825 return status;
1828 /*-------------------------------------------------------------------------*/
1831 * "Split ISO TDs" ... used for USB 1.1 devices going through the
1832 * TTs in USB 2.0 hubs. These need microframe scheduling.
1835 static inline void
1836 sitd_sched_init(
1837 struct ehci_hcd *ehci,
1838 struct ehci_iso_sched *iso_sched,
1839 struct ehci_iso_stream *stream,
1840 struct urb *urb
1843 unsigned i;
1844 dma_addr_t dma = urb->transfer_dma;
1846 /* how many frames are needed for these transfers */
1847 iso_sched->span = urb->number_of_packets * stream->interval;
1849 /* figure out per-frame sitd fields that we'll need later
1850 * when we fit new sitds into the schedule.
1852 for (i = 0; i < urb->number_of_packets; i++) {
1853 struct ehci_iso_packet *packet = &iso_sched->packet [i];
1854 unsigned length;
1855 dma_addr_t buf;
1856 u32 trans;
1858 length = urb->iso_frame_desc [i].length & 0x03ff;
1859 buf = dma + urb->iso_frame_desc [i].offset;
1861 trans = SITD_STS_ACTIVE;
1862 if (((i + 1) == urb->number_of_packets)
1863 && !(urb->transfer_flags & URB_NO_INTERRUPT))
1864 trans |= SITD_IOC;
1865 trans |= length << 16;
1866 packet->transaction = cpu_to_hc32(ehci, trans);
1868 /* might need to cross a buffer page within a td */
1869 packet->bufp = buf;
1870 packet->buf1 = (buf + length) & ~0x0fff;
1871 if (packet->buf1 != (buf & ~(u64)0x0fff))
1872 packet->cross = 1;
1874 /* OUT uses multiple start-splits */
1875 if (stream->bEndpointAddress & USB_DIR_IN)
1876 continue;
1877 length = (length + 187) / 188;
1878 if (length > 1) /* BEGIN vs ALL */
1879 length |= 1 << 3;
1880 packet->buf1 |= length;
1884 static int
1885 sitd_urb_transaction (
1886 struct ehci_iso_stream *stream,
1887 struct ehci_hcd *ehci,
1888 struct urb *urb,
1889 gfp_t mem_flags
1892 struct ehci_sitd *sitd;
1893 dma_addr_t sitd_dma;
1894 int i;
1895 struct ehci_iso_sched *iso_sched;
1896 unsigned long flags;
1898 iso_sched = iso_sched_alloc (urb->number_of_packets, mem_flags);
1899 if (iso_sched == NULL)
1900 return -ENOMEM;
1902 sitd_sched_init(ehci, iso_sched, stream, urb);
1904 /* allocate/init sITDs */
1905 spin_lock_irqsave (&ehci->lock, flags);
1906 for (i = 0; i < urb->number_of_packets; i++) {
1908 /* NOTE: for now, we don't try to handle wraparound cases
1909 * for IN (using sitd->hw_backpointer, like a FSTN), which
1910 * means we never need two sitds for full speed packets.
1913 /* free_list.next might be cache-hot ... but maybe
1914 * the HC caches it too. avoid that issue for now.
1917 /* prefer previously-allocated sitds */
1918 if (!list_empty(&stream->free_list)) {
1919 sitd = list_entry (stream->free_list.prev,
1920 struct ehci_sitd, sitd_list);
1921 list_del (&sitd->sitd_list);
1922 sitd_dma = sitd->sitd_dma;
1923 } else {
1924 spin_unlock_irqrestore (&ehci->lock, flags);
1925 sitd = dma_pool_alloc (ehci->sitd_pool, mem_flags,
1926 &sitd_dma);
1927 spin_lock_irqsave (&ehci->lock, flags);
1928 if (!sitd) {
1929 iso_sched_free(stream, iso_sched);
1930 spin_unlock_irqrestore(&ehci->lock, flags);
1931 return -ENOMEM;
1935 memset (sitd, 0, sizeof *sitd);
1936 sitd->sitd_dma = sitd_dma;
1937 list_add (&sitd->sitd_list, &iso_sched->td_list);
1940 /* temporarily store schedule info in hcpriv */
1941 urb->hcpriv = iso_sched;
1942 urb->error_count = 0;
1944 spin_unlock_irqrestore (&ehci->lock, flags);
1945 return 0;
1948 /*-------------------------------------------------------------------------*/
1950 static inline void
1951 sitd_patch(
1952 struct ehci_hcd *ehci,
1953 struct ehci_iso_stream *stream,
1954 struct ehci_sitd *sitd,
1955 struct ehci_iso_sched *iso_sched,
1956 unsigned index
1959 struct ehci_iso_packet *uf = &iso_sched->packet [index];
1960 u64 bufp = uf->bufp;
1962 sitd->hw_next = EHCI_LIST_END(ehci);
1963 sitd->hw_fullspeed_ep = stream->address;
1964 sitd->hw_uframe = stream->splits;
1965 sitd->hw_results = uf->transaction;
1966 sitd->hw_backpointer = EHCI_LIST_END(ehci);
1968 bufp = uf->bufp;
1969 sitd->hw_buf[0] = cpu_to_hc32(ehci, bufp);
1970 sitd->hw_buf_hi[0] = cpu_to_hc32(ehci, bufp >> 32);
1972 sitd->hw_buf[1] = cpu_to_hc32(ehci, uf->buf1);
1973 if (uf->cross)
1974 bufp += 4096;
1975 sitd->hw_buf_hi[1] = cpu_to_hc32(ehci, bufp >> 32);
1976 sitd->index = index;
1979 static inline void
1980 sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
1982 /* note: sitd ordering could matter (CSPLIT then SSPLIT) */
1983 sitd->sitd_next = ehci->pshadow [frame];
1984 sitd->hw_next = ehci->periodic [frame];
1985 ehci->pshadow [frame].sitd = sitd;
1986 sitd->frame = frame;
1987 wmb ();
1988 ehci->periodic[frame] = cpu_to_hc32(ehci, sitd->sitd_dma | Q_TYPE_SITD);
1991 /* fit urb's sitds into the selected schedule slot; activate as needed */
1992 static int
1993 sitd_link_urb (
1994 struct ehci_hcd *ehci,
1995 struct urb *urb,
1996 unsigned mod,
1997 struct ehci_iso_stream *stream
2000 int packet;
2001 unsigned next_uframe;
2002 struct ehci_iso_sched *sched = urb->hcpriv;
2003 struct ehci_sitd *sitd;
2005 next_uframe = stream->next_uframe;
2007 if (list_empty(&stream->td_list)) {
2008 /* usbfs ignores TT bandwidth */
2009 ehci_to_hcd(ehci)->self.bandwidth_allocated
2010 += stream->bandwidth;
2011 ehci_vdbg (ehci,
2012 "sched devp %s ep%d%s-iso [%d] %dms/%04x\n",
2013 urb->dev->devpath, stream->bEndpointAddress & 0x0f,
2014 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out",
2015 (next_uframe >> 3) % ehci->periodic_size,
2016 stream->interval, hc32_to_cpu(ehci, stream->splits));
2017 stream->start = jiffies;
2019 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs++;
2021 /* fill sITDs frame by frame */
2022 for (packet = 0, sitd = NULL;
2023 packet < urb->number_of_packets;
2024 packet++) {
2026 /* ASSERT: we have all necessary sitds */
2027 BUG_ON (list_empty (&sched->td_list));
2029 /* ASSERT: no itds for this endpoint in this frame */
2031 sitd = list_entry (sched->td_list.next,
2032 struct ehci_sitd, sitd_list);
2033 list_move_tail (&sitd->sitd_list, &stream->td_list);
2034 sitd->stream = iso_stream_get (stream);
2035 sitd->urb = urb;
2037 sitd_patch(ehci, stream, sitd, sched, packet);
2038 sitd_link (ehci, (next_uframe >> 3) % ehci->periodic_size,
2039 sitd);
2041 next_uframe += stream->interval << 3;
2042 stream->depth += stream->interval << 3;
2044 stream->next_uframe = next_uframe % mod;
2046 /* don't need that schedule data any more */
2047 iso_sched_free (stream, sched);
2048 urb->hcpriv = NULL;
2050 timer_action (ehci, TIMER_IO_WATCHDOG);
2051 return enable_periodic(ehci);
2054 /*-------------------------------------------------------------------------*/
2056 #define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
2057 | SITD_STS_XACT | SITD_STS_MMF)
2059 /* Process and recycle a completed SITD. Return true iff its urb completed,
2060 * and hence its completion callback probably added things to the hardware
2061 * schedule.
2063 * Note that we carefully avoid recycling this descriptor until after any
2064 * completion callback runs, so that it won't be reused quickly. That is,
2065 * assuming (a) no more than two urbs per frame on this endpoint, and also
2066 * (b) only this endpoint's completions submit URBs. It seems some silicon
2067 * corrupts things if you reuse completed descriptors very quickly...
2069 static unsigned
2070 sitd_complete (
2071 struct ehci_hcd *ehci,
2072 struct ehci_sitd *sitd
2074 struct urb *urb = sitd->urb;
2075 struct usb_iso_packet_descriptor *desc;
2076 u32 t;
2077 int urb_index = -1;
2078 struct ehci_iso_stream *stream = sitd->stream;
2079 struct usb_device *dev;
2080 unsigned retval = false;
2082 urb_index = sitd->index;
2083 desc = &urb->iso_frame_desc [urb_index];
2084 t = hc32_to_cpup(ehci, &sitd->hw_results);
2086 /* report transfer status */
2087 if (t & SITD_ERRS) {
2088 urb->error_count++;
2089 if (t & SITD_STS_DBE)
2090 desc->status = usb_pipein (urb->pipe)
2091 ? -ENOSR /* hc couldn't read */
2092 : -ECOMM; /* hc couldn't write */
2093 else if (t & SITD_STS_BABBLE)
2094 desc->status = -EOVERFLOW;
2095 else /* XACT, MMF, etc */
2096 desc->status = -EPROTO;
2097 } else {
2098 desc->status = 0;
2099 desc->actual_length = desc->length - SITD_LENGTH(t);
2100 urb->actual_length += desc->actual_length;
2102 stream->depth -= stream->interval << 3;
2104 /* handle completion now? */
2105 if ((urb_index + 1) != urb->number_of_packets)
2106 goto done;
2108 /* ASSERT: it's really the last sitd for this urb
2109 list_for_each_entry (sitd, &stream->td_list, sitd_list)
2110 BUG_ON (sitd->urb == urb);
2113 /* give urb back to the driver; completion often (re)submits */
2114 dev = urb->dev;
2115 ehci_urb_done(ehci, urb, 0);
2116 retval = true;
2117 urb = NULL;
2118 (void) disable_periodic(ehci);
2119 ehci_to_hcd(ehci)->self.bandwidth_isoc_reqs--;
2121 if (list_is_singular(&stream->td_list)) {
2122 ehci_to_hcd(ehci)->self.bandwidth_allocated
2123 -= stream->bandwidth;
2124 ehci_vdbg (ehci,
2125 "deschedule devp %s ep%d%s-iso\n",
2126 dev->devpath, stream->bEndpointAddress & 0x0f,
2127 (stream->bEndpointAddress & USB_DIR_IN) ? "in" : "out");
2129 iso_stream_put (ehci, stream);
2131 done:
2132 sitd->urb = NULL;
2133 if (ehci->clock_frame != sitd->frame) {
2134 /* OK to recycle this SITD now. */
2135 sitd->stream = NULL;
2136 list_move(&sitd->sitd_list, &stream->free_list);
2137 iso_stream_put(ehci, stream);
2138 } else {
2139 /* HW might remember this SITD, so we can't recycle it yet.
2140 * Move it to a safe place until a new frame starts.
2142 list_move(&sitd->sitd_list, &ehci->cached_sitd_list);
2143 if (stream->refcount == 2) {
2144 /* If iso_stream_put() were called here, stream
2145 * would be freed. Instead, just prevent reuse.
2147 stream->ep->hcpriv = NULL;
2148 stream->ep = NULL;
2151 return retval;
2155 static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
2156 gfp_t mem_flags)
2158 int status = -EINVAL;
2159 unsigned long flags;
2160 struct ehci_iso_stream *stream;
2162 /* Get iso_stream head */
2163 stream = iso_stream_find (ehci, urb);
2164 if (stream == NULL) {
2165 ehci_dbg (ehci, "can't get iso stream\n");
2166 return -ENOMEM;
2168 if (urb->interval != stream->interval) {
2169 ehci_dbg (ehci, "can't change iso interval %d --> %d\n",
2170 stream->interval, urb->interval);
2171 goto done;
2174 #ifdef EHCI_URB_TRACE
2175 ehci_dbg (ehci,
2176 "submit %p dev%s ep%d%s-iso len %d\n",
2177 urb, urb->dev->devpath,
2178 usb_pipeendpoint (urb->pipe),
2179 usb_pipein (urb->pipe) ? "in" : "out",
2180 urb->transfer_buffer_length);
2181 #endif
2183 /* allocate SITDs */
2184 status = sitd_urb_transaction (stream, ehci, urb, mem_flags);
2185 if (status < 0) {
2186 ehci_dbg (ehci, "can't init sitds\n");
2187 goto done;
2190 /* schedule ... need to lock */
2191 spin_lock_irqsave (&ehci->lock, flags);
2192 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
2193 &ehci_to_hcd(ehci)->flags))) {
2194 status = -ESHUTDOWN;
2195 goto done_not_linked;
2197 status = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
2198 if (unlikely(status))
2199 goto done_not_linked;
2200 status = iso_stream_schedule(ehci, urb, stream);
2201 if (status == 0)
2202 sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
2203 else
2204 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
2205 done_not_linked:
2206 spin_unlock_irqrestore (&ehci->lock, flags);
2208 done:
2209 if (status < 0)
2210 iso_stream_put (ehci, stream);
2211 return status;
2214 /*-------------------------------------------------------------------------*/
2216 static void free_cached_lists(struct ehci_hcd *ehci)
2218 struct ehci_itd *itd, *n;
2219 struct ehci_sitd *sitd, *sn;
2221 list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
2222 struct ehci_iso_stream *stream = itd->stream;
2223 itd->stream = NULL;
2224 list_move(&itd->itd_list, &stream->free_list);
2225 iso_stream_put(ehci, stream);
2228 list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
2229 struct ehci_iso_stream *stream = sitd->stream;
2230 sitd->stream = NULL;
2231 list_move(&sitd->sitd_list, &stream->free_list);
2232 iso_stream_put(ehci, stream);
2236 /*-------------------------------------------------------------------------*/
2238 static void
2239 scan_periodic (struct ehci_hcd *ehci)
2241 unsigned now_uframe, frame, clock, clock_frame, mod;
2242 unsigned modified;
2244 mod = ehci->periodic_size << 3;
2247 * When running, scan from last scan point up to "now"
2248 * else clean up by scanning everything that's left.
2249 * Touches as few pages as possible: cache-friendly.
2251 now_uframe = ehci->next_uframe;
2252 if (HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2253 clock = ehci_readl(ehci, &ehci->regs->frame_index);
2254 clock_frame = (clock >> 3) % ehci->periodic_size;
2255 } else {
2256 clock = now_uframe + mod - 1;
2257 clock_frame = -1;
2259 if (ehci->clock_frame != clock_frame) {
2260 free_cached_lists(ehci);
2261 ehci->clock_frame = clock_frame;
2263 clock %= mod;
2264 clock_frame = clock >> 3;
2266 for (;;) {
2267 union ehci_shadow q, *q_p;
2268 __hc32 type, *hw_p;
2269 unsigned incomplete = false;
2271 frame = now_uframe >> 3;
2273 restart:
2274 /* scan each element in frame's queue for completions */
2275 q_p = &ehci->pshadow [frame];
2276 hw_p = &ehci->periodic [frame];
2277 q.ptr = q_p->ptr;
2278 type = Q_NEXT_TYPE(ehci, *hw_p);
2279 modified = 0;
2281 while (q.ptr != NULL) {
2282 unsigned uf;
2283 union ehci_shadow temp;
2284 int live;
2286 live = HC_IS_RUNNING (ehci_to_hcd(ehci)->state);
2287 switch (hc32_to_cpu(ehci, type)) {
2288 case Q_TYPE_QH:
2289 /* handle any completions */
2290 temp.qh = qh_get (q.qh);
2291 type = Q_NEXT_TYPE(ehci, q.qh->hw->hw_next);
2292 q = q.qh->qh_next;
2293 modified = qh_completions (ehci, temp.qh);
2294 if (unlikely(list_empty(&temp.qh->qtd_list) ||
2295 temp.qh->needs_rescan))
2296 intr_deschedule (ehci, temp.qh);
2297 qh_put (temp.qh);
2298 break;
2299 case Q_TYPE_FSTN:
2300 /* for "save place" FSTNs, look at QH entries
2301 * in the previous frame for completions.
2303 if (q.fstn->hw_prev != EHCI_LIST_END(ehci)) {
2304 dbg ("ignoring completions from FSTNs");
2306 type = Q_NEXT_TYPE(ehci, q.fstn->hw_next);
2307 q = q.fstn->fstn_next;
2308 break;
2309 case Q_TYPE_ITD:
2310 /* If this ITD is still active, leave it for
2311 * later processing ... check the next entry.
2312 * No need to check for activity unless the
2313 * frame is current.
2315 if (frame == clock_frame && live) {
2316 rmb();
2317 for (uf = 0; uf < 8; uf++) {
2318 if (q.itd->hw_transaction[uf] &
2319 ITD_ACTIVE(ehci))
2320 break;
2322 if (uf < 8) {
2323 incomplete = true;
2324 q_p = &q.itd->itd_next;
2325 hw_p = &q.itd->hw_next;
2326 type = Q_NEXT_TYPE(ehci,
2327 q.itd->hw_next);
2328 q = *q_p;
2329 break;
2333 /* Take finished ITDs out of the schedule
2334 * and process them: recycle, maybe report
2335 * URB completion. HC won't cache the
2336 * pointer for much longer, if at all.
2338 *q_p = q.itd->itd_next;
2339 *hw_p = q.itd->hw_next;
2340 type = Q_NEXT_TYPE(ehci, q.itd->hw_next);
2341 wmb();
2342 modified = itd_complete (ehci, q.itd);
2343 q = *q_p;
2344 break;
2345 case Q_TYPE_SITD:
2346 /* If this SITD is still active, leave it for
2347 * later processing ... check the next entry.
2348 * No need to check for activity unless the
2349 * frame is current.
2351 if (frame == clock_frame && live &&
2352 (q.sitd->hw_results &
2353 SITD_ACTIVE(ehci))) {
2354 incomplete = true;
2355 q_p = &q.sitd->sitd_next;
2356 hw_p = &q.sitd->hw_next;
2357 type = Q_NEXT_TYPE(ehci,
2358 q.sitd->hw_next);
2359 q = *q_p;
2360 break;
2363 /* Take finished SITDs out of the schedule
2364 * and process them: recycle, maybe report
2365 * URB completion.
2367 *q_p = q.sitd->sitd_next;
2368 *hw_p = q.sitd->hw_next;
2369 type = Q_NEXT_TYPE(ehci, q.sitd->hw_next);
2370 wmb();
2371 modified = sitd_complete (ehci, q.sitd);
2372 q = *q_p;
2373 break;
2374 default:
2375 dbg ("corrupt type %d frame %d shadow %p",
2376 type, frame, q.ptr);
2377 // BUG ();
2378 q.ptr = NULL;
2381 /* assume completion callbacks modify the queue */
2382 if (unlikely (modified)) {
2383 if (likely(ehci->periodic_sched > 0))
2384 goto restart;
2385 /* short-circuit this scan */
2386 now_uframe = clock;
2387 break;
2391 /* If we can tell we caught up to the hardware, stop now.
2392 * We can't advance our scan without collecting the ISO
2393 * transfers that are still pending in this frame.
2395 if (incomplete && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
2396 ehci->next_uframe = now_uframe;
2397 break;
2400 // FIXME: this assumes we won't get lapped when
2401 // latencies climb; that should be rare, but...
2402 // detect it, and just go all the way around.
2403 // FLR might help detect this case, so long as latencies
2404 // don't exceed periodic_size msec (default 1.024 sec).
2406 // FIXME: likewise assumes HC doesn't halt mid-scan
2408 if (now_uframe == clock) {
2409 unsigned now;
2411 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
2412 || ehci->periodic_sched == 0)
2413 break;
2414 ehci->next_uframe = now_uframe;
2415 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
2416 if (now_uframe == now)
2417 break;
2419 /* rescan the rest of this frame, then ... */
2420 clock = now;
2421 clock_frame = clock >> 3;
2422 if (ehci->clock_frame != clock_frame) {
2423 free_cached_lists(ehci);
2424 ehci->clock_frame = clock_frame;
2426 } else {
2427 now_uframe++;
2428 now_uframe %= mod;