arch/sparc/kernel/time_32.c

   1 /* linux/arch/sparc/kernel/time.c
   2  *
   3  * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
   5  *
   6  * Chris Davis (cdavis@cois.on.ca) 03/27/1998
   7  * Added support for the intersil on the sun4/4200
   8  *
   9  * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  10  * Support for MicroSPARC-IIep, PCI CPU.
  11  *
  12  * This file handles the Sparc specific time handling details.
  13  *
  14  * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
  15  *              "A Kernel Model for Precision Timekeeping" by Dave Mills
  16  */
  17 #include <linux/errno.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/kernel.h>
  21 #include <linux/param.h>
  22 #include <linux/string.h>
  23 #include <linux/mm.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/time.h>
  26 #include <linux/rtc.h>
  27 #include <linux/rtc/m48t59.h>
  28 #include <linux/timex.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/ioport.h>
  32 #include <linux/profile.h>
  33 #include <linux/of.h>
  34 #include <linux/of_device.h>
  35 #include <linux/platform_device.h>
  36
  37 #include <asm/oplib.h>
  38 #include <asm/timex.h>
  39 #include <asm/timer.h>
  40 #include <asm/system.h>
  41 #include <asm/irq.h>
  42 #include <asm/io.h>
  43 #include <asm/idprom.h>
  44 #include <asm/machines.h>
  45 #include <asm/page.h>
  46 #include <asm/pcic.h>
  47 #include <asm/irq_regs.h>
  48
  49 #include "irq.h"
  50
  51 DEFINE_SPINLOCK(rtc_lock);
  52 EXPORT_SYMBOL(rtc_lock);
  53
  54 static int set_rtc_mmss(unsigned long);
  55
  56 unsigned long profile_pc(struct pt_regs *regs)
  57 {
  58         extern char __copy_user_begin[], __copy_user_end[];
  59         extern char __atomic_begin[], __atomic_end[];
  60         extern char __bzero_begin[], __bzero_end[];
  61
  62         unsigned long pc = regs->pc;
  63
  64         if (in_lock_functions(pc) ||
  65             (pc >= (unsigned long) __copy_user_begin &&
  66              pc < (unsigned long) __copy_user_end) ||
  67             (pc >= (unsigned long) __atomic_begin &&
  68              pc < (unsigned long) __atomic_end) ||
  69             (pc >= (unsigned long) __bzero_begin &&
  70              pc < (unsigned long) __bzero_end))
  71                 pc = regs->u_regs[UREG_RETPC];
  72         return pc;
  73 }
  74
  75 EXPORT_SYMBOL(profile_pc);
  76
  77 __volatile__ unsigned int *master_l10_counter;
  78
  79 u32 (*do_arch_gettimeoffset)(void);
  80
  81 int update_persistent_clock(struct timespec now)
  82 {
  83         return set_rtc_mmss(now.tv_sec);
  84 }
  85
  86 /*
  87  * timer_interrupt() needs to keep up the real-time clock,
  88  * as well as call the "xtime_update()" routine every clocktick
  89  */
  90
  91 #define TICK_SIZE (tick_nsec / 1000)
  92
  93 static irqreturn_t timer_interrupt(int dummy, void *dev_id)
  94 {
  95 #ifndef CONFIG_SMP
  96         profile_tick(CPU_PROFILING);
  97 #endif
  98
  99         clear_clock_irq();
 100
 101         xtime_update(1);
 102
 103 #ifndef CONFIG_SMP
 104         update_process_times(user_mode(get_irq_regs()));
 105 #endif
 106         return IRQ_HANDLED;
 107 }
 108
 109 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
 110 {
 111         struct platform_device *pdev = to_platform_device(dev);
 112         struct m48t59_plat_data *pdata = pdev->dev.platform_data;
 113
 114         return readb(pdata->ioaddr + ofs);
 115 }
 116
 117 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
 118 {
 119         struct platform_device *pdev = to_platform_device(dev);
 120         struct m48t59_plat_data *pdata = pdev->dev.platform_data;
 121
 122         writeb(val, pdata->ioaddr + ofs);
 123 }
 124
 125 static struct m48t59_plat_data m48t59_data = {
 126         .read_byte = mostek_read_byte,
 127         .write_byte = mostek_write_byte,
 128 };
 129
 130 /* resource is set at runtime */
 131 static struct platform_device m48t59_rtc = {
 132         .name           = "rtc-m48t59",
 133         .id             = 0,
 134         .num_resources  = 1,
 135         .dev    = {
 136                 .platform_data = &m48t59_data,
 137         },
 138 };
 139
 140 static int __devinit clock_probe(struct platform_device *op)
 141 {
 142         struct device_node *dp = op->dev.of_node;
 143         const char *model = of_get_property(dp, "model", NULL);
 144
 145         if (!model)
 146                 return -ENODEV;
 147
 148         /* Only the primary RTC has an address property */
 149         if (!of_find_property(dp, "address", NULL))
 150                 return -ENODEV;
 151
 152         m48t59_rtc.resource = &op->resource[0];
 153         if (!strcmp(model, "mk48t02")) {
 154                 /* Map the clock register io area read-only */
 155                 m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
 156                                                 2048, "rtc-m48t59");
 157                 m48t59_data.type = M48T59RTC_TYPE_M48T02;
 158         } else if (!strcmp(model, "mk48t08")) {
 159                 m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
 160                                                 8192, "rtc-m48t59");
 161                 m48t59_data.type = M48T59RTC_TYPE_M48T08;
 162         } else
 163                 return -ENODEV;
 164
 165         if (platform_device_register(&m48t59_rtc) < 0)
 166                 printk(KERN_ERR "Registering RTC device failed\n");
 167
 168         return 0;
 169 }
 170
 171 static struct of_device_id __initdata clock_match[] = {
 172         {
 173                 .name = "eeprom",
 174         },
 175         {},
 176 };
 177
 178 static struct platform_driver clock_driver = {
 179         .probe          = clock_probe,
 180         .driver = {
 181                 .name = "rtc",
 182                 .owner = THIS_MODULE,
 183                 .of_match_table = clock_match,
 184         },
 185 };
 186
 187
 188 /* Probe for the mostek real time clock chip. */
 189 static int __init clock_init(void)
 190 {
 191         return platform_driver_register(&clock_driver);
 192 }
 193 /* Must be after subsys_initcall() so that busses are probed.  Must
 194  * be before device_initcall() because things like the RTC driver
 195  * need to see the clock registers.
 196  */
 197 fs_initcall(clock_init);
 198
 199
 200 u32 sbus_do_gettimeoffset(void)
 201 {
 202         unsigned long val = *master_l10_counter;
 203         unsigned long usec = (val >> 10) & 0x1fffff;
 204
 205         /* Limit hit?  */
 206         if (val & 0x80000000)
 207                 usec += 1000000 / HZ;
 208
 209         return usec * 1000;
 210 }
 211
 212
 213 u32 arch_gettimeoffset(void)
 214 {
 215         if (unlikely(!do_arch_gettimeoffset))
 216                 return 0;
 217         return do_arch_gettimeoffset();
 218 }
 219
 220 static void __init sbus_time_init(void)
 221 {
 222         do_arch_gettimeoffset = sbus_do_gettimeoffset;
 223
 224         btfixup();
 225
 226         sparc_irq_config.init_timers(timer_interrupt);
 227 }
 228
 229 void __init time_init(void)
 230 {
 231 #ifdef CONFIG_PCI
 232         extern void pci_time_init(void);
 233         if (pcic_present()) {
 234                 pci_time_init();
 235                 return;
 236         }
 237 #endif
 238         sbus_time_init();
 239 }
 240
 241
 242 static int set_rtc_mmss(unsigned long secs)
 243 {
 244         struct rtc_device *rtc = rtc_class_open("rtc0");
 245         int err = -1;
 246
 247         if (rtc) {
 248                 err = rtc_set_mmss(rtc, secs);
 249                 rtc_class_close(rtc);
 250         }
 251
 252         return err;
 253 }