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xen: drop xen_sched_clock in favour of using plain wallclock time
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
blob88e6eebc31594a757ee8ebf925f62237591f6d80
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2009 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60 #include <linux/time.h>
61
62 #include "mpt2sas_base.h"
63
64 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
65
66 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
67 #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
68
69 static int max_queue_depth = -1;
70 module_param(max_queue_depth, int, 0);
71 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
72
73 static int max_sgl_entries = -1;
74 module_param(max_sgl_entries, int, 0);
75 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
76
77 static int msix_disable = -1;
78 module_param(msix_disable, int, 0);
79 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
80
81 /* diag_buffer_enable is bitwise
82 * bit 0 set = TRACE
83 * bit 1 set = SNAPSHOT
84 * bit 2 set = EXTENDED
85 *
86 * Either bit can be set, or both
87 */
88 static int diag_buffer_enable;
89 module_param(diag_buffer_enable, int, 0);
90 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
91 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
92
93 int mpt2sas_fwfault_debug;
94 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
95 "and halt firmware - (default=0)");
96
97 /**
98 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
99 *
100 */
101 static int
102 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
103 {
104 int ret = param_set_int(val, kp);
105 struct MPT2SAS_ADAPTER *ioc;
106
107 if (ret)
108 return ret;
109
110 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
111 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
112 ioc->fwfault_debug = mpt2sas_fwfault_debug;
113 return 0;
114 }
115 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
116 param_get_int, &mpt2sas_fwfault_debug, 0644);
117
118 /**
119 * _base_fault_reset_work - workq handling ioc fault conditions
120 * @work: input argument, used to derive ioc
121 * Context: sleep.
122 *
123 * Return nothing.
124 */
125 static void
126 _base_fault_reset_work(struct work_struct *work)
127 {
128 struct MPT2SAS_ADAPTER *ioc =
129 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
130 unsigned long flags;
131 u32 doorbell;
132 int rc;
133
134 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
135 if (ioc->shost_recovery)
136 goto rearm_timer;
137 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
138
139 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
140 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
141 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
142 FORCE_BIG_HAMMER);
143 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
144 __func__, (rc == 0) ? "success" : "failed");
145 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
146 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
147 mpt2sas_base_fault_info(ioc, doorbell &
148 MPI2_DOORBELL_DATA_MASK);
149 }
150
151 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
152 rearm_timer:
153 if (ioc->fault_reset_work_q)
154 queue_delayed_work(ioc->fault_reset_work_q,
155 &ioc->fault_reset_work,
156 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
157 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
158 }
159
160 /**
161 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
162 * @ioc: per adapter object
163 * Context: sleep.
164 *
165 * Return nothing.
166 */
167 void
168 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
169 {
170 unsigned long flags;
171
172 if (ioc->fault_reset_work_q)
173 return;
174
175 /* initialize fault polling */
176 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
177 snprintf(ioc->fault_reset_work_q_name,
178 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
179 ioc->fault_reset_work_q =
180 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
181 if (!ioc->fault_reset_work_q) {
182 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
183 ioc->name, __func__, __LINE__);
184 return;
185 }
186 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
187 if (ioc->fault_reset_work_q)
188 queue_delayed_work(ioc->fault_reset_work_q,
189 &ioc->fault_reset_work,
190 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
191 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
192 }
193
194 /**
195 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
196 * @ioc: per adapter object
197 * Context: sleep.
198 *
199 * Return nothing.
200 */
201 void
202 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
203 {
204 unsigned long flags;
205 struct workqueue_struct *wq;
206
207 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
208 wq = ioc->fault_reset_work_q;
209 ioc->fault_reset_work_q = NULL;
210 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
211 if (wq) {
212 if (!cancel_delayed_work(&ioc->fault_reset_work))
213 flush_workqueue(wq);
214 destroy_workqueue(wq);
215 }
216 }
217
218 /**
219 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
220 * @ioc: per adapter object
221 * @fault_code: fault code
222 *
223 * Return nothing.
224 */
225 void
226 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
227 {
228 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
229 ioc->name, fault_code);
230 }
231
232 /**
233 * mpt2sas_halt_firmware - halt's mpt controller firmware
234 * @ioc: per adapter object
235 *
236 * For debugging timeout related issues. Writing 0xCOFFEE00
237 * to the doorbell register will halt controller firmware. With
238 * the purpose to stop both driver and firmware, the enduser can
239 * obtain a ring buffer from controller UART.
240 */
241 void
242 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
243 {
244 u32 doorbell;
245
246 if (!ioc->fwfault_debug)
247 return;
248
249 dump_stack();
250
251 doorbell = readl(&ioc->chip->Doorbell);
252 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
253 mpt2sas_base_fault_info(ioc , doorbell);
254 else {
255 writel(0xC0FFEE00, &ioc->chip->Doorbell);
256 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
257 "timeout\n", ioc->name);
258 }
259
260 panic("panic in %s\n", __func__);
261 }
262
263 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
264 /**
265 * _base_sas_ioc_info - verbose translation of the ioc status
266 * @ioc: per adapter object
267 * @mpi_reply: reply mf payload returned from firmware
268 * @request_hdr: request mf
269 *
270 * Return nothing.
271 */
272 static void
273 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
274 MPI2RequestHeader_t *request_hdr)
275 {
276 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
277 MPI2_IOCSTATUS_MASK;
278 char *desc = NULL;
279 u16 frame_sz;
280 char *func_str = NULL;
281
282 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
283 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
284 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
285 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
286 return;
287
288 switch (ioc_status) {
289
290 /****************************************************************************
291 * Common IOCStatus values for all replies
292 ****************************************************************************/
293
294 case MPI2_IOCSTATUS_INVALID_FUNCTION:
295 desc = "invalid function";
296 break;
297 case MPI2_IOCSTATUS_BUSY:
298 desc = "busy";
299 break;
300 case MPI2_IOCSTATUS_INVALID_SGL:
301 desc = "invalid sgl";
302 break;
303 case MPI2_IOCSTATUS_INTERNAL_ERROR:
304 desc = "internal error";
305 break;
306 case MPI2_IOCSTATUS_INVALID_VPID:
307 desc = "invalid vpid";
308 break;
309 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
310 desc = "insufficient resources";
311 break;
312 case MPI2_IOCSTATUS_INVALID_FIELD:
313 desc = "invalid field";
314 break;
315 case MPI2_IOCSTATUS_INVALID_STATE:
316 desc = "invalid state";
317 break;
318 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
319 desc = "op state not supported";
320 break;
321
322 /****************************************************************************
323 * Config IOCStatus values
324 ****************************************************************************/
325
326 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
327 desc = "config invalid action";
328 break;
329 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
330 desc = "config invalid type";
331 break;
332 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
333 desc = "config invalid page";
334 break;
335 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
336 desc = "config invalid data";
337 break;
338 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
339 desc = "config no defaults";
340 break;
341 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
342 desc = "config cant commit";
343 break;
344
345 /****************************************************************************
346 * SCSI IO Reply
347 ****************************************************************************/
348
349 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
350 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
351 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
352 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
353 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
354 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
355 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
356 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
357 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
358 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
359 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
360 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
361 break;
362
363 /****************************************************************************
364 * For use by SCSI Initiator and SCSI Target end-to-end data protection
365 ****************************************************************************/
366
367 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
368 desc = "eedp guard error";
369 break;
370 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
371 desc = "eedp ref tag error";
372 break;
373 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
374 desc = "eedp app tag error";
375 break;
376
377 /****************************************************************************
378 * SCSI Target values
379 ****************************************************************************/
380
381 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
382 desc = "target invalid io index";
383 break;
384 case MPI2_IOCSTATUS_TARGET_ABORTED:
385 desc = "target aborted";
386 break;
387 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
388 desc = "target no conn retryable";
389 break;
390 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
391 desc = "target no connection";
392 break;
393 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
394 desc = "target xfer count mismatch";
395 break;
396 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
397 desc = "target data offset error";
398 break;
399 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
400 desc = "target too much write data";
401 break;
402 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
403 desc = "target iu too short";
404 break;
405 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
406 desc = "target ack nak timeout";
407 break;
408 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
409 desc = "target nak received";
410 break;
411
412 /****************************************************************************
413 * Serial Attached SCSI values
414 ****************************************************************************/
415
416 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
417 desc = "smp request failed";
418 break;
419 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
420 desc = "smp data overrun";
421 break;
422
423 /****************************************************************************
424 * Diagnostic Buffer Post / Diagnostic Release values
425 ****************************************************************************/
426
427 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
428 desc = "diagnostic released";
429 break;
430 default:
431 break;
432 }
433
434 if (!desc)
435 return;
436
437 switch (request_hdr->Function) {
438 case MPI2_FUNCTION_CONFIG:
439 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
440 func_str = "config_page";
441 break;
442 case MPI2_FUNCTION_SCSI_TASK_MGMT:
443 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
444 func_str = "task_mgmt";
445 break;
446 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
447 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
448 func_str = "sas_iounit_ctl";
449 break;
450 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
451 frame_sz = sizeof(Mpi2SepRequest_t);
452 func_str = "enclosure";
453 break;
454 case MPI2_FUNCTION_IOC_INIT:
455 frame_sz = sizeof(Mpi2IOCInitRequest_t);
456 func_str = "ioc_init";
457 break;
458 case MPI2_FUNCTION_PORT_ENABLE:
459 frame_sz = sizeof(Mpi2PortEnableRequest_t);
460 func_str = "port_enable";
461 break;
462 case MPI2_FUNCTION_SMP_PASSTHROUGH:
463 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
464 func_str = "smp_passthru";
465 break;
466 default:
467 frame_sz = 32;
468 func_str = "unknown";
469 break;
470 }
471
472 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
473 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
474
475 _debug_dump_mf(request_hdr, frame_sz/4);
476 }
477
478 /**
479 * _base_display_event_data - verbose translation of firmware asyn events
480 * @ioc: per adapter object
481 * @mpi_reply: reply mf payload returned from firmware
482 *
483 * Return nothing.
484 */
485 static void
486 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
487 Mpi2EventNotificationReply_t *mpi_reply)
488 {
489 char *desc = NULL;
490 u16 event;
491
492 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
493 return;
494
495 event = le16_to_cpu(mpi_reply->Event);
496
497 switch (event) {
498 case MPI2_EVENT_LOG_DATA:
499 desc = "Log Data";
500 break;
501 case MPI2_EVENT_STATE_CHANGE:
502 desc = "Status Change";
503 break;
504 case MPI2_EVENT_HARD_RESET_RECEIVED:
505 desc = "Hard Reset Received";
506 break;
507 case MPI2_EVENT_EVENT_CHANGE:
508 desc = "Event Change";
509 break;
510 case MPI2_EVENT_TASK_SET_FULL:
511 desc = "Task Set Full";
512 break;
513 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
514 desc = "Device Status Change";
515 break;
516 case MPI2_EVENT_IR_OPERATION_STATUS:
517 desc = "IR Operation Status";
518 break;
519 case MPI2_EVENT_SAS_DISCOVERY:
520 desc = "Discovery";
521 break;
522 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
523 desc = "SAS Broadcast Primitive";
524 break;
525 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
526 desc = "SAS Init Device Status Change";
527 break;
528 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
529 desc = "SAS Init Table Overflow";
530 break;
531 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
532 desc = "SAS Topology Change List";
533 break;
534 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
535 desc = "SAS Enclosure Device Status Change";
536 break;
537 case MPI2_EVENT_IR_VOLUME:
538 desc = "IR Volume";
539 break;
540 case MPI2_EVENT_IR_PHYSICAL_DISK:
541 desc = "IR Physical Disk";
542 break;
543 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
544 desc = "IR Configuration Change List";
545 break;
546 case MPI2_EVENT_LOG_ENTRY_ADDED:
547 desc = "Log Entry Added";
548 break;
549 }
550
551 if (!desc)
552 return;
553
554 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
555 }
556 #endif
557
558 /**
559 * _base_sas_log_info - verbose translation of firmware log info
560 * @ioc: per adapter object
561 * @log_info: log info
562 *
563 * Return nothing.
564 */
565 static void
566 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
567 {
568 union loginfo_type {
569 u32 loginfo;
570 struct {
571 u32 subcode:16;
572 u32 code:8;
573 u32 originator:4;
574 u32 bus_type:4;
575 } dw;
576 };
577 union loginfo_type sas_loginfo;
578 char *originator_str = NULL;
579
580 sas_loginfo.loginfo = log_info;
581 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
582 return;
583
584 /* each nexus loss loginfo */
585 if (log_info == 0x31170000)
586 return;
587
588 /* eat the loginfos associated with task aborts */
589 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
590 0x31140000 || log_info == 0x31130000))
591 return;
592
593 switch (sas_loginfo.dw.originator) {
594 case 0:
595 originator_str = "IOP";
596 break;
597 case 1:
598 originator_str = "PL";
599 break;
600 case 2:
601 originator_str = "IR";
602 break;
603 }
604
605 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
606 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
607 originator_str, sas_loginfo.dw.code,
608 sas_loginfo.dw.subcode);
609 }
610
611 /**
612 * _base_display_reply_info -
613 * @ioc: per adapter object
614 * @smid: system request message index
615 * @msix_index: MSIX table index supplied by the OS
616 * @reply: reply message frame(lower 32bit addr)
617 *
618 * Return nothing.
619 */
620 static void
621 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
622 u32 reply)
623 {
624 MPI2DefaultReply_t *mpi_reply;
625 u16 ioc_status;
626
627 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
628 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
629 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
630 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
631 (ioc->logging_level & MPT_DEBUG_REPLY)) {
632 _base_sas_ioc_info(ioc , mpi_reply,
633 mpt2sas_base_get_msg_frame(ioc, smid));
634 }
635 #endif
636 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
637 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
638 }
639
640 /**
641 * mpt2sas_base_done - base internal command completion routine
642 * @ioc: per adapter object
643 * @smid: system request message index
644 * @msix_index: MSIX table index supplied by the OS
645 * @reply: reply message frame(lower 32bit addr)
646 *
647 * Return 1 meaning mf should be freed from _base_interrupt
648 * 0 means the mf is freed from this function.
649 */
650 u8
651 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
652 u32 reply)
653 {
654 MPI2DefaultReply_t *mpi_reply;
655
656 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
657 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
658 return 1;
659
660 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
661 return 1;
662
663 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
664 if (mpi_reply) {
665 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
666 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
667 }
668 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
669 complete(&ioc->base_cmds.done);
670 return 1;
671 }
672
673 /**
674 * _base_async_event - main callback handler for firmware asyn events
675 * @ioc: per adapter object
676 * @msix_index: MSIX table index supplied by the OS
677 * @reply: reply message frame(lower 32bit addr)
678 *
679 * Return 1 meaning mf should be freed from _base_interrupt
680 * 0 means the mf is freed from this function.
681 */
682 static u8
683 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
684 {
685 Mpi2EventNotificationReply_t *mpi_reply;
686 Mpi2EventAckRequest_t *ack_request;
687 u16 smid;
688
689 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
690 if (!mpi_reply)
691 return 1;
692 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
693 return 1;
694 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
695 _base_display_event_data(ioc, mpi_reply);
696 #endif
697 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
698 goto out;
699 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
700 if (!smid) {
701 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
702 ioc->name, __func__);
703 goto out;
704 }
705
706 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
707 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
708 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
709 ack_request->Event = mpi_reply->Event;
710 ack_request->EventContext = mpi_reply->EventContext;
711 ack_request->VF_ID = 0; /* TODO */
712 ack_request->VP_ID = 0;
713 mpt2sas_base_put_smid_default(ioc, smid);
714
715 out:
716
717 /* scsih callback handler */
718 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
719
720 /* ctl callback handler */
721 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
722
723 return 1;
724 }
725
726 /**
727 * _base_get_cb_idx - obtain the callback index
728 * @ioc: per adapter object
729 * @smid: system request message index
730 *
731 * Return callback index.
732 */
733 static u8
734 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
735 {
736 int i;
737 u8 cb_idx = 0xFF;
738
739 if (smid >= ioc->hi_priority_smid) {
740 if (smid < ioc->internal_smid) {
741 i = smid - ioc->hi_priority_smid;
742 cb_idx = ioc->hpr_lookup[i].cb_idx;
743 } else {
744 i = smid - ioc->internal_smid;
745 cb_idx = ioc->internal_lookup[i].cb_idx;
746 }
747 } else {
748 i = smid - 1;
749 cb_idx = ioc->scsi_lookup[i].cb_idx;
750 }
751 return cb_idx;
752 }
753
754 /**
755 * _base_mask_interrupts - disable interrupts
756 * @ioc: per adapter object
757 *
758 * Disabling ResetIRQ, Reply and Doorbell Interrupts
759 *
760 * Return nothing.
761 */
762 static void
763 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
764 {
765 u32 him_register;
766
767 ioc->mask_interrupts = 1;
768 him_register = readl(&ioc->chip->HostInterruptMask);
769 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
770 writel(him_register, &ioc->chip->HostInterruptMask);
771 readl(&ioc->chip->HostInterruptMask);
772 }
773
774 /**
775 * _base_unmask_interrupts - enable interrupts
776 * @ioc: per adapter object
777 *
778 * Enabling only Reply Interrupts
779 *
780 * Return nothing.
781 */
782 static void
783 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
784 {
785 u32 him_register;
786
787 him_register = readl(&ioc->chip->HostInterruptMask);
788 him_register &= ~MPI2_HIM_RIM;
789 writel(him_register, &ioc->chip->HostInterruptMask);
790 ioc->mask_interrupts = 0;
791 }
792
793 union reply_descriptor {
794 u64 word;
795 struct {
796 u32 low;
797 u32 high;
798 } u;
799 };
800
801 /**
802 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
803 * @irq: irq number (not used)
804 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
805 * @r: pt_regs pointer (not used)
806 *
807 * Return IRQ_HANDLE if processed, else IRQ_NONE.
808 */
809 static irqreturn_t
810 _base_interrupt(int irq, void *bus_id)
811 {
812 union reply_descriptor rd;
813 u32 completed_cmds;
814 u8 request_desript_type;
815 u16 smid;
816 u8 cb_idx;
817 u32 reply;
818 u8 msix_index;
819 struct MPT2SAS_ADAPTER *ioc = bus_id;
820 Mpi2ReplyDescriptorsUnion_t *rpf;
821 u8 rc;
822
823 if (ioc->mask_interrupts)
824 return IRQ_NONE;
825
826 rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
827 request_desript_type = rpf->Default.ReplyFlags
828 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
829 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
830 return IRQ_NONE;
831
832 completed_cmds = 0;
833 do {
834 rd.word = rpf->Words;
835 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
836 goto out;
837 reply = 0;
838 cb_idx = 0xFF;
839 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
840 msix_index = rpf->Default.MSIxIndex;
841 if (request_desript_type ==
842 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
843 reply = le32_to_cpu
844 (rpf->AddressReply.ReplyFrameAddress);
845 } else if (request_desript_type ==
846 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
847 goto next;
848 else if (request_desript_type ==
849 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
850 goto next;
851 if (smid)
852 cb_idx = _base_get_cb_idx(ioc, smid);
853 if (smid && cb_idx != 0xFF) {
854 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
855 reply);
856 if (reply)
857 _base_display_reply_info(ioc, smid, msix_index,
858 reply);
859 if (rc)
860 mpt2sas_base_free_smid(ioc, smid);
861 }
862 if (!smid)
863 _base_async_event(ioc, msix_index, reply);
864
865 /* reply free queue handling */
866 if (reply) {
867 ioc->reply_free_host_index =
868 (ioc->reply_free_host_index ==
869 (ioc->reply_free_queue_depth - 1)) ?
870 0 : ioc->reply_free_host_index + 1;
871 ioc->reply_free[ioc->reply_free_host_index] =
872 cpu_to_le32(reply);
873 wmb();
874 writel(ioc->reply_free_host_index,
875 &ioc->chip->ReplyFreeHostIndex);
876 }
877
878 next:
879
880 rpf->Words = ULLONG_MAX;
881 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
882 (ioc->reply_post_queue_depth - 1)) ? 0 :
883 ioc->reply_post_host_index + 1;
884 request_desript_type =
885 ioc->reply_post_free[ioc->reply_post_host_index].Default.
886 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
887 completed_cmds++;
888 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
889 goto out;
890 if (!ioc->reply_post_host_index)
891 rpf = ioc->reply_post_free;
892 else
893 rpf++;
894 } while (1);
895
896 out:
897
898 if (!completed_cmds)
899 return IRQ_NONE;
900
901 wmb();
902 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
903 return IRQ_HANDLED;
904 }
905
906 /**
907 * mpt2sas_base_release_callback_handler - clear interupt callback handler
908 * @cb_idx: callback index
909 *
910 * Return nothing.
911 */
912 void
913 mpt2sas_base_release_callback_handler(u8 cb_idx)
914 {
915 mpt_callbacks[cb_idx] = NULL;
916 }
917
918 /**
919 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
920 * @cb_func: callback function
921 *
922 * Returns cb_func.
923 */
924 u8
925 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
926 {
927 u8 cb_idx;
928
929 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
930 if (mpt_callbacks[cb_idx] == NULL)
931 break;
932
933 mpt_callbacks[cb_idx] = cb_func;
934 return cb_idx;
935 }
936
937 /**
938 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
939 *
940 * Return nothing.
941 */
942 void
943 mpt2sas_base_initialize_callback_handler(void)
944 {
945 u8 cb_idx;
946
947 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
948 mpt2sas_base_release_callback_handler(cb_idx);
949 }
950
951 /**
952 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
953 * @ioc: per adapter object
954 * @paddr: virtual address for SGE
955 *
956 * Create a zero length scatter gather entry to insure the IOCs hardware has
957 * something to use if the target device goes brain dead and tries
958 * to send data even when none is asked for.
959 *
960 * Return nothing.
961 */
962 void
963 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
964 {
965 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
966 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
967 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
968 MPI2_SGE_FLAGS_SHIFT);
969 ioc->base_add_sg_single(paddr, flags_length, -1);
970 }
971
972 /**
973 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
974 * @paddr: virtual address for SGE
975 * @flags_length: SGE flags and data transfer length
976 * @dma_addr: Physical address
977 *
978 * Return nothing.
979 */
980 static void
981 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
982 {
983 Mpi2SGESimple32_t *sgel = paddr;
984
985 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
986 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
987 sgel->FlagsLength = cpu_to_le32(flags_length);
988 sgel->Address = cpu_to_le32(dma_addr);
989 }
990
991
992 /**
993 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
994 * @paddr: virtual address for SGE
995 * @flags_length: SGE flags and data transfer length
996 * @dma_addr: Physical address
997 *
998 * Return nothing.
999 */
1000 static void
1001 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1002 {
1003 Mpi2SGESimple64_t *sgel = paddr;
1004
1005 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1006 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1007 sgel->FlagsLength = cpu_to_le32(flags_length);
1008 sgel->Address = cpu_to_le64(dma_addr);
1009 }
1010
1011 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1012
1013 /**
1014 * _base_config_dma_addressing - set dma addressing
1015 * @ioc: per adapter object
1016 * @pdev: PCI device struct
1017 *
1018 * Returns 0 for success, non-zero for failure.
1019 */
1020 static int
1021 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1022 {
1023 struct sysinfo s;
1024 char *desc = NULL;
1025
1026 if (sizeof(dma_addr_t) > 4) {
1027 const uint64_t required_mask =
1028 dma_get_required_mask(&pdev->dev);
1029 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1030 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1031 DMA_BIT_MASK(64))) {
1032 ioc->base_add_sg_single = &_base_add_sg_single_64;
1033 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1034 desc = "64";
1035 goto out;
1036 }
1037 }
1038
1039 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1040 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1041 ioc->base_add_sg_single = &_base_add_sg_single_32;
1042 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1043 desc = "32";
1044 } else
1045 return -ENODEV;
1046
1047 out:
1048 si_meminfo(&s);
1049 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1050 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1051
1052 return 0;
1053 }
1054
1055 /**
1056 * _base_save_msix_table - backup msix vector table
1057 * @ioc: per adapter object
1058 *
1059 * This address an errata where diag reset clears out the table
1060 */
1061 static void
1062 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
1063 {
1064 int i;
1065
1066 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1067 return;
1068
1069 for (i = 0; i < ioc->msix_vector_count; i++)
1070 ioc->msix_table_backup[i] = ioc->msix_table[i];
1071 }
1072
1073 /**
1074 * _base_restore_msix_table - this restores the msix vector table
1075 * @ioc: per adapter object
1076 *
1077 */
1078 static void
1079 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
1080 {
1081 int i;
1082
1083 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1084 return;
1085
1086 for (i = 0; i < ioc->msix_vector_count; i++)
1087 ioc->msix_table[i] = ioc->msix_table_backup[i];
1088 }
1089
1090 /**
1091 * _base_check_enable_msix - checks MSIX capabable.
1092 * @ioc: per adapter object
1093 *
1094 * Check to see if card is capable of MSIX, and set number
1095 * of avaliable msix vectors
1096 */
1097 static int
1098 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1099 {
1100 int base;
1101 u16 message_control;
1102 u32 msix_table_offset;
1103
1104 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1105 if (!base) {
1106 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1107 "supported\n", ioc->name));
1108 return -EINVAL;
1109 }
1110
1111 /* get msix vector count */
1112 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1113 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1114
1115 /* get msix table */
1116 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1117 msix_table_offset &= 0xFFFFFFF8;
1118 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1119
1120 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1121 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1122 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1123 return 0;
1124 }
1125
1126 /**
1127 * _base_disable_msix - disables msix
1128 * @ioc: per adapter object
1129 *
1130 */
1131 static void
1132 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1133 {
1134 if (ioc->msix_enable) {
1135 pci_disable_msix(ioc->pdev);
1136 kfree(ioc->msix_table_backup);
1137 ioc->msix_table_backup = NULL;
1138 ioc->msix_enable = 0;
1139 }
1140 }
1141
1142 /**
1143 * _base_enable_msix - enables msix, failback to io_apic
1144 * @ioc: per adapter object
1145 *
1146 */
1147 static int
1148 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1149 {
1150 struct msix_entry entries;
1151 int r;
1152 u8 try_msix = 0;
1153
1154 if (msix_disable == -1 || msix_disable == 0)
1155 try_msix = 1;
1156
1157 if (!try_msix)
1158 goto try_ioapic;
1159
1160 if (_base_check_enable_msix(ioc) != 0)
1161 goto try_ioapic;
1162
1163 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1164 sizeof(u32), GFP_KERNEL);
1165 if (!ioc->msix_table_backup) {
1166 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1167 "msix_table_backup failed!!!\n", ioc->name));
1168 goto try_ioapic;
1169 }
1170
1171 memset(&entries, 0, sizeof(struct msix_entry));
1172 r = pci_enable_msix(ioc->pdev, &entries, 1);
1173 if (r) {
1174 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1175 "failed (r=%d) !!!\n", ioc->name, r));
1176 goto try_ioapic;
1177 }
1178
1179 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1180 ioc->name, ioc);
1181 if (r) {
1182 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1183 "interrupt %d !!!\n", ioc->name, entries.vector));
1184 pci_disable_msix(ioc->pdev);
1185 goto try_ioapic;
1186 }
1187
1188 ioc->pci_irq = entries.vector;
1189 ioc->msix_enable = 1;
1190 return 0;
1191
1192 /* failback to io_apic interrupt routing */
1193 try_ioapic:
1194
1195 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1196 ioc->name, ioc);
1197 if (r) {
1198 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1199 ioc->name, ioc->pdev->irq);
1200 r = -EBUSY;
1201 goto out_fail;
1202 }
1203
1204 ioc->pci_irq = ioc->pdev->irq;
1205 return 0;
1206
1207 out_fail:
1208 return r;
1209 }
1210
1211 /**
1212 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1213 * @ioc: per adapter object
1214 *
1215 * Returns 0 for success, non-zero for failure.
1216 */
1217 int
1218 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1219 {
1220 struct pci_dev *pdev = ioc->pdev;
1221 u32 memap_sz;
1222 u32 pio_sz;
1223 int i, r = 0;
1224 u64 pio_chip = 0;
1225 u64 chip_phys = 0;
1226
1227 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
1228 ioc->name, __func__));
1229
1230 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1231 if (pci_enable_device_mem(pdev)) {
1232 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1233 "failed\n", ioc->name);
1234 return -ENODEV;
1235 }
1236
1237
1238 if (pci_request_selected_regions(pdev, ioc->bars,
1239 MPT2SAS_DRIVER_NAME)) {
1240 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1241 "failed\n", ioc->name);
1242 r = -ENODEV;
1243 goto out_fail;
1244 }
1245
1246 pci_set_master(pdev);
1247
1248 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1249 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1250 ioc->name, pci_name(pdev));
1251 r = -ENODEV;
1252 goto out_fail;
1253 }
1254
1255 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1256 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
1257 if (pio_sz)
1258 continue;
1259 pio_chip = (u64)pci_resource_start(pdev, i);
1260 pio_sz = pci_resource_len(pdev, i);
1261 } else {
1262 if (memap_sz)
1263 continue;
1264 ioc->chip_phys = pci_resource_start(pdev, i);
1265 chip_phys = (u64)ioc->chip_phys;
1266 memap_sz = pci_resource_len(pdev, i);
1267 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1268 if (ioc->chip == NULL) {
1269 printk(MPT2SAS_ERR_FMT "unable to map adapter "
1270 "memory!\n", ioc->name);
1271 r = -EINVAL;
1272 goto out_fail;
1273 }
1274 }
1275 }
1276
1277 _base_mask_interrupts(ioc);
1278 r = _base_enable_msix(ioc);
1279 if (r)
1280 goto out_fail;
1281
1282 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1283 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1284 "IO-APIC enabled"), ioc->pci_irq);
1285 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1286 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1287 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1288 ioc->name, (unsigned long long)pio_chip, pio_sz);
1289
1290 return 0;
1291
1292 out_fail:
1293 if (ioc->chip_phys)
1294 iounmap(ioc->chip);
1295 ioc->chip_phys = 0;
1296 ioc->pci_irq = -1;
1297 pci_release_selected_regions(ioc->pdev, ioc->bars);
1298 pci_disable_device(pdev);
1299 return r;
1300 }
1301
1302 /**
1303 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1304 * @ioc: per adapter object
1305 * @smid: system request message index(smid zero is invalid)
1306 *
1307 * Returns virt pointer to message frame.
1308 */
1309 void *
1310 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1311 {
1312 return (void *)(ioc->request + (smid * ioc->request_sz));
1313 }
1314
1315 /**
1316 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1317 * @ioc: per adapter object
1318 * @smid: system request message index
1319 *
1320 * Returns virt pointer to sense buffer.
1321 */
1322 void *
1323 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1324 {
1325 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1326 }
1327
1328 /**
1329 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1330 * @ioc: per adapter object
1331 * @smid: system request message index
1332 *
1333 * Returns phys pointer to the low 32bit address of the sense buffer.
1334 */
1335 __le32
1336 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1337 {
1338 return cpu_to_le32(ioc->sense_dma +
1339 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1340 }
1341
1342 /**
1343 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1344 * @ioc: per adapter object
1345 * @phys_addr: lower 32 physical addr of the reply
1346 *
1347 * Converts 32bit lower physical addr into a virt address.
1348 */
1349 void *
1350 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1351 {
1352 if (!phys_addr)
1353 return NULL;
1354 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1355 }
1356
1357 /**
1358 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1359 * @ioc: per adapter object
1360 * @cb_idx: callback index
1361 *
1362 * Returns smid (zero is invalid)
1363 */
1364 u16
1365 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1366 {
1367 unsigned long flags;
1368 struct request_tracker *request;
1369 u16 smid;
1370
1371 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1372 if (list_empty(&ioc->internal_free_list)) {
1373 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1374 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1375 ioc->name, __func__);
1376 return 0;
1377 }
1378
1379 request = list_entry(ioc->internal_free_list.next,
1380 struct request_tracker, tracker_list);
1381 request->cb_idx = cb_idx;
1382 smid = request->smid;
1383 list_del(&request->tracker_list);
1384 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1385 return smid;
1386 }
1387
1388 /**
1389 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1390 * @ioc: per adapter object
1391 * @cb_idx: callback index
1392 * @scmd: pointer to scsi command object
1393 *
1394 * Returns smid (zero is invalid)
1395 */
1396 u16
1397 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1398 struct scsi_cmnd *scmd)
1399 {
1400 unsigned long flags;
1401 struct request_tracker *request;
1402 u16 smid;
1403
1404 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1405 if (list_empty(&ioc->free_list)) {
1406 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1407 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1408 ioc->name, __func__);
1409 return 0;
1410 }
1411
1412 request = list_entry(ioc->free_list.next,
1413 struct request_tracker, tracker_list);
1414 request->scmd = scmd;
1415 request->cb_idx = cb_idx;
1416 smid = request->smid;
1417 list_del(&request->tracker_list);
1418 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1419 return smid;
1420 }
1421
1422 /**
1423 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1424 * @ioc: per adapter object
1425 * @cb_idx: callback index
1426 *
1427 * Returns smid (zero is invalid)
1428 */
1429 u16
1430 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1431 {
1432 unsigned long flags;
1433 struct request_tracker *request;
1434 u16 smid;
1435
1436 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1437 if (list_empty(&ioc->hpr_free_list)) {
1438 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1439 return 0;
1440 }
1441
1442 request = list_entry(ioc->hpr_free_list.next,
1443 struct request_tracker, tracker_list);
1444 request->cb_idx = cb_idx;
1445 smid = request->smid;
1446 list_del(&request->tracker_list);
1447 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1448 return smid;
1449 }
1450
1451
1452 /**
1453 * mpt2sas_base_free_smid - put smid back on free_list
1454 * @ioc: per adapter object
1455 * @smid: system request message index
1456 *
1457 * Return nothing.
1458 */
1459 void
1460 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1461 {
1462 unsigned long flags;
1463 int i;
1464
1465 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1466 if (smid >= ioc->hi_priority_smid) {
1467 if (smid < ioc->internal_smid) {
1468 /* hi-priority */
1469 i = smid - ioc->hi_priority_smid;
1470 ioc->hpr_lookup[i].cb_idx = 0xFF;
1471 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1472 &ioc->hpr_free_list);
1473 } else {
1474 /* internal queue */
1475 i = smid - ioc->internal_smid;
1476 ioc->internal_lookup[i].cb_idx = 0xFF;
1477 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1478 &ioc->internal_free_list);
1479 }
1480 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1481 return;
1482 }
1483
1484 /* scsiio queue */
1485 i = smid - 1;
1486 ioc->scsi_lookup[i].cb_idx = 0xFF;
1487 ioc->scsi_lookup[i].scmd = NULL;
1488 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1489 &ioc->free_list);
1490 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1491
1492 /*
1493 * See _wait_for_commands_to_complete() call with regards to this code.
1494 */
1495 if (ioc->shost_recovery && ioc->pending_io_count) {
1496 if (ioc->pending_io_count == 1)
1497 wake_up(&ioc->reset_wq);
1498 ioc->pending_io_count--;
1499 }
1500 }
1501
1502 /**
1503 * _base_writeq - 64 bit write to MMIO
1504 * @ioc: per adapter object
1505 * @b: data payload
1506 * @addr: address in MMIO space
1507 * @writeq_lock: spin lock
1508 *
1509 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1510 * care of 32 bit environment where its not quarenteed to send the entire word
1511 * in one transfer.
1512 */
1513 #ifndef writeq
1514 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1515 spinlock_t *writeq_lock)
1516 {
1517 unsigned long flags;
1518 __u64 data_out = cpu_to_le64(b);
1519
1520 spin_lock_irqsave(writeq_lock, flags);
1521 writel((u32)(data_out), addr);
1522 writel((u32)(data_out >> 32), (addr + 4));
1523 spin_unlock_irqrestore(writeq_lock, flags);
1524 }
1525 #else
1526 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1527 spinlock_t *writeq_lock)
1528 {
1529 writeq(cpu_to_le64(b), addr);
1530 }
1531 #endif
1532
1533 /**
1534 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1535 * @ioc: per adapter object
1536 * @smid: system request message index
1537 * @handle: device handle
1538 *
1539 * Return nothing.
1540 */
1541 void
1542 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1543 {
1544 Mpi2RequestDescriptorUnion_t descriptor;
1545 u64 *request = (u64 *)&descriptor;
1546
1547
1548 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1549 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1550 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1551 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1552 descriptor.SCSIIO.LMID = 0;
1553 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1554 &ioc->scsi_lookup_lock);
1555 }
1556
1557
1558 /**
1559 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
1560 * @ioc: per adapter object
1561 * @smid: system request message index
1562 *
1563 * Return nothing.
1564 */
1565 void
1566 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1567 {
1568 Mpi2RequestDescriptorUnion_t descriptor;
1569 u64 *request = (u64 *)&descriptor;
1570
1571 descriptor.HighPriority.RequestFlags =
1572 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1573 descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1574 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1575 descriptor.HighPriority.LMID = 0;
1576 descriptor.HighPriority.Reserved1 = 0;
1577 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1578 &ioc->scsi_lookup_lock);
1579 }
1580
1581 /**
1582 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1583 * @ioc: per adapter object
1584 * @smid: system request message index
1585 *
1586 * Return nothing.
1587 */
1588 void
1589 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1590 {
1591 Mpi2RequestDescriptorUnion_t descriptor;
1592 u64 *request = (u64 *)&descriptor;
1593
1594 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1595 descriptor.Default.MSIxIndex = 0; /* TODO */
1596 descriptor.Default.SMID = cpu_to_le16(smid);
1597 descriptor.Default.LMID = 0;
1598 descriptor.Default.DescriptorTypeDependent = 0;
1599 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1600 &ioc->scsi_lookup_lock);
1601 }
1602
1603 /**
1604 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1605 * @ioc: per adapter object
1606 * @smid: system request message index
1607 * @io_index: value used to track the IO
1608 *
1609 * Return nothing.
1610 */
1611 void
1612 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1613 u16 io_index)
1614 {
1615 Mpi2RequestDescriptorUnion_t descriptor;
1616 u64 *request = (u64 *)&descriptor;
1617
1618 descriptor.SCSITarget.RequestFlags =
1619 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1620 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1621 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1622 descriptor.SCSITarget.LMID = 0;
1623 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1624 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1625 &ioc->scsi_lookup_lock);
1626 }
1627
1628 /**
1629 * _base_display_dell_branding - Disply branding string
1630 * @ioc: per adapter object
1631 *
1632 * Return nothing.
1633 */
1634 static void
1635 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1636 {
1637 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1638
1639 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1640 return;
1641
1642 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1643 switch (ioc->pdev->subsystem_device) {
1644 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1645 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1646 MPT2SAS_DELL_BRANDING_SIZE - 1);
1647 break;
1648 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1649 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1650 MPT2SAS_DELL_BRANDING_SIZE - 1);
1651 break;
1652 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1653 strncpy(dell_branding,
1654 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1655 MPT2SAS_DELL_BRANDING_SIZE - 1);
1656 break;
1657 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1658 strncpy(dell_branding,
1659 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1660 MPT2SAS_DELL_BRANDING_SIZE - 1);
1661 break;
1662 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1663 strncpy(dell_branding,
1664 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1665 MPT2SAS_DELL_BRANDING_SIZE - 1);
1666 break;
1667 case MPT2SAS_DELL_PERC_H200_SSDID:
1668 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1669 MPT2SAS_DELL_BRANDING_SIZE - 1);
1670 break;
1671 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1672 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1673 MPT2SAS_DELL_BRANDING_SIZE - 1);
1674 break;
1675 default:
1676 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1677 break;
1678 }
1679
1680 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1681 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1682 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1683 ioc->pdev->subsystem_device);
1684 }
1685
1686 /**
1687 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1688 * @ioc: per adapter object
1689 *
1690 * Return nothing.
1691 */
1692 static void
1693 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1694 {
1695 int i = 0;
1696 char desc[16];
1697 u8 revision;
1698 u32 iounit_pg1_flags;
1699
1700 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1701 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1702 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1703 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1704 ioc->name, desc,
1705 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1706 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1707 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1708 ioc->facts.FWVersion.Word & 0x000000FF,
1709 revision,
1710 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
1711 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
1712 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
1713 ioc->bios_pg3.BiosVersion & 0x000000FF);
1714
1715 _base_display_dell_branding(ioc);
1716
1717 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1718
1719 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1720 printk("Initiator");
1721 i++;
1722 }
1723
1724 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1725 printk("%sTarget", i ? "," : "");
1726 i++;
1727 }
1728
1729 i = 0;
1730 printk("), ");
1731 printk("Capabilities=(");
1732
1733 if (ioc->facts.IOCCapabilities &
1734 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1735 printk("Raid");
1736 i++;
1737 }
1738
1739 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1740 printk("%sTLR", i ? "," : "");
1741 i++;
1742 }
1743
1744 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1745 printk("%sMulticast", i ? "," : "");
1746 i++;
1747 }
1748
1749 if (ioc->facts.IOCCapabilities &
1750 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1751 printk("%sBIDI Target", i ? "," : "");
1752 i++;
1753 }
1754
1755 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1756 printk("%sEEDP", i ? "," : "");
1757 i++;
1758 }
1759
1760 if (ioc->facts.IOCCapabilities &
1761 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1762 printk("%sSnapshot Buffer", i ? "," : "");
1763 i++;
1764 }
1765
1766 if (ioc->facts.IOCCapabilities &
1767 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1768 printk("%sDiag Trace Buffer", i ? "," : "");
1769 i++;
1770 }
1771
1772 if (ioc->facts.IOCCapabilities &
1773 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
1774 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
1775 i++;
1776 }
1777
1778 if (ioc->facts.IOCCapabilities &
1779 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1780 printk("%sTask Set Full", i ? "," : "");
1781 i++;
1782 }
1783
1784 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1785 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1786 printk("%sNCQ", i ? "," : "");
1787 i++;
1788 }
1789
1790 printk(")\n");
1791 }
1792
1793 /**
1794 * _base_static_config_pages - static start of day config pages
1795 * @ioc: per adapter object
1796 *
1797 * Return nothing.
1798 */
1799 static void
1800 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
1801 {
1802 Mpi2ConfigReply_t mpi_reply;
1803 u32 iounit_pg1_flags;
1804
1805 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
1806 if (ioc->ir_firmware)
1807 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
1808 &ioc->manu_pg10);
1809 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
1810 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
1811 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
1812 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
1813 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1814 _base_display_ioc_capabilities(ioc);
1815
1816 /*
1817 * Enable task_set_full handling in iounit_pg1 when the
1818 * facts capabilities indicate that its supported.
1819 */
1820 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1821 if ((ioc->facts.IOCCapabilities &
1822 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
1823 iounit_pg1_flags &=
1824 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1825 else
1826 iounit_pg1_flags |=
1827 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
1828 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
1829 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
1830 }
1831
1832 /**
1833 * _base_release_memory_pools - release memory
1834 * @ioc: per adapter object
1835 *
1836 * Free memory allocated from _base_allocate_memory_pools.
1837 *
1838 * Return nothing.
1839 */
1840 static void
1841 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
1842 {
1843 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1844 __func__));
1845
1846 if (ioc->request) {
1847 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
1848 ioc->request, ioc->request_dma);
1849 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
1850 ": free\n", ioc->name, ioc->request));
1851 ioc->request = NULL;
1852 }
1853
1854 if (ioc->sense) {
1855 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
1856 if (ioc->sense_dma_pool)
1857 pci_pool_destroy(ioc->sense_dma_pool);
1858 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
1859 ": free\n", ioc->name, ioc->sense));
1860 ioc->sense = NULL;
1861 }
1862
1863 if (ioc->reply) {
1864 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
1865 if (ioc->reply_dma_pool)
1866 pci_pool_destroy(ioc->reply_dma_pool);
1867 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
1868 ": free\n", ioc->name, ioc->reply));
1869 ioc->reply = NULL;
1870 }
1871
1872 if (ioc->reply_free) {
1873 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
1874 ioc->reply_free_dma);
1875 if (ioc->reply_free_dma_pool)
1876 pci_pool_destroy(ioc->reply_free_dma_pool);
1877 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
1878 "(0x%p): free\n", ioc->name, ioc->reply_free));
1879 ioc->reply_free = NULL;
1880 }
1881
1882 if (ioc->reply_post_free) {
1883 pci_pool_free(ioc->reply_post_free_dma_pool,
1884 ioc->reply_post_free, ioc->reply_post_free_dma);
1885 if (ioc->reply_post_free_dma_pool)
1886 pci_pool_destroy(ioc->reply_post_free_dma_pool);
1887 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1888 "reply_post_free_pool(0x%p): free\n", ioc->name,
1889 ioc->reply_post_free));
1890 ioc->reply_post_free = NULL;
1891 }
1892
1893 if (ioc->config_page) {
1894 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
1895 "config_page(0x%p): free\n", ioc->name,
1896 ioc->config_page));
1897 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
1898 ioc->config_page, ioc->config_page_dma);
1899 }
1900
1901 kfree(ioc->scsi_lookup);
1902 kfree(ioc->hpr_lookup);
1903 kfree(ioc->internal_lookup);
1904 }
1905
1906
1907 /**
1908 * _base_allocate_memory_pools - allocate start of day memory pools
1909 * @ioc: per adapter object
1910 * @sleep_flag: CAN_SLEEP or NO_SLEEP
1911 *
1912 * Returns 0 success, anything else error
1913 */
1914 static int
1915 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
1916 {
1917 Mpi2IOCFactsReply_t *facts;
1918 u32 queue_size, queue_diff;
1919 u16 max_sge_elements;
1920 u16 num_of_reply_frames;
1921 u16 chains_needed_per_io;
1922 u32 sz, total_sz;
1923 u32 retry_sz;
1924 u16 max_request_credit;
1925
1926 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
1927 __func__));
1928
1929 retry_sz = 0;
1930 facts = &ioc->facts;
1931
1932 /* command line tunables for max sgl entries */
1933 if (max_sgl_entries != -1) {
1934 ioc->shost->sg_tablesize = (max_sgl_entries <
1935 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
1936 MPT2SAS_SG_DEPTH;
1937 } else {
1938 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
1939 }
1940
1941 /* command line tunables for max controller queue depth */
1942 if (max_queue_depth != -1) {
1943 max_request_credit = (max_queue_depth < facts->RequestCredit)
1944 ? max_queue_depth : facts->RequestCredit;
1945 } else {
1946 max_request_credit = (facts->RequestCredit >
1947 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
1948 facts->RequestCredit;
1949 }
1950
1951 ioc->hba_queue_depth = max_request_credit;
1952 ioc->hi_priority_depth = facts->HighPriorityCredit;
1953 ioc->internal_depth = ioc->hi_priority_depth + 5;
1954
1955 /* request frame size */
1956 ioc->request_sz = facts->IOCRequestFrameSize * 4;
1957
1958 /* reply frame size */
1959 ioc->reply_sz = facts->ReplyFrameSize * 4;
1960
1961 retry_allocation:
1962 total_sz = 0;
1963 /* calculate number of sg elements left over in the 1st frame */
1964 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
1965 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
1966 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
1967
1968 /* now do the same for a chain buffer */
1969 max_sge_elements = ioc->request_sz - ioc->sge_size;
1970 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
1971
1972 ioc->chain_offset_value_for_main_message =
1973 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
1974 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
1975
1976 /*
1977 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
1978 */
1979 chains_needed_per_io = ((ioc->shost->sg_tablesize -
1980 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
1981 + 1;
1982 if (chains_needed_per_io > facts->MaxChainDepth) {
1983 chains_needed_per_io = facts->MaxChainDepth;
1984 ioc->shost->sg_tablesize = min_t(u16,
1985 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
1986 * chains_needed_per_io), ioc->shost->sg_tablesize);
1987 }
1988 ioc->chains_needed_per_io = chains_needed_per_io;
1989
1990 /* reply free queue sizing - taking into account for events */
1991 num_of_reply_frames = ioc->hba_queue_depth + 32;
1992
1993 /* number of replies frames can't be a multiple of 16 */
1994 /* decrease number of reply frames by 1 */
1995 if (!(num_of_reply_frames % 16))
1996 num_of_reply_frames--;
1997
1998 /* calculate number of reply free queue entries
1999 * (must be multiple of 16)
2000 */
2001
2002 /* (we know reply_free_queue_depth is not a multiple of 16) */
2003 queue_size = num_of_reply_frames;
2004 queue_size += 16 - (queue_size % 16);
2005 ioc->reply_free_queue_depth = queue_size;
2006
2007 /* reply descriptor post queue sizing */
2008 /* this size should be the number of request frames + number of reply
2009 * frames
2010 */
2011
2012 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2013 /* round up to 16 byte boundary */
2014 if (queue_size % 16)
2015 queue_size += 16 - (queue_size % 16);
2016
2017 /* check against IOC maximum reply post queue depth */
2018 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2019 queue_diff = queue_size -
2020 facts->MaxReplyDescriptorPostQueueDepth;
2021
2022 /* round queue_diff up to multiple of 16 */
2023 if (queue_diff % 16)
2024 queue_diff += 16 - (queue_diff % 16);
2025
2026 /* adjust hba_queue_depth, reply_free_queue_depth,
2027 * and queue_size
2028 */
2029 ioc->hba_queue_depth -= queue_diff;
2030 ioc->reply_free_queue_depth -= queue_diff;
2031 queue_size -= queue_diff;
2032 }
2033 ioc->reply_post_queue_depth = queue_size;
2034
2035 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2036 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2037 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2038 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2039 ioc->chains_needed_per_io));
2040
2041 ioc->scsiio_depth = ioc->hba_queue_depth -
2042 ioc->hi_priority_depth - ioc->internal_depth;
2043
2044 /* set the scsi host can_queue depth
2045 * with some internal commands that could be outstanding
2046 */
2047 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2048 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2049 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2050
2051 /* contiguous pool for request and chains, 16 byte align, one extra "
2052 * "frame for smid=0
2053 */
2054 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2055 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
2056
2057 /* hi-priority queue */
2058 sz += (ioc->hi_priority_depth * ioc->request_sz);
2059
2060 /* internal queue */
2061 sz += (ioc->internal_depth * ioc->request_sz);
2062
2063 ioc->request_dma_sz = sz;
2064 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2065 if (!ioc->request) {
2066 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2067 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2068 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2069 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2070 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2071 goto out;
2072 retry_sz += 64;
2073 ioc->hba_queue_depth = max_request_credit - retry_sz;
2074 goto retry_allocation;
2075 }
2076
2077 if (retry_sz)
2078 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2079 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2080 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2081 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2082
2083
2084 /* hi-priority queue */
2085 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2086 ioc->request_sz);
2087 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2088 ioc->request_sz);
2089
2090 /* internal queue */
2091 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2092 ioc->request_sz);
2093 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2094 ioc->request_sz);
2095
2096 ioc->chain = ioc->internal + (ioc->internal_depth *
2097 ioc->request_sz);
2098 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
2099 ioc->request_sz);
2100
2101 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2102 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2103 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2104 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2105 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
2106 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
2107 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2108 ioc->request_sz))/1024));
2109 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2110 ioc->name, (unsigned long long) ioc->request_dma));
2111 total_sz += sz;
2112
2113 ioc->scsi_lookup = kcalloc(ioc->scsiio_depth,
2114 sizeof(struct request_tracker), GFP_KERNEL);
2115 if (!ioc->scsi_lookup) {
2116 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
2117 ioc->name);
2118 goto out;
2119 }
2120
2121 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2122 "depth(%d)\n", ioc->name, ioc->request,
2123 ioc->scsiio_depth));
2124
2125 /* initialize hi-priority queue smid's */
2126 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2127 sizeof(struct request_tracker), GFP_KERNEL);
2128 if (!ioc->hpr_lookup) {
2129 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2130 ioc->name);
2131 goto out;
2132 }
2133 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2134 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2135 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2136 ioc->hi_priority_depth, ioc->hi_priority_smid));
2137
2138 /* initialize internal queue smid's */
2139 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2140 sizeof(struct request_tracker), GFP_KERNEL);
2141 if (!ioc->internal_lookup) {
2142 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2143 ioc->name);
2144 goto out;
2145 }
2146 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2147 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2148 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2149 ioc->internal_depth, ioc->internal_smid));
2150
2151 /* sense buffers, 4 byte align */
2152 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2153 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2154 0);
2155 if (!ioc->sense_dma_pool) {
2156 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2157 ioc->name);
2158 goto out;
2159 }
2160 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2161 &ioc->sense_dma);
2162 if (!ioc->sense) {
2163 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2164 ioc->name);
2165 goto out;
2166 }
2167 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2168 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2169 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2170 SCSI_SENSE_BUFFERSIZE, sz/1024));
2171 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2172 ioc->name, (unsigned long long)ioc->sense_dma));
2173 total_sz += sz;
2174
2175 /* reply pool, 4 byte align */
2176 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2177 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2178 0);
2179 if (!ioc->reply_dma_pool) {
2180 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2181 ioc->name);
2182 goto out;
2183 }
2184 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2185 &ioc->reply_dma);
2186 if (!ioc->reply) {
2187 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2188 ioc->name);
2189 goto out;
2190 }
2191 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2192 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2193 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2194 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2195 ioc->name, (unsigned long long)ioc->reply_dma));
2196 total_sz += sz;
2197
2198 /* reply free queue, 16 byte align */
2199 sz = ioc->reply_free_queue_depth * 4;
2200 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2201 ioc->pdev, sz, 16, 0);
2202 if (!ioc->reply_free_dma_pool) {
2203 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2204 "failed\n", ioc->name);
2205 goto out;
2206 }
2207 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2208 &ioc->reply_free_dma);
2209 if (!ioc->reply_free) {
2210 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2211 "failed\n", ioc->name);
2212 goto out;
2213 }
2214 memset(ioc->reply_free, 0, sz);
2215 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2216 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2217 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2218 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2219 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2220 total_sz += sz;
2221
2222 /* reply post queue, 16 byte align */
2223 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
2224 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2225 ioc->pdev, sz, 16, 0);
2226 if (!ioc->reply_post_free_dma_pool) {
2227 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2228 "failed\n", ioc->name);
2229 goto out;
2230 }
2231 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2232 GFP_KERNEL, &ioc->reply_post_free_dma);
2233 if (!ioc->reply_post_free) {
2234 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2235 "failed\n", ioc->name);
2236 goto out;
2237 }
2238 memset(ioc->reply_post_free, 0, sz);
2239 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2240 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2241 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2242 sz/1024));
2243 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2244 "(0x%llx)\n", ioc->name, (unsigned long long)
2245 ioc->reply_post_free_dma));
2246 total_sz += sz;
2247
2248 ioc->config_page_sz = 512;
2249 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2250 ioc->config_page_sz, &ioc->config_page_dma);
2251 if (!ioc->config_page) {
2252 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2253 "failed\n", ioc->name);
2254 goto out;
2255 }
2256 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2257 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2258 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2259 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2260 total_sz += ioc->config_page_sz;
2261
2262 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2263 ioc->name, total_sz/1024);
2264 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2265 "Max Controller Queue Depth(%d)\n",
2266 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2267 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2268 ioc->name, ioc->shost->sg_tablesize);
2269 return 0;
2270
2271 out:
2272 _base_release_memory_pools(ioc);
2273 return -ENOMEM;
2274 }
2275
2276
2277 /**
2278 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2279 * @ioc: Pointer to MPT_ADAPTER structure
2280 * @cooked: Request raw or cooked IOC state
2281 *
2282 * Returns all IOC Doorbell register bits if cooked==0, else just the
2283 * Doorbell bits in MPI_IOC_STATE_MASK.
2284 */
2285 u32
2286 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2287 {
2288 u32 s, sc;
2289
2290 s = readl(&ioc->chip->Doorbell);
2291 sc = s & MPI2_IOC_STATE_MASK;
2292 return cooked ? sc : s;
2293 }
2294
2295 /**
2296 * _base_wait_on_iocstate - waiting on a particular ioc state
2297 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2298 * @timeout: timeout in second
2299 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2300 *
2301 * Returns 0 for success, non-zero for failure.
2302 */
2303 static int
2304 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2305 int sleep_flag)
2306 {
2307 u32 count, cntdn;
2308 u32 current_state;
2309
2310 count = 0;
2311 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2312 do {
2313 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2314 if (current_state == ioc_state)
2315 return 0;
2316 if (count && current_state == MPI2_IOC_STATE_FAULT)
2317 break;
2318 if (sleep_flag == CAN_SLEEP)
2319 msleep(1);
2320 else
2321 udelay(500);
2322 count++;
2323 } while (--cntdn);
2324
2325 return current_state;
2326 }
2327
2328 /**
2329 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2330 * a write to the doorbell)
2331 * @ioc: per adapter object
2332 * @timeout: timeout in second
2333 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2334 *
2335 * Returns 0 for success, non-zero for failure.
2336 *
2337 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2338 */
2339 static int
2340 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2341 int sleep_flag)
2342 {
2343 u32 cntdn, count;
2344 u32 int_status;
2345
2346 count = 0;
2347 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2348 do {
2349 int_status = readl(&ioc->chip->HostInterruptStatus);
2350 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2351 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2352 "successfull count(%d), timeout(%d)\n", ioc->name,
2353 __func__, count, timeout));
2354 return 0;
2355 }
2356 if (sleep_flag == CAN_SLEEP)
2357 msleep(1);
2358 else
2359 udelay(500);
2360 count++;
2361 } while (--cntdn);
2362
2363 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2364 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2365 return -EFAULT;
2366 }
2367
2368 /**
2369 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2370 * @ioc: per adapter object
2371 * @timeout: timeout in second
2372 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2373 *
2374 * Returns 0 for success, non-zero for failure.
2375 *
2376 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2377 * doorbell.
2378 */
2379 static int
2380 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2381 int sleep_flag)
2382 {
2383 u32 cntdn, count;
2384 u32 int_status;
2385 u32 doorbell;
2386
2387 count = 0;
2388 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2389 do {
2390 int_status = readl(&ioc->chip->HostInterruptStatus);
2391 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2392 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2393 "successfull count(%d), timeout(%d)\n", ioc->name,
2394 __func__, count, timeout));
2395 return 0;
2396 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2397 doorbell = readl(&ioc->chip->Doorbell);
2398 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2399 MPI2_IOC_STATE_FAULT) {
2400 mpt2sas_base_fault_info(ioc , doorbell);
2401 return -EFAULT;
2402 }
2403 } else if (int_status == 0xFFFFFFFF)
2404 goto out;
2405
2406 if (sleep_flag == CAN_SLEEP)
2407 msleep(1);
2408 else
2409 udelay(500);
2410 count++;
2411 } while (--cntdn);
2412
2413 out:
2414 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2415 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2416 return -EFAULT;
2417 }
2418
2419 /**
2420 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2421 * @ioc: per adapter object
2422 * @timeout: timeout in second
2423 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2424 *
2425 * Returns 0 for success, non-zero for failure.
2426 *
2427 */
2428 static int
2429 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2430 int sleep_flag)
2431 {
2432 u32 cntdn, count;
2433 u32 doorbell_reg;
2434
2435 count = 0;
2436 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2437 do {
2438 doorbell_reg = readl(&ioc->chip->Doorbell);
2439 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2440 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
2441 "successfull count(%d), timeout(%d)\n", ioc->name,
2442 __func__, count, timeout));
2443 return 0;
2444 }
2445 if (sleep_flag == CAN_SLEEP)
2446 msleep(1);
2447 else
2448 udelay(500);
2449 count++;
2450 } while (--cntdn);
2451
2452 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2453 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2454 return -EFAULT;
2455 }
2456
2457 /**
2458 * _base_send_ioc_reset - send doorbell reset
2459 * @ioc: per adapter object
2460 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2461 * @timeout: timeout in second
2462 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2463 *
2464 * Returns 0 for success, non-zero for failure.
2465 */
2466 static int
2467 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2468 int sleep_flag)
2469 {
2470 u32 ioc_state;
2471 int r = 0;
2472
2473 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2474 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2475 ioc->name, __func__);
2476 return -EFAULT;
2477 }
2478
2479 if (!(ioc->facts.IOCCapabilities &
2480 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2481 return -EFAULT;
2482
2483 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2484
2485 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2486 &ioc->chip->Doorbell);
2487 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2488 r = -EFAULT;
2489 goto out;
2490 }
2491 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2492 timeout, sleep_flag);
2493 if (ioc_state) {
2494 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2495 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2496 r = -EFAULT;
2497 goto out;
2498 }
2499 out:
2500 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2501 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2502 return r;
2503 }
2504
2505 /**
2506 * _base_handshake_req_reply_wait - send request thru doorbell interface
2507 * @ioc: per adapter object
2508 * @request_bytes: request length
2509 * @request: pointer having request payload
2510 * @reply_bytes: reply length
2511 * @reply: pointer to reply payload
2512 * @timeout: timeout in second
2513 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2514 *
2515 * Returns 0 for success, non-zero for failure.
2516 */
2517 static int
2518 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2519 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2520 {
2521 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2522 int i;
2523 u8 failed;
2524 u16 dummy;
2525 u32 *mfp;
2526
2527 /* make sure doorbell is not in use */
2528 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2529 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2530 " (line=%d)\n", ioc->name, __LINE__);
2531 return -EFAULT;
2532 }
2533
2534 /* clear pending doorbell interrupts from previous state changes */
2535 if (readl(&ioc->chip->HostInterruptStatus) &
2536 MPI2_HIS_IOC2SYS_DB_STATUS)
2537 writel(0, &ioc->chip->HostInterruptStatus);
2538
2539 /* send message to ioc */
2540 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2541 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2542 &ioc->chip->Doorbell);
2543
2544 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2545 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2546 "int failed (line=%d)\n", ioc->name, __LINE__);
2547 return -EFAULT;
2548 }
2549 writel(0, &ioc->chip->HostInterruptStatus);
2550
2551 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2552 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2553 "ack failed (line=%d)\n", ioc->name, __LINE__);
2554 return -EFAULT;
2555 }
2556
2557 /* send message 32-bits at a time */
2558 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2559 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2560 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2561 failed = 1;
2562 }
2563
2564 if (failed) {
2565 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2566 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2567 return -EFAULT;
2568 }
2569
2570 /* now wait for the reply */
2571 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2572 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2573 "int failed (line=%d)\n", ioc->name, __LINE__);
2574 return -EFAULT;
2575 }
2576
2577 /* read the first two 16-bits, it gives the total length of the reply */
2578 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2579 & MPI2_DOORBELL_DATA_MASK);
2580 writel(0, &ioc->chip->HostInterruptStatus);
2581 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2582 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2583 "int failed (line=%d)\n", ioc->name, __LINE__);
2584 return -EFAULT;
2585 }
2586 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2587 & MPI2_DOORBELL_DATA_MASK);
2588 writel(0, &ioc->chip->HostInterruptStatus);
2589
2590 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2591 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2592 printk(MPT2SAS_ERR_FMT "doorbell "
2593 "handshake int failed (line=%d)\n", ioc->name,
2594 __LINE__);
2595 return -EFAULT;
2596 }
2597 if (i >= reply_bytes/2) /* overflow case */
2598 dummy = readl(&ioc->chip->Doorbell);
2599 else
2600 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2601 & MPI2_DOORBELL_DATA_MASK);
2602 writel(0, &ioc->chip->HostInterruptStatus);
2603 }
2604
2605 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2606 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2607 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2608 " (line=%d)\n", ioc->name, __LINE__));
2609 }
2610 writel(0, &ioc->chip->HostInterruptStatus);
2611
2612 if (ioc->logging_level & MPT_DEBUG_INIT) {
2613 mfp = (u32 *)reply;
2614 printk(KERN_DEBUG "\toffset:data\n");
2615 for (i = 0; i < reply_bytes/4; i++)
2616 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
2617 le32_to_cpu(mfp[i]));
2618 }
2619 return 0;
2620 }
2621
2622 /**
2623 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2624 * @ioc: per adapter object
2625 * @mpi_reply: the reply payload from FW
2626 * @mpi_request: the request payload sent to FW
2627 *
2628 * The SAS IO Unit Control Request message allows the host to perform low-level
2629 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2630 * to obtain the IOC assigned device handles for a device if it has other
2631 * identifying information about the device, in addition allows the host to
2632 * remove IOC resources associated with the device.
2633 *
2634 * Returns 0 for success, non-zero for failure.
2635 */
2636 int
2637 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2638 Mpi2SasIoUnitControlReply_t *mpi_reply,
2639 Mpi2SasIoUnitControlRequest_t *mpi_request)
2640 {
2641 u16 smid;
2642 u32 ioc_state;
2643 unsigned long timeleft;
2644 u8 issue_reset;
2645 int rc;
2646 void *request;
2647 u16 wait_state_count;
2648
2649 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2650 __func__));
2651
2652 mutex_lock(&ioc->base_cmds.mutex);
2653
2654 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2655 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2656 ioc->name, __func__);
2657 rc = -EAGAIN;
2658 goto out;
2659 }
2660
2661 wait_state_count = 0;
2662 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2663 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2664 if (wait_state_count++ == 10) {
2665 printk(MPT2SAS_ERR_FMT
2666 "%s: failed due to ioc not operational\n",
2667 ioc->name, __func__);
2668 rc = -EFAULT;
2669 goto out;
2670 }
2671 ssleep(1);
2672 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2673 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2674 "operational state(count=%d)\n", ioc->name,
2675 __func__, wait_state_count);
2676 }
2677
2678 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2679 if (!smid) {
2680 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2681 ioc->name, __func__);
2682 rc = -EAGAIN;
2683 goto out;
2684 }
2685
2686 rc = 0;
2687 ioc->base_cmds.status = MPT2_CMD_PENDING;
2688 request = mpt2sas_base_get_msg_frame(ioc, smid);
2689 ioc->base_cmds.smid = smid;
2690 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2691 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2692 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2693 ioc->ioc_link_reset_in_progress = 1;
2694 mpt2sas_base_put_smid_default(ioc, smid);
2695 init_completion(&ioc->base_cmds.done);
2696 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2697 msecs_to_jiffies(10000));
2698 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2699 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2700 ioc->ioc_link_reset_in_progress)
2701 ioc->ioc_link_reset_in_progress = 0;
2702 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2703 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2704 ioc->name, __func__);
2705 _debug_dump_mf(mpi_request,
2706 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2707 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2708 issue_reset = 1;
2709 goto issue_host_reset;
2710 }
2711 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2712 memcpy(mpi_reply, ioc->base_cmds.reply,
2713 sizeof(Mpi2SasIoUnitControlReply_t));
2714 else
2715 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2716 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2717 goto out;
2718
2719 issue_host_reset:
2720 if (issue_reset)
2721 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2722 FORCE_BIG_HAMMER);
2723 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2724 rc = -EFAULT;
2725 out:
2726 mutex_unlock(&ioc->base_cmds.mutex);
2727 return rc;
2728 }
2729
2730
2731 /**
2732 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
2733 * @ioc: per adapter object
2734 * @mpi_reply: the reply payload from FW
2735 * @mpi_request: the request payload sent to FW
2736 *
2737 * The SCSI Enclosure Processor request message causes the IOC to
2738 * communicate with SES devices to control LED status signals.
2739 *
2740 * Returns 0 for success, non-zero for failure.
2741 */
2742 int
2743 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
2744 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
2745 {
2746 u16 smid;
2747 u32 ioc_state;
2748 unsigned long timeleft;
2749 u8 issue_reset;
2750 int rc;
2751 void *request;
2752 u16 wait_state_count;
2753
2754 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2755 __func__));
2756
2757 mutex_lock(&ioc->base_cmds.mutex);
2758
2759 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2760 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2761 ioc->name, __func__);
2762 rc = -EAGAIN;
2763 goto out;
2764 }
2765
2766 wait_state_count = 0;
2767 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2768 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2769 if (wait_state_count++ == 10) {
2770 printk(MPT2SAS_ERR_FMT
2771 "%s: failed due to ioc not operational\n",
2772 ioc->name, __func__);
2773 rc = -EFAULT;
2774 goto out;
2775 }
2776 ssleep(1);
2777 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2778 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2779 "operational state(count=%d)\n", ioc->name,
2780 __func__, wait_state_count);
2781 }
2782
2783 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2784 if (!smid) {
2785 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2786 ioc->name, __func__);
2787 rc = -EAGAIN;
2788 goto out;
2789 }
2790
2791 rc = 0;
2792 ioc->base_cmds.status = MPT2_CMD_PENDING;
2793 request = mpt2sas_base_get_msg_frame(ioc, smid);
2794 ioc->base_cmds.smid = smid;
2795 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
2796 mpt2sas_base_put_smid_default(ioc, smid);
2797 init_completion(&ioc->base_cmds.done);
2798 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2799 msecs_to_jiffies(10000));
2800 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2801 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2802 ioc->name, __func__);
2803 _debug_dump_mf(mpi_request,
2804 sizeof(Mpi2SepRequest_t)/4);
2805 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2806 issue_reset = 1;
2807 goto issue_host_reset;
2808 }
2809 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2810 memcpy(mpi_reply, ioc->base_cmds.reply,
2811 sizeof(Mpi2SepReply_t));
2812 else
2813 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
2814 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2815 goto out;
2816
2817 issue_host_reset:
2818 if (issue_reset)
2819 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
2820 FORCE_BIG_HAMMER);
2821 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2822 rc = -EFAULT;
2823 out:
2824 mutex_unlock(&ioc->base_cmds.mutex);
2825 return rc;
2826 }
2827
2828 /**
2829 * _base_get_port_facts - obtain port facts reply and save in ioc
2830 * @ioc: per adapter object
2831 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2832 *
2833 * Returns 0 for success, non-zero for failure.
2834 */
2835 static int
2836 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
2837 {
2838 Mpi2PortFactsRequest_t mpi_request;
2839 Mpi2PortFactsReply_t mpi_reply, *pfacts;
2840 int mpi_reply_sz, mpi_request_sz, r;
2841
2842 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2843 __func__));
2844
2845 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
2846 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
2847 memset(&mpi_request, 0, mpi_request_sz);
2848 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
2849 mpi_request.PortNumber = port;
2850 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2851 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2852
2853 if (r != 0) {
2854 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2855 ioc->name, __func__, r);
2856 return r;
2857 }
2858
2859 pfacts = &ioc->pfacts[port];
2860 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
2861 pfacts->PortNumber = mpi_reply.PortNumber;
2862 pfacts->VP_ID = mpi_reply.VP_ID;
2863 pfacts->VF_ID = mpi_reply.VF_ID;
2864 pfacts->MaxPostedCmdBuffers =
2865 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
2866
2867 return 0;
2868 }
2869
2870 /**
2871 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
2872 * @ioc: per adapter object
2873 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2874 *
2875 * Returns 0 for success, non-zero for failure.
2876 */
2877 static int
2878 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2879 {
2880 Mpi2IOCFactsRequest_t mpi_request;
2881 Mpi2IOCFactsReply_t mpi_reply, *facts;
2882 int mpi_reply_sz, mpi_request_sz, r;
2883
2884 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2885 __func__));
2886
2887 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
2888 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
2889 memset(&mpi_request, 0, mpi_request_sz);
2890 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
2891 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
2892 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
2893
2894 if (r != 0) {
2895 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
2896 ioc->name, __func__, r);
2897 return r;
2898 }
2899
2900 facts = &ioc->facts;
2901 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
2902 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
2903 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
2904 facts->VP_ID = mpi_reply.VP_ID;
2905 facts->VF_ID = mpi_reply.VF_ID;
2906 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
2907 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
2908 facts->WhoInit = mpi_reply.WhoInit;
2909 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
2910 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
2911 facts->MaxReplyDescriptorPostQueueDepth =
2912 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
2913 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
2914 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
2915 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
2916 ioc->ir_firmware = 1;
2917 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
2918 facts->IOCRequestFrameSize =
2919 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
2920 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
2921 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
2922 ioc->shost->max_id = -1;
2923 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
2924 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
2925 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
2926 facts->HighPriorityCredit =
2927 le16_to_cpu(mpi_reply.HighPriorityCredit);
2928 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
2929 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
2930
2931 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
2932 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
2933 facts->MaxChainDepth));
2934 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
2935 "reply frame size(%d)\n", ioc->name,
2936 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
2937 return 0;
2938 }
2939
2940 /**
2941 * _base_send_ioc_init - send ioc_init to firmware
2942 * @ioc: per adapter object
2943 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2944 *
2945 * Returns 0 for success, non-zero for failure.
2946 */
2947 static int
2948 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2949 {
2950 Mpi2IOCInitRequest_t mpi_request;
2951 Mpi2IOCInitReply_t mpi_reply;
2952 int r;
2953 struct timeval current_time;
2954 u16 ioc_status;
2955
2956 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
2957 __func__));
2958
2959 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
2960 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
2961 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
2962 mpi_request.VF_ID = 0; /* TODO */
2963 mpi_request.VP_ID = 0;
2964 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
2965 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
2966
2967 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
2968 * removed and made reserved. For those with older firmware will need
2969 * this fix. It was decided that the Reply and Request frame sizes are
2970 * the same.
2971 */
2972 if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
2973 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
2974 /* mpi_request.SystemReplyFrameSize =
2975 * cpu_to_le16(ioc->reply_sz);
2976 */
2977 }
2978
2979 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
2980 mpi_request.ReplyDescriptorPostQueueDepth =
2981 cpu_to_le16(ioc->reply_post_queue_depth);
2982 mpi_request.ReplyFreeQueueDepth =
2983 cpu_to_le16(ioc->reply_free_queue_depth);
2984
2985 #if BITS_PER_LONG > 32
2986 mpi_request.SenseBufferAddressHigh =
2987 cpu_to_le32(ioc->sense_dma >> 32);
2988 mpi_request.SystemReplyAddressHigh =
2989 cpu_to_le32(ioc->reply_dma >> 32);
2990 mpi_request.SystemRequestFrameBaseAddress =
2991 cpu_to_le64(ioc->request_dma);
2992 mpi_request.ReplyFreeQueueAddress =
2993 cpu_to_le64(ioc->reply_free_dma);
2994 mpi_request.ReplyDescriptorPostQueueAddress =
2995 cpu_to_le64(ioc->reply_post_free_dma);
2996 #else
2997 mpi_request.SystemRequestFrameBaseAddress =
2998 cpu_to_le32(ioc->request_dma);
2999 mpi_request.ReplyFreeQueueAddress =
3000 cpu_to_le32(ioc->reply_free_dma);
3001 mpi_request.ReplyDescriptorPostQueueAddress =
3002 cpu_to_le32(ioc->reply_post_free_dma);
3003 #endif
3004
3005 /* This time stamp specifies number of milliseconds
3006 * since epoch ~ midnight January 1, 1970.
3007 */
3008 do_gettimeofday(&current_time);
3009 mpi_request.TimeStamp = (current_time.tv_sec * 1000) +
3010 (current_time.tv_usec >> 3);
3011
3012 if (ioc->logging_level & MPT_DEBUG_INIT) {
3013 u32 *mfp;
3014 int i;
3015
3016 mfp = (u32 *)&mpi_request;
3017 printk(KERN_DEBUG "\toffset:data\n");
3018 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3019 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
3020 le32_to_cpu(mfp[i]));
3021 }
3022
3023 r = _base_handshake_req_reply_wait(ioc,
3024 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3025 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3026 sleep_flag);
3027
3028 if (r != 0) {
3029 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3030 ioc->name, __func__, r);
3031 return r;
3032 }
3033
3034 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3035 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3036 mpi_reply.IOCLogInfo) {
3037 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3038 r = -EIO;
3039 }
3040
3041 return 0;
3042 }
3043
3044 /**
3045 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3046 * @ioc: per adapter object
3047 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3048 *
3049 * Returns 0 for success, non-zero for failure.
3050 */
3051 static int
3052 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3053 {
3054 Mpi2PortEnableRequest_t *mpi_request;
3055 u32 ioc_state;
3056 unsigned long timeleft;
3057 int r = 0;
3058 u16 smid;
3059
3060 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3061
3062 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3063 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3064 ioc->name, __func__);
3065 return -EAGAIN;
3066 }
3067
3068 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3069 if (!smid) {
3070 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3071 ioc->name, __func__);
3072 return -EAGAIN;
3073 }
3074
3075 ioc->base_cmds.status = MPT2_CMD_PENDING;
3076 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3077 ioc->base_cmds.smid = smid;
3078 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3079 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3080 mpi_request->VF_ID = 0; /* TODO */
3081 mpi_request->VP_ID = 0;
3082
3083 mpt2sas_base_put_smid_default(ioc, smid);
3084 init_completion(&ioc->base_cmds.done);
3085 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3086 300*HZ);
3087 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3088 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3089 ioc->name, __func__);
3090 _debug_dump_mf(mpi_request,
3091 sizeof(Mpi2PortEnableRequest_t)/4);
3092 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3093 r = -EFAULT;
3094 else
3095 r = -ETIME;
3096 goto out;
3097 } else
3098 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
3099 ioc->name, __func__));
3100
3101 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3102 60, sleep_flag);
3103 if (ioc_state) {
3104 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3105 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3106 r = -EFAULT;
3107 }
3108 out:
3109 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3110 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3111 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3112 return r;
3113 }
3114
3115 /**
3116 * _base_unmask_events - turn on notification for this event
3117 * @ioc: per adapter object
3118 * @event: firmware event
3119 *
3120 * The mask is stored in ioc->event_masks.
3121 */
3122 static void
3123 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3124 {
3125 u32 desired_event;
3126
3127 if (event >= 128)
3128 return;
3129
3130 desired_event = (1 << (event % 32));
3131
3132 if (event < 32)
3133 ioc->event_masks[0] &= ~desired_event;
3134 else if (event < 64)
3135 ioc->event_masks[1] &= ~desired_event;
3136 else if (event < 96)
3137 ioc->event_masks[2] &= ~desired_event;
3138 else if (event < 128)
3139 ioc->event_masks[3] &= ~desired_event;
3140 }
3141
3142 /**
3143 * _base_event_notification - send event notification
3144 * @ioc: per adapter object
3145 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3146 *
3147 * Returns 0 for success, non-zero for failure.
3148 */
3149 static int
3150 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3151 {
3152 Mpi2EventNotificationRequest_t *mpi_request;
3153 unsigned long timeleft;
3154 u16 smid;
3155 int r = 0;
3156 int i;
3157
3158 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3159 __func__));
3160
3161 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3162 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3163 ioc->name, __func__);
3164 return -EAGAIN;
3165 }
3166
3167 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3168 if (!smid) {
3169 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3170 ioc->name, __func__);
3171 return -EAGAIN;
3172 }
3173 ioc->base_cmds.status = MPT2_CMD_PENDING;
3174 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3175 ioc->base_cmds.smid = smid;
3176 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3177 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3178 mpi_request->VF_ID = 0; /* TODO */
3179 mpi_request->VP_ID = 0;
3180 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3181 mpi_request->EventMasks[i] =
3182 le32_to_cpu(ioc->event_masks[i]);
3183 mpt2sas_base_put_smid_default(ioc, smid);
3184 init_completion(&ioc->base_cmds.done);
3185 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3186 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3187 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3188 ioc->name, __func__);
3189 _debug_dump_mf(mpi_request,
3190 sizeof(Mpi2EventNotificationRequest_t)/4);
3191 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3192 r = -EFAULT;
3193 else
3194 r = -ETIME;
3195 } else
3196 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
3197 ioc->name, __func__));
3198 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3199 return r;
3200 }
3201
3202 /**
3203 * mpt2sas_base_validate_event_type - validating event types
3204 * @ioc: per adapter object
3205 * @event: firmware event
3206 *
3207 * This will turn on firmware event notification when application
3208 * ask for that event. We don't mask events that are already enabled.
3209 */
3210 void
3211 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3212 {
3213 int i, j;
3214 u32 event_mask, desired_event;
3215 u8 send_update_to_fw;
3216
3217 for (i = 0, send_update_to_fw = 0; i <
3218 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3219 event_mask = ~event_type[i];
3220 desired_event = 1;
3221 for (j = 0; j < 32; j++) {
3222 if (!(event_mask & desired_event) &&
3223 (ioc->event_masks[i] & desired_event)) {
3224 ioc->event_masks[i] &= ~desired_event;
3225 send_update_to_fw = 1;
3226 }
3227 desired_event = (desired_event << 1);
3228 }
3229 }
3230
3231 if (!send_update_to_fw)
3232 return;
3233
3234 mutex_lock(&ioc->base_cmds.mutex);
3235 _base_event_notification(ioc, CAN_SLEEP);
3236 mutex_unlock(&ioc->base_cmds.mutex);
3237 }
3238
3239 /**
3240 * _base_diag_reset - the "big hammer" start of day reset
3241 * @ioc: per adapter object
3242 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3243 *
3244 * Returns 0 for success, non-zero for failure.
3245 */
3246 static int
3247 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3248 {
3249 u32 host_diagnostic;
3250 u32 ioc_state;
3251 u32 count;
3252 u32 hcb_size;
3253
3254 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3255
3256 _base_save_msix_table(ioc);
3257
3258 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
3259 ioc->name));
3260
3261 count = 0;
3262 do {
3263 /* Write magic sequence to WriteSequence register
3264 * Loop until in diagnostic mode
3265 */
3266 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
3267 "sequence\n", ioc->name));
3268 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3269 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3270 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3271 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3272 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3273 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3274 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3275
3276 /* wait 100 msec */
3277 if (sleep_flag == CAN_SLEEP)
3278 msleep(100);
3279 else
3280 mdelay(100);
3281
3282 if (count++ > 20)
3283 goto out;
3284
3285 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3286 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
3287 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3288 ioc->name, count, host_diagnostic));
3289
3290 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3291
3292 hcb_size = readl(&ioc->chip->HCBSize);
3293
3294 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
3295 ioc->name));
3296 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3297 &ioc->chip->HostDiagnostic);
3298
3299 /* don't access any registers for 50 milliseconds */
3300 msleep(50);
3301
3302 /* 300 second max wait */
3303 for (count = 0; count < 3000000 ; count++) {
3304
3305 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3306
3307 if (host_diagnostic == 0xFFFFFFFF)
3308 goto out;
3309 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3310 break;
3311
3312 /* wait 100 msec */
3313 if (sleep_flag == CAN_SLEEP)
3314 msleep(1);
3315 else
3316 mdelay(1);
3317 }
3318
3319 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3320
3321 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
3322 "assuming the HCB Address points to good F/W\n",
3323 ioc->name));
3324 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3325 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3326 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3327
3328 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
3329 "re-enable the HCDW\n", ioc->name));
3330 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3331 &ioc->chip->HCBSize);
3332 }
3333
3334 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
3335 ioc->name));
3336 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3337 &ioc->chip->HostDiagnostic);
3338
3339 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
3340 "diagnostic register\n", ioc->name));
3341 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3342
3343 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
3344 "READY state\n", ioc->name));
3345 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3346 sleep_flag);
3347 if (ioc_state) {
3348 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3349 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3350 goto out;
3351 }
3352
3353 _base_restore_msix_table(ioc);
3354 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3355 return 0;
3356
3357 out:
3358 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3359 return -EFAULT;
3360 }
3361
3362 /**
3363 * _base_make_ioc_ready - put controller in READY state
3364 * @ioc: per adapter object
3365 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3366 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3367 *
3368 * Returns 0 for success, non-zero for failure.
3369 */
3370 static int
3371 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3372 enum reset_type type)
3373 {
3374 u32 ioc_state;
3375
3376 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3377 __func__));
3378
3379 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3380 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
3381 ioc->name, __func__, ioc_state));
3382
3383 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3384 return 0;
3385
3386 if (ioc_state & MPI2_DOORBELL_USED) {
3387 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
3388 "active!\n", ioc->name));
3389 goto issue_diag_reset;
3390 }
3391
3392 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3393 mpt2sas_base_fault_info(ioc, ioc_state &
3394 MPI2_DOORBELL_DATA_MASK);
3395 goto issue_diag_reset;
3396 }
3397
3398 if (type == FORCE_BIG_HAMMER)
3399 goto issue_diag_reset;
3400
3401 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3402 if (!(_base_send_ioc_reset(ioc,
3403 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
3404 return 0;
3405
3406 issue_diag_reset:
3407 return _base_diag_reset(ioc, CAN_SLEEP);
3408 }
3409
3410 /**
3411 * _base_make_ioc_operational - put controller in OPERATIONAL state
3412 * @ioc: per adapter object
3413 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3414 *
3415 * Returns 0 for success, non-zero for failure.
3416 */
3417 static int
3418 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3419 {
3420 int r, i;
3421 unsigned long flags;
3422 u32 reply_address;
3423 u16 smid;
3424 struct _tr_list *delayed_tr, *delayed_tr_next;
3425
3426 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3427 __func__));
3428
3429 /* clean the delayed target reset list */
3430 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3431 &ioc->delayed_tr_list, list) {
3432 list_del(&delayed_tr->list);
3433 kfree(delayed_tr);
3434 }
3435
3436 /* initialize the scsi lookup free list */
3437 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3438 INIT_LIST_HEAD(&ioc->free_list);
3439 smid = 1;
3440 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3441 ioc->scsi_lookup[i].cb_idx = 0xFF;
3442 ioc->scsi_lookup[i].smid = smid;
3443 ioc->scsi_lookup[i].scmd = NULL;
3444 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3445 &ioc->free_list);
3446 }
3447
3448 /* hi-priority queue */
3449 INIT_LIST_HEAD(&ioc->hpr_free_list);
3450 smid = ioc->hi_priority_smid;
3451 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3452 ioc->hpr_lookup[i].cb_idx = 0xFF;
3453 ioc->hpr_lookup[i].smid = smid;
3454 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3455 &ioc->hpr_free_list);
3456 }
3457
3458 /* internal queue */
3459 INIT_LIST_HEAD(&ioc->internal_free_list);
3460 smid = ioc->internal_smid;
3461 for (i = 0; i < ioc->internal_depth; i++, smid++) {
3462 ioc->internal_lookup[i].cb_idx = 0xFF;
3463 ioc->internal_lookup[i].smid = smid;
3464 list_add_tail(&ioc->internal_lookup[i].tracker_list,
3465 &ioc->internal_free_list);
3466 }
3467 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3468
3469 /* initialize Reply Free Queue */
3470 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3471 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3472 ioc->reply_sz)
3473 ioc->reply_free[i] = cpu_to_le32(reply_address);
3474
3475 /* initialize Reply Post Free Queue */
3476 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3477 ioc->reply_post_free[i].Words = ULLONG_MAX;
3478
3479 r = _base_send_ioc_init(ioc, sleep_flag);
3480 if (r)
3481 return r;
3482
3483 /* initialize the index's */
3484 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3485 ioc->reply_post_host_index = 0;
3486 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3487 writel(0, &ioc->chip->ReplyPostHostIndex);
3488
3489 _base_unmask_interrupts(ioc);
3490 r = _base_event_notification(ioc, sleep_flag);
3491 if (r)
3492 return r;
3493
3494 if (sleep_flag == CAN_SLEEP)
3495 _base_static_config_pages(ioc);
3496
3497 r = _base_send_port_enable(ioc, sleep_flag);
3498 if (r)
3499 return r;
3500
3501 return r;
3502 }
3503
3504 /**
3505 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3506 * @ioc: per adapter object
3507 *
3508 * Return nothing.
3509 */
3510 void
3511 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3512 {
3513 struct pci_dev *pdev = ioc->pdev;
3514
3515 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3516 __func__));
3517
3518 _base_mask_interrupts(ioc);
3519 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3520 if (ioc->pci_irq) {
3521 synchronize_irq(pdev->irq);
3522 free_irq(ioc->pci_irq, ioc);
3523 }
3524 _base_disable_msix(ioc);
3525 if (ioc->chip_phys)
3526 iounmap(ioc->chip);
3527 ioc->pci_irq = -1;
3528 ioc->chip_phys = 0;
3529 pci_release_selected_regions(ioc->pdev, ioc->bars);
3530 pci_disable_device(pdev);
3531 return;
3532 }
3533
3534 /**
3535 * mpt2sas_base_attach - attach controller instance
3536 * @ioc: per adapter object
3537 *
3538 * Returns 0 for success, non-zero for failure.
3539 */
3540 int
3541 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3542 {
3543 int r, i;
3544
3545 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3546 __func__));
3547
3548 r = mpt2sas_base_map_resources(ioc);
3549 if (r)
3550 return r;
3551
3552 pci_set_drvdata(ioc->pdev, ioc->shost);
3553 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3554 if (r)
3555 goto out_free_resources;
3556
3557 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3558 if (r)
3559 goto out_free_resources;
3560
3561 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3562 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3563 if (!ioc->pfacts)
3564 goto out_free_resources;
3565
3566 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3567 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3568 if (r)
3569 goto out_free_resources;
3570 }
3571
3572 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3573 if (r)
3574 goto out_free_resources;
3575
3576 init_waitqueue_head(&ioc->reset_wq);
3577
3578 ioc->fwfault_debug = mpt2sas_fwfault_debug;
3579
3580 /* base internal command bits */
3581 mutex_init(&ioc->base_cmds.mutex);
3582 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3583 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3584
3585 /* transport internal command bits */
3586 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3587 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3588 mutex_init(&ioc->transport_cmds.mutex);
3589
3590 /* scsih internal command bits */
3591 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3592 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3593 mutex_init(&ioc->scsih_cmds.mutex);
3594
3595 /* task management internal command bits */
3596 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3597 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3598 mutex_init(&ioc->tm_cmds.mutex);
3599
3600 /* config page internal command bits */
3601 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3602 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3603 mutex_init(&ioc->config_cmds.mutex);
3604
3605 /* ctl module internal command bits */
3606 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3607 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3608 mutex_init(&ioc->ctl_cmds.mutex);
3609
3610 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3611 ioc->event_masks[i] = -1;
3612
3613 /* here we enable the events we care about */
3614 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3615 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3616 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3617 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3618 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3619 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3620 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3621 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3622 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3623 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
3624 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3625 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3626 if (r)
3627 goto out_free_resources;
3628
3629 mpt2sas_base_start_watchdog(ioc);
3630 if (diag_buffer_enable != 0)
3631 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3632 return 0;
3633
3634 out_free_resources:
3635
3636 ioc->remove_host = 1;
3637 mpt2sas_base_free_resources(ioc);
3638 _base_release_memory_pools(ioc);
3639 pci_set_drvdata(ioc->pdev, NULL);
3640 kfree(ioc->tm_cmds.reply);
3641 kfree(ioc->transport_cmds.reply);
3642 kfree(ioc->config_cmds.reply);
3643 kfree(ioc->base_cmds.reply);
3644 kfree(ioc->ctl_cmds.reply);
3645 kfree(ioc->pfacts);
3646 ioc->ctl_cmds.reply = NULL;
3647 ioc->base_cmds.reply = NULL;
3648 ioc->tm_cmds.reply = NULL;
3649 ioc->transport_cmds.reply = NULL;
3650 ioc->config_cmds.reply = NULL;
3651 ioc->pfacts = NULL;
3652 return r;
3653 }
3654
3655
3656 /**
3657 * mpt2sas_base_detach - remove controller instance
3658 * @ioc: per adapter object
3659 *
3660 * Return nothing.
3661 */
3662 void
3663 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
3664 {
3665
3666 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
3667 __func__));
3668
3669 mpt2sas_base_stop_watchdog(ioc);
3670 mpt2sas_base_free_resources(ioc);
3671 _base_release_memory_pools(ioc);
3672 pci_set_drvdata(ioc->pdev, NULL);
3673 kfree(ioc->pfacts);
3674 kfree(ioc->ctl_cmds.reply);
3675 kfree(ioc->base_cmds.reply);
3676 kfree(ioc->tm_cmds.reply);
3677 kfree(ioc->transport_cmds.reply);
3678 kfree(ioc->config_cmds.reply);
3679 }
3680
3681 /**
3682 * _base_reset_handler - reset callback handler (for base)
3683 * @ioc: per adapter object
3684 * @reset_phase: phase
3685 *
3686 * The handler for doing any required cleanup or initialization.
3687 *
3688 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
3689 * MPT2_IOC_DONE_RESET
3690 *
3691 * Return nothing.
3692 */
3693 static void
3694 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
3695 {
3696 switch (reset_phase) {
3697 case MPT2_IOC_PRE_RESET:
3698 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3699 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
3700 break;
3701 case MPT2_IOC_AFTER_RESET:
3702 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3703 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
3704 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
3705 ioc->transport_cmds.status |= MPT2_CMD_RESET;
3706 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
3707 complete(&ioc->transport_cmds.done);
3708 }
3709 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3710 ioc->base_cmds.status |= MPT2_CMD_RESET;
3711 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
3712 complete(&ioc->base_cmds.done);
3713 }
3714 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
3715 ioc->config_cmds.status |= MPT2_CMD_RESET;
3716 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
3717 ioc->config_cmds.smid = USHORT_MAX;
3718 complete(&ioc->config_cmds.done);
3719 }
3720 break;
3721 case MPT2_IOC_DONE_RESET:
3722 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
3723 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
3724 break;
3725 }
3726 mpt2sas_scsih_reset_handler(ioc, reset_phase);
3727 mpt2sas_ctl_reset_handler(ioc, reset_phase);
3728 }
3729
3730 /**
3731 * _wait_for_commands_to_complete - reset controller
3732 * @ioc: Pointer to MPT_ADAPTER structure
3733 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3734 *
3735 * This function waiting(3s) for all pending commands to complete
3736 * prior to putting controller in reset.
3737 */
3738 static void
3739 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3740 {
3741 u32 ioc_state;
3742 unsigned long flags;
3743 u16 i;
3744
3745 ioc->pending_io_count = 0;
3746 if (sleep_flag != CAN_SLEEP)
3747 return;
3748
3749 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3750 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
3751 return;
3752
3753 /* pending command count */
3754 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3755 for (i = 0; i < ioc->scsiio_depth; i++)
3756 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
3757 ioc->pending_io_count++;
3758 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3759
3760 if (!ioc->pending_io_count)
3761 return;
3762
3763 /* wait for pending commands to complete */
3764 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
3765 }
3766
3767 /**
3768 * mpt2sas_base_hard_reset_handler - reset controller
3769 * @ioc: Pointer to MPT_ADAPTER structure
3770 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3771 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3772 *
3773 * Returns 0 for success, non-zero for failure.
3774 */
3775 int
3776 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3777 enum reset_type type)
3778 {
3779 int r;
3780 unsigned long flags;
3781
3782 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
3783 __func__));
3784
3785 if (mpt2sas_fwfault_debug)
3786 mpt2sas_halt_firmware(ioc);
3787
3788 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3789 if (ioc->shost_recovery) {
3790 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3791 printk(MPT2SAS_ERR_FMT "%s: busy\n",
3792 ioc->name, __func__);
3793 return -EBUSY;
3794 }
3795 ioc->shost_recovery = 1;
3796 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3797
3798 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
3799 _wait_for_commands_to_complete(ioc, sleep_flag);
3800 _base_mask_interrupts(ioc);
3801 r = _base_make_ioc_ready(ioc, sleep_flag, type);
3802 if (r)
3803 goto out;
3804 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
3805 r = _base_make_ioc_operational(ioc, sleep_flag);
3806 if (!r)
3807 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
3808 out:
3809 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
3810 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
3811
3812 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
3813 ioc->shost_recovery = 0;
3814 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
3815
3816 if (!r)
3817 _base_reset_handler(ioc, MPT2_IOC_RUNNING);
3818 return r;
3819 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree