MIPS: Better than nothing implementation of PCI mmap to fix X.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / mips / include / asm / pci.h
blob053e4634acee61b78ca8e3d4cd2fded4c4e2aa06
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6 #ifndef _ASM_PCI_H
7 #define _ASM_PCI_H
9 #include <linux/mm.h>
11 #ifdef __KERNEL__
14 * This file essentially defines the interface between board
15 * specific PCI code and MIPS common PCI code. Should potentially put
16 * into include/asm/pci.h file.
19 #include <linux/ioport.h>
22 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
23 * multiple PCI channels may have multiple PCI host controllers or a
24 * single controller supporting multiple channels.
26 struct pci_controller {
27 struct pci_controller *next;
28 struct pci_bus *bus;
30 struct pci_ops *pci_ops;
31 struct resource *mem_resource;
32 unsigned long mem_offset;
33 struct resource *io_resource;
34 unsigned long io_offset;
35 unsigned long io_map_base;
37 unsigned int index;
38 /* For compatibility with current (as of July 2003) pciutils
39 and XFree86. Eventually will be removed. */
40 unsigned int need_domain_info;
42 int iommu;
44 /* Optional access methods for reading/writing the bus number
45 of the PCI controller */
46 int (*get_busno)(void);
47 void (*set_busno)(int busno);
51 * Used by boards to register their PCI busses before the actual scanning.
53 extern struct pci_controller * alloc_pci_controller(void);
54 extern void register_pci_controller(struct pci_controller *hose);
57 * board supplied pci irq fixup routine
59 extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
62 /* Can be used to override the logic in pci_scan_bus for skipping
63 already-configured bus numbers - to be used for buggy BIOSes
64 or architectures with incomplete PCI setup by the loader */
66 extern unsigned int pcibios_assign_all_busses(void);
68 #define pcibios_scan_all_fns(a, b) 0
70 extern unsigned long PCIBIOS_MIN_IO;
71 extern unsigned long PCIBIOS_MIN_MEM;
73 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
75 extern void pcibios_set_master(struct pci_dev *dev);
77 static inline void pcibios_penalize_isa_irq(int irq, int active)
79 /* We don't do dynamic PCI IRQ allocation */
82 #define HAVE_PCI_MMAP
84 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
85 enum pci_mmap_state mmap_state, int write_combine);
88 * Dynamic DMA mapping stuff.
89 * MIPS has everything mapped statically.
92 #include <linux/types.h>
93 #include <linux/slab.h>
94 #include <asm/scatterlist.h>
95 #include <linux/string.h>
96 #include <asm/io.h>
98 struct pci_dev;
101 * The PCI address space does equal the physical memory address space. The
102 * networking and block device layers use this boolean for bounce buffer
103 * decisions. This is set if any hose does not have an IOMMU.
105 extern unsigned int PCI_DMA_BUS_IS_PHYS;
107 #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
109 /* pci_unmap_{single,page} is not a nop, thus... */
110 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
111 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
112 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
113 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
114 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
115 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
117 #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
119 /* pci_unmap_{page,single} is a nop so... */
120 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
121 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
122 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
123 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
124 #define pci_unmap_len(PTR, LEN_NAME) (0)
125 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
127 #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
129 #ifdef CONFIG_PCI
130 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
131 enum pci_dma_burst_strategy *strat,
132 unsigned long *strategy_parameter)
134 *strat = PCI_DMA_BURST_INFINITY;
135 *strategy_parameter = ~0UL;
137 #endif
139 extern void pcibios_resource_to_bus(struct pci_dev *dev,
140 struct pci_bus_region *region, struct resource *res);
142 extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
143 struct pci_bus_region *region);
145 static inline struct resource *
146 pcibios_select_root(struct pci_dev *pdev, struct resource *res)
148 struct resource *root = NULL;
150 if (res->flags & IORESOURCE_IO)
151 root = &ioport_resource;
152 if (res->flags & IORESOURCE_MEM)
153 root = &iomem_resource;
155 return root;
158 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
160 static inline int pci_proc_domain(struct pci_bus *bus)
162 struct pci_controller *hose = bus->sysdata;
163 return hose->need_domain_info;
166 #endif /* __KERNEL__ */
168 /* implement the pci_ DMA API in terms of the generic device dma_ one */
169 #include <asm-generic/pci-dma-compat.h>
171 /* Do platform specific device initialization at pci_enable_device() time */
172 extern int pcibios_plat_dev_init(struct pci_dev *dev);
174 /* Chances are this interrupt is wired PC-style ... */
175 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
177 return channel ? 15 : 14;
180 extern int pci_probe_only;
182 extern char * (*pcibios_plat_setup)(char *str);
184 #endif /* _ASM_PCI_H */