arch/arm/mach-exynos4/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/smsc911x.h>
  16 #include <linux/io.h>
  17 #include <linux/i2c.h>
  18 #include <linux/input.h>
  19 #include <linux/pwm_backlight.h>
  20
  21 #include <asm/mach/arch.h>
  22 #include <asm/mach-types.h>
  23
  24 #include <plat/regs-serial.h>
  25 #include <plat/regs-srom.h>
  26 #include <plat/exynos4.h>
  27 #include <plat/cpu.h>
  28 #include <plat/devs.h>
  29 #include <plat/keypad.h>
  30 #include <plat/sdhci.h>
  31 #include <plat/iic.h>
  32 #include <plat/pd.h>
  33 #include <plat/gpio-cfg.h>
  34 #include <plat/backlight.h>
  35 #include <plat/mfc.h>
  36 #include <plat/ehci.h>
  37 #include <plat/clock.h>
  38
  39 #include <mach/map.h>
  40
  41 /* Following are default values for UCON, ULCON and UFCON UART registers */
  42 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  43                                  S3C2410_UCON_RXILEVEL |        \
  44                                  S3C2410_UCON_TXIRQMODE |       \
  45                                  S3C2410_UCON_RXIRQMODE |       \
  46                                  S3C2410_UCON_RXFIFO_TOI |      \
  47                                  S3C2443_UCON_RXERR_IRQEN)
  48
  49 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  50
  51 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  52                                  S5PV210_UFCON_TXTRIG4 |        \
  53                                  S5PV210_UFCON_RXTRIG4)
  54
  55 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  56         [0] = {
  57                 .hwport         = 0,
  58                 .flags          = 0,
  59                 .ucon           = SMDKV310_UCON_DEFAULT,
  60                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  61                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  62         },
  63         [1] = {
  64                 .hwport         = 1,
  65                 .flags          = 0,
  66                 .ucon           = SMDKV310_UCON_DEFAULT,
  67                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  68                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  69         },
  70         [2] = {
  71                 .hwport         = 2,
  72                 .flags          = 0,
  73                 .ucon           = SMDKV310_UCON_DEFAULT,
  74                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  75                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  76         },
  77         [3] = {
  78                 .hwport         = 3,
  79                 .flags          = 0,
  80                 .ucon           = SMDKV310_UCON_DEFAULT,
  81                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  82                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  83         },
  84 };
  85
  86 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  87         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  88         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  89 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  90         .max_width              = 8,
  91         .host_caps              = MMC_CAP_8_BIT_DATA,
  92 #endif
  93 };
  94
  95 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  96         .cd_type                = S3C_SDHCI_CD_GPIO,
  97         .ext_cd_gpio            = EXYNOS4_GPK0(2),
  98         .ext_cd_gpio_invert     = 1,
  99         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 100 };
 101
 102 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 103         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 104         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 105 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 106         .max_width              = 8,
 107         .host_caps              = MMC_CAP_8_BIT_DATA,
 108 #endif
 109 };
 110
 111 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 112         .cd_type                = S3C_SDHCI_CD_GPIO,
 113         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 114         .ext_cd_gpio_invert     = 1,
 115         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 116 };
 117
 118 static struct resource smdkv310_smsc911x_resources[] = {
 119         [0] = {
 120                 .start  = EXYNOS4_PA_SROM_BANK(1),
 121                 .end    = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
 122                 .flags  = IORESOURCE_MEM,
 123         },
 124         [1] = {
 125                 .start  = IRQ_EINT(5),
 126                 .end    = IRQ_EINT(5),
 127                 .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
 128         },
 129 };
 130
 131 static struct smsc911x_platform_config smsc9215_config = {
 132         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 133         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 134         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 135         .phy_interface  = PHY_INTERFACE_MODE_MII,
 136         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 137 };
 138
 139 static struct platform_device smdkv310_smsc911x = {
 140         .name           = "smsc911x",
 141         .id             = -1,
 142         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 143         .resource       = smdkv310_smsc911x_resources,
 144         .dev            = {
 145                 .platform_data  = &smsc9215_config,
 146         },
 147 };
 148
 149 static uint32_t smdkv310_keymap[] __initdata = {
 150         /* KEY(row, col, keycode) */
 151         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 152         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 153         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 154         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 155 };
 156
 157 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 158         .keymap         = smdkv310_keymap,
 159         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 160 };
 161
 162 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 163         .keymap_data    = &smdkv310_keymap_data,
 164         .rows           = 2,
 165         .cols           = 8,
 166 };
 167
 168 static struct i2c_board_info i2c_devs1[] __initdata = {
 169         {I2C_BOARD_INFO("wm8994", 0x1a),},
 170 };
 171
 172 /* USB EHCI */
 173 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
 174
 175 static void __init smdkv310_ehci_init(void)
 176 {
 177         struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
 178
 179         s5p_ehci_set_platdata(pdata);
 180 }
 181
 182 static struct platform_device *smdkv310_devices[] __initdata = {
 183         &s3c_device_hsmmc0,
 184         &s3c_device_hsmmc1,
 185         &s3c_device_hsmmc2,
 186         &s3c_device_hsmmc3,
 187         &s3c_device_i2c1,
 188         &s5p_device_i2c_hdmiphy,
 189         &s3c_device_rtc,
 190         &s3c_device_wdt,
 191         &s5p_device_ehci,
 192         &exynos4_device_ac97,
 193         &exynos4_device_i2s0,
 194         &samsung_device_keypad,
 195         &s5p_device_mfc,
 196         &s5p_device_mfc_l,
 197         &s5p_device_mfc_r,
 198         &exynos4_device_pd[PD_MFC],
 199         &exynos4_device_pd[PD_G3D],
 200         &exynos4_device_pd[PD_LCD0],
 201         &exynos4_device_pd[PD_LCD1],
 202         &exynos4_device_pd[PD_CAM],
 203         &exynos4_device_pd[PD_TV],
 204         &exynos4_device_pd[PD_GPS],
 205         &exynos4_device_spdif,
 206         &exynos4_device_sysmmu,
 207         &samsung_asoc_dma,
 208         &samsung_asoc_idma,
 209         &smdkv310_smsc911x,
 210         &exynos4_device_ahci,
 211         &s5p_device_hdmi,
 212         &s5p_device_mixer,
 213 };
 214
 215 static void __init smdkv310_smsc911x_init(void)
 216 {
 217         u32 cs1;
 218
 219         /* configure nCS1 width to 16 bits */
 220         cs1 = __raw_readl(S5P_SROM_BW) &
 221                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 222         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 223                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 224                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 225                 S5P_SROM_BW__NCS1__SHIFT;
 226         __raw_writel(cs1, S5P_SROM_BW);
 227
 228         /* set timing for nCS1 suitable for ethernet chip */
 229         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 230                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 231                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 232                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 233                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 234                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 235                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 236 }
 237
 238 /* LCD Backlight data */
 239 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 240         .no = EXYNOS4_GPD0(1),
 241         .func = S3C_GPIO_SFN(2),
 242 };
 243
 244 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 245         .pwm_id = 1,
 246         .pwm_period_ns  = 1000,
 247 };
 248
 249 static void s5p_tv_setup(void)
 250 {
 251         /* direct HPD to HDMI chip */
 252         WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
 253         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
 254         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 255
 256         /* setup dependencies between TV devices */
 257         s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
 258         s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
 259 }
 260
 261 static void __init smdkv310_map_io(void)
 262 {
 263         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 264         s3c24xx_init_clocks(24000000);
 265         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 266 }
 267
 268 static void __init smdkv310_reserve(void)
 269 {
 270         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
 271 }
 272
 273 static void __init smdkv310_machine_init(void)
 274 {
 275         s3c_i2c1_set_platdata(NULL);
 276         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 277
 278         smdkv310_smsc911x_init();
 279
 280         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 281         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 282         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 283         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 284
 285         s5p_tv_setup();
 286         s5p_i2c_hdmiphy_set_platdata(NULL);
 287
 288         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 289
 290         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 291
 292         smdkv310_ehci_init();
 293         clk_xusbxti.rate = 24000000;
 294
 295         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 296         s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
 297 }
 298
 299 MACHINE_START(SMDKV310, "SMDKV310")
 300         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 301         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 302         .boot_params    = S5P_PA_SDRAM + 0x100,
 303         .init_irq       = exynos4_init_irq,
 304         .map_io         = smdkv310_map_io,
 305         .init_machine   = smdkv310_machine_init,
 306         .timer          = &exynos4_timer,
 307         .reserve        = &smdkv310_reserve,
 308 MACHINE_END