USB: xHCI: bus power management implementation
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / xhci.c
blob3d2af688157a7867f3c48a2b72672db39bbd14ab
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
30 #include "xhci.h"
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
57 u32 result;
59 do {
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
62 return -ENODEV;
63 result &= mask;
64 if (result == done)
65 return 0;
66 udelay(1);
67 usec--;
68 } while (usec > 0);
69 return -ETIMEDOUT;
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
77 u32 halted;
78 u32 cmd;
79 u32 mask;
81 mask = ~(XHCI_IRQS);
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83 if (!halted)
84 mask &= ~CMD_RUN;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
87 cmd &= mask;
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 microframes of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
98 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
100 int xhci_halt(struct xhci_hcd *xhci)
102 xhci_dbg(xhci, "// Halt the HC\n");
103 xhci_quiesce(xhci);
105 return handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
110 * Set the run bit and wait for the host to be running.
112 int xhci_start(struct xhci_hcd *xhci)
114 u32 temp;
115 int ret;
117 temp = xhci_readl(xhci, &xhci->op_regs->command);
118 temp |= (CMD_RUN);
119 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
120 temp);
121 xhci_writel(xhci, temp, &xhci->op_regs->command);
124 * Wait for the HCHalted Status bit to be 0 to indicate the host is
125 * running.
127 ret = handshake(xhci, &xhci->op_regs->status,
128 STS_HALT, 0, XHCI_MAX_HALT_USEC);
129 if (ret == -ETIMEDOUT)
130 xhci_err(xhci, "Host took too long to start, "
131 "waited %u microseconds.\n",
132 XHCI_MAX_HALT_USEC);
133 return ret;
137 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
139 * This resets pipelines, timers, counters, state machines, etc.
140 * Transactions will be terminated immediately, and operational registers
141 * will be set to their defaults.
143 int xhci_reset(struct xhci_hcd *xhci)
145 u32 command;
146 u32 state;
147 int ret;
149 state = xhci_readl(xhci, &xhci->op_regs->status);
150 if ((state & STS_HALT) == 0) {
151 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
152 return 0;
155 xhci_dbg(xhci, "// Reset the HC\n");
156 command = xhci_readl(xhci, &xhci->op_regs->command);
157 command |= CMD_RESET;
158 xhci_writel(xhci, command, &xhci->op_regs->command);
159 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
160 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
162 ret = handshake(xhci, &xhci->op_regs->command,
163 CMD_RESET, 0, 250 * 1000);
164 if (ret)
165 return ret;
167 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
169 * xHCI cannot write to any doorbells or operational registers other
170 * than status until the "Controller Not Ready" flag is cleared.
172 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 * Free IRQs
177 * free all IRQs request
179 static void xhci_free_irq(struct xhci_hcd *xhci)
181 int i;
182 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
184 /* return if using legacy interrupt */
185 if (xhci_to_hcd(xhci)->irq >= 0)
186 return;
188 if (xhci->msix_entries) {
189 for (i = 0; i < xhci->msix_count; i++)
190 if (xhci->msix_entries[i].vector)
191 free_irq(xhci->msix_entries[i].vector,
192 xhci_to_hcd(xhci));
193 } else if (pdev->irq >= 0)
194 free_irq(pdev->irq, xhci_to_hcd(xhci));
196 return;
200 * Set up MSI
202 static int xhci_setup_msi(struct xhci_hcd *xhci)
204 int ret;
205 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
207 ret = pci_enable_msi(pdev);
208 if (ret) {
209 xhci_err(xhci, "failed to allocate MSI entry\n");
210 return ret;
213 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
214 0, "xhci_hcd", xhci_to_hcd(xhci));
215 if (ret) {
216 xhci_err(xhci, "disable MSI interrupt\n");
217 pci_disable_msi(pdev);
220 return ret;
224 * Set up MSI-X
226 static int xhci_setup_msix(struct xhci_hcd *xhci)
228 int i, ret = 0;
229 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
232 * calculate number of msi-x vectors supported.
233 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
234 * with max number of interrupters based on the xhci HCSPARAMS1.
235 * - num_online_cpus: maximum msi-x vectors per CPUs core.
236 * Add additional 1 vector to ensure always available interrupt.
238 xhci->msix_count = min(num_online_cpus() + 1,
239 HCS_MAX_INTRS(xhci->hcs_params1));
241 xhci->msix_entries =
242 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
243 GFP_KERNEL);
244 if (!xhci->msix_entries) {
245 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
246 return -ENOMEM;
249 for (i = 0; i < xhci->msix_count; i++) {
250 xhci->msix_entries[i].entry = i;
251 xhci->msix_entries[i].vector = 0;
254 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
255 if (ret) {
256 xhci_err(xhci, "Failed to enable MSI-X\n");
257 goto free_entries;
260 for (i = 0; i < xhci->msix_count; i++) {
261 ret = request_irq(xhci->msix_entries[i].vector,
262 (irq_handler_t)xhci_msi_irq,
263 0, "xhci_hcd", xhci_to_hcd(xhci));
264 if (ret)
265 goto disable_msix;
268 return ret;
270 disable_msix:
271 xhci_err(xhci, "disable MSI-X interrupt\n");
272 xhci_free_irq(xhci);
273 pci_disable_msix(pdev);
274 free_entries:
275 kfree(xhci->msix_entries);
276 xhci->msix_entries = NULL;
277 return ret;
280 /* Free any IRQs and disable MSI-X */
281 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
283 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
285 xhci_free_irq(xhci);
287 if (xhci->msix_entries) {
288 pci_disable_msix(pdev);
289 kfree(xhci->msix_entries);
290 xhci->msix_entries = NULL;
291 } else {
292 pci_disable_msi(pdev);
295 return;
299 * Initialize memory for HCD and xHC (one-time init).
301 * Program the PAGESIZE register, initialize the device context array, create
302 * device contexts (?), set up a command ring segment (or two?), create event
303 * ring (one for now).
305 int xhci_init(struct usb_hcd *hcd)
307 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
308 int retval = 0;
310 xhci_dbg(xhci, "xhci_init\n");
311 spin_lock_init(&xhci->lock);
312 if (link_quirk) {
313 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
314 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
315 } else {
316 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
318 retval = xhci_mem_init(xhci, GFP_KERNEL);
319 xhci_dbg(xhci, "Finished xhci_init\n");
321 return retval;
324 /*-------------------------------------------------------------------------*/
327 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
328 void xhci_event_ring_work(unsigned long arg)
330 unsigned long flags;
331 int temp;
332 u64 temp_64;
333 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
334 int i, j;
336 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
338 spin_lock_irqsave(&xhci->lock, flags);
339 temp = xhci_readl(xhci, &xhci->op_regs->status);
340 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
341 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
342 xhci_dbg(xhci, "HW died, polling stopped.\n");
343 spin_unlock_irqrestore(&xhci->lock, flags);
344 return;
347 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
348 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
349 xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
350 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
351 xhci->error_bitmask = 0;
352 xhci_dbg(xhci, "Event ring:\n");
353 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
354 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
355 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
356 temp_64 &= ~ERST_PTR_MASK;
357 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
358 xhci_dbg(xhci, "Command ring:\n");
359 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
360 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
361 xhci_dbg_cmd_ptrs(xhci);
362 for (i = 0; i < MAX_HC_SLOTS; ++i) {
363 if (!xhci->devs[i])
364 continue;
365 for (j = 0; j < 31; ++j) {
366 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
370 if (xhci->noops_submitted != NUM_TEST_NOOPS)
371 if (xhci_setup_one_noop(xhci))
372 xhci_ring_cmd_db(xhci);
373 spin_unlock_irqrestore(&xhci->lock, flags);
375 if (!xhci->zombie)
376 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
377 else
378 xhci_dbg(xhci, "Quit polling the event ring.\n");
380 #endif
383 * Start the HC after it was halted.
385 * This function is called by the USB core when the HC driver is added.
386 * Its opposite is xhci_stop().
388 * xhci_init() must be called once before this function can be called.
389 * Reset the HC, enable device slot contexts, program DCBAAP, and
390 * set command ring pointer and event ring pointer.
392 * Setup MSI-X vectors and enable interrupts.
394 int xhci_run(struct usb_hcd *hcd)
396 u32 temp;
397 u64 temp_64;
398 u32 ret;
399 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
400 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
401 void (*doorbell)(struct xhci_hcd *) = NULL;
403 hcd->uses_new_polling = 1;
405 xhci_dbg(xhci, "xhci_run\n");
406 /* unregister the legacy interrupt */
407 if (hcd->irq)
408 free_irq(hcd->irq, hcd);
409 hcd->irq = -1;
411 ret = xhci_setup_msix(xhci);
412 if (ret)
413 /* fall back to msi*/
414 ret = xhci_setup_msi(xhci);
416 if (ret) {
417 /* fall back to legacy interrupt*/
418 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
419 hcd->irq_descr, hcd);
420 if (ret) {
421 xhci_err(xhci, "request interrupt %d failed\n",
422 pdev->irq);
423 return ret;
425 hcd->irq = pdev->irq;
428 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
429 init_timer(&xhci->event_ring_timer);
430 xhci->event_ring_timer.data = (unsigned long) xhci;
431 xhci->event_ring_timer.function = xhci_event_ring_work;
432 /* Poll the event ring */
433 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
434 xhci->zombie = 0;
435 xhci_dbg(xhci, "Setting event ring polling timer\n");
436 add_timer(&xhci->event_ring_timer);
437 #endif
439 xhci_dbg(xhci, "Command ring memory map follows:\n");
440 xhci_debug_ring(xhci, xhci->cmd_ring);
441 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
442 xhci_dbg_cmd_ptrs(xhci);
444 xhci_dbg(xhci, "ERST memory map follows:\n");
445 xhci_dbg_erst(xhci, &xhci->erst);
446 xhci_dbg(xhci, "Event ring:\n");
447 xhci_debug_ring(xhci, xhci->event_ring);
448 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
449 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
450 temp_64 &= ~ERST_PTR_MASK;
451 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
453 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
454 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
455 temp &= ~ER_IRQ_INTERVAL_MASK;
456 temp |= (u32) 160;
457 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
459 /* Set the HCD state before we enable the irqs */
460 hcd->state = HC_STATE_RUNNING;
461 temp = xhci_readl(xhci, &xhci->op_regs->command);
462 temp |= (CMD_EIE);
463 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
464 temp);
465 xhci_writel(xhci, temp, &xhci->op_regs->command);
467 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
468 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
469 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
470 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
471 &xhci->ir_set->irq_pending);
472 xhci_print_ir_set(xhci, xhci->ir_set, 0);
474 if (NUM_TEST_NOOPS > 0)
475 doorbell = xhci_setup_one_noop(xhci);
476 if (xhci->quirks & XHCI_NEC_HOST)
477 xhci_queue_vendor_command(xhci, 0, 0, 0,
478 TRB_TYPE(TRB_NEC_GET_FW));
480 if (xhci_start(xhci)) {
481 xhci_halt(xhci);
482 return -ENODEV;
485 if (doorbell)
486 (*doorbell)(xhci);
487 if (xhci->quirks & XHCI_NEC_HOST)
488 xhci_ring_cmd_db(xhci);
490 xhci_dbg(xhci, "Finished xhci_run\n");
491 return 0;
495 * Stop xHCI driver.
497 * This function is called by the USB core when the HC driver is removed.
498 * Its opposite is xhci_run().
500 * Disable device contexts, disable IRQs, and quiesce the HC.
501 * Reset the HC, finish any completed transactions, and cleanup memory.
503 void xhci_stop(struct usb_hcd *hcd)
505 u32 temp;
506 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
508 spin_lock_irq(&xhci->lock);
509 xhci_halt(xhci);
510 xhci_reset(xhci);
511 xhci_cleanup_msix(xhci);
512 spin_unlock_irq(&xhci->lock);
514 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
515 /* Tell the event ring poll function not to reschedule */
516 xhci->zombie = 1;
517 del_timer_sync(&xhci->event_ring_timer);
518 #endif
520 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
521 temp = xhci_readl(xhci, &xhci->op_regs->status);
522 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
523 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
524 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
525 &xhci->ir_set->irq_pending);
526 xhci_print_ir_set(xhci, xhci->ir_set, 0);
528 xhci_dbg(xhci, "cleaning up memory\n");
529 xhci_mem_cleanup(xhci);
530 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
531 xhci_readl(xhci, &xhci->op_regs->status));
535 * Shutdown HC (not bus-specific)
537 * This is called when the machine is rebooting or halting. We assume that the
538 * machine will be powered off, and the HC's internal state will be reset.
539 * Don't bother to free memory.
541 void xhci_shutdown(struct usb_hcd *hcd)
543 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
545 spin_lock_irq(&xhci->lock);
546 xhci_halt(xhci);
547 xhci_cleanup_msix(xhci);
548 spin_unlock_irq(&xhci->lock);
550 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
551 xhci_readl(xhci, &xhci->op_regs->status));
554 /*-------------------------------------------------------------------------*/
557 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
558 * HCDs. Find the index for an endpoint given its descriptor. Use the return
559 * value to right shift 1 for the bitmask.
561 * Index = (epnum * 2) + direction - 1,
562 * where direction = 0 for OUT, 1 for IN.
563 * For control endpoints, the IN index is used (OUT index is unused), so
564 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
566 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
568 unsigned int index;
569 if (usb_endpoint_xfer_control(desc))
570 index = (unsigned int) (usb_endpoint_num(desc)*2);
571 else
572 index = (unsigned int) (usb_endpoint_num(desc)*2) +
573 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
574 return index;
577 /* Find the flag for this endpoint (for use in the control context). Use the
578 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
579 * bit 1, etc.
581 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
583 return 1 << (xhci_get_endpoint_index(desc) + 1);
586 /* Find the flag for this endpoint (for use in the control context). Use the
587 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
588 * bit 1, etc.
590 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
592 return 1 << (ep_index + 1);
595 /* Compute the last valid endpoint context index. Basically, this is the
596 * endpoint index plus one. For slot contexts with more than valid endpoint,
597 * we find the most significant bit set in the added contexts flags.
598 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
599 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
601 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
603 return fls(added_ctxs) - 1;
606 /* Returns 1 if the arguments are OK;
607 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
609 int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
610 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
611 const char *func) {
612 struct xhci_hcd *xhci;
613 struct xhci_virt_device *virt_dev;
615 if (!hcd || (check_ep && !ep) || !udev) {
616 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
617 func);
618 return -EINVAL;
620 if (!udev->parent) {
621 printk(KERN_DEBUG "xHCI %s called for root hub\n",
622 func);
623 return 0;
626 if (check_virt_dev) {
627 xhci = hcd_to_xhci(hcd);
628 if (!udev->slot_id || !xhci->devs
629 || !xhci->devs[udev->slot_id]) {
630 printk(KERN_DEBUG "xHCI %s called with unaddressed "
631 "device\n", func);
632 return -EINVAL;
635 virt_dev = xhci->devs[udev->slot_id];
636 if (virt_dev->udev != udev) {
637 printk(KERN_DEBUG "xHCI %s called with udev and "
638 "virt_dev does not match\n", func);
639 return -EINVAL;
643 return 1;
646 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
647 struct usb_device *udev, struct xhci_command *command,
648 bool ctx_change, bool must_succeed);
651 * Full speed devices may have a max packet size greater than 8 bytes, but the
652 * USB core doesn't know that until it reads the first 8 bytes of the
653 * descriptor. If the usb_device's max packet size changes after that point,
654 * we need to issue an evaluate context command and wait on it.
656 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
657 unsigned int ep_index, struct urb *urb)
659 struct xhci_container_ctx *in_ctx;
660 struct xhci_container_ctx *out_ctx;
661 struct xhci_input_control_ctx *ctrl_ctx;
662 struct xhci_ep_ctx *ep_ctx;
663 int max_packet_size;
664 int hw_max_packet_size;
665 int ret = 0;
667 out_ctx = xhci->devs[slot_id]->out_ctx;
668 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
669 hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
670 max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
671 if (hw_max_packet_size != max_packet_size) {
672 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
673 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
674 max_packet_size);
675 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
676 hw_max_packet_size);
677 xhci_dbg(xhci, "Issuing evaluate context command.\n");
679 /* Set up the modified control endpoint 0 */
680 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
681 xhci->devs[slot_id]->out_ctx, ep_index);
682 in_ctx = xhci->devs[slot_id]->in_ctx;
683 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
684 ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
685 ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
687 /* Set up the input context flags for the command */
688 /* FIXME: This won't work if a non-default control endpoint
689 * changes max packet sizes.
691 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
692 ctrl_ctx->add_flags = EP0_FLAG;
693 ctrl_ctx->drop_flags = 0;
695 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
696 xhci_dbg_ctx(xhci, in_ctx, ep_index);
697 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
698 xhci_dbg_ctx(xhci, out_ctx, ep_index);
700 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
701 true, false);
703 /* Clean up the input context for later use by bandwidth
704 * functions.
706 ctrl_ctx->add_flags = SLOT_FLAG;
708 return ret;
712 * non-error returns are a promise to giveback() the urb later
713 * we drop ownership so next owner (or urb unlink) can get it
715 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
717 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
718 unsigned long flags;
719 int ret = 0;
720 unsigned int slot_id, ep_index;
721 struct urb_priv *urb_priv;
722 int size, i;
724 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
725 true, true, __func__) <= 0)
726 return -EINVAL;
728 slot_id = urb->dev->slot_id;
729 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
731 if (!HCD_HW_ACCESSIBLE(hcd)) {
732 if (!in_interrupt())
733 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
734 ret = -ESHUTDOWN;
735 goto exit;
738 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
739 size = urb->number_of_packets;
740 else
741 size = 1;
743 urb_priv = kzalloc(sizeof(struct urb_priv) +
744 size * sizeof(struct xhci_td *), mem_flags);
745 if (!urb_priv)
746 return -ENOMEM;
748 for (i = 0; i < size; i++) {
749 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
750 if (!urb_priv->td[i]) {
751 urb_priv->length = i;
752 xhci_urb_free_priv(xhci, urb_priv);
753 return -ENOMEM;
757 urb_priv->length = size;
758 urb_priv->td_cnt = 0;
759 urb->hcpriv = urb_priv;
761 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
762 /* Check to see if the max packet size for the default control
763 * endpoint changed during FS device enumeration
765 if (urb->dev->speed == USB_SPEED_FULL) {
766 ret = xhci_check_maxpacket(xhci, slot_id,
767 ep_index, urb);
768 if (ret < 0)
769 return ret;
772 /* We have a spinlock and interrupts disabled, so we must pass
773 * atomic context to this function, which may allocate memory.
775 spin_lock_irqsave(&xhci->lock, flags);
776 if (xhci->xhc_state & XHCI_STATE_DYING)
777 goto dying;
778 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
779 slot_id, ep_index);
780 spin_unlock_irqrestore(&xhci->lock, flags);
781 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
782 spin_lock_irqsave(&xhci->lock, flags);
783 if (xhci->xhc_state & XHCI_STATE_DYING)
784 goto dying;
785 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
786 EP_GETTING_STREAMS) {
787 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
788 "is transitioning to using streams.\n");
789 ret = -EINVAL;
790 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
791 EP_GETTING_NO_STREAMS) {
792 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
793 "is transitioning to "
794 "not having streams.\n");
795 ret = -EINVAL;
796 } else {
797 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
798 slot_id, ep_index);
800 spin_unlock_irqrestore(&xhci->lock, flags);
801 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
802 spin_lock_irqsave(&xhci->lock, flags);
803 if (xhci->xhc_state & XHCI_STATE_DYING)
804 goto dying;
805 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
806 slot_id, ep_index);
807 spin_unlock_irqrestore(&xhci->lock, flags);
808 } else {
809 spin_lock_irqsave(&xhci->lock, flags);
810 if (xhci->xhc_state & XHCI_STATE_DYING)
811 goto dying;
812 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
813 slot_id, ep_index);
814 spin_unlock_irqrestore(&xhci->lock, flags);
816 exit:
817 return ret;
818 dying:
819 xhci_urb_free_priv(xhci, urb_priv);
820 urb->hcpriv = NULL;
821 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
822 "non-responsive xHCI host.\n",
823 urb->ep->desc.bEndpointAddress, urb);
824 spin_unlock_irqrestore(&xhci->lock, flags);
825 return -ESHUTDOWN;
828 /* Get the right ring for the given URB.
829 * If the endpoint supports streams, boundary check the URB's stream ID.
830 * If the endpoint doesn't support streams, return the singular endpoint ring.
832 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
833 struct urb *urb)
835 unsigned int slot_id;
836 unsigned int ep_index;
837 unsigned int stream_id;
838 struct xhci_virt_ep *ep;
840 slot_id = urb->dev->slot_id;
841 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
842 stream_id = urb->stream_id;
843 ep = &xhci->devs[slot_id]->eps[ep_index];
844 /* Common case: no streams */
845 if (!(ep->ep_state & EP_HAS_STREAMS))
846 return ep->ring;
848 if (stream_id == 0) {
849 xhci_warn(xhci,
850 "WARN: Slot ID %u, ep index %u has streams, "
851 "but URB has no stream ID.\n",
852 slot_id, ep_index);
853 return NULL;
856 if (stream_id < ep->stream_info->num_streams)
857 return ep->stream_info->stream_rings[stream_id];
859 xhci_warn(xhci,
860 "WARN: Slot ID %u, ep index %u has "
861 "stream IDs 1 to %u allocated, "
862 "but stream ID %u is requested.\n",
863 slot_id, ep_index,
864 ep->stream_info->num_streams - 1,
865 stream_id);
866 return NULL;
870 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
871 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
872 * should pick up where it left off in the TD, unless a Set Transfer Ring
873 * Dequeue Pointer is issued.
875 * The TRBs that make up the buffers for the canceled URB will be "removed" from
876 * the ring. Since the ring is a contiguous structure, they can't be physically
877 * removed. Instead, there are two options:
879 * 1) If the HC is in the middle of processing the URB to be canceled, we
880 * simply move the ring's dequeue pointer past those TRBs using the Set
881 * Transfer Ring Dequeue Pointer command. This will be the common case,
882 * when drivers timeout on the last submitted URB and attempt to cancel.
884 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
885 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
886 * HC will need to invalidate the any TRBs it has cached after the stop
887 * endpoint command, as noted in the xHCI 0.95 errata.
889 * 3) The TD may have completed by the time the Stop Endpoint Command
890 * completes, so software needs to handle that case too.
892 * This function should protect against the TD enqueueing code ringing the
893 * doorbell while this code is waiting for a Stop Endpoint command to complete.
894 * It also needs to account for multiple cancellations on happening at the same
895 * time for the same endpoint.
897 * Note that this function can be called in any context, or so says
898 * usb_hcd_unlink_urb()
900 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
902 unsigned long flags;
903 int ret, i;
904 u32 temp;
905 struct xhci_hcd *xhci;
906 struct urb_priv *urb_priv;
907 struct xhci_td *td;
908 unsigned int ep_index;
909 struct xhci_ring *ep_ring;
910 struct xhci_virt_ep *ep;
912 xhci = hcd_to_xhci(hcd);
913 spin_lock_irqsave(&xhci->lock, flags);
914 /* Make sure the URB hasn't completed or been unlinked already */
915 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
916 if (ret || !urb->hcpriv)
917 goto done;
918 temp = xhci_readl(xhci, &xhci->op_regs->status);
919 if (temp == 0xffffffff) {
920 xhci_dbg(xhci, "HW died, freeing TD.\n");
921 urb_priv = urb->hcpriv;
923 usb_hcd_unlink_urb_from_ep(hcd, urb);
924 spin_unlock_irqrestore(&xhci->lock, flags);
925 usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, -ESHUTDOWN);
926 xhci_urb_free_priv(xhci, urb_priv);
927 return ret;
929 if (xhci->xhc_state & XHCI_STATE_DYING) {
930 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
931 "non-responsive xHCI host.\n",
932 urb->ep->desc.bEndpointAddress, urb);
933 /* Let the stop endpoint command watchdog timer (which set this
934 * state) finish cleaning up the endpoint TD lists. We must
935 * have caught it in the middle of dropping a lock and giving
936 * back an URB.
938 goto done;
941 xhci_dbg(xhci, "Cancel URB %p\n", urb);
942 xhci_dbg(xhci, "Event ring:\n");
943 xhci_debug_ring(xhci, xhci->event_ring);
944 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
945 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
946 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
947 if (!ep_ring) {
948 ret = -EINVAL;
949 goto done;
952 xhci_dbg(xhci, "Endpoint ring:\n");
953 xhci_debug_ring(xhci, ep_ring);
955 urb_priv = urb->hcpriv;
957 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
958 td = urb_priv->td[i];
959 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
962 /* Queue a stop endpoint command, but only if this is
963 * the first cancellation to be handled.
965 if (!(ep->ep_state & EP_HALT_PENDING)) {
966 ep->ep_state |= EP_HALT_PENDING;
967 ep->stop_cmds_pending++;
968 ep->stop_cmd_timer.expires = jiffies +
969 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
970 add_timer(&ep->stop_cmd_timer);
971 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
972 xhci_ring_cmd_db(xhci);
974 done:
975 spin_unlock_irqrestore(&xhci->lock, flags);
976 return ret;
979 /* Drop an endpoint from a new bandwidth configuration for this device.
980 * Only one call to this function is allowed per endpoint before
981 * check_bandwidth() or reset_bandwidth() must be called.
982 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
983 * add the endpoint to the schedule with possibly new parameters denoted by a
984 * different endpoint descriptor in usb_host_endpoint.
985 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
986 * not allowed.
988 * The USB core will not allow URBs to be queued to an endpoint that is being
989 * disabled, so there's no need for mutual exclusion to protect
990 * the xhci->devs[slot_id] structure.
992 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
993 struct usb_host_endpoint *ep)
995 struct xhci_hcd *xhci;
996 struct xhci_container_ctx *in_ctx, *out_ctx;
997 struct xhci_input_control_ctx *ctrl_ctx;
998 struct xhci_slot_ctx *slot_ctx;
999 unsigned int last_ctx;
1000 unsigned int ep_index;
1001 struct xhci_ep_ctx *ep_ctx;
1002 u32 drop_flag;
1003 u32 new_add_flags, new_drop_flags, new_slot_info;
1004 int ret;
1006 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1007 if (ret <= 0)
1008 return ret;
1009 xhci = hcd_to_xhci(hcd);
1010 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1012 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1013 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1014 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1015 __func__, drop_flag);
1016 return 0;
1019 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1020 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1021 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1022 ep_index = xhci_get_endpoint_index(&ep->desc);
1023 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1024 /* If the HC already knows the endpoint is disabled,
1025 * or the HCD has noted it is disabled, ignore this request
1027 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
1028 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
1029 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1030 __func__, ep);
1031 return 0;
1034 ctrl_ctx->drop_flags |= drop_flag;
1035 new_drop_flags = ctrl_ctx->drop_flags;
1037 ctrl_ctx->add_flags &= ~drop_flag;
1038 new_add_flags = ctrl_ctx->add_flags;
1040 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
1041 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1042 /* Update the last valid endpoint context, if we deleted the last one */
1043 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
1044 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1045 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1047 new_slot_info = slot_ctx->dev_info;
1049 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1051 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1052 (unsigned int) ep->desc.bEndpointAddress,
1053 udev->slot_id,
1054 (unsigned int) new_drop_flags,
1055 (unsigned int) new_add_flags,
1056 (unsigned int) new_slot_info);
1057 return 0;
1060 /* Add an endpoint to a new possible bandwidth configuration for this device.
1061 * Only one call to this function is allowed per endpoint before
1062 * check_bandwidth() or reset_bandwidth() must be called.
1063 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1064 * add the endpoint to the schedule with possibly new parameters denoted by a
1065 * different endpoint descriptor in usb_host_endpoint.
1066 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1067 * not allowed.
1069 * The USB core will not allow URBs to be queued to an endpoint until the
1070 * configuration or alt setting is installed in the device, so there's no need
1071 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1073 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1074 struct usb_host_endpoint *ep)
1076 struct xhci_hcd *xhci;
1077 struct xhci_container_ctx *in_ctx, *out_ctx;
1078 unsigned int ep_index;
1079 struct xhci_ep_ctx *ep_ctx;
1080 struct xhci_slot_ctx *slot_ctx;
1081 struct xhci_input_control_ctx *ctrl_ctx;
1082 u32 added_ctxs;
1083 unsigned int last_ctx;
1084 u32 new_add_flags, new_drop_flags, new_slot_info;
1085 int ret = 0;
1087 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1088 if (ret <= 0) {
1089 /* So we won't queue a reset ep command for a root hub */
1090 ep->hcpriv = NULL;
1091 return ret;
1093 xhci = hcd_to_xhci(hcd);
1095 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1096 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1097 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1098 /* FIXME when we have to issue an evaluate endpoint command to
1099 * deal with ep0 max packet size changing once we get the
1100 * descriptors
1102 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1103 __func__, added_ctxs);
1104 return 0;
1107 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1108 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1109 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1110 ep_index = xhci_get_endpoint_index(&ep->desc);
1111 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1112 /* If the HCD has already noted the endpoint is enabled,
1113 * ignore this request.
1115 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
1116 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1117 __func__, ep);
1118 return 0;
1122 * Configuration and alternate setting changes must be done in
1123 * process context, not interrupt context (or so documenation
1124 * for usb_set_interface() and usb_set_configuration() claim).
1126 if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
1127 udev, ep, GFP_NOIO) < 0) {
1128 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1129 __func__, ep->desc.bEndpointAddress);
1130 return -ENOMEM;
1133 ctrl_ctx->add_flags |= added_ctxs;
1134 new_add_flags = ctrl_ctx->add_flags;
1136 /* If xhci_endpoint_disable() was called for this endpoint, but the
1137 * xHC hasn't been notified yet through the check_bandwidth() call,
1138 * this re-adds a new state for the endpoint from the new endpoint
1139 * descriptors. We must drop and re-add this endpoint, so we leave the
1140 * drop flags alone.
1142 new_drop_flags = ctrl_ctx->drop_flags;
1144 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1145 /* Update the last valid endpoint context, if we just added one past */
1146 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
1147 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1148 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1150 new_slot_info = slot_ctx->dev_info;
1152 /* Store the usb_device pointer for later use */
1153 ep->hcpriv = udev;
1155 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1156 (unsigned int) ep->desc.bEndpointAddress,
1157 udev->slot_id,
1158 (unsigned int) new_drop_flags,
1159 (unsigned int) new_add_flags,
1160 (unsigned int) new_slot_info);
1161 return 0;
1164 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1166 struct xhci_input_control_ctx *ctrl_ctx;
1167 struct xhci_ep_ctx *ep_ctx;
1168 struct xhci_slot_ctx *slot_ctx;
1169 int i;
1171 /* When a device's add flag and drop flag are zero, any subsequent
1172 * configure endpoint command will leave that endpoint's state
1173 * untouched. Make sure we don't leave any old state in the input
1174 * endpoint contexts.
1176 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1177 ctrl_ctx->drop_flags = 0;
1178 ctrl_ctx->add_flags = 0;
1179 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1180 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1181 /* Endpoint 0 is always valid */
1182 slot_ctx->dev_info |= LAST_CTX(1);
1183 for (i = 1; i < 31; ++i) {
1184 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1185 ep_ctx->ep_info = 0;
1186 ep_ctx->ep_info2 = 0;
1187 ep_ctx->deq = 0;
1188 ep_ctx->tx_info = 0;
1192 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1193 struct usb_device *udev, int *cmd_status)
1195 int ret;
1197 switch (*cmd_status) {
1198 case COMP_ENOMEM:
1199 dev_warn(&udev->dev, "Not enough host controller resources "
1200 "for new device state.\n");
1201 ret = -ENOMEM;
1202 /* FIXME: can we allocate more resources for the HC? */
1203 break;
1204 case COMP_BW_ERR:
1205 dev_warn(&udev->dev, "Not enough bandwidth "
1206 "for new device state.\n");
1207 ret = -ENOSPC;
1208 /* FIXME: can we go back to the old state? */
1209 break;
1210 case COMP_TRB_ERR:
1211 /* the HCD set up something wrong */
1212 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1213 "add flag = 1, "
1214 "and endpoint is not disabled.\n");
1215 ret = -EINVAL;
1216 break;
1217 case COMP_SUCCESS:
1218 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1219 ret = 0;
1220 break;
1221 default:
1222 xhci_err(xhci, "ERROR: unexpected command completion "
1223 "code 0x%x.\n", *cmd_status);
1224 ret = -EINVAL;
1225 break;
1227 return ret;
1230 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1231 struct usb_device *udev, int *cmd_status)
1233 int ret;
1234 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1236 switch (*cmd_status) {
1237 case COMP_EINVAL:
1238 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1239 "context command.\n");
1240 ret = -EINVAL;
1241 break;
1242 case COMP_EBADSLT:
1243 dev_warn(&udev->dev, "WARN: slot not enabled for"
1244 "evaluate context command.\n");
1245 case COMP_CTX_STATE:
1246 dev_warn(&udev->dev, "WARN: invalid context state for "
1247 "evaluate context command.\n");
1248 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1249 ret = -EINVAL;
1250 break;
1251 case COMP_SUCCESS:
1252 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1253 ret = 0;
1254 break;
1255 default:
1256 xhci_err(xhci, "ERROR: unexpected command completion "
1257 "code 0x%x.\n", *cmd_status);
1258 ret = -EINVAL;
1259 break;
1261 return ret;
1264 /* Issue a configure endpoint command or evaluate context command
1265 * and wait for it to finish.
1267 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1268 struct usb_device *udev,
1269 struct xhci_command *command,
1270 bool ctx_change, bool must_succeed)
1272 int ret;
1273 int timeleft;
1274 unsigned long flags;
1275 struct xhci_container_ctx *in_ctx;
1276 struct completion *cmd_completion;
1277 int *cmd_status;
1278 struct xhci_virt_device *virt_dev;
1280 spin_lock_irqsave(&xhci->lock, flags);
1281 virt_dev = xhci->devs[udev->slot_id];
1282 if (command) {
1283 in_ctx = command->in_ctx;
1284 cmd_completion = command->completion;
1285 cmd_status = &command->status;
1286 command->command_trb = xhci->cmd_ring->enqueue;
1287 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1288 } else {
1289 in_ctx = virt_dev->in_ctx;
1290 cmd_completion = &virt_dev->cmd_completion;
1291 cmd_status = &virt_dev->cmd_status;
1293 init_completion(cmd_completion);
1295 if (!ctx_change)
1296 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1297 udev->slot_id, must_succeed);
1298 else
1299 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1300 udev->slot_id);
1301 if (ret < 0) {
1302 if (command)
1303 list_del(&command->cmd_list);
1304 spin_unlock_irqrestore(&xhci->lock, flags);
1305 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1306 return -ENOMEM;
1308 xhci_ring_cmd_db(xhci);
1309 spin_unlock_irqrestore(&xhci->lock, flags);
1311 /* Wait for the configure endpoint command to complete */
1312 timeleft = wait_for_completion_interruptible_timeout(
1313 cmd_completion,
1314 USB_CTRL_SET_TIMEOUT);
1315 if (timeleft <= 0) {
1316 xhci_warn(xhci, "%s while waiting for %s command\n",
1317 timeleft == 0 ? "Timeout" : "Signal",
1318 ctx_change == 0 ?
1319 "configure endpoint" :
1320 "evaluate context");
1321 /* FIXME cancel the configure endpoint command */
1322 return -ETIME;
1325 if (!ctx_change)
1326 return xhci_configure_endpoint_result(xhci, udev, cmd_status);
1327 return xhci_evaluate_context_result(xhci, udev, cmd_status);
1330 /* Called after one or more calls to xhci_add_endpoint() or
1331 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1332 * to call xhci_reset_bandwidth().
1334 * Since we are in the middle of changing either configuration or
1335 * installing a new alt setting, the USB core won't allow URBs to be
1336 * enqueued for any endpoint on the old config or interface. Nothing
1337 * else should be touching the xhci->devs[slot_id] structure, so we
1338 * don't need to take the xhci->lock for manipulating that.
1340 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1342 int i;
1343 int ret = 0;
1344 struct xhci_hcd *xhci;
1345 struct xhci_virt_device *virt_dev;
1346 struct xhci_input_control_ctx *ctrl_ctx;
1347 struct xhci_slot_ctx *slot_ctx;
1349 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1350 if (ret <= 0)
1351 return ret;
1352 xhci = hcd_to_xhci(hcd);
1354 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1355 virt_dev = xhci->devs[udev->slot_id];
1357 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1358 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1359 ctrl_ctx->add_flags |= SLOT_FLAG;
1360 ctrl_ctx->add_flags &= ~EP0_FLAG;
1361 ctrl_ctx->drop_flags &= ~SLOT_FLAG;
1362 ctrl_ctx->drop_flags &= ~EP0_FLAG;
1363 xhci_dbg(xhci, "New Input Control Context:\n");
1364 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1365 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1366 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1368 ret = xhci_configure_endpoint(xhci, udev, NULL,
1369 false, false);
1370 if (ret) {
1371 /* Callee should call reset_bandwidth() */
1372 return ret;
1375 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1376 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1377 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1379 xhci_zero_in_ctx(xhci, virt_dev);
1380 /* Install new rings and free or cache any old rings */
1381 for (i = 1; i < 31; ++i) {
1382 if (!virt_dev->eps[i].new_ring)
1383 continue;
1384 /* Only cache or free the old ring if it exists.
1385 * It may not if this is the first add of an endpoint.
1387 if (virt_dev->eps[i].ring) {
1388 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1390 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1391 virt_dev->eps[i].new_ring = NULL;
1394 return ret;
1397 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1399 struct xhci_hcd *xhci;
1400 struct xhci_virt_device *virt_dev;
1401 int i, ret;
1403 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1404 if (ret <= 0)
1405 return;
1406 xhci = hcd_to_xhci(hcd);
1408 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1409 virt_dev = xhci->devs[udev->slot_id];
1410 /* Free any rings allocated for added endpoints */
1411 for (i = 0; i < 31; ++i) {
1412 if (virt_dev->eps[i].new_ring) {
1413 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1414 virt_dev->eps[i].new_ring = NULL;
1417 xhci_zero_in_ctx(xhci, virt_dev);
1420 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1421 struct xhci_container_ctx *in_ctx,
1422 struct xhci_container_ctx *out_ctx,
1423 u32 add_flags, u32 drop_flags)
1425 struct xhci_input_control_ctx *ctrl_ctx;
1426 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1427 ctrl_ctx->add_flags = add_flags;
1428 ctrl_ctx->drop_flags = drop_flags;
1429 xhci_slot_copy(xhci, in_ctx, out_ctx);
1430 ctrl_ctx->add_flags |= SLOT_FLAG;
1432 xhci_dbg(xhci, "Input Context:\n");
1433 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1436 void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1437 unsigned int slot_id, unsigned int ep_index,
1438 struct xhci_dequeue_state *deq_state)
1440 struct xhci_container_ctx *in_ctx;
1441 struct xhci_ep_ctx *ep_ctx;
1442 u32 added_ctxs;
1443 dma_addr_t addr;
1445 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1446 xhci->devs[slot_id]->out_ctx, ep_index);
1447 in_ctx = xhci->devs[slot_id]->in_ctx;
1448 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1449 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1450 deq_state->new_deq_ptr);
1451 if (addr == 0) {
1452 xhci_warn(xhci, "WARN Cannot submit config ep after "
1453 "reset ep command\n");
1454 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1455 deq_state->new_deq_seg,
1456 deq_state->new_deq_ptr);
1457 return;
1459 ep_ctx->deq = addr | deq_state->new_cycle_state;
1461 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1462 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1463 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1466 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1467 struct usb_device *udev, unsigned int ep_index)
1469 struct xhci_dequeue_state deq_state;
1470 struct xhci_virt_ep *ep;
1472 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1473 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1474 /* We need to move the HW's dequeue pointer past this TD,
1475 * or it will attempt to resend it on the next doorbell ring.
1477 xhci_find_new_dequeue_state(xhci, udev->slot_id,
1478 ep_index, ep->stopped_stream, ep->stopped_td,
1479 &deq_state);
1481 /* HW with the reset endpoint quirk will use the saved dequeue state to
1482 * issue a configure endpoint command later.
1484 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1485 xhci_dbg(xhci, "Queueing new dequeue state\n");
1486 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1487 ep_index, ep->stopped_stream, &deq_state);
1488 } else {
1489 /* Better hope no one uses the input context between now and the
1490 * reset endpoint completion!
1491 * XXX: No idea how this hardware will react when stream rings
1492 * are enabled.
1494 xhci_dbg(xhci, "Setting up input context for "
1495 "configure endpoint command\n");
1496 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
1497 ep_index, &deq_state);
1501 /* Deal with stalled endpoints. The core should have sent the control message
1502 * to clear the halt condition. However, we need to make the xHCI hardware
1503 * reset its sequence number, since a device will expect a sequence number of
1504 * zero after the halt condition is cleared.
1505 * Context: in_interrupt
1507 void xhci_endpoint_reset(struct usb_hcd *hcd,
1508 struct usb_host_endpoint *ep)
1510 struct xhci_hcd *xhci;
1511 struct usb_device *udev;
1512 unsigned int ep_index;
1513 unsigned long flags;
1514 int ret;
1515 struct xhci_virt_ep *virt_ep;
1517 xhci = hcd_to_xhci(hcd);
1518 udev = (struct usb_device *) ep->hcpriv;
1519 /* Called with a root hub endpoint (or an endpoint that wasn't added
1520 * with xhci_add_endpoint()
1522 if (!ep->hcpriv)
1523 return;
1524 ep_index = xhci_get_endpoint_index(&ep->desc);
1525 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1526 if (!virt_ep->stopped_td) {
1527 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
1528 ep->desc.bEndpointAddress);
1529 return;
1531 if (usb_endpoint_xfer_control(&ep->desc)) {
1532 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
1533 return;
1536 xhci_dbg(xhci, "Queueing reset endpoint command\n");
1537 spin_lock_irqsave(&xhci->lock, flags);
1538 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
1540 * Can't change the ring dequeue pointer until it's transitioned to the
1541 * stopped state, which is only upon a successful reset endpoint
1542 * command. Better hope that last command worked!
1544 if (!ret) {
1545 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
1546 kfree(virt_ep->stopped_td);
1547 xhci_ring_cmd_db(xhci);
1549 virt_ep->stopped_td = NULL;
1550 virt_ep->stopped_trb = NULL;
1551 virt_ep->stopped_stream = 0;
1552 spin_unlock_irqrestore(&xhci->lock, flags);
1554 if (ret)
1555 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
1558 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
1559 struct usb_device *udev, struct usb_host_endpoint *ep,
1560 unsigned int slot_id)
1562 int ret;
1563 unsigned int ep_index;
1564 unsigned int ep_state;
1566 if (!ep)
1567 return -EINVAL;
1568 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
1569 if (ret <= 0)
1570 return -EINVAL;
1571 if (ep->ss_ep_comp.bmAttributes == 0) {
1572 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
1573 " descriptor for ep 0x%x does not support streams\n",
1574 ep->desc.bEndpointAddress);
1575 return -EINVAL;
1578 ep_index = xhci_get_endpoint_index(&ep->desc);
1579 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1580 if (ep_state & EP_HAS_STREAMS ||
1581 ep_state & EP_GETTING_STREAMS) {
1582 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
1583 "already has streams set up.\n",
1584 ep->desc.bEndpointAddress);
1585 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
1586 "dynamic stream context array reallocation.\n");
1587 return -EINVAL;
1589 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
1590 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
1591 "endpoint 0x%x; URBs are pending.\n",
1592 ep->desc.bEndpointAddress);
1593 return -EINVAL;
1595 return 0;
1598 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
1599 unsigned int *num_streams, unsigned int *num_stream_ctxs)
1601 unsigned int max_streams;
1603 /* The stream context array size must be a power of two */
1604 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
1606 * Find out how many primary stream array entries the host controller
1607 * supports. Later we may use secondary stream arrays (similar to 2nd
1608 * level page entries), but that's an optional feature for xHCI host
1609 * controllers. xHCs must support at least 4 stream IDs.
1611 max_streams = HCC_MAX_PSA(xhci->hcc_params);
1612 if (*num_stream_ctxs > max_streams) {
1613 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
1614 max_streams);
1615 *num_stream_ctxs = max_streams;
1616 *num_streams = max_streams;
1620 /* Returns an error code if one of the endpoint already has streams.
1621 * This does not change any data structures, it only checks and gathers
1622 * information.
1624 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
1625 struct usb_device *udev,
1626 struct usb_host_endpoint **eps, unsigned int num_eps,
1627 unsigned int *num_streams, u32 *changed_ep_bitmask)
1629 unsigned int max_streams;
1630 unsigned int endpoint_flag;
1631 int i;
1632 int ret;
1634 for (i = 0; i < num_eps; i++) {
1635 ret = xhci_check_streams_endpoint(xhci, udev,
1636 eps[i], udev->slot_id);
1637 if (ret < 0)
1638 return ret;
1640 max_streams = USB_SS_MAX_STREAMS(
1641 eps[i]->ss_ep_comp.bmAttributes);
1642 if (max_streams < (*num_streams - 1)) {
1643 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
1644 eps[i]->desc.bEndpointAddress,
1645 max_streams);
1646 *num_streams = max_streams+1;
1649 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
1650 if (*changed_ep_bitmask & endpoint_flag)
1651 return -EINVAL;
1652 *changed_ep_bitmask |= endpoint_flag;
1654 return 0;
1657 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
1658 struct usb_device *udev,
1659 struct usb_host_endpoint **eps, unsigned int num_eps)
1661 u32 changed_ep_bitmask = 0;
1662 unsigned int slot_id;
1663 unsigned int ep_index;
1664 unsigned int ep_state;
1665 int i;
1667 slot_id = udev->slot_id;
1668 if (!xhci->devs[slot_id])
1669 return 0;
1671 for (i = 0; i < num_eps; i++) {
1672 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1673 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1674 /* Are streams already being freed for the endpoint? */
1675 if (ep_state & EP_GETTING_NO_STREAMS) {
1676 xhci_warn(xhci, "WARN Can't disable streams for "
1677 "endpoint 0x%x\n, "
1678 "streams are being disabled already.",
1679 eps[i]->desc.bEndpointAddress);
1680 return 0;
1682 /* Are there actually any streams to free? */
1683 if (!(ep_state & EP_HAS_STREAMS) &&
1684 !(ep_state & EP_GETTING_STREAMS)) {
1685 xhci_warn(xhci, "WARN Can't disable streams for "
1686 "endpoint 0x%x\n, "
1687 "streams are already disabled!",
1688 eps[i]->desc.bEndpointAddress);
1689 xhci_warn(xhci, "WARN xhci_free_streams() called "
1690 "with non-streams endpoint\n");
1691 return 0;
1693 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
1695 return changed_ep_bitmask;
1699 * The USB device drivers use this function (though the HCD interface in USB
1700 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
1701 * coordinate mass storage command queueing across multiple endpoints (basically
1702 * a stream ID == a task ID).
1704 * Setting up streams involves allocating the same size stream context array
1705 * for each endpoint and issuing a configure endpoint command for all endpoints.
1707 * Don't allow the call to succeed if one endpoint only supports one stream
1708 * (which means it doesn't support streams at all).
1710 * Drivers may get less stream IDs than they asked for, if the host controller
1711 * hardware or endpoints claim they can't support the number of requested
1712 * stream IDs.
1714 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
1715 struct usb_host_endpoint **eps, unsigned int num_eps,
1716 unsigned int num_streams, gfp_t mem_flags)
1718 int i, ret;
1719 struct xhci_hcd *xhci;
1720 struct xhci_virt_device *vdev;
1721 struct xhci_command *config_cmd;
1722 unsigned int ep_index;
1723 unsigned int num_stream_ctxs;
1724 unsigned long flags;
1725 u32 changed_ep_bitmask = 0;
1727 if (!eps)
1728 return -EINVAL;
1730 /* Add one to the number of streams requested to account for
1731 * stream 0 that is reserved for xHCI usage.
1733 num_streams += 1;
1734 xhci = hcd_to_xhci(hcd);
1735 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
1736 num_streams);
1738 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
1739 if (!config_cmd) {
1740 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
1741 return -ENOMEM;
1744 /* Check to make sure all endpoints are not already configured for
1745 * streams. While we're at it, find the maximum number of streams that
1746 * all the endpoints will support and check for duplicate endpoints.
1748 spin_lock_irqsave(&xhci->lock, flags);
1749 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
1750 num_eps, &num_streams, &changed_ep_bitmask);
1751 if (ret < 0) {
1752 xhci_free_command(xhci, config_cmd);
1753 spin_unlock_irqrestore(&xhci->lock, flags);
1754 return ret;
1756 if (num_streams <= 1) {
1757 xhci_warn(xhci, "WARN: endpoints can't handle "
1758 "more than one stream.\n");
1759 xhci_free_command(xhci, config_cmd);
1760 spin_unlock_irqrestore(&xhci->lock, flags);
1761 return -EINVAL;
1763 vdev = xhci->devs[udev->slot_id];
1764 /* Mark each endpoint as being in transistion, so
1765 * xhci_urb_enqueue() will reject all URBs.
1767 for (i = 0; i < num_eps; i++) {
1768 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1769 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
1771 spin_unlock_irqrestore(&xhci->lock, flags);
1773 /* Setup internal data structures and allocate HW data structures for
1774 * streams (but don't install the HW structures in the input context
1775 * until we're sure all memory allocation succeeded).
1777 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
1778 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
1779 num_stream_ctxs, num_streams);
1781 for (i = 0; i < num_eps; i++) {
1782 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1783 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
1784 num_stream_ctxs,
1785 num_streams, mem_flags);
1786 if (!vdev->eps[ep_index].stream_info)
1787 goto cleanup;
1788 /* Set maxPstreams in endpoint context and update deq ptr to
1789 * point to stream context array. FIXME
1793 /* Set up the input context for a configure endpoint command. */
1794 for (i = 0; i < num_eps; i++) {
1795 struct xhci_ep_ctx *ep_ctx;
1797 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1798 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
1800 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
1801 vdev->out_ctx, ep_index);
1802 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
1803 vdev->eps[ep_index].stream_info);
1805 /* Tell the HW to drop its old copy of the endpoint context info
1806 * and add the updated copy from the input context.
1808 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
1809 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
1811 /* Issue and wait for the configure endpoint command */
1812 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
1813 false, false);
1815 /* xHC rejected the configure endpoint command for some reason, so we
1816 * leave the old ring intact and free our internal streams data
1817 * structure.
1819 if (ret < 0)
1820 goto cleanup;
1822 spin_lock_irqsave(&xhci->lock, flags);
1823 for (i = 0; i < num_eps; i++) {
1824 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1825 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
1826 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
1827 udev->slot_id, ep_index);
1828 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
1830 xhci_free_command(xhci, config_cmd);
1831 spin_unlock_irqrestore(&xhci->lock, flags);
1833 /* Subtract 1 for stream 0, which drivers can't use */
1834 return num_streams - 1;
1836 cleanup:
1837 /* If it didn't work, free the streams! */
1838 for (i = 0; i < num_eps; i++) {
1839 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1840 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
1841 vdev->eps[ep_index].stream_info = NULL;
1842 /* FIXME Unset maxPstreams in endpoint context and
1843 * update deq ptr to point to normal string ring.
1845 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
1846 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
1847 xhci_endpoint_zero(xhci, vdev, eps[i]);
1849 xhci_free_command(xhci, config_cmd);
1850 return -ENOMEM;
1853 /* Transition the endpoint from using streams to being a "normal" endpoint
1854 * without streams.
1856 * Modify the endpoint context state, submit a configure endpoint command,
1857 * and free all endpoint rings for streams if that completes successfully.
1859 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
1860 struct usb_host_endpoint **eps, unsigned int num_eps,
1861 gfp_t mem_flags)
1863 int i, ret;
1864 struct xhci_hcd *xhci;
1865 struct xhci_virt_device *vdev;
1866 struct xhci_command *command;
1867 unsigned int ep_index;
1868 unsigned long flags;
1869 u32 changed_ep_bitmask;
1871 xhci = hcd_to_xhci(hcd);
1872 vdev = xhci->devs[udev->slot_id];
1874 /* Set up a configure endpoint command to remove the streams rings */
1875 spin_lock_irqsave(&xhci->lock, flags);
1876 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
1877 udev, eps, num_eps);
1878 if (changed_ep_bitmask == 0) {
1879 spin_unlock_irqrestore(&xhci->lock, flags);
1880 return -EINVAL;
1883 /* Use the xhci_command structure from the first endpoint. We may have
1884 * allocated too many, but the driver may call xhci_free_streams() for
1885 * each endpoint it grouped into one call to xhci_alloc_streams().
1887 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
1888 command = vdev->eps[ep_index].stream_info->free_streams_command;
1889 for (i = 0; i < num_eps; i++) {
1890 struct xhci_ep_ctx *ep_ctx;
1892 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1893 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1894 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
1895 EP_GETTING_NO_STREAMS;
1897 xhci_endpoint_copy(xhci, command->in_ctx,
1898 vdev->out_ctx, ep_index);
1899 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
1900 &vdev->eps[ep_index]);
1902 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
1903 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
1904 spin_unlock_irqrestore(&xhci->lock, flags);
1906 /* Issue and wait for the configure endpoint command,
1907 * which must succeed.
1909 ret = xhci_configure_endpoint(xhci, udev, command,
1910 false, true);
1912 /* xHC rejected the configure endpoint command for some reason, so we
1913 * leave the streams rings intact.
1915 if (ret < 0)
1916 return ret;
1918 spin_lock_irqsave(&xhci->lock, flags);
1919 for (i = 0; i < num_eps; i++) {
1920 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1921 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
1922 vdev->eps[ep_index].stream_info = NULL;
1923 /* FIXME Unset maxPstreams in endpoint context and
1924 * update deq ptr to point to normal string ring.
1926 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
1927 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
1929 spin_unlock_irqrestore(&xhci->lock, flags);
1931 return 0;
1935 * This submits a Reset Device Command, which will set the device state to 0,
1936 * set the device address to 0, and disable all the endpoints except the default
1937 * control endpoint. The USB core should come back and call
1938 * xhci_address_device(), and then re-set up the configuration. If this is
1939 * called because of a usb_reset_and_verify_device(), then the old alternate
1940 * settings will be re-installed through the normal bandwidth allocation
1941 * functions.
1943 * Wait for the Reset Device command to finish. Remove all structures
1944 * associated with the endpoints that were disabled. Clear the input device
1945 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
1947 * If the virt_dev to be reset does not exist or does not match the udev,
1948 * it means the device is lost, possibly due to the xHC restore error and
1949 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
1950 * re-allocate the device.
1952 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
1954 int ret, i;
1955 unsigned long flags;
1956 struct xhci_hcd *xhci;
1957 unsigned int slot_id;
1958 struct xhci_virt_device *virt_dev;
1959 struct xhci_command *reset_device_cmd;
1960 int timeleft;
1961 int last_freed_endpoint;
1963 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
1964 if (ret <= 0)
1965 return ret;
1966 xhci = hcd_to_xhci(hcd);
1967 slot_id = udev->slot_id;
1968 virt_dev = xhci->devs[slot_id];
1969 if (!virt_dev) {
1970 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
1971 "not exist. Re-allocate the device\n", slot_id);
1972 ret = xhci_alloc_dev(hcd, udev);
1973 if (ret == 1)
1974 return 0;
1975 else
1976 return -EINVAL;
1979 if (virt_dev->udev != udev) {
1980 /* If the virt_dev and the udev does not match, this virt_dev
1981 * may belong to another udev.
1982 * Re-allocate the device.
1984 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
1985 "not match the udev. Re-allocate the device\n",
1986 slot_id);
1987 ret = xhci_alloc_dev(hcd, udev);
1988 if (ret == 1)
1989 return 0;
1990 else
1991 return -EINVAL;
1994 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
1995 /* Allocate the command structure that holds the struct completion.
1996 * Assume we're in process context, since the normal device reset
1997 * process has to wait for the device anyway. Storage devices are
1998 * reset as part of error handling, so use GFP_NOIO instead of
1999 * GFP_KERNEL.
2001 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2002 if (!reset_device_cmd) {
2003 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2004 return -ENOMEM;
2007 /* Attempt to submit the Reset Device command to the command ring */
2008 spin_lock_irqsave(&xhci->lock, flags);
2009 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2010 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2011 ret = xhci_queue_reset_device(xhci, slot_id);
2012 if (ret) {
2013 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2014 list_del(&reset_device_cmd->cmd_list);
2015 spin_unlock_irqrestore(&xhci->lock, flags);
2016 goto command_cleanup;
2018 xhci_ring_cmd_db(xhci);
2019 spin_unlock_irqrestore(&xhci->lock, flags);
2021 /* Wait for the Reset Device command to finish */
2022 timeleft = wait_for_completion_interruptible_timeout(
2023 reset_device_cmd->completion,
2024 USB_CTRL_SET_TIMEOUT);
2025 if (timeleft <= 0) {
2026 xhci_warn(xhci, "%s while waiting for reset device command\n",
2027 timeleft == 0 ? "Timeout" : "Signal");
2028 spin_lock_irqsave(&xhci->lock, flags);
2029 /* The timeout might have raced with the event ring handler, so
2030 * only delete from the list if the item isn't poisoned.
2032 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2033 list_del(&reset_device_cmd->cmd_list);
2034 spin_unlock_irqrestore(&xhci->lock, flags);
2035 ret = -ETIME;
2036 goto command_cleanup;
2039 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2040 * unless we tried to reset a slot ID that wasn't enabled,
2041 * or the device wasn't in the addressed or configured state.
2043 ret = reset_device_cmd->status;
2044 switch (ret) {
2045 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2046 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2047 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2048 slot_id,
2049 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2050 xhci_info(xhci, "Not freeing device rings.\n");
2051 /* Don't treat this as an error. May change my mind later. */
2052 ret = 0;
2053 goto command_cleanup;
2054 case COMP_SUCCESS:
2055 xhci_dbg(xhci, "Successful reset device command.\n");
2056 break;
2057 default:
2058 if (xhci_is_vendor_info_code(xhci, ret))
2059 break;
2060 xhci_warn(xhci, "Unknown completion code %u for "
2061 "reset device command.\n", ret);
2062 ret = -EINVAL;
2063 goto command_cleanup;
2066 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2067 last_freed_endpoint = 1;
2068 for (i = 1; i < 31; ++i) {
2069 if (!virt_dev->eps[i].ring)
2070 continue;
2071 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2072 last_freed_endpoint = i;
2074 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2075 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2076 ret = 0;
2078 command_cleanup:
2079 xhci_free_command(xhci, reset_device_cmd);
2080 return ret;
2084 * At this point, the struct usb_device is about to go away, the device has
2085 * disconnected, and all traffic has been stopped and the endpoints have been
2086 * disabled. Free any HC data structures associated with that device.
2088 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2090 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2091 struct xhci_virt_device *virt_dev;
2092 unsigned long flags;
2093 u32 state;
2094 int i, ret;
2096 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2097 if (ret <= 0)
2098 return;
2100 virt_dev = xhci->devs[udev->slot_id];
2102 /* Stop any wayward timer functions (which may grab the lock) */
2103 for (i = 0; i < 31; ++i) {
2104 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2105 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2108 spin_lock_irqsave(&xhci->lock, flags);
2109 /* Don't disable the slot if the host controller is dead. */
2110 state = xhci_readl(xhci, &xhci->op_regs->status);
2111 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2112 xhci_free_virt_device(xhci, udev->slot_id);
2113 spin_unlock_irqrestore(&xhci->lock, flags);
2114 return;
2117 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2118 spin_unlock_irqrestore(&xhci->lock, flags);
2119 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2120 return;
2122 xhci_ring_cmd_db(xhci);
2123 spin_unlock_irqrestore(&xhci->lock, flags);
2125 * Event command completion handler will free any data structures
2126 * associated with the slot. XXX Can free sleep?
2131 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2132 * timed out, or allocating memory failed. Returns 1 on success.
2134 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2136 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2137 unsigned long flags;
2138 int timeleft;
2139 int ret;
2141 spin_lock_irqsave(&xhci->lock, flags);
2142 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2143 if (ret) {
2144 spin_unlock_irqrestore(&xhci->lock, flags);
2145 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2146 return 0;
2148 xhci_ring_cmd_db(xhci);
2149 spin_unlock_irqrestore(&xhci->lock, flags);
2151 /* XXX: how much time for xHC slot assignment? */
2152 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2153 USB_CTRL_SET_TIMEOUT);
2154 if (timeleft <= 0) {
2155 xhci_warn(xhci, "%s while waiting for a slot\n",
2156 timeleft == 0 ? "Timeout" : "Signal");
2157 /* FIXME cancel the enable slot request */
2158 return 0;
2161 if (!xhci->slot_id) {
2162 xhci_err(xhci, "Error while assigning device slot ID\n");
2163 return 0;
2165 /* xhci_alloc_virt_device() does not touch rings; no need to lock */
2166 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
2167 /* Disable slot, if we can do it without mem alloc */
2168 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2169 spin_lock_irqsave(&xhci->lock, flags);
2170 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2171 xhci_ring_cmd_db(xhci);
2172 spin_unlock_irqrestore(&xhci->lock, flags);
2173 return 0;
2175 udev->slot_id = xhci->slot_id;
2176 /* Is this a LS or FS device under a HS hub? */
2177 /* Hub or peripherial? */
2178 return 1;
2182 * Issue an Address Device command (which will issue a SetAddress request to
2183 * the device).
2184 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2185 * we should only issue and wait on one address command at the same time.
2187 * We add one to the device address issued by the hardware because the USB core
2188 * uses address 1 for the root hubs (even though they're not really devices).
2190 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2192 unsigned long flags;
2193 int timeleft;
2194 struct xhci_virt_device *virt_dev;
2195 int ret = 0;
2196 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2197 struct xhci_slot_ctx *slot_ctx;
2198 struct xhci_input_control_ctx *ctrl_ctx;
2199 u64 temp_64;
2201 if (!udev->slot_id) {
2202 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2203 return -EINVAL;
2206 virt_dev = xhci->devs[udev->slot_id];
2208 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2210 * If this is the first Set Address since device plug-in or
2211 * virt_device realloaction after a resume with an xHCI power loss,
2212 * then set up the slot context.
2214 if (!slot_ctx->dev_info)
2215 xhci_setup_addressable_virt_dev(xhci, udev);
2216 /* Otherwise, update the control endpoint ring enqueue pointer. */
2217 else
2218 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2219 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2220 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2222 spin_lock_irqsave(&xhci->lock, flags);
2223 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2224 udev->slot_id);
2225 if (ret) {
2226 spin_unlock_irqrestore(&xhci->lock, flags);
2227 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2228 return ret;
2230 xhci_ring_cmd_db(xhci);
2231 spin_unlock_irqrestore(&xhci->lock, flags);
2233 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2234 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2235 USB_CTRL_SET_TIMEOUT);
2236 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2237 * the SetAddress() "recovery interval" required by USB and aborting the
2238 * command on a timeout.
2240 if (timeleft <= 0) {
2241 xhci_warn(xhci, "%s while waiting for a slot\n",
2242 timeleft == 0 ? "Timeout" : "Signal");
2243 /* FIXME cancel the address device command */
2244 return -ETIME;
2247 switch (virt_dev->cmd_status) {
2248 case COMP_CTX_STATE:
2249 case COMP_EBADSLT:
2250 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2251 udev->slot_id);
2252 ret = -EINVAL;
2253 break;
2254 case COMP_TX_ERR:
2255 dev_warn(&udev->dev, "Device not responding to set address.\n");
2256 ret = -EPROTO;
2257 break;
2258 case COMP_SUCCESS:
2259 xhci_dbg(xhci, "Successful Address Device command\n");
2260 break;
2261 default:
2262 xhci_err(xhci, "ERROR: unexpected command completion "
2263 "code 0x%x.\n", virt_dev->cmd_status);
2264 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2265 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2266 ret = -EINVAL;
2267 break;
2269 if (ret) {
2270 return ret;
2272 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2273 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2274 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2275 udev->slot_id,
2276 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2277 (unsigned long long)
2278 xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
2279 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2280 (unsigned long long)virt_dev->out_ctx->dma);
2281 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2282 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2283 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2284 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2286 * USB core uses address 1 for the roothubs, so we add one to the
2287 * address given back to us by the HC.
2289 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2290 /* Use kernel assigned address for devices; store xHC assigned
2291 * address locally. */
2292 virt_dev->address = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
2293 /* Zero the input context control for later use */
2294 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2295 ctrl_ctx->add_flags = 0;
2296 ctrl_ctx->drop_flags = 0;
2298 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2300 return 0;
2303 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2304 * internal data structures for the device.
2306 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2307 struct usb_tt *tt, gfp_t mem_flags)
2309 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2310 struct xhci_virt_device *vdev;
2311 struct xhci_command *config_cmd;
2312 struct xhci_input_control_ctx *ctrl_ctx;
2313 struct xhci_slot_ctx *slot_ctx;
2314 unsigned long flags;
2315 unsigned think_time;
2316 int ret;
2318 /* Ignore root hubs */
2319 if (!hdev->parent)
2320 return 0;
2322 vdev = xhci->devs[hdev->slot_id];
2323 if (!vdev) {
2324 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2325 return -EINVAL;
2327 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2328 if (!config_cmd) {
2329 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2330 return -ENOMEM;
2333 spin_lock_irqsave(&xhci->lock, flags);
2334 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2335 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2336 ctrl_ctx->add_flags |= SLOT_FLAG;
2337 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2338 slot_ctx->dev_info |= DEV_HUB;
2339 if (tt->multi)
2340 slot_ctx->dev_info |= DEV_MTT;
2341 if (xhci->hci_version > 0x95) {
2342 xhci_dbg(xhci, "xHCI version %x needs hub "
2343 "TT think time and number of ports\n",
2344 (unsigned int) xhci->hci_version);
2345 slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
2346 /* Set TT think time - convert from ns to FS bit times.
2347 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2348 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2350 think_time = tt->think_time;
2351 if (think_time != 0)
2352 think_time = (think_time / 666) - 1;
2353 slot_ctx->tt_info |= TT_THINK_TIME(think_time);
2354 } else {
2355 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2356 "TT think time or number of ports\n",
2357 (unsigned int) xhci->hci_version);
2359 slot_ctx->dev_state = 0;
2360 spin_unlock_irqrestore(&xhci->lock, flags);
2362 xhci_dbg(xhci, "Set up %s for hub device.\n",
2363 (xhci->hci_version > 0x95) ?
2364 "configure endpoint" : "evaluate context");
2365 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2366 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
2368 /* Issue and wait for the configure endpoint or
2369 * evaluate context command.
2371 if (xhci->hci_version > 0x95)
2372 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2373 false, false);
2374 else
2375 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2376 true, false);
2378 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
2379 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
2381 xhci_free_command(xhci, config_cmd);
2382 return ret;
2385 int xhci_get_frame(struct usb_hcd *hcd)
2387 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2388 /* EHCI mods by the periodic size. Why? */
2389 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
2392 MODULE_DESCRIPTION(DRIVER_DESC);
2393 MODULE_AUTHOR(DRIVER_AUTHOR);
2394 MODULE_LICENSE("GPL");
2396 static int __init xhci_hcd_init(void)
2398 #ifdef CONFIG_PCI
2399 int retval = 0;
2401 retval = xhci_register_pci();
2403 if (retval < 0) {
2404 printk(KERN_DEBUG "Problem registering PCI driver.");
2405 return retval;
2407 #endif
2409 * Check the compiler generated sizes of structures that must be laid
2410 * out in specific ways for hardware access.
2412 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2413 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
2414 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
2415 /* xhci_device_control has eight fields, and also
2416 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2418 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
2419 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
2420 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
2421 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
2422 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
2423 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2424 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
2425 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2426 return 0;
2428 module_init(xhci_hcd_init);
2430 static void __exit xhci_hcd_cleanup(void)
2432 #ifdef CONFIG_PCI
2433 xhci_unregister_pci();
2434 #endif
2436 module_exit(xhci_hcd_cleanup);