USB: xHCI: bus power management implementation
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / host / xhci-hub.c
blob7f2f63cb6c53d5b82c0fc5d064bf831a79f1d1c2
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <asm/unaligned.h>
25 #include "xhci.h"
27 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
31 static void xhci_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc)
34 int ports;
35 u16 temp;
37 ports = HCS_MAX_PORTS(xhci->hcs_params1);
39 /* USB 3.0 hubs have a different descriptor, but we fake this for now */
40 desc->bDescriptorType = 0x29;
41 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
42 desc->bHubContrCurrent = 0;
44 desc->bNbrPorts = ports;
45 temp = 1 + (ports / 8);
46 desc->bDescLength = 7 + 2 * temp;
48 /* Why does core/hcd.h define bitmap? It's just confusing. */
49 memset(&desc->DeviceRemovable[0], 0, temp);
50 memset(&desc->DeviceRemovable[temp], 0xff, temp);
52 /* Ugh, these should be #defines, FIXME */
53 /* Using table 11-13 in USB 2.0 spec. */
54 temp = 0;
55 /* Bits 1:0 - support port power switching, or power always on */
56 if (HCC_PPC(xhci->hcc_params))
57 temp |= 0x0001;
58 else
59 temp |= 0x0002;
60 /* Bit 2 - root hubs are not part of a compound device */
61 /* Bits 4:3 - individual port over current protection */
62 temp |= 0x0008;
63 /* Bits 6:5 - no TTs in root ports */
64 /* Bit 7 - no port indicators */
65 desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
68 static unsigned int xhci_port_speed(unsigned int port_status)
70 if (DEV_LOWSPEED(port_status))
71 return USB_PORT_STAT_LOW_SPEED;
72 if (DEV_HIGHSPEED(port_status))
73 return USB_PORT_STAT_HIGH_SPEED;
74 if (DEV_SUPERSPEED(port_status))
75 return USB_PORT_STAT_SUPER_SPEED;
77 * FIXME: Yes, we should check for full speed, but the core uses that as
78 * a default in portspeed() in usb/core/hub.c (which is the only place
79 * USB_PORT_STAT_*_SPEED is used).
81 return 0;
85 * These bits are Read Only (RO) and should be saved and written to the
86 * registers: 0, 3, 10:13, 30
87 * connect status, over-current status, port speed, and device removable.
88 * connect status and port speed are also sticky - meaning they're in
89 * the AUX well and they aren't changed by a hot, warm, or cold reset.
91 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
93 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
94 * bits 5:8, 9, 14:15, 25:27
95 * link state, port power, port indicator state, "wake on" enable state
97 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
99 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
100 * bit 4 (port reset)
102 #define XHCI_PORT_RW1S ((1<<4))
104 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
105 * bits 1, 17, 18, 19, 20, 21, 22, 23
106 * port enable/disable, and
107 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
108 * over-current, reset, link state, and L1 change
110 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
112 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
113 * latched in
115 #define XHCI_PORT_RW ((1<<16))
117 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
118 * bits 2, 24, 28:31
120 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
123 * Given a port state, this function returns a value that would result in the
124 * port being in the same state, if the value was written to the port status
125 * control register.
126 * Save Read Only (RO) bits and save read/write bits where
127 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
128 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
130 u32 xhci_port_state_to_neutral(u32 state)
132 /* Save read-only status and port state */
133 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
137 * find slot id based on port number.
139 int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
141 int slot_id;
142 int i;
144 slot_id = 0;
145 for (i = 0; i < MAX_HC_SLOTS; i++) {
146 if (!xhci->devs[i])
147 continue;
148 if (xhci->devs[i]->port == port) {
149 slot_id = i;
150 break;
154 return slot_id;
158 * Stop device
159 * It issues stop endpoint command for EP 0 to 30. And wait the last command
160 * to complete.
161 * suspend will set to 1, if suspend bit need to set in command.
163 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
165 struct xhci_virt_device *virt_dev;
166 struct xhci_command *cmd;
167 unsigned long flags;
168 int timeleft;
169 int ret;
170 int i;
172 ret = 0;
173 virt_dev = xhci->devs[slot_id];
174 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
175 if (!cmd) {
176 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
177 return -ENOMEM;
180 spin_lock_irqsave(&xhci->lock, flags);
181 for (i = LAST_EP_INDEX; i > 0; i--) {
182 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
183 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
185 cmd->command_trb = xhci->cmd_ring->enqueue;
186 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
187 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
188 xhci_ring_cmd_db(xhci);
189 spin_unlock_irqrestore(&xhci->lock, flags);
191 /* Wait for last stop endpoint command to finish */
192 timeleft = wait_for_completion_interruptible_timeout(
193 cmd->completion,
194 USB_CTRL_SET_TIMEOUT);
195 if (timeleft <= 0) {
196 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
197 timeleft == 0 ? "Timeout" : "Signal");
198 spin_lock_irqsave(&xhci->lock, flags);
199 /* The timeout might have raced with the event ring handler, so
200 * only delete from the list if the item isn't poisoned.
202 if (cmd->cmd_list.next != LIST_POISON1)
203 list_del(&cmd->cmd_list);
204 spin_unlock_irqrestore(&xhci->lock, flags);
205 ret = -ETIME;
206 goto command_cleanup;
209 command_cleanup:
210 xhci_free_command(xhci, cmd);
211 return ret;
215 * Ring device, it rings the all doorbells unconditionally.
217 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
219 int i;
221 for (i = 0; i < LAST_EP_INDEX + 1; i++)
222 if (xhci->devs[slot_id]->eps[i].ring &&
223 xhci->devs[slot_id]->eps[i].ring->dequeue)
224 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
226 return;
229 static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
230 u32 __iomem *addr, u32 port_status)
232 /* Write 1 to disable the port */
233 xhci_writel(xhci, port_status | PORT_PE, addr);
234 port_status = xhci_readl(xhci, addr);
235 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
236 wIndex, port_status);
239 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
240 u16 wIndex, u32 __iomem *addr, u32 port_status)
242 char *port_change_bit;
243 u32 status;
245 switch (wValue) {
246 case USB_PORT_FEAT_C_RESET:
247 status = PORT_RC;
248 port_change_bit = "reset";
249 break;
250 case USB_PORT_FEAT_C_CONNECTION:
251 status = PORT_CSC;
252 port_change_bit = "connect";
253 break;
254 case USB_PORT_FEAT_C_OVER_CURRENT:
255 status = PORT_OCC;
256 port_change_bit = "over-current";
257 break;
258 case USB_PORT_FEAT_C_ENABLE:
259 status = PORT_PEC;
260 port_change_bit = "enable/disable";
261 break;
262 case USB_PORT_FEAT_C_SUSPEND:
263 status = PORT_PLC;
264 port_change_bit = "suspend/resume";
265 break;
266 default:
267 /* Should never happen */
268 return;
270 /* Change bits are all write 1 to clear */
271 xhci_writel(xhci, port_status | status, addr);
272 port_status = xhci_readl(xhci, addr);
273 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
274 port_change_bit, wIndex, port_status);
277 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
278 u16 wIndex, char *buf, u16 wLength)
280 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
281 int ports;
282 unsigned long flags;
283 u32 temp, temp1, status;
284 int retval = 0;
285 u32 __iomem *addr;
286 int slot_id;
288 ports = HCS_MAX_PORTS(xhci->hcs_params1);
290 spin_lock_irqsave(&xhci->lock, flags);
291 switch (typeReq) {
292 case GetHubStatus:
293 /* No power source, over-current reported per port */
294 memset(buf, 0, 4);
295 break;
296 case GetHubDescriptor:
297 xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
298 break;
299 case GetPortStatus:
300 if (!wIndex || wIndex > ports)
301 goto error;
302 wIndex--;
303 status = 0;
304 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
305 temp = xhci_readl(xhci, addr);
306 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
308 /* wPortChange bits */
309 if (temp & PORT_CSC)
310 status |= USB_PORT_STAT_C_CONNECTION << 16;
311 if (temp & PORT_PEC)
312 status |= USB_PORT_STAT_C_ENABLE << 16;
313 if ((temp & PORT_OCC))
314 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
316 * FIXME ignoring reset and USB 2.1/3.0 specific
317 * changes
319 if ((temp & PORT_PLS_MASK) == XDEV_U3
320 && (temp & PORT_POWER))
321 status |= 1 << USB_PORT_FEAT_SUSPEND;
322 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
323 if ((temp & PORT_RESET) || !(temp & PORT_PE))
324 goto error;
325 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
326 xhci->resume_done[wIndex])) {
327 xhci_dbg(xhci, "Resume USB2 port %d\n",
328 wIndex + 1);
329 xhci->resume_done[wIndex] = 0;
330 temp1 = xhci_port_state_to_neutral(temp);
331 temp1 &= ~PORT_PLS_MASK;
332 temp1 |= PORT_LINK_STROBE | XDEV_U0;
333 xhci_writel(xhci, temp1, addr);
335 xhci_dbg(xhci, "set port %d resume\n",
336 wIndex + 1);
337 slot_id = xhci_find_slot_id_by_port(xhci,
338 wIndex + 1);
339 if (!slot_id) {
340 xhci_dbg(xhci, "slot_id is zero\n");
341 goto error;
343 xhci_ring_device(xhci, slot_id);
344 xhci->port_c_suspend[wIndex >> 5] |=
345 1 << (wIndex & 31);
346 xhci->suspended_ports[wIndex >> 5] &=
347 ~(1 << (wIndex & 31));
350 if ((temp & PORT_PLS_MASK) == XDEV_U0
351 && (temp & PORT_POWER)
352 && (xhci->suspended_ports[wIndex >> 5] &
353 (1 << (wIndex & 31)))) {
354 xhci->suspended_ports[wIndex >> 5] &=
355 ~(1 << (wIndex & 31));
356 xhci->port_c_suspend[wIndex >> 5] |=
357 1 << (wIndex & 31);
359 if (temp & PORT_CONNECT) {
360 status |= USB_PORT_STAT_CONNECTION;
361 status |= xhci_port_speed(temp);
363 if (temp & PORT_PE)
364 status |= USB_PORT_STAT_ENABLE;
365 if (temp & PORT_OC)
366 status |= USB_PORT_STAT_OVERCURRENT;
367 if (temp & PORT_RESET)
368 status |= USB_PORT_STAT_RESET;
369 if (temp & PORT_POWER)
370 status |= USB_PORT_STAT_POWER;
371 if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
372 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
373 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
374 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
375 break;
376 case SetPortFeature:
377 wIndex &= 0xff;
378 if (!wIndex || wIndex > ports)
379 goto error;
380 wIndex--;
381 addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
382 temp = xhci_readl(xhci, addr);
383 temp = xhci_port_state_to_neutral(temp);
384 switch (wValue) {
385 case USB_PORT_FEAT_SUSPEND:
386 temp = xhci_readl(xhci, addr);
387 /* In spec software should not attempt to suspend
388 * a port unless the port reports that it is in the
389 * enabled (PED = ‘1’,PLS < ‘3’) state.
391 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
392 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
393 xhci_warn(xhci, "USB core suspending device "
394 "not in U0/U1/U2.\n");
395 goto error;
398 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
399 if (!slot_id) {
400 xhci_warn(xhci, "slot_id is zero\n");
401 goto error;
403 /* unlock to execute stop endpoint commands */
404 spin_unlock_irqrestore(&xhci->lock, flags);
405 xhci_stop_device(xhci, slot_id, 1);
406 spin_lock_irqsave(&xhci->lock, flags);
408 temp = xhci_port_state_to_neutral(temp);
409 temp &= ~PORT_PLS_MASK;
410 temp |= PORT_LINK_STROBE | XDEV_U3;
411 xhci_writel(xhci, temp, addr);
413 spin_unlock_irqrestore(&xhci->lock, flags);
414 msleep(10); /* wait device to enter */
415 spin_lock_irqsave(&xhci->lock, flags);
417 temp = xhci_readl(xhci, addr);
418 xhci->suspended_ports[wIndex >> 5] |=
419 1 << (wIndex & (31));
420 break;
421 case USB_PORT_FEAT_POWER:
423 * Turn on ports, even if there isn't per-port switching.
424 * HC will report connect events even before this is set.
425 * However, khubd will ignore the roothub events until
426 * the roothub is registered.
428 xhci_writel(xhci, temp | PORT_POWER, addr);
430 temp = xhci_readl(xhci, addr);
431 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
432 break;
433 case USB_PORT_FEAT_RESET:
434 temp = (temp | PORT_RESET);
435 xhci_writel(xhci, temp, addr);
437 temp = xhci_readl(xhci, addr);
438 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
439 break;
440 default:
441 goto error;
443 temp = xhci_readl(xhci, addr); /* unblock any posted writes */
444 break;
445 case ClearPortFeature:
446 if (!wIndex || wIndex > ports)
447 goto error;
448 wIndex--;
449 addr = &xhci->op_regs->port_status_base +
450 NUM_PORT_REGS*(wIndex & 0xff);
451 temp = xhci_readl(xhci, addr);
452 temp = xhci_port_state_to_neutral(temp);
453 switch (wValue) {
454 case USB_PORT_FEAT_SUSPEND:
455 temp = xhci_readl(xhci, addr);
456 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
457 xhci_dbg(xhci, "PORTSC %04x\n", temp);
458 if (temp & PORT_RESET)
459 goto error;
460 if (temp & XDEV_U3) {
461 if ((temp & PORT_PE) == 0)
462 goto error;
463 if (DEV_SUPERSPEED(temp)) {
464 temp = xhci_port_state_to_neutral(temp);
465 temp &= ~PORT_PLS_MASK;
466 temp |= PORT_LINK_STROBE | XDEV_U0;
467 xhci_writel(xhci, temp, addr);
468 xhci_readl(xhci, addr);
469 } else {
470 temp = xhci_port_state_to_neutral(temp);
471 temp &= ~PORT_PLS_MASK;
472 temp |= PORT_LINK_STROBE | XDEV_RESUME;
473 xhci_writel(xhci, temp, addr);
475 spin_unlock_irqrestore(&xhci->lock,
476 flags);
477 msleep(20);
478 spin_lock_irqsave(&xhci->lock, flags);
480 temp = xhci_readl(xhci, addr);
481 temp = xhci_port_state_to_neutral(temp);
482 temp &= ~PORT_PLS_MASK;
483 temp |= PORT_LINK_STROBE | XDEV_U0;
484 xhci_writel(xhci, temp, addr);
486 xhci->port_c_suspend[wIndex >> 5] |=
487 1 << (wIndex & 31);
490 slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
491 if (!slot_id) {
492 xhci_dbg(xhci, "slot_id is zero\n");
493 goto error;
495 xhci_ring_device(xhci, slot_id);
496 break;
497 case USB_PORT_FEAT_C_SUSPEND:
498 xhci->port_c_suspend[wIndex >> 5] &=
499 ~(1 << (wIndex & 31));
500 case USB_PORT_FEAT_C_RESET:
501 case USB_PORT_FEAT_C_CONNECTION:
502 case USB_PORT_FEAT_C_OVER_CURRENT:
503 case USB_PORT_FEAT_C_ENABLE:
504 xhci_clear_port_change_bit(xhci, wValue, wIndex,
505 addr, temp);
506 break;
507 case USB_PORT_FEAT_ENABLE:
508 xhci_disable_port(xhci, wIndex, addr, temp);
509 break;
510 default:
511 goto error;
513 break;
514 default:
515 error:
516 /* "stall" on error */
517 retval = -EPIPE;
519 spin_unlock_irqrestore(&xhci->lock, flags);
520 return retval;
524 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
525 * Ports are 0-indexed from the HCD point of view,
526 * and 1-indexed from the USB core pointer of view.
528 * Note that the status change bits will be cleared as soon as a port status
529 * change event is generated, so we use the saved status from that event.
531 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
533 unsigned long flags;
534 u32 temp, status;
535 u32 mask;
536 int i, retval;
537 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
538 int ports;
539 u32 __iomem *addr;
541 ports = HCS_MAX_PORTS(xhci->hcs_params1);
543 /* Initial status is no changes */
544 retval = (ports + 8) / 8;
545 memset(buf, 0, retval);
546 status = 0;
548 mask = PORT_CSC | PORT_PEC | PORT_OCC;
550 spin_lock_irqsave(&xhci->lock, flags);
551 /* For each port, did anything change? If so, set that bit in buf. */
552 for (i = 0; i < ports; i++) {
553 addr = &xhci->op_regs->port_status_base +
554 NUM_PORT_REGS*i;
555 temp = xhci_readl(xhci, addr);
556 if ((temp & mask) != 0 ||
557 (xhci->port_c_suspend[i >> 5] & 1 << (i & 31)) ||
558 (xhci->resume_done[i] && time_after_eq(
559 jiffies, xhci->resume_done[i]))) {
560 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
561 status = 1;
564 spin_unlock_irqrestore(&xhci->lock, flags);
565 return status ? retval : 0;
568 #ifdef CONFIG_PM
570 int xhci_bus_suspend(struct usb_hcd *hcd)
572 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
573 int port;
574 unsigned long flags;
576 xhci_dbg(xhci, "suspend root hub\n");
578 spin_lock_irqsave(&xhci->lock, flags);
580 if (hcd->self.root_hub->do_remote_wakeup) {
581 port = HCS_MAX_PORTS(xhci->hcs_params1);
582 while (port--) {
583 if (xhci->resume_done[port] != 0) {
584 spin_unlock_irqrestore(&xhci->lock, flags);
585 xhci_dbg(xhci, "suspend failed because "
586 "port %d is resuming\n",
587 port + 1);
588 return -EBUSY;
593 port = HCS_MAX_PORTS(xhci->hcs_params1);
594 xhci->bus_suspended = 0;
595 while (port--) {
596 /* suspend the port if the port is not suspended */
597 u32 __iomem *addr;
598 u32 t1, t2;
599 int slot_id;
601 addr = &xhci->op_regs->port_status_base +
602 NUM_PORT_REGS * (port & 0xff);
603 t1 = xhci_readl(xhci, addr);
604 t2 = xhci_port_state_to_neutral(t1);
606 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
607 xhci_dbg(xhci, "port %d not suspended\n", port);
608 slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
609 if (slot_id) {
610 spin_unlock_irqrestore(&xhci->lock, flags);
611 xhci_stop_device(xhci, slot_id, 1);
612 spin_lock_irqsave(&xhci->lock, flags);
614 t2 &= ~PORT_PLS_MASK;
615 t2 |= PORT_LINK_STROBE | XDEV_U3;
616 set_bit(port, &xhci->bus_suspended);
618 if (hcd->self.root_hub->do_remote_wakeup) {
619 if (t1 & PORT_CONNECT) {
620 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
621 t2 &= ~PORT_WKCONN_E;
622 } else {
623 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
624 t2 &= ~PORT_WKDISC_E;
626 } else
627 t2 &= ~PORT_WAKE_BITS;
629 t1 = xhci_port_state_to_neutral(t1);
630 if (t1 != t2)
631 xhci_writel(xhci, t2, addr);
633 if (DEV_HIGHSPEED(t1)) {
634 /* enable remote wake up for USB 2.0 */
635 u32 __iomem *addr;
636 u32 tmp;
638 addr = &xhci->op_regs->port_power_base +
639 NUM_PORT_REGS * (port & 0xff);
640 tmp = xhci_readl(xhci, addr);
641 tmp |= PORT_RWE;
642 xhci_writel(xhci, tmp, addr);
645 hcd->state = HC_STATE_SUSPENDED;
646 xhci->next_statechange = jiffies + msecs_to_jiffies(10);
647 spin_unlock_irqrestore(&xhci->lock, flags);
648 return 0;
651 int xhci_bus_resume(struct usb_hcd *hcd)
653 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
654 int port;
655 u32 temp;
656 unsigned long flags;
658 xhci_dbg(xhci, "resume root hub\n");
660 if (time_before(jiffies, xhci->next_statechange))
661 msleep(5);
663 spin_lock_irqsave(&xhci->lock, flags);
664 if (!HCD_HW_ACCESSIBLE(hcd)) {
665 spin_unlock_irqrestore(&xhci->lock, flags);
666 return -ESHUTDOWN;
669 /* delay the irqs */
670 temp = xhci_readl(xhci, &xhci->op_regs->command);
671 temp &= ~CMD_EIE;
672 xhci_writel(xhci, temp, &xhci->op_regs->command);
674 port = HCS_MAX_PORTS(xhci->hcs_params1);
675 while (port--) {
676 /* Check whether need resume ports. If needed
677 resume port and disable remote wakeup */
678 u32 __iomem *addr;
679 u32 temp;
680 int slot_id;
682 addr = &xhci->op_regs->port_status_base +
683 NUM_PORT_REGS * (port & 0xff);
684 temp = xhci_readl(xhci, addr);
685 if (DEV_SUPERSPEED(temp))
686 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
687 else
688 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
689 if (test_bit(port, &xhci->bus_suspended) &&
690 (temp & PORT_PLS_MASK)) {
691 if (DEV_SUPERSPEED(temp)) {
692 temp = xhci_port_state_to_neutral(temp);
693 temp &= ~PORT_PLS_MASK;
694 temp |= PORT_LINK_STROBE | XDEV_U0;
695 xhci_writel(xhci, temp, addr);
696 } else {
697 temp = xhci_port_state_to_neutral(temp);
698 temp &= ~PORT_PLS_MASK;
699 temp |= PORT_LINK_STROBE | XDEV_RESUME;
700 xhci_writel(xhci, temp, addr);
702 spin_unlock_irqrestore(&xhci->lock, flags);
703 msleep(20);
704 spin_lock_irqsave(&xhci->lock, flags);
706 temp = xhci_readl(xhci, addr);
707 temp = xhci_port_state_to_neutral(temp);
708 temp &= ~PORT_PLS_MASK;
709 temp |= PORT_LINK_STROBE | XDEV_U0;
710 xhci_writel(xhci, temp, addr);
712 slot_id = xhci_find_slot_id_by_port(xhci, port + 1);
713 if (slot_id)
714 xhci_ring_device(xhci, slot_id);
715 } else
716 xhci_writel(xhci, temp, addr);
718 if (DEV_HIGHSPEED(temp)) {
719 /* disable remote wake up for USB 2.0 */
720 u32 __iomem *addr;
721 u32 tmp;
723 addr = &xhci->op_regs->port_power_base +
724 NUM_PORT_REGS * (port & 0xff);
725 tmp = xhci_readl(xhci, addr);
726 tmp &= ~PORT_RWE;
727 xhci_writel(xhci, tmp, addr);
731 (void) xhci_readl(xhci, &xhci->op_regs->command);
733 xhci->next_statechange = jiffies + msecs_to_jiffies(5);
734 hcd->state = HC_STATE_RUNNING;
735 /* re-enable irqs */
736 temp = xhci_readl(xhci, &xhci->op_regs->command);
737 temp |= CMD_EIE;
738 xhci_writel(xhci, temp, &xhci->op_regs->command);
739 temp = xhci_readl(xhci, &xhci->op_regs->command);
741 spin_unlock_irqrestore(&xhci->lock, flags);
742 return 0;
745 #else
747 #define xhci_bus_suspend NULL
748 #define xhci_bus_resume NULL
750 #endif