2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
45 #include <asm/uaccess.h>
48 #include <asm/system.h>
51 #include "pci-quirks.h"
56 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
57 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
59 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
61 /* for flakey hardware, ignore overcurrent indicators */
63 module_param(ignore_oc
, bool, S_IRUGO
);
64 MODULE_PARM_DESC(ignore_oc
, "ignore hardware overcurrent indications");
67 * debug = 0, no debugging messages
68 * debug = 1, dump failed URBs except for stalls
69 * debug = 2, dump all failed URBs (including stalls)
70 * show all queues in /sys/kernel/debug/uhci/[pci_addr]
71 * debug = 3, show all TDs in URBs when dumping
74 #define DEBUG_CONFIGURED 1
76 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
77 MODULE_PARM_DESC(debug
, "Debug level");
80 #define DEBUG_CONFIGURED 0
85 #define ERRBUF_LEN (32 * 1024)
87 static struct kmem_cache
*uhci_up_cachep
; /* urb_priv */
89 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
);
90 static void wakeup_rh(struct uhci_hcd
*uhci
);
91 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
);
94 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
96 static __le32
uhci_frame_skel_link(struct uhci_hcd
*uhci
, int frame
)
101 * The interrupt queues will be interleaved as evenly as possible.
102 * There's not much to be done about period-1 interrupts; they have
103 * to occur in every frame. But we can schedule period-2 interrupts
104 * in odd-numbered frames, period-4 interrupts in frames congruent
105 * to 2 (mod 4), and so on. This way each frame only has two
106 * interrupt QHs, which will help spread out bandwidth utilization.
108 * ffs (Find First bit Set) does exactly what we need:
109 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
110 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
111 * ffs >= 7 => not on any high-period queue, so use
112 * period-1 QH = skelqh[9].
113 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
115 skelnum
= 8 - (int) __ffs(frame
| UHCI_NUMFRAMES
);
118 return LINK_TO_QH(uhci
->skelqh
[skelnum
]);
121 #include "uhci-debug.c"
123 #include "uhci-hub.c"
126 * Finish up a host controller reset and update the recorded state.
128 static void finish_reset(struct uhci_hcd
*uhci
)
132 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
133 * bits in the port status and control registers.
134 * We have to clear them by hand.
136 for (port
= 0; port
< uhci
->rh_numports
; ++port
)
137 outw(0, uhci
->io_addr
+ USBPORTSC1
+ (port
* 2));
139 uhci
->port_c_suspend
= uhci
->resuming_ports
= 0;
140 uhci
->rh_state
= UHCI_RH_RESET
;
141 uhci
->is_stopped
= UHCI_IS_STOPPED
;
142 uhci_to_hcd(uhci
)->state
= HC_STATE_HALT
;
143 clear_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
145 uhci
->dead
= 0; /* Full reset resurrects the controller */
149 * Last rites for a defunct/nonfunctional controller
150 * or one we don't want to use any more.
152 static void uhci_hc_died(struct uhci_hcd
*uhci
)
154 uhci_get_current_frame_number(uhci
);
155 uhci_reset_hc(to_pci_dev(uhci_dev(uhci
)), uhci
->io_addr
);
159 /* The current frame may already be partway finished */
160 ++uhci
->frame_number
;
164 * Initialize a controller that was newly discovered or has lost power
165 * or otherwise been reset while it was suspended. In none of these cases
166 * can we be sure of its previous state.
168 static void check_and_reset_hc(struct uhci_hcd
*uhci
)
170 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci
)), uhci
->io_addr
))
175 * Store the basic register settings needed by the controller.
177 static void configure_hc(struct uhci_hcd
*uhci
)
179 struct pci_dev
*pdev
= to_pci_dev(uhci_dev(uhci
));
181 /* Set the frame length to the default: 1 ms exactly */
182 outb(USBSOF_DEFAULT
, uhci
->io_addr
+ USBSOF
);
184 /* Store the frame list base address */
185 outl(uhci
->frame_dma_handle
, uhci
->io_addr
+ USBFLBASEADD
);
187 /* Set the current frame number */
188 outw(uhci
->frame_number
& UHCI_MAX_SOF_NUMBER
,
189 uhci
->io_addr
+ USBFRNUM
);
191 /* Mark controller as not halted before we enable interrupts */
192 uhci_to_hcd(uhci
)->state
= HC_STATE_SUSPENDED
;
196 pci_write_config_word(pdev
, USBLEGSUP
, USBLEGSUP_DEFAULT
);
198 /* Disable platform-specific non-PME# wakeup */
199 if (pdev
->vendor
== PCI_VENDOR_ID_INTEL
)
200 pci_write_config_byte(pdev
, USBRES_INTEL
, 0);
204 static int resume_detect_interrupts_are_broken(struct uhci_hcd
*uhci
)
208 /* If we have to ignore overcurrent events then almost by definition
209 * we can't depend on resume-detect interrupts. */
213 switch (to_pci_dev(uhci_dev(uhci
))->vendor
) {
217 case PCI_VENDOR_ID_GENESYS
:
218 /* Genesys Logic's GL880S controllers don't generate
219 * resume-detect interrupts.
223 case PCI_VENDOR_ID_INTEL
:
224 /* Some of Intel's USB controllers have a bug that causes
225 * resume-detect interrupts if any port has an over-current
226 * condition. To make matters worse, some motherboards
227 * hardwire unused USB ports' over-current inputs active!
228 * To prevent problems, we will not enable resume-detect
229 * interrupts if any ports are OC.
231 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
232 if (inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) &
241 static int global_suspend_mode_is_broken(struct uhci_hcd
*uhci
)
244 const char *sys_info
;
245 static char bad_Asus_board
[] = "A7V8X";
247 /* One of Asus's motherboards has a bug which causes it to
248 * wake up immediately from suspend-to-RAM if any of the ports
249 * are connected. In such cases we will not set EGSM.
251 sys_info
= dmi_get_system_info(DMI_BOARD_NAME
);
252 if (sys_info
&& !strcmp(sys_info
, bad_Asus_board
)) {
253 for (port
= 0; port
< uhci
->rh_numports
; ++port
) {
254 if (inw(uhci
->io_addr
+ USBPORTSC1
+ port
* 2) &
263 static void suspend_rh(struct uhci_hcd
*uhci
, enum uhci_rh_state new_state
)
264 __releases(uhci
->lock
)
265 __acquires(uhci
->lock
)
268 int int_enable
, egsm_enable
, wakeup_enable
;
269 struct usb_device
*rhdev
= uhci_to_hcd(uhci
)->self
.root_hub
;
271 auto_stop
= (new_state
== UHCI_RH_AUTO_STOPPED
);
272 dev_dbg(&rhdev
->dev
, "%s%s\n", __func__
,
273 (auto_stop
? " (auto-stop)" : ""));
275 /* Start off by assuming Resume-Detect interrupts and EGSM work
276 * and that remote wakeups should be enabled.
278 egsm_enable
= USBCMD_EGSM
;
280 int_enable
= USBINTR_RESUME
;
283 /* In auto-stop mode wakeups must always be detected, but
284 * Resume-Detect interrupts may be prohibited. (In the absence
285 * of CONFIG_PM, they are always disallowed.)
288 if (!device_may_wakeup(&rhdev
->dev
))
291 /* In bus-suspend mode wakeups may be disabled, but if they are
292 * allowed then so are Resume-Detect interrupts.
296 if (!rhdev
->do_remote_wakeup
)
301 /* EGSM causes the root hub to echo a 'K' signal (resume) out any
302 * port which requests a remote wakeup. According to the USB spec,
303 * every hub is supposed to do this. But if we are ignoring
304 * remote-wakeup requests anyway then there's no point to it.
305 * We also shouldn't enable EGSM if it's broken.
307 if (!wakeup_enable
|| global_suspend_mode_is_broken(uhci
))
310 /* If we're ignoring wakeup events then there's no reason to
311 * enable Resume-Detect interrupts. We also shouldn't enable
312 * them if they are broken or disallowed.
314 * This logic may lead us to enabling RD but not EGSM. The UHCI
315 * spec foolishly says that RD works only when EGSM is on, but
316 * there's no harm in enabling it anyway -- perhaps some chips
319 if (!wakeup_enable
|| resume_detect_interrupts_are_broken(uhci
) ||
321 uhci
->RD_enable
= int_enable
= 0;
323 outw(int_enable
, uhci
->io_addr
+ USBINTR
);
324 outw(egsm_enable
| USBCMD_CF
, uhci
->io_addr
+ USBCMD
);
328 /* If we're auto-stopping then no devices have been attached
329 * for a while, so there shouldn't be any active URBs and the
330 * controller should stop after a few microseconds. Otherwise
331 * we will give the controller one frame to stop.
333 if (!auto_stop
&& !(inw(uhci
->io_addr
+ USBSTS
) & USBSTS_HCH
)) {
334 uhci
->rh_state
= UHCI_RH_SUSPENDING
;
335 spin_unlock_irq(&uhci
->lock
);
337 spin_lock_irq(&uhci
->lock
);
341 if (!(inw(uhci
->io_addr
+ USBSTS
) & USBSTS_HCH
))
342 dev_warn(uhci_dev(uhci
), "Controller not stopped yet!\n");
344 uhci_get_current_frame_number(uhci
);
346 uhci
->rh_state
= new_state
;
347 uhci
->is_stopped
= UHCI_IS_STOPPED
;
349 /* If interrupts don't work and remote wakeup is enabled then
350 * the suspended root hub needs to be polled.
352 if (!int_enable
&& wakeup_enable
)
353 set_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
355 clear_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
357 uhci_scan_schedule(uhci
);
361 static void start_rh(struct uhci_hcd
*uhci
)
363 uhci_to_hcd(uhci
)->state
= HC_STATE_RUNNING
;
364 uhci
->is_stopped
= 0;
366 /* Mark it configured and running with a 64-byte max packet.
367 * All interrupts are enabled, even though RESUME won't do anything.
369 outw(USBCMD_RS
| USBCMD_CF
| USBCMD_MAXP
, uhci
->io_addr
+ USBCMD
);
370 outw(USBINTR_TIMEOUT
| USBINTR_RESUME
| USBINTR_IOC
| USBINTR_SP
,
371 uhci
->io_addr
+ USBINTR
);
373 uhci
->rh_state
= UHCI_RH_RUNNING
;
374 set_bit(HCD_FLAG_POLL_RH
, &uhci_to_hcd(uhci
)->flags
);
377 static void wakeup_rh(struct uhci_hcd
*uhci
)
378 __releases(uhci
->lock
)
379 __acquires(uhci
->lock
)
381 dev_dbg(&uhci_to_hcd(uhci
)->self
.root_hub
->dev
,
383 uhci
->rh_state
== UHCI_RH_AUTO_STOPPED
?
384 " (auto-start)" : "");
386 /* If we are auto-stopped then no devices are attached so there's
387 * no need for wakeup signals. Otherwise we send Global Resume
390 if (uhci
->rh_state
== UHCI_RH_SUSPENDED
) {
393 /* Keep EGSM on if it was set before */
394 egsm
= inw(uhci
->io_addr
+ USBCMD
) & USBCMD_EGSM
;
395 uhci
->rh_state
= UHCI_RH_RESUMING
;
396 outw(USBCMD_FGR
| USBCMD_CF
| egsm
, uhci
->io_addr
+ USBCMD
);
397 spin_unlock_irq(&uhci
->lock
);
399 spin_lock_irq(&uhci
->lock
);
403 /* End Global Resume and wait for EOP to be sent */
404 outw(USBCMD_CF
, uhci
->io_addr
+ USBCMD
);
407 if (inw(uhci
->io_addr
+ USBCMD
) & USBCMD_FGR
)
408 dev_warn(uhci_dev(uhci
), "FGR not stopped yet!\n");
413 /* Restart root hub polling */
414 mod_timer(&uhci_to_hcd(uhci
)->rh_timer
, jiffies
);
417 static irqreturn_t
uhci_irq(struct usb_hcd
*hcd
)
419 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
420 unsigned short status
;
423 * Read the interrupt status, and write it back to clear the
424 * interrupt cause. Contrary to the UHCI specification, the
425 * "HC Halted" status bit is persistent: it is RO, not R/WC.
427 status
= inw(uhci
->io_addr
+ USBSTS
);
428 if (!(status
& ~USBSTS_HCH
)) /* shared interrupt, not mine */
430 outw(status
, uhci
->io_addr
+ USBSTS
); /* Clear it */
432 if (status
& ~(USBSTS_USBINT
| USBSTS_ERROR
| USBSTS_RD
)) {
433 if (status
& USBSTS_HSE
)
434 dev_err(uhci_dev(uhci
), "host system error, "
436 if (status
& USBSTS_HCPE
)
437 dev_err(uhci_dev(uhci
), "host controller process "
438 "error, something bad happened!\n");
439 if (status
& USBSTS_HCH
) {
440 spin_lock(&uhci
->lock
);
441 if (uhci
->rh_state
>= UHCI_RH_RUNNING
) {
442 dev_err(uhci_dev(uhci
),
443 "host controller halted, "
445 if (debug
> 1 && errbuf
) {
446 /* Print the schedule for debugging */
447 uhci_sprint_schedule(uhci
,
453 /* Force a callback in case there are
455 mod_timer(&hcd
->rh_timer
, jiffies
);
457 spin_unlock(&uhci
->lock
);
461 if (status
& USBSTS_RD
)
462 usb_hcd_poll_rh_status(hcd
);
464 spin_lock(&uhci
->lock
);
465 uhci_scan_schedule(uhci
);
466 spin_unlock(&uhci
->lock
);
473 * Store the current frame number in uhci->frame_number if the controller
474 * is runnning. Expand from 11 bits (of which we use only 10) to a
475 * full-sized integer.
477 * Like many other parts of the driver, this code relies on being polled
478 * more than once per second as long as the controller is running.
480 static void uhci_get_current_frame_number(struct uhci_hcd
*uhci
)
482 if (!uhci
->is_stopped
) {
485 delta
= (inw(uhci
->io_addr
+ USBFRNUM
) - uhci
->frame_number
) &
486 (UHCI_NUMFRAMES
- 1);
487 uhci
->frame_number
+= delta
;
492 * De-allocate all resources
494 static void release_uhci(struct uhci_hcd
*uhci
)
498 if (DEBUG_CONFIGURED
) {
499 spin_lock_irq(&uhci
->lock
);
500 uhci
->is_initialized
= 0;
501 spin_unlock_irq(&uhci
->lock
);
503 debugfs_remove(uhci
->dentry
);
506 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++)
507 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
509 uhci_free_td(uhci
, uhci
->term_td
);
511 dma_pool_destroy(uhci
->qh_pool
);
513 dma_pool_destroy(uhci
->td_pool
);
515 kfree(uhci
->frame_cpu
);
517 dma_free_coherent(uhci_dev(uhci
),
518 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
519 uhci
->frame
, uhci
->frame_dma_handle
);
522 static int uhci_init(struct usb_hcd
*hcd
)
524 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
525 unsigned io_size
= (unsigned) hcd
->rsrc_len
;
528 uhci
->io_addr
= (unsigned long) hcd
->rsrc_start
;
530 /* The UHCI spec says devices must have 2 ports, and goes on to say
531 * they may have more but gives no way to determine how many there
532 * are. However according to the UHCI spec, Bit 7 of the port
533 * status and control register is always set to 1. So we try to
534 * use this to our advantage. Another common failure mode when
535 * a nonexistent register is addressed is to return all ones, so
536 * we test for that also.
538 for (port
= 0; port
< (io_size
- USBPORTSC1
) / 2; port
++) {
539 unsigned int portstatus
;
541 portstatus
= inw(uhci
->io_addr
+ USBPORTSC1
+ (port
* 2));
542 if (!(portstatus
& 0x0080) || portstatus
== 0xffff)
546 dev_info(uhci_dev(uhci
), "detected %d ports\n", port
);
548 /* Anything greater than 7 is weird so we'll ignore it. */
549 if (port
> UHCI_RH_MAXCHILD
) {
550 dev_info(uhci_dev(uhci
), "port count misdetected? "
551 "forcing to 2 ports\n");
554 uhci
->rh_numports
= port
;
556 /* Kick BIOS off this hardware and reset if the controller
557 * isn't already safely quiescent.
559 check_and_reset_hc(uhci
);
563 /* Make sure the controller is quiescent and that we're not using it
564 * any more. This is mainly for the benefit of programs which, like kexec,
565 * expect the hardware to be idle: not doing DMA or generating IRQs.
567 * This routine may be called in a damaged or failing kernel. Hence we
568 * do not acquire the spinlock before shutting down the controller.
570 static void uhci_shutdown(struct pci_dev
*pdev
)
572 struct usb_hcd
*hcd
= (struct usb_hcd
*) pci_get_drvdata(pdev
);
574 uhci_hc_died(hcd_to_uhci(hcd
));
578 * Allocate a frame list, and then setup the skeleton
580 * The hardware doesn't really know any difference
581 * in the queues, but the order does matter for the
582 * protocols higher up. The order in which the queues
583 * are encountered by the hardware is:
585 * - All isochronous events are handled before any
586 * of the queues. We don't do that here, because
587 * we'll create the actual TD entries on demand.
588 * - The first queue is the high-period interrupt queue.
589 * - The second queue is the period-1 interrupt and async
590 * (low-speed control, full-speed control, then bulk) queue.
591 * - The third queue is the terminating bandwidth reclamation queue,
592 * which contains no members, loops back to itself, and is present
593 * only when FSBR is on and there are no full-speed control or bulk QHs.
595 static int uhci_start(struct usb_hcd
*hcd
)
597 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
600 struct dentry __maybe_unused
*dentry
;
602 hcd
->uses_new_polling
= 1;
604 spin_lock_init(&uhci
->lock
);
605 setup_timer(&uhci
->fsbr_timer
, uhci_fsbr_timeout
,
606 (unsigned long) uhci
);
607 INIT_LIST_HEAD(&uhci
->idle_qh_list
);
608 init_waitqueue_head(&uhci
->waitqh
);
610 #ifdef UHCI_DEBUG_OPS
611 dentry
= debugfs_create_file(hcd
->self
.bus_name
,
612 S_IFREG
|S_IRUGO
|S_IWUSR
, uhci_debugfs_root
,
613 uhci
, &uhci_debug_operations
);
615 dev_err(uhci_dev(uhci
), "couldn't create uhci debugfs entry\n");
618 uhci
->dentry
= dentry
;
621 uhci
->frame
= dma_alloc_coherent(uhci_dev(uhci
),
622 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
623 &uhci
->frame_dma_handle
, 0);
625 dev_err(uhci_dev(uhci
), "unable to allocate "
626 "consistent memory for frame list\n");
627 goto err_alloc_frame
;
629 memset(uhci
->frame
, 0, UHCI_NUMFRAMES
* sizeof(*uhci
->frame
));
631 uhci
->frame_cpu
= kcalloc(UHCI_NUMFRAMES
, sizeof(*uhci
->frame_cpu
),
633 if (!uhci
->frame_cpu
) {
634 dev_err(uhci_dev(uhci
), "unable to allocate "
635 "memory for frame pointers\n");
636 goto err_alloc_frame_cpu
;
639 uhci
->td_pool
= dma_pool_create("uhci_td", uhci_dev(uhci
),
640 sizeof(struct uhci_td
), 16, 0);
641 if (!uhci
->td_pool
) {
642 dev_err(uhci_dev(uhci
), "unable to create td dma_pool\n");
643 goto err_create_td_pool
;
646 uhci
->qh_pool
= dma_pool_create("uhci_qh", uhci_dev(uhci
),
647 sizeof(struct uhci_qh
), 16, 0);
648 if (!uhci
->qh_pool
) {
649 dev_err(uhci_dev(uhci
), "unable to create qh dma_pool\n");
650 goto err_create_qh_pool
;
653 uhci
->term_td
= uhci_alloc_td(uhci
);
654 if (!uhci
->term_td
) {
655 dev_err(uhci_dev(uhci
), "unable to allocate terminating TD\n");
656 goto err_alloc_term_td
;
659 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
660 uhci
->skelqh
[i
] = uhci_alloc_qh(uhci
, NULL
, NULL
);
661 if (!uhci
->skelqh
[i
]) {
662 dev_err(uhci_dev(uhci
), "unable to allocate QH\n");
663 goto err_alloc_skelqh
;
668 * 8 Interrupt queues; link all higher int queues to int1 = async
670 for (i
= SKEL_ISO
+ 1; i
< SKEL_ASYNC
; ++i
)
671 uhci
->skelqh
[i
]->link
= LINK_TO_QH(uhci
->skel_async_qh
);
672 uhci
->skel_async_qh
->link
= UHCI_PTR_TERM
;
673 uhci
->skel_term_qh
->link
= LINK_TO_QH(uhci
->skel_term_qh
);
675 /* This dummy TD is to work around a bug in Intel PIIX controllers */
676 uhci_fill_td(uhci
->term_td
, 0, uhci_explen(0) |
677 (0x7f << TD_TOKEN_DEVADDR_SHIFT
) | USB_PID_IN
, 0);
678 uhci
->term_td
->link
= UHCI_PTR_TERM
;
679 uhci
->skel_async_qh
->element
= uhci
->skel_term_qh
->element
=
680 LINK_TO_TD(uhci
->term_td
);
683 * Fill the frame list: make all entries point to the proper
686 for (i
= 0; i
< UHCI_NUMFRAMES
; i
++) {
688 /* Only place we don't use the frame list routines */
689 uhci
->frame
[i
] = uhci_frame_skel_link(uhci
, i
);
693 * Some architectures require a full mb() to enforce completion of
694 * the memory writes above before the I/O transfers in configure_hc().
699 uhci
->is_initialized
= 1;
700 spin_lock_irq(&uhci
->lock
);
702 spin_unlock_irq(&uhci
->lock
);
709 for (i
= 0; i
< UHCI_NUM_SKELQH
; i
++) {
711 uhci_free_qh(uhci
, uhci
->skelqh
[i
]);
714 uhci_free_td(uhci
, uhci
->term_td
);
717 dma_pool_destroy(uhci
->qh_pool
);
720 dma_pool_destroy(uhci
->td_pool
);
723 kfree(uhci
->frame_cpu
);
726 dma_free_coherent(uhci_dev(uhci
),
727 UHCI_NUMFRAMES
* sizeof(*uhci
->frame
),
728 uhci
->frame
, uhci
->frame_dma_handle
);
731 debugfs_remove(uhci
->dentry
);
736 static void uhci_stop(struct usb_hcd
*hcd
)
738 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
740 spin_lock_irq(&uhci
->lock
);
741 if (HCD_HW_ACCESSIBLE(hcd
) && !uhci
->dead
)
743 uhci_scan_schedule(uhci
);
744 spin_unlock_irq(&uhci
->lock
);
745 synchronize_irq(hcd
->irq
);
747 del_timer_sync(&uhci
->fsbr_timer
);
752 static int uhci_rh_suspend(struct usb_hcd
*hcd
)
754 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
757 spin_lock_irq(&uhci
->lock
);
758 if (!HCD_HW_ACCESSIBLE(hcd
))
761 ; /* Dead controllers tell no tales */
763 /* Once the controller is stopped, port resumes that are already
764 * in progress won't complete. Hence if remote wakeup is enabled
765 * for the root hub and any ports are in the middle of a resume or
766 * remote wakeup, we must fail the suspend.
768 else if (hcd
->self
.root_hub
->do_remote_wakeup
&&
769 uhci
->resuming_ports
) {
770 dev_dbg(uhci_dev(uhci
), "suspend failed because a port "
774 suspend_rh(uhci
, UHCI_RH_SUSPENDED
);
775 spin_unlock_irq(&uhci
->lock
);
779 static int uhci_rh_resume(struct usb_hcd
*hcd
)
781 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
784 spin_lock_irq(&uhci
->lock
);
785 if (!HCD_HW_ACCESSIBLE(hcd
))
787 else if (!uhci
->dead
)
789 spin_unlock_irq(&uhci
->lock
);
793 static int uhci_pci_suspend(struct usb_hcd
*hcd
, bool do_wakeup
)
795 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
796 struct pci_dev
*pdev
= to_pci_dev(uhci_dev(uhci
));
799 dev_dbg(uhci_dev(uhci
), "%s\n", __func__
);
801 spin_lock_irq(&uhci
->lock
);
802 if (!HCD_HW_ACCESSIBLE(hcd
) || uhci
->dead
)
803 goto done_okay
; /* Already suspended or dead */
805 if (uhci
->rh_state
> UHCI_RH_SUSPENDED
) {
806 dev_warn(uhci_dev(uhci
), "Root hub isn't suspended!\n");
811 /* All PCI host controllers are required to disable IRQ generation
812 * at the source, so we must turn off PIRQ.
814 pci_write_config_word(pdev
, USBLEGSUP
, 0);
815 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
817 /* Enable platform-specific non-PME# wakeup */
819 if (pdev
->vendor
== PCI_VENDOR_ID_INTEL
)
820 pci_write_config_byte(pdev
, USBRES_INTEL
,
821 USBPORT1EN
| USBPORT2EN
);
825 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
827 spin_unlock_irq(&uhci
->lock
);
831 static int uhci_pci_resume(struct usb_hcd
*hcd
, bool hibernated
)
833 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
835 dev_dbg(uhci_dev(uhci
), "%s\n", __func__
);
837 /* Since we aren't in D3 any more, it's safe to set this flag
838 * even if the controller was dead.
840 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
842 spin_lock_irq(&uhci
->lock
);
844 /* Make sure resume from hibernation re-enumerates everything */
848 /* The firmware or a boot kernel may have changed the controller
849 * settings during a system wakeup. Check it and reconfigure
852 check_and_reset_hc(uhci
);
854 /* If the controller was dead before, it's back alive now */
857 /* Tell the core if the controller had to be reset */
858 if (uhci
->rh_state
== UHCI_RH_RESET
)
859 usb_root_hub_lost_power(hcd
->self
.root_hub
);
861 spin_unlock_irq(&uhci
->lock
);
863 /* If interrupts don't work and remote wakeup is enabled then
864 * the suspended root hub needs to be polled.
866 if (!uhci
->RD_enable
&& hcd
->self
.root_hub
->do_remote_wakeup
)
867 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
869 /* Does the root hub have a port wakeup pending? */
870 usb_hcd_poll_rh_status(hcd
);
875 /* Wait until a particular device/endpoint's QH is idle, and free it */
876 static void uhci_hcd_endpoint_disable(struct usb_hcd
*hcd
,
877 struct usb_host_endpoint
*hep
)
879 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
882 spin_lock_irq(&uhci
->lock
);
883 qh
= (struct uhci_qh
*) hep
->hcpriv
;
887 while (qh
->state
!= QH_STATE_IDLE
) {
889 spin_unlock_irq(&uhci
->lock
);
890 wait_event_interruptible(uhci
->waitqh
,
891 qh
->state
== QH_STATE_IDLE
);
892 spin_lock_irq(&uhci
->lock
);
896 uhci_free_qh(uhci
, qh
);
898 spin_unlock_irq(&uhci
->lock
);
901 static int uhci_hcd_get_frame_number(struct usb_hcd
*hcd
)
903 struct uhci_hcd
*uhci
= hcd_to_uhci(hcd
);
904 unsigned frame_number
;
907 /* Minimize latency by avoiding the spinlock */
908 frame_number
= uhci
->frame_number
;
910 delta
= (inw(uhci
->io_addr
+ USBFRNUM
) - frame_number
) &
911 (UHCI_NUMFRAMES
- 1);
912 return frame_number
+ delta
;
915 static const char hcd_name
[] = "uhci_hcd";
917 static const struct hc_driver uhci_driver
= {
918 .description
= hcd_name
,
919 .product_desc
= "UHCI Host Controller",
920 .hcd_priv_size
= sizeof(struct uhci_hcd
),
922 /* Generic hardware linkage */
926 /* Basic lifecycle operations */
930 .pci_suspend
= uhci_pci_suspend
,
931 .pci_resume
= uhci_pci_resume
,
932 .bus_suspend
= uhci_rh_suspend
,
933 .bus_resume
= uhci_rh_resume
,
937 .urb_enqueue
= uhci_urb_enqueue
,
938 .urb_dequeue
= uhci_urb_dequeue
,
940 .endpoint_disable
= uhci_hcd_endpoint_disable
,
941 .get_frame_number
= uhci_hcd_get_frame_number
,
943 .hub_status_data
= uhci_hub_status_data
,
944 .hub_control
= uhci_hub_control
,
947 static const struct pci_device_id uhci_pci_ids
[] = { {
948 /* handle any USB UHCI controller */
949 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI
, ~0),
950 .driver_data
= (unsigned long) &uhci_driver
,
951 }, { /* end: all zeroes */ }
954 MODULE_DEVICE_TABLE(pci
, uhci_pci_ids
);
956 static struct pci_driver uhci_pci_driver
= {
957 .name
= (char *)hcd_name
,
958 .id_table
= uhci_pci_ids
,
960 .probe
= usb_hcd_pci_probe
,
961 .remove
= usb_hcd_pci_remove
,
962 .shutdown
= uhci_shutdown
,
964 #ifdef CONFIG_PM_SLEEP
966 .pm
= &usb_hcd_pci_pm_ops
971 static int __init
uhci_hcd_init(void)
973 int retval
= -ENOMEM
;
978 printk(KERN_INFO
"uhci_hcd: " DRIVER_DESC
"%s\n",
979 ignore_oc
? ", overcurrent ignored" : "");
980 set_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
);
982 if (DEBUG_CONFIGURED
) {
983 errbuf
= kmalloc(ERRBUF_LEN
, GFP_KERNEL
);
986 uhci_debugfs_root
= debugfs_create_dir("uhci", usb_debug_root
);
987 if (!uhci_debugfs_root
)
991 uhci_up_cachep
= kmem_cache_create("uhci_urb_priv",
992 sizeof(struct urb_priv
), 0, 0, NULL
);
996 retval
= pci_register_driver(&uhci_pci_driver
);
1003 kmem_cache_destroy(uhci_up_cachep
);
1006 debugfs_remove(uhci_debugfs_root
);
1013 clear_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
);
1017 static void __exit
uhci_hcd_cleanup(void)
1019 pci_unregister_driver(&uhci_pci_driver
);
1020 kmem_cache_destroy(uhci_up_cachep
);
1021 debugfs_remove(uhci_debugfs_root
);
1023 clear_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
);
1026 module_init(uhci_hcd_init
);
1027 module_exit(uhci_hcd_cleanup
);
1029 MODULE_AUTHOR(DRIVER_AUTHOR
);
1030 MODULE_DESCRIPTION(DRIVER_DESC
);
1031 MODULE_LICENSE("GPL");