1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
29 #include "workarounds.h"
31 /**************************************************************************
35 **************************************************************************
38 /* Loopback mode names (see LOOPBACK_MODE()) */
39 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
40 const char *efx_loopback_mode_names
[] = {
41 [LOOPBACK_NONE
] = "NONE",
42 [LOOPBACK_DATA
] = "DATAPATH",
43 [LOOPBACK_GMAC
] = "GMAC",
44 [LOOPBACK_XGMII
] = "XGMII",
45 [LOOPBACK_XGXS
] = "XGXS",
46 [LOOPBACK_XAUI
] = "XAUI",
47 [LOOPBACK_GMII
] = "GMII",
48 [LOOPBACK_SGMII
] = "SGMII",
49 [LOOPBACK_XGBR
] = "XGBR",
50 [LOOPBACK_XFI
] = "XFI",
51 [LOOPBACK_XAUI_FAR
] = "XAUI_FAR",
52 [LOOPBACK_GMII_FAR
] = "GMII_FAR",
53 [LOOPBACK_SGMII_FAR
] = "SGMII_FAR",
54 [LOOPBACK_XFI_FAR
] = "XFI_FAR",
55 [LOOPBACK_GPHY
] = "GPHY",
56 [LOOPBACK_PHYXS
] = "PHYXS",
57 [LOOPBACK_PCS
] = "PCS",
58 [LOOPBACK_PMAPMD
] = "PMA/PMD",
59 [LOOPBACK_XPORT
] = "XPORT",
60 [LOOPBACK_XGMII_WS
] = "XGMII_WS",
61 [LOOPBACK_XAUI_WS
] = "XAUI_WS",
62 [LOOPBACK_XAUI_WS_FAR
] = "XAUI_WS_FAR",
63 [LOOPBACK_XAUI_WS_NEAR
] = "XAUI_WS_NEAR",
64 [LOOPBACK_GMII_WS
] = "GMII_WS",
65 [LOOPBACK_XFI_WS
] = "XFI_WS",
66 [LOOPBACK_XFI_WS_FAR
] = "XFI_WS_FAR",
67 [LOOPBACK_PHYXS_WS
] = "PHYXS_WS",
70 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
71 const char *efx_reset_type_names
[] = {
72 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
73 [RESET_TYPE_ALL
] = "ALL",
74 [RESET_TYPE_WORLD
] = "WORLD",
75 [RESET_TYPE_DISABLE
] = "DISABLE",
76 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
77 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
78 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
79 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
80 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
81 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
82 [RESET_TYPE_MC_FAILURE
] = "MC_FAILURE",
85 #define EFX_MAX_MTU (9 * 1024)
87 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
88 * queued onto this work queue. This is not a per-nic work queue, because
89 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
91 static struct workqueue_struct
*reset_workqueue
;
93 /**************************************************************************
97 *************************************************************************/
100 * Use separate channels for TX and RX events
102 * Set this to 1 to use separate channels for TX and RX. It allows us
103 * to control interrupt affinity separately for TX and RX.
105 * This is only used in MSI-X interrupt mode
107 static unsigned int separate_tx_channels
;
108 module_param(separate_tx_channels
, uint
, 0444);
109 MODULE_PARM_DESC(separate_tx_channels
,
110 "Use separate channels for TX and RX");
112 /* This is the weight assigned to each of the (per-channel) virtual
115 static int napi_weight
= 64;
117 /* This is the time (in jiffies) between invocations of the hardware
118 * monitor. On Falcon-based NICs, this will:
119 * - Check the on-board hardware monitor;
120 * - Poll the link state and reconfigure the hardware as necessary.
122 static unsigned int efx_monitor_interval
= 1 * HZ
;
124 /* This controls whether or not the driver will initialise devices
125 * with invalid MAC addresses stored in the EEPROM or flash. If true,
126 * such devices will be initialised with a random locally-generated
127 * MAC address. This allows for loading the sfc_mtd driver to
128 * reprogram the flash, even if the flash contents (including the MAC
129 * address) have previously been erased.
131 static unsigned int allow_bad_hwaddr
;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * The default for RX should strike a balance between increasing the
137 * round-trip latency and reducing overhead.
139 static unsigned int rx_irq_mod_usec
= 60;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * This default is chosen to ensure that a 10G link does not go idle
145 * while a TX queue is stopped after it has become full. A queue is
146 * restarted when it drops below half full. The time this takes (assuming
147 * worst case 3 descriptors per packet and 1024 descriptors) is
148 * 512 / 3 * 1.2 = 205 usec.
150 static unsigned int tx_irq_mod_usec
= 150;
152 /* This is the first interrupt mode to try out of:
157 static unsigned int interrupt_mode
;
159 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
160 * i.e. the number of CPUs among which we may distribute simultaneous
161 * interrupt handling.
163 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
164 * The default (0) means to assign an interrupt to each package (level II cache)
166 static unsigned int rss_cpus
;
167 module_param(rss_cpus
, uint
, 0444);
168 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
170 static int phy_flash_cfg
;
171 module_param(phy_flash_cfg
, int, 0644);
172 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
174 static unsigned irq_adapt_low_thresh
= 10000;
175 module_param(irq_adapt_low_thresh
, uint
, 0644);
176 MODULE_PARM_DESC(irq_adapt_low_thresh
,
177 "Threshold score for reducing IRQ moderation");
179 static unsigned irq_adapt_high_thresh
= 20000;
180 module_param(irq_adapt_high_thresh
, uint
, 0644);
181 MODULE_PARM_DESC(irq_adapt_high_thresh
,
182 "Threshold score for increasing IRQ moderation");
184 static unsigned debug
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
185 NETIF_MSG_LINK
| NETIF_MSG_IFDOWN
|
186 NETIF_MSG_IFUP
| NETIF_MSG_RX_ERR
|
187 NETIF_MSG_TX_ERR
| NETIF_MSG_HW
);
188 module_param(debug
, uint
, 0);
189 MODULE_PARM_DESC(debug
, "Bitmapped debugging message enable value");
191 /**************************************************************************
193 * Utility functions and prototypes
195 *************************************************************************/
197 static void efx_remove_channels(struct efx_nic
*efx
);
198 static void efx_remove_port(struct efx_nic
*efx
);
199 static void efx_init_napi(struct efx_nic
*efx
);
200 static void efx_fini_napi(struct efx_nic
*efx
);
201 static void efx_fini_napi_channel(struct efx_channel
*channel
);
202 static void efx_fini_struct(struct efx_nic
*efx
);
203 static void efx_start_all(struct efx_nic
*efx
);
204 static void efx_stop_all(struct efx_nic
*efx
);
206 #define EFX_ASSERT_RESET_SERIALISED(efx) \
208 if ((efx->state == STATE_RUNNING) || \
209 (efx->state == STATE_DISABLED)) \
213 /**************************************************************************
215 * Event queue processing
217 *************************************************************************/
219 /* Process channel's event queue
221 * This function is responsible for processing the event queue of a
222 * single channel. The caller must guarantee that this function will
223 * never be concurrently called more than once on the same channel,
224 * though different channels may be being processed concurrently.
226 static int efx_process_channel(struct efx_channel
*channel
, int budget
)
228 struct efx_nic
*efx
= channel
->efx
;
231 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
235 spent
= efx_nic_process_eventq(channel
, budget
);
239 /* Deliver last RX packet. */
240 if (channel
->rx_pkt
) {
241 __efx_rx_packet(channel
, channel
->rx_pkt
,
242 channel
->rx_pkt_csummed
);
243 channel
->rx_pkt
= NULL
;
246 efx_rx_strategy(channel
);
248 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel
));
253 /* Mark channel as finished processing
255 * Note that since we will not receive further interrupts for this
256 * channel before we finish processing and call the eventq_read_ack()
257 * method, there is no need to use the interrupt hold-off timers.
259 static inline void efx_channel_processed(struct efx_channel
*channel
)
261 /* The interrupt handler for this channel may set work_pending
262 * as soon as we acknowledge the events we've seen. Make sure
263 * it's cleared before then. */
264 channel
->work_pending
= false;
267 efx_nic_eventq_read_ack(channel
);
272 * NAPI guarantees serialisation of polls of the same device, which
273 * provides the guarantee required by efx_process_channel().
275 static int efx_poll(struct napi_struct
*napi
, int budget
)
277 struct efx_channel
*channel
=
278 container_of(napi
, struct efx_channel
, napi_str
);
279 struct efx_nic
*efx
= channel
->efx
;
282 netif_vdbg(efx
, intr
, efx
->net_dev
,
283 "channel %d NAPI poll executing on CPU %d\n",
284 channel
->channel
, raw_smp_processor_id());
286 spent
= efx_process_channel(channel
, budget
);
288 if (spent
< budget
) {
289 if (channel
->channel
< efx
->n_rx_channels
&&
290 efx
->irq_rx_adaptive
&&
291 unlikely(++channel
->irq_count
== 1000)) {
292 if (unlikely(channel
->irq_mod_score
<
293 irq_adapt_low_thresh
)) {
294 if (channel
->irq_moderation
> 1) {
295 channel
->irq_moderation
-= 1;
296 efx
->type
->push_irq_moderation(channel
);
298 } else if (unlikely(channel
->irq_mod_score
>
299 irq_adapt_high_thresh
)) {
300 if (channel
->irq_moderation
<
301 efx
->irq_rx_moderation
) {
302 channel
->irq_moderation
+= 1;
303 efx
->type
->push_irq_moderation(channel
);
306 channel
->irq_count
= 0;
307 channel
->irq_mod_score
= 0;
310 /* There is no race here; although napi_disable() will
311 * only wait for napi_complete(), this isn't a problem
312 * since efx_channel_processed() will have no effect if
313 * interrupts have already been disabled.
316 efx_channel_processed(channel
);
322 /* Process the eventq of the specified channel immediately on this CPU
324 * Disable hardware generated interrupts, wait for any existing
325 * processing to finish, then directly poll (and ack ) the eventq.
326 * Finally reenable NAPI and interrupts.
328 * Since we are touching interrupts the caller should hold the suspend lock
330 void efx_process_channel_now(struct efx_channel
*channel
)
332 struct efx_nic
*efx
= channel
->efx
;
334 BUG_ON(channel
->channel
>= efx
->n_channels
);
335 BUG_ON(!channel
->enabled
);
337 /* Disable interrupts and wait for ISRs to complete */
338 efx_nic_disable_interrupts(efx
);
339 if (efx
->legacy_irq
) {
340 synchronize_irq(efx
->legacy_irq
);
341 efx
->legacy_irq_enabled
= false;
344 synchronize_irq(channel
->irq
);
346 /* Wait for any NAPI processing to complete */
347 napi_disable(&channel
->napi_str
);
349 /* Poll the channel */
350 efx_process_channel(channel
, channel
->eventq_mask
+ 1);
352 /* Ack the eventq. This may cause an interrupt to be generated
353 * when they are reenabled */
354 efx_channel_processed(channel
);
356 napi_enable(&channel
->napi_str
);
358 efx
->legacy_irq_enabled
= true;
359 efx_nic_enable_interrupts(efx
);
362 /* Create event queue
363 * Event queue memory allocations are done only once. If the channel
364 * is reset, the memory buffer will be reused; this guards against
365 * errors during channel reset and also simplifies interrupt handling.
367 static int efx_probe_eventq(struct efx_channel
*channel
)
369 struct efx_nic
*efx
= channel
->efx
;
370 unsigned long entries
;
372 netif_dbg(channel
->efx
, probe
, channel
->efx
->net_dev
,
373 "chan %d create event queue\n", channel
->channel
);
375 /* Build an event queue with room for one event per tx and rx buffer,
376 * plus some extra for link state events and MCDI completions. */
377 entries
= roundup_pow_of_two(efx
->rxq_entries
+ efx
->txq_entries
+ 128);
378 EFX_BUG_ON_PARANOID(entries
> EFX_MAX_EVQ_SIZE
);
379 channel
->eventq_mask
= max(entries
, EFX_MIN_EVQ_SIZE
) - 1;
381 return efx_nic_probe_eventq(channel
);
384 /* Prepare channel's event queue */
385 static void efx_init_eventq(struct efx_channel
*channel
)
387 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
388 "chan %d init event queue\n", channel
->channel
);
390 channel
->eventq_read_ptr
= 0;
392 efx_nic_init_eventq(channel
);
395 static void efx_fini_eventq(struct efx_channel
*channel
)
397 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
398 "chan %d fini event queue\n", channel
->channel
);
400 efx_nic_fini_eventq(channel
);
403 static void efx_remove_eventq(struct efx_channel
*channel
)
405 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
406 "chan %d remove event queue\n", channel
->channel
);
408 efx_nic_remove_eventq(channel
);
411 /**************************************************************************
415 *************************************************************************/
417 /* Allocate and initialise a channel structure, optionally copying
418 * parameters (but not resources) from an old channel structure. */
419 static struct efx_channel
*
420 efx_alloc_channel(struct efx_nic
*efx
, int i
, struct efx_channel
*old_channel
)
422 struct efx_channel
*channel
;
423 struct efx_rx_queue
*rx_queue
;
424 struct efx_tx_queue
*tx_queue
;
428 channel
= kmalloc(sizeof(*channel
), GFP_KERNEL
);
432 *channel
= *old_channel
;
434 channel
->napi_dev
= NULL
;
435 memset(&channel
->eventq
, 0, sizeof(channel
->eventq
));
437 rx_queue
= &channel
->rx_queue
;
438 rx_queue
->buffer
= NULL
;
439 memset(&rx_queue
->rxd
, 0, sizeof(rx_queue
->rxd
));
441 for (j
= 0; j
< EFX_TXQ_TYPES
; j
++) {
442 tx_queue
= &channel
->tx_queue
[j
];
443 if (tx_queue
->channel
)
444 tx_queue
->channel
= channel
;
445 tx_queue
->buffer
= NULL
;
446 memset(&tx_queue
->txd
, 0, sizeof(tx_queue
->txd
));
449 channel
= kzalloc(sizeof(*channel
), GFP_KERNEL
);
454 channel
->channel
= i
;
456 for (j
= 0; j
< EFX_TXQ_TYPES
; j
++) {
457 tx_queue
= &channel
->tx_queue
[j
];
459 tx_queue
->queue
= i
* EFX_TXQ_TYPES
+ j
;
460 tx_queue
->channel
= channel
;
464 rx_queue
= &channel
->rx_queue
;
466 setup_timer(&rx_queue
->slow_fill
, efx_rx_slow_fill
,
467 (unsigned long)rx_queue
);
472 static int efx_probe_channel(struct efx_channel
*channel
)
474 struct efx_tx_queue
*tx_queue
;
475 struct efx_rx_queue
*rx_queue
;
478 netif_dbg(channel
->efx
, probe
, channel
->efx
->net_dev
,
479 "creating channel %d\n", channel
->channel
);
481 rc
= efx_probe_eventq(channel
);
485 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
486 rc
= efx_probe_tx_queue(tx_queue
);
491 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
492 rc
= efx_probe_rx_queue(rx_queue
);
497 channel
->n_rx_frm_trunc
= 0;
502 efx_for_each_channel_rx_queue(rx_queue
, channel
)
503 efx_remove_rx_queue(rx_queue
);
505 efx_for_each_channel_tx_queue(tx_queue
, channel
)
506 efx_remove_tx_queue(tx_queue
);
512 static void efx_set_channel_names(struct efx_nic
*efx
)
514 struct efx_channel
*channel
;
515 const char *type
= "";
518 efx_for_each_channel(channel
, efx
) {
519 number
= channel
->channel
;
520 if (efx
->n_channels
> efx
->n_rx_channels
) {
521 if (channel
->channel
< efx
->n_rx_channels
) {
525 number
-= efx
->n_rx_channels
;
528 snprintf(efx
->channel_name
[channel
->channel
],
529 sizeof(efx
->channel_name
[0]),
530 "%s%s-%d", efx
->name
, type
, number
);
534 static int efx_probe_channels(struct efx_nic
*efx
)
536 struct efx_channel
*channel
;
539 /* Restart special buffer allocation */
540 efx
->next_buffer_table
= 0;
542 efx_for_each_channel(channel
, efx
) {
543 rc
= efx_probe_channel(channel
);
545 netif_err(efx
, probe
, efx
->net_dev
,
546 "failed to create channel %d\n",
551 efx_set_channel_names(efx
);
556 efx_remove_channels(efx
);
560 /* Channels are shutdown and reinitialised whilst the NIC is running
561 * to propagate configuration changes (mtu, checksum offload), or
562 * to clear hardware error conditions
564 static void efx_init_channels(struct efx_nic
*efx
)
566 struct efx_tx_queue
*tx_queue
;
567 struct efx_rx_queue
*rx_queue
;
568 struct efx_channel
*channel
;
570 /* Calculate the rx buffer allocation parameters required to
571 * support the current MTU, including padding for header
572 * alignment and overruns.
574 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
575 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
576 efx
->type
->rx_buffer_hash_size
+
577 efx
->type
->rx_buffer_padding
);
578 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
+
579 sizeof(struct efx_rx_page_state
));
581 /* Initialise the channels */
582 efx_for_each_channel(channel
, efx
) {
583 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
584 "init chan %d\n", channel
->channel
);
586 efx_init_eventq(channel
);
588 efx_for_each_channel_tx_queue(tx_queue
, channel
)
589 efx_init_tx_queue(tx_queue
);
591 /* The rx buffer allocation strategy is MTU dependent */
592 efx_rx_strategy(channel
);
594 efx_for_each_channel_rx_queue(rx_queue
, channel
)
595 efx_init_rx_queue(rx_queue
);
597 WARN_ON(channel
->rx_pkt
!= NULL
);
598 efx_rx_strategy(channel
);
602 /* This enables event queue processing and packet transmission.
604 * Note that this function is not allowed to fail, since that would
605 * introduce too much complexity into the suspend/resume path.
607 static void efx_start_channel(struct efx_channel
*channel
)
609 struct efx_rx_queue
*rx_queue
;
611 netif_dbg(channel
->efx
, ifup
, channel
->efx
->net_dev
,
612 "starting chan %d\n", channel
->channel
);
614 /* The interrupt handler for this channel may set work_pending
615 * as soon as we enable it. Make sure it's cleared before
616 * then. Similarly, make sure it sees the enabled flag set. */
617 channel
->work_pending
= false;
618 channel
->enabled
= true;
621 /* Fill the queues before enabling NAPI */
622 efx_for_each_channel_rx_queue(rx_queue
, channel
)
623 efx_fast_push_rx_descriptors(rx_queue
);
625 napi_enable(&channel
->napi_str
);
628 /* This disables event queue processing and packet transmission.
629 * This function does not guarantee that all queue processing
630 * (e.g. RX refill) is complete.
632 static void efx_stop_channel(struct efx_channel
*channel
)
634 if (!channel
->enabled
)
637 netif_dbg(channel
->efx
, ifdown
, channel
->efx
->net_dev
,
638 "stop chan %d\n", channel
->channel
);
640 channel
->enabled
= false;
641 napi_disable(&channel
->napi_str
);
644 static void efx_fini_channels(struct efx_nic
*efx
)
646 struct efx_channel
*channel
;
647 struct efx_tx_queue
*tx_queue
;
648 struct efx_rx_queue
*rx_queue
;
651 EFX_ASSERT_RESET_SERIALISED(efx
);
652 BUG_ON(efx
->port_enabled
);
654 rc
= efx_nic_flush_queues(efx
);
655 if (rc
&& EFX_WORKAROUND_7803(efx
)) {
656 /* Schedule a reset to recover from the flush failure. The
657 * descriptor caches reference memory we're about to free,
658 * but falcon_reconfigure_mac_wrapper() won't reconnect
659 * the MACs because of the pending reset. */
660 netif_err(efx
, drv
, efx
->net_dev
,
661 "Resetting to recover from flush failure\n");
662 efx_schedule_reset(efx
, RESET_TYPE_ALL
);
664 netif_err(efx
, drv
, efx
->net_dev
, "failed to flush queues\n");
666 netif_dbg(efx
, drv
, efx
->net_dev
,
667 "successfully flushed all queues\n");
670 efx_for_each_channel(channel
, efx
) {
671 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
672 "shut down chan %d\n", channel
->channel
);
674 efx_for_each_channel_rx_queue(rx_queue
, channel
)
675 efx_fini_rx_queue(rx_queue
);
676 efx_for_each_channel_tx_queue(tx_queue
, channel
)
677 efx_fini_tx_queue(tx_queue
);
678 efx_fini_eventq(channel
);
682 static void efx_remove_channel(struct efx_channel
*channel
)
684 struct efx_tx_queue
*tx_queue
;
685 struct efx_rx_queue
*rx_queue
;
687 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
688 "destroy chan %d\n", channel
->channel
);
690 efx_for_each_channel_rx_queue(rx_queue
, channel
)
691 efx_remove_rx_queue(rx_queue
);
692 efx_for_each_channel_tx_queue(tx_queue
, channel
)
693 efx_remove_tx_queue(tx_queue
);
694 efx_remove_eventq(channel
);
697 static void efx_remove_channels(struct efx_nic
*efx
)
699 struct efx_channel
*channel
;
701 efx_for_each_channel(channel
, efx
)
702 efx_remove_channel(channel
);
706 efx_realloc_channels(struct efx_nic
*efx
, u32 rxq_entries
, u32 txq_entries
)
708 struct efx_channel
*other_channel
[EFX_MAX_CHANNELS
], *channel
;
709 u32 old_rxq_entries
, old_txq_entries
;
714 efx_fini_channels(efx
);
717 memset(other_channel
, 0, sizeof(other_channel
));
718 for (i
= 0; i
< efx
->n_channels
; i
++) {
719 channel
= efx_alloc_channel(efx
, i
, efx
->channel
[i
]);
724 other_channel
[i
] = channel
;
727 /* Swap entry counts and channel pointers */
728 old_rxq_entries
= efx
->rxq_entries
;
729 old_txq_entries
= efx
->txq_entries
;
730 efx
->rxq_entries
= rxq_entries
;
731 efx
->txq_entries
= txq_entries
;
732 for (i
= 0; i
< efx
->n_channels
; i
++) {
733 channel
= efx
->channel
[i
];
734 efx
->channel
[i
] = other_channel
[i
];
735 other_channel
[i
] = channel
;
738 rc
= efx_probe_channels(efx
);
744 /* Destroy old channels */
745 for (i
= 0; i
< efx
->n_channels
; i
++) {
746 efx_fini_napi_channel(other_channel
[i
]);
747 efx_remove_channel(other_channel
[i
]);
750 /* Free unused channel structures */
751 for (i
= 0; i
< efx
->n_channels
; i
++)
752 kfree(other_channel
[i
]);
754 efx_init_channels(efx
);
760 efx
->rxq_entries
= old_rxq_entries
;
761 efx
->txq_entries
= old_txq_entries
;
762 for (i
= 0; i
< efx
->n_channels
; i
++) {
763 channel
= efx
->channel
[i
];
764 efx
->channel
[i
] = other_channel
[i
];
765 other_channel
[i
] = channel
;
770 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
)
772 mod_timer(&rx_queue
->slow_fill
, jiffies
+ msecs_to_jiffies(100));
775 /**************************************************************************
779 **************************************************************************/
781 /* This ensures that the kernel is kept informed (via
782 * netif_carrier_on/off) of the link status, and also maintains the
783 * link status's stop on the port's TX queue.
785 void efx_link_status_changed(struct efx_nic
*efx
)
787 struct efx_link_state
*link_state
= &efx
->link_state
;
789 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
790 * that no events are triggered between unregister_netdev() and the
791 * driver unloading. A more general condition is that NETDEV_CHANGE
792 * can only be generated between NETDEV_UP and NETDEV_DOWN */
793 if (!netif_running(efx
->net_dev
))
796 if (efx
->port_inhibited
) {
797 netif_carrier_off(efx
->net_dev
);
801 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
802 efx
->n_link_state_changes
++;
805 netif_carrier_on(efx
->net_dev
);
807 netif_carrier_off(efx
->net_dev
);
810 /* Status message for kernel log */
811 if (link_state
->up
) {
812 netif_info(efx
, link
, efx
->net_dev
,
813 "link up at %uMbps %s-duplex (MTU %d)%s\n",
814 link_state
->speed
, link_state
->fd
? "full" : "half",
816 (efx
->promiscuous
? " [PROMISC]" : ""));
818 netif_info(efx
, link
, efx
->net_dev
, "link down\n");
823 void efx_link_set_advertising(struct efx_nic
*efx
, u32 advertising
)
825 efx
->link_advertising
= advertising
;
827 if (advertising
& ADVERTISED_Pause
)
828 efx
->wanted_fc
|= (EFX_FC_TX
| EFX_FC_RX
);
830 efx
->wanted_fc
&= ~(EFX_FC_TX
| EFX_FC_RX
);
831 if (advertising
& ADVERTISED_Asym_Pause
)
832 efx
->wanted_fc
^= EFX_FC_TX
;
836 void efx_link_set_wanted_fc(struct efx_nic
*efx
, enum efx_fc_type wanted_fc
)
838 efx
->wanted_fc
= wanted_fc
;
839 if (efx
->link_advertising
) {
840 if (wanted_fc
& EFX_FC_RX
)
841 efx
->link_advertising
|= (ADVERTISED_Pause
|
842 ADVERTISED_Asym_Pause
);
844 efx
->link_advertising
&= ~(ADVERTISED_Pause
|
845 ADVERTISED_Asym_Pause
);
846 if (wanted_fc
& EFX_FC_TX
)
847 efx
->link_advertising
^= ADVERTISED_Asym_Pause
;
851 static void efx_fini_port(struct efx_nic
*efx
);
853 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
854 * the MAC appropriately. All other PHY configuration changes are pushed
855 * through phy_op->set_settings(), and pushed asynchronously to the MAC
856 * through efx_monitor().
858 * Callers must hold the mac_lock
860 int __efx_reconfigure_port(struct efx_nic
*efx
)
862 enum efx_phy_mode phy_mode
;
865 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
867 /* Serialise the promiscuous flag with efx_set_multicast_list. */
868 if (efx_dev_registered(efx
)) {
869 netif_addr_lock_bh(efx
->net_dev
);
870 netif_addr_unlock_bh(efx
->net_dev
);
873 /* Disable PHY transmit in mac level loopbacks */
874 phy_mode
= efx
->phy_mode
;
875 if (LOOPBACK_INTERNAL(efx
))
876 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
878 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
880 rc
= efx
->type
->reconfigure_port(efx
);
883 efx
->phy_mode
= phy_mode
;
888 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
890 int efx_reconfigure_port(struct efx_nic
*efx
)
894 EFX_ASSERT_RESET_SERIALISED(efx
);
896 mutex_lock(&efx
->mac_lock
);
897 rc
= __efx_reconfigure_port(efx
);
898 mutex_unlock(&efx
->mac_lock
);
903 /* Asynchronous work item for changing MAC promiscuity and multicast
904 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
906 static void efx_mac_work(struct work_struct
*data
)
908 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
910 mutex_lock(&efx
->mac_lock
);
911 if (efx
->port_enabled
) {
912 efx
->type
->push_multicast_hash(efx
);
913 efx
->mac_op
->reconfigure(efx
);
915 mutex_unlock(&efx
->mac_lock
);
918 static int efx_probe_port(struct efx_nic
*efx
)
920 unsigned char *perm_addr
;
923 netif_dbg(efx
, probe
, efx
->net_dev
, "create port\n");
926 efx
->phy_mode
= PHY_MODE_SPECIAL
;
928 /* Connect up MAC/PHY operations table */
929 rc
= efx
->type
->probe_port(efx
);
933 /* Sanity check MAC address */
934 perm_addr
= efx
->net_dev
->perm_addr
;
935 if (is_valid_ether_addr(perm_addr
)) {
936 memcpy(efx
->net_dev
->dev_addr
, perm_addr
, ETH_ALEN
);
938 netif_err(efx
, probe
, efx
->net_dev
, "invalid MAC address %pM\n",
940 if (!allow_bad_hwaddr
) {
944 random_ether_addr(efx
->net_dev
->dev_addr
);
945 netif_info(efx
, probe
, efx
->net_dev
,
946 "using locally-generated MAC %pM\n",
947 efx
->net_dev
->dev_addr
);
953 efx
->type
->remove_port(efx
);
957 static int efx_init_port(struct efx_nic
*efx
)
961 netif_dbg(efx
, drv
, efx
->net_dev
, "init port\n");
963 mutex_lock(&efx
->mac_lock
);
965 rc
= efx
->phy_op
->init(efx
);
969 efx
->port_initialized
= true;
971 /* Reconfigure the MAC before creating dma queues (required for
972 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
973 efx
->mac_op
->reconfigure(efx
);
975 /* Ensure the PHY advertises the correct flow control settings */
976 rc
= efx
->phy_op
->reconfigure(efx
);
980 mutex_unlock(&efx
->mac_lock
);
984 efx
->phy_op
->fini(efx
);
986 mutex_unlock(&efx
->mac_lock
);
990 static void efx_start_port(struct efx_nic
*efx
)
992 netif_dbg(efx
, ifup
, efx
->net_dev
, "start port\n");
993 BUG_ON(efx
->port_enabled
);
995 mutex_lock(&efx
->mac_lock
);
996 efx
->port_enabled
= true;
998 /* efx_mac_work() might have been scheduled after efx_stop_port(),
999 * and then cancelled by efx_flush_all() */
1000 efx
->type
->push_multicast_hash(efx
);
1001 efx
->mac_op
->reconfigure(efx
);
1003 mutex_unlock(&efx
->mac_lock
);
1006 /* Prevent efx_mac_work() and efx_monitor() from working */
1007 static void efx_stop_port(struct efx_nic
*efx
)
1009 netif_dbg(efx
, ifdown
, efx
->net_dev
, "stop port\n");
1011 mutex_lock(&efx
->mac_lock
);
1012 efx
->port_enabled
= false;
1013 mutex_unlock(&efx
->mac_lock
);
1015 /* Serialise against efx_set_multicast_list() */
1016 if (efx_dev_registered(efx
)) {
1017 netif_addr_lock_bh(efx
->net_dev
);
1018 netif_addr_unlock_bh(efx
->net_dev
);
1022 static void efx_fini_port(struct efx_nic
*efx
)
1024 netif_dbg(efx
, drv
, efx
->net_dev
, "shut down port\n");
1026 if (!efx
->port_initialized
)
1029 efx
->phy_op
->fini(efx
);
1030 efx
->port_initialized
= false;
1032 efx
->link_state
.up
= false;
1033 efx_link_status_changed(efx
);
1036 static void efx_remove_port(struct efx_nic
*efx
)
1038 netif_dbg(efx
, drv
, efx
->net_dev
, "destroying port\n");
1040 efx
->type
->remove_port(efx
);
1043 /**************************************************************************
1047 **************************************************************************/
1049 /* This configures the PCI device to enable I/O and DMA. */
1050 static int efx_init_io(struct efx_nic
*efx
)
1052 struct pci_dev
*pci_dev
= efx
->pci_dev
;
1053 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
1056 netif_dbg(efx
, probe
, efx
->net_dev
, "initialising I/O\n");
1058 rc
= pci_enable_device(pci_dev
);
1060 netif_err(efx
, probe
, efx
->net_dev
,
1061 "failed to enable PCI device\n");
1065 pci_set_master(pci_dev
);
1067 /* Set the PCI DMA mask. Try all possibilities from our
1068 * genuine mask down to 32 bits, because some architectures
1069 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1070 * masks event though they reject 46 bit masks.
1072 while (dma_mask
> 0x7fffffffUL
) {
1073 if (pci_dma_supported(pci_dev
, dma_mask
) &&
1074 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
1079 netif_err(efx
, probe
, efx
->net_dev
,
1080 "could not find a suitable DMA mask\n");
1083 netif_dbg(efx
, probe
, efx
->net_dev
,
1084 "using DMA mask %llx\n", (unsigned long long) dma_mask
);
1085 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
1087 /* pci_set_consistent_dma_mask() is not *allowed* to
1088 * fail with a mask that pci_set_dma_mask() accepted,
1089 * but just in case...
1091 netif_err(efx
, probe
, efx
->net_dev
,
1092 "failed to set consistent DMA mask\n");
1096 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
1097 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
1099 netif_err(efx
, probe
, efx
->net_dev
,
1100 "request for memory BAR failed\n");
1104 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
1105 efx
->type
->mem_map_size
);
1106 if (!efx
->membase
) {
1107 netif_err(efx
, probe
, efx
->net_dev
,
1108 "could not map memory BAR at %llx+%x\n",
1109 (unsigned long long)efx
->membase_phys
,
1110 efx
->type
->mem_map_size
);
1114 netif_dbg(efx
, probe
, efx
->net_dev
,
1115 "memory BAR at %llx+%x (virtual %p)\n",
1116 (unsigned long long)efx
->membase_phys
,
1117 efx
->type
->mem_map_size
, efx
->membase
);
1122 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
1124 efx
->membase_phys
= 0;
1126 pci_disable_device(efx
->pci_dev
);
1131 static void efx_fini_io(struct efx_nic
*efx
)
1133 netif_dbg(efx
, drv
, efx
->net_dev
, "shutting down I/O\n");
1136 iounmap(efx
->membase
);
1137 efx
->membase
= NULL
;
1140 if (efx
->membase_phys
) {
1141 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
1142 efx
->membase_phys
= 0;
1145 pci_disable_device(efx
->pci_dev
);
1148 /* Get number of channels wanted. Each channel will have its own IRQ,
1149 * 1 RX queue and/or 2 TX queues. */
1150 static int efx_wanted_channels(void)
1152 cpumask_var_t core_mask
;
1156 if (unlikely(!zalloc_cpumask_var(&core_mask
, GFP_KERNEL
))) {
1158 "sfc: RSS disabled due to allocation failure\n");
1163 for_each_online_cpu(cpu
) {
1164 if (!cpumask_test_cpu(cpu
, core_mask
)) {
1166 cpumask_or(core_mask
, core_mask
,
1167 topology_core_cpumask(cpu
));
1171 free_cpumask_var(core_mask
);
1175 /* Probe the number and type of interrupts we are able to obtain, and
1176 * the resulting numbers of channels and RX queues.
1178 static void efx_probe_interrupts(struct efx_nic
*efx
)
1181 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
1184 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
1185 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
1188 n_channels
= efx_wanted_channels();
1189 if (separate_tx_channels
)
1191 n_channels
= min(n_channels
, max_channels
);
1193 for (i
= 0; i
< n_channels
; i
++)
1194 xentries
[i
].entry
= i
;
1195 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, n_channels
);
1197 netif_err(efx
, drv
, efx
->net_dev
,
1198 "WARNING: Insufficient MSI-X vectors"
1199 " available (%d < %d).\n", rc
, n_channels
);
1200 netif_err(efx
, drv
, efx
->net_dev
,
1201 "WARNING: Performance may be reduced.\n");
1202 EFX_BUG_ON_PARANOID(rc
>= n_channels
);
1204 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
1209 efx
->n_channels
= n_channels
;
1210 if (separate_tx_channels
) {
1211 efx
->n_tx_channels
=
1212 max(efx
->n_channels
/ 2, 1U);
1213 efx
->n_rx_channels
=
1214 max(efx
->n_channels
-
1215 efx
->n_tx_channels
, 1U);
1217 efx
->n_tx_channels
= efx
->n_channels
;
1218 efx
->n_rx_channels
= efx
->n_channels
;
1220 for (i
= 0; i
< n_channels
; i
++)
1221 efx_get_channel(efx
, i
)->irq
=
1224 /* Fall back to single channel MSI */
1225 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
1226 netif_err(efx
, drv
, efx
->net_dev
,
1227 "could not enable MSI-X\n");
1231 /* Try single interrupt MSI */
1232 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
1233 efx
->n_channels
= 1;
1234 efx
->n_rx_channels
= 1;
1235 efx
->n_tx_channels
= 1;
1236 rc
= pci_enable_msi(efx
->pci_dev
);
1238 efx_get_channel(efx
, 0)->irq
= efx
->pci_dev
->irq
;
1240 netif_err(efx
, drv
, efx
->net_dev
,
1241 "could not enable MSI\n");
1242 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
1246 /* Assume legacy interrupts */
1247 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
1248 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1249 efx
->n_rx_channels
= 1;
1250 efx
->n_tx_channels
= 1;
1251 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1255 static void efx_remove_interrupts(struct efx_nic
*efx
)
1257 struct efx_channel
*channel
;
1259 /* Remove MSI/MSI-X interrupts */
1260 efx_for_each_channel(channel
, efx
)
1262 pci_disable_msi(efx
->pci_dev
);
1263 pci_disable_msix(efx
->pci_dev
);
1265 /* Remove legacy interrupt */
1266 efx
->legacy_irq
= 0;
1269 static void efx_set_channels(struct efx_nic
*efx
)
1271 struct efx_channel
*channel
;
1272 struct efx_tx_queue
*tx_queue
;
1274 efx
->tx_channel_offset
=
1275 separate_tx_channels
? efx
->n_channels
- efx
->n_tx_channels
: 0;
1277 /* Channel pointers were set in efx_init_struct() but we now
1278 * need to clear them for TX queues in any RX-only channels. */
1279 efx_for_each_channel(channel
, efx
) {
1280 if (channel
->channel
- efx
->tx_channel_offset
>=
1281 efx
->n_tx_channels
) {
1282 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1283 tx_queue
->channel
= NULL
;
1288 static int efx_probe_nic(struct efx_nic
*efx
)
1293 netif_dbg(efx
, probe
, efx
->net_dev
, "creating NIC\n");
1295 /* Carry out hardware-type specific initialisation */
1296 rc
= efx
->type
->probe(efx
);
1300 /* Determine the number of channels and queues by trying to hook
1301 * in MSI-X interrupts. */
1302 efx_probe_interrupts(efx
);
1304 if (efx
->n_channels
> 1)
1305 get_random_bytes(&efx
->rx_hash_key
, sizeof(efx
->rx_hash_key
));
1306 for (i
= 0; i
< ARRAY_SIZE(efx
->rx_indir_table
); i
++)
1307 efx
->rx_indir_table
[i
] = i
% efx
->n_rx_channels
;
1309 efx_set_channels(efx
);
1310 netif_set_real_num_tx_queues(efx
->net_dev
, efx
->n_tx_channels
);
1311 netif_set_real_num_rx_queues(efx
->net_dev
, efx
->n_rx_channels
);
1313 /* Initialise the interrupt moderation settings */
1314 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true);
1319 static void efx_remove_nic(struct efx_nic
*efx
)
1321 netif_dbg(efx
, drv
, efx
->net_dev
, "destroying NIC\n");
1323 efx_remove_interrupts(efx
);
1324 efx
->type
->remove(efx
);
1327 /**************************************************************************
1329 * NIC startup/shutdown
1331 *************************************************************************/
1333 static int efx_probe_all(struct efx_nic
*efx
)
1337 rc
= efx_probe_nic(efx
);
1339 netif_err(efx
, probe
, efx
->net_dev
, "failed to create NIC\n");
1343 rc
= efx_probe_port(efx
);
1345 netif_err(efx
, probe
, efx
->net_dev
, "failed to create port\n");
1349 efx
->rxq_entries
= efx
->txq_entries
= EFX_DEFAULT_DMAQ_SIZE
;
1350 rc
= efx_probe_channels(efx
);
1354 rc
= efx_probe_filters(efx
);
1356 netif_err(efx
, probe
, efx
->net_dev
,
1357 "failed to create filter tables\n");
1364 efx_remove_channels(efx
);
1366 efx_remove_port(efx
);
1368 efx_remove_nic(efx
);
1373 /* Called after previous invocation(s) of efx_stop_all, restarts the
1374 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1375 * and ensures that the port is scheduled to be reconfigured.
1376 * This function is safe to call multiple times when the NIC is in any
1378 static void efx_start_all(struct efx_nic
*efx
)
1380 struct efx_channel
*channel
;
1382 EFX_ASSERT_RESET_SERIALISED(efx
);
1384 /* Check that it is appropriate to restart the interface. All
1385 * of these flags are safe to read under just the rtnl lock */
1386 if (efx
->port_enabled
)
1388 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1390 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1393 /* Mark the port as enabled so port reconfigurations can start, then
1394 * restart the transmit interface early so the watchdog timer stops */
1395 efx_start_port(efx
);
1397 if (efx_dev_registered(efx
))
1398 netif_tx_wake_all_queues(efx
->net_dev
);
1400 efx_for_each_channel(channel
, efx
)
1401 efx_start_channel(channel
);
1403 if (efx
->legacy_irq
)
1404 efx
->legacy_irq_enabled
= true;
1405 efx_nic_enable_interrupts(efx
);
1407 /* Switch to event based MCDI completions after enabling interrupts.
1408 * If a reset has been scheduled, then we need to stay in polled mode.
1409 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1410 * reset_pending [modified from an atomic context], we instead guarantee
1411 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1412 efx_mcdi_mode_event(efx
);
1413 if (efx
->reset_pending
!= RESET_TYPE_NONE
)
1414 efx_mcdi_mode_poll(efx
);
1416 /* Start the hardware monitor if there is one. Otherwise (we're link
1417 * event driven), we have to poll the PHY because after an event queue
1418 * flush, we could have a missed a link state change */
1419 if (efx
->type
->monitor
!= NULL
) {
1420 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1421 efx_monitor_interval
);
1423 mutex_lock(&efx
->mac_lock
);
1424 if (efx
->phy_op
->poll(efx
))
1425 efx_link_status_changed(efx
);
1426 mutex_unlock(&efx
->mac_lock
);
1429 efx
->type
->start_stats(efx
);
1432 /* Flush all delayed work. Should only be called when no more delayed work
1433 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1434 * since we're holding the rtnl_lock at this point. */
1435 static void efx_flush_all(struct efx_nic
*efx
)
1437 /* Make sure the hardware monitor is stopped */
1438 cancel_delayed_work_sync(&efx
->monitor_work
);
1439 /* Stop scheduled port reconfigurations */
1440 cancel_work_sync(&efx
->mac_work
);
1443 /* Quiesce hardware and software without bringing the link down.
1444 * Safe to call multiple times, when the nic and interface is in any
1445 * state. The caller is guaranteed to subsequently be in a position
1446 * to modify any hardware and software state they see fit without
1448 static void efx_stop_all(struct efx_nic
*efx
)
1450 struct efx_channel
*channel
;
1452 EFX_ASSERT_RESET_SERIALISED(efx
);
1454 /* port_enabled can be read safely under the rtnl lock */
1455 if (!efx
->port_enabled
)
1458 efx
->type
->stop_stats(efx
);
1460 /* Switch to MCDI polling on Siena before disabling interrupts */
1461 efx_mcdi_mode_poll(efx
);
1463 /* Disable interrupts and wait for ISR to complete */
1464 efx_nic_disable_interrupts(efx
);
1465 if (efx
->legacy_irq
) {
1466 synchronize_irq(efx
->legacy_irq
);
1467 efx
->legacy_irq_enabled
= false;
1469 efx_for_each_channel(channel
, efx
) {
1471 synchronize_irq(channel
->irq
);
1474 /* Stop all NAPI processing and synchronous rx refills */
1475 efx_for_each_channel(channel
, efx
)
1476 efx_stop_channel(channel
);
1478 /* Stop all asynchronous port reconfigurations. Since all
1479 * event processing has already been stopped, there is no
1480 * window to loose phy events */
1483 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1486 /* Stop the kernel transmit interface late, so the watchdog
1487 * timer isn't ticking over the flush */
1488 if (efx_dev_registered(efx
)) {
1489 netif_tx_stop_all_queues(efx
->net_dev
);
1490 netif_tx_lock_bh(efx
->net_dev
);
1491 netif_tx_unlock_bh(efx
->net_dev
);
1495 static void efx_remove_all(struct efx_nic
*efx
)
1497 efx_remove_filters(efx
);
1498 efx_remove_channels(efx
);
1499 efx_remove_port(efx
);
1500 efx_remove_nic(efx
);
1503 /**************************************************************************
1505 * Interrupt moderation
1507 **************************************************************************/
1509 static unsigned irq_mod_ticks(int usecs
, int resolution
)
1512 return 0; /* cannot receive interrupts ahead of time :-) */
1513 if (usecs
< resolution
)
1514 return 1; /* never round down to 0 */
1515 return usecs
/ resolution
;
1518 /* Set interrupt moderation parameters */
1519 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
,
1522 struct efx_channel
*channel
;
1523 unsigned tx_ticks
= irq_mod_ticks(tx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1524 unsigned rx_ticks
= irq_mod_ticks(rx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1526 EFX_ASSERT_RESET_SERIALISED(efx
);
1528 efx
->irq_rx_adaptive
= rx_adaptive
;
1529 efx
->irq_rx_moderation
= rx_ticks
;
1530 efx_for_each_channel(channel
, efx
) {
1531 if (efx_channel_get_rx_queue(channel
))
1532 channel
->irq_moderation
= rx_ticks
;
1533 else if (efx_channel_get_tx_queue(channel
, 0))
1534 channel
->irq_moderation
= tx_ticks
;
1538 /**************************************************************************
1542 **************************************************************************/
1544 /* Run periodically off the general workqueue */
1545 static void efx_monitor(struct work_struct
*data
)
1547 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1550 netif_vdbg(efx
, timer
, efx
->net_dev
,
1551 "hardware monitor executing on CPU %d\n",
1552 raw_smp_processor_id());
1553 BUG_ON(efx
->type
->monitor
== NULL
);
1555 /* If the mac_lock is already held then it is likely a port
1556 * reconfiguration is already in place, which will likely do
1557 * most of the work of monitor() anyway. */
1558 if (mutex_trylock(&efx
->mac_lock
)) {
1559 if (efx
->port_enabled
)
1560 efx
->type
->monitor(efx
);
1561 mutex_unlock(&efx
->mac_lock
);
1564 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1565 efx_monitor_interval
);
1568 /**************************************************************************
1572 *************************************************************************/
1575 * Context: process, rtnl_lock() held.
1577 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1579 struct efx_nic
*efx
= netdev_priv(net_dev
);
1580 struct mii_ioctl_data
*data
= if_mii(ifr
);
1582 EFX_ASSERT_RESET_SERIALISED(efx
);
1584 /* Convert phy_id from older PRTAD/DEVAD format */
1585 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1586 (data
->phy_id
& 0xfc00) == 0x0400)
1587 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1589 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1592 /**************************************************************************
1596 **************************************************************************/
1598 static void efx_init_napi(struct efx_nic
*efx
)
1600 struct efx_channel
*channel
;
1602 efx_for_each_channel(channel
, efx
) {
1603 channel
->napi_dev
= efx
->net_dev
;
1604 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1605 efx_poll
, napi_weight
);
1609 static void efx_fini_napi_channel(struct efx_channel
*channel
)
1611 if (channel
->napi_dev
)
1612 netif_napi_del(&channel
->napi_str
);
1613 channel
->napi_dev
= NULL
;
1616 static void efx_fini_napi(struct efx_nic
*efx
)
1618 struct efx_channel
*channel
;
1620 efx_for_each_channel(channel
, efx
)
1621 efx_fini_napi_channel(channel
);
1624 /**************************************************************************
1626 * Kernel netpoll interface
1628 *************************************************************************/
1630 #ifdef CONFIG_NET_POLL_CONTROLLER
1632 /* Although in the common case interrupts will be disabled, this is not
1633 * guaranteed. However, all our work happens inside the NAPI callback,
1634 * so no locking is required.
1636 static void efx_netpoll(struct net_device
*net_dev
)
1638 struct efx_nic
*efx
= netdev_priv(net_dev
);
1639 struct efx_channel
*channel
;
1641 efx_for_each_channel(channel
, efx
)
1642 efx_schedule_channel(channel
);
1647 /**************************************************************************
1649 * Kernel net device interface
1651 *************************************************************************/
1653 /* Context: process, rtnl_lock() held. */
1654 static int efx_net_open(struct net_device
*net_dev
)
1656 struct efx_nic
*efx
= netdev_priv(net_dev
);
1657 EFX_ASSERT_RESET_SERIALISED(efx
);
1659 netif_dbg(efx
, ifup
, efx
->net_dev
, "opening device on CPU %d\n",
1660 raw_smp_processor_id());
1662 if (efx
->state
== STATE_DISABLED
)
1664 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1666 if (efx_mcdi_poll_reboot(efx
) && efx_reset(efx
, RESET_TYPE_ALL
))
1669 /* Notify the kernel of the link state polled during driver load,
1670 * before the monitor starts running */
1671 efx_link_status_changed(efx
);
1677 /* Context: process, rtnl_lock() held.
1678 * Note that the kernel will ignore our return code; this method
1679 * should really be a void.
1681 static int efx_net_stop(struct net_device
*net_dev
)
1683 struct efx_nic
*efx
= netdev_priv(net_dev
);
1685 netif_dbg(efx
, ifdown
, efx
->net_dev
, "closing on CPU %d\n",
1686 raw_smp_processor_id());
1688 if (efx
->state
!= STATE_DISABLED
) {
1689 /* Stop the device and flush all the channels */
1691 efx_fini_channels(efx
);
1692 efx_init_channels(efx
);
1698 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1699 static struct rtnl_link_stats64
*efx_net_stats(struct net_device
*net_dev
, struct rtnl_link_stats64
*stats
)
1701 struct efx_nic
*efx
= netdev_priv(net_dev
);
1702 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1704 spin_lock_bh(&efx
->stats_lock
);
1705 efx
->type
->update_stats(efx
);
1706 spin_unlock_bh(&efx
->stats_lock
);
1708 stats
->rx_packets
= mac_stats
->rx_packets
;
1709 stats
->tx_packets
= mac_stats
->tx_packets
;
1710 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1711 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1712 stats
->rx_dropped
= efx
->n_rx_nodesc_drop_cnt
;
1713 stats
->multicast
= mac_stats
->rx_multicast
;
1714 stats
->collisions
= mac_stats
->tx_collision
;
1715 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1716 mac_stats
->rx_length_error
);
1717 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1718 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1719 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1720 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1721 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1723 stats
->rx_errors
= (stats
->rx_length_errors
+
1724 stats
->rx_crc_errors
+
1725 stats
->rx_frame_errors
+
1726 mac_stats
->rx_symbol_error
);
1727 stats
->tx_errors
= (stats
->tx_window_errors
+
1733 /* Context: netif_tx_lock held, BHs disabled. */
1734 static void efx_watchdog(struct net_device
*net_dev
)
1736 struct efx_nic
*efx
= netdev_priv(net_dev
);
1738 netif_err(efx
, tx_err
, efx
->net_dev
,
1739 "TX stuck with port_enabled=%d: resetting channels\n",
1742 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1746 /* Context: process, rtnl_lock() held. */
1747 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1749 struct efx_nic
*efx
= netdev_priv(net_dev
);
1752 EFX_ASSERT_RESET_SERIALISED(efx
);
1754 if (new_mtu
> EFX_MAX_MTU
)
1759 netif_dbg(efx
, drv
, efx
->net_dev
, "changing MTU to %d\n", new_mtu
);
1761 efx_fini_channels(efx
);
1763 mutex_lock(&efx
->mac_lock
);
1764 /* Reconfigure the MAC before enabling the dma queues so that
1765 * the RX buffers don't overflow */
1766 net_dev
->mtu
= new_mtu
;
1767 efx
->mac_op
->reconfigure(efx
);
1768 mutex_unlock(&efx
->mac_lock
);
1770 efx_init_channels(efx
);
1776 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1778 struct efx_nic
*efx
= netdev_priv(net_dev
);
1779 struct sockaddr
*addr
= data
;
1780 char *new_addr
= addr
->sa_data
;
1782 EFX_ASSERT_RESET_SERIALISED(efx
);
1784 if (!is_valid_ether_addr(new_addr
)) {
1785 netif_err(efx
, drv
, efx
->net_dev
,
1786 "invalid ethernet MAC address requested: %pM\n",
1791 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1793 /* Reconfigure the MAC */
1794 mutex_lock(&efx
->mac_lock
);
1795 efx
->mac_op
->reconfigure(efx
);
1796 mutex_unlock(&efx
->mac_lock
);
1801 /* Context: netif_addr_lock held, BHs disabled. */
1802 static void efx_set_multicast_list(struct net_device
*net_dev
)
1804 struct efx_nic
*efx
= netdev_priv(net_dev
);
1805 struct netdev_hw_addr
*ha
;
1806 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1810 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1812 /* Build multicast hash table */
1813 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1814 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1816 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1817 netdev_for_each_mc_addr(ha
, net_dev
) {
1818 crc
= ether_crc_le(ETH_ALEN
, ha
->addr
);
1819 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1820 set_bit_le(bit
, mc_hash
->byte
);
1823 /* Broadcast packets go through the multicast hash filter.
1824 * ether_crc_le() of the broadcast address is 0xbe2612ff
1825 * so we always add bit 0xff to the mask.
1827 set_bit_le(0xff, mc_hash
->byte
);
1830 if (efx
->port_enabled
)
1831 queue_work(efx
->workqueue
, &efx
->mac_work
);
1832 /* Otherwise efx_start_port() will do this */
1835 static const struct net_device_ops efx_netdev_ops
= {
1836 .ndo_open
= efx_net_open
,
1837 .ndo_stop
= efx_net_stop
,
1838 .ndo_get_stats64
= efx_net_stats
,
1839 .ndo_tx_timeout
= efx_watchdog
,
1840 .ndo_start_xmit
= efx_hard_start_xmit
,
1841 .ndo_validate_addr
= eth_validate_addr
,
1842 .ndo_do_ioctl
= efx_ioctl
,
1843 .ndo_change_mtu
= efx_change_mtu
,
1844 .ndo_set_mac_address
= efx_set_mac_address
,
1845 .ndo_set_multicast_list
= efx_set_multicast_list
,
1846 #ifdef CONFIG_NET_POLL_CONTROLLER
1847 .ndo_poll_controller
= efx_netpoll
,
1851 static void efx_update_name(struct efx_nic
*efx
)
1853 strcpy(efx
->name
, efx
->net_dev
->name
);
1854 efx_mtd_rename(efx
);
1855 efx_set_channel_names(efx
);
1858 static int efx_netdev_event(struct notifier_block
*this,
1859 unsigned long event
, void *ptr
)
1861 struct net_device
*net_dev
= ptr
;
1863 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1864 event
== NETDEV_CHANGENAME
)
1865 efx_update_name(netdev_priv(net_dev
));
1870 static struct notifier_block efx_netdev_notifier
= {
1871 .notifier_call
= efx_netdev_event
,
1875 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1877 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1878 return sprintf(buf
, "%d\n", efx
->phy_type
);
1880 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1882 static int efx_register_netdev(struct efx_nic
*efx
)
1884 struct net_device
*net_dev
= efx
->net_dev
;
1885 struct efx_channel
*channel
;
1888 net_dev
->watchdog_timeo
= 5 * HZ
;
1889 net_dev
->irq
= efx
->pci_dev
->irq
;
1890 net_dev
->netdev_ops
= &efx_netdev_ops
;
1891 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1893 /* Clear MAC statistics */
1894 efx
->mac_op
->update_stats(efx
);
1895 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1899 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1902 efx_update_name(efx
);
1904 rc
= register_netdevice(net_dev
);
1908 efx_for_each_channel(channel
, efx
) {
1909 struct efx_tx_queue
*tx_queue
;
1910 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
1911 tx_queue
->core_txq
= netdev_get_tx_queue(
1912 efx
->net_dev
, tx_queue
->queue
/ EFX_TXQ_TYPES
);
1916 /* Always start with carrier off; PHY events will detect the link */
1917 netif_carrier_off(efx
->net_dev
);
1921 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1923 netif_err(efx
, drv
, efx
->net_dev
,
1924 "failed to init net dev attributes\n");
1925 goto fail_registered
;
1932 netif_err(efx
, drv
, efx
->net_dev
, "could not register net dev\n");
1936 unregister_netdev(net_dev
);
1940 static void efx_unregister_netdev(struct efx_nic
*efx
)
1942 struct efx_channel
*channel
;
1943 struct efx_tx_queue
*tx_queue
;
1948 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1950 /* Free up any skbs still remaining. This has to happen before
1951 * we try to unregister the netdev as running their destructors
1952 * may be needed to get the device ref. count to 0. */
1953 efx_for_each_channel(channel
, efx
) {
1954 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1955 efx_release_tx_buffers(tx_queue
);
1958 if (efx_dev_registered(efx
)) {
1959 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1960 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1961 unregister_netdev(efx
->net_dev
);
1965 /**************************************************************************
1967 * Device reset and suspend
1969 **************************************************************************/
1971 /* Tears down the entire software state and most of the hardware state
1973 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
)
1975 EFX_ASSERT_RESET_SERIALISED(efx
);
1978 mutex_lock(&efx
->mac_lock
);
1980 efx_fini_channels(efx
);
1981 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
1982 efx
->phy_op
->fini(efx
);
1983 efx
->type
->fini(efx
);
1986 /* This function will always ensure that the locks acquired in
1987 * efx_reset_down() are released. A failure return code indicates
1988 * that we were unable to reinitialise the hardware, and the
1989 * driver should be disabled. If ok is false, then the rx and tx
1990 * engines are not restarted, pending a RESET_DISABLE. */
1991 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
, bool ok
)
1995 EFX_ASSERT_RESET_SERIALISED(efx
);
1997 rc
= efx
->type
->init(efx
);
1999 netif_err(efx
, drv
, efx
->net_dev
, "failed to initialise NIC\n");
2006 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
2007 rc
= efx
->phy_op
->init(efx
);
2010 if (efx
->phy_op
->reconfigure(efx
))
2011 netif_err(efx
, drv
, efx
->net_dev
,
2012 "could not restore PHY settings\n");
2015 efx
->mac_op
->reconfigure(efx
);
2017 efx_init_channels(efx
);
2018 efx_restore_filters(efx
);
2020 mutex_unlock(&efx
->mac_lock
);
2027 efx
->port_initialized
= false;
2029 mutex_unlock(&efx
->mac_lock
);
2034 /* Reset the NIC using the specified method. Note that the reset may
2035 * fail, in which case the card will be left in an unusable state.
2037 * Caller must hold the rtnl_lock.
2039 int efx_reset(struct efx_nic
*efx
, enum reset_type method
)
2044 netif_info(efx
, drv
, efx
->net_dev
, "resetting (%s)\n",
2045 RESET_TYPE(method
));
2047 efx_reset_down(efx
, method
);
2049 rc
= efx
->type
->reset(efx
, method
);
2051 netif_err(efx
, drv
, efx
->net_dev
, "failed to reset hardware\n");
2055 /* Allow resets to be rescheduled. */
2056 efx
->reset_pending
= RESET_TYPE_NONE
;
2058 /* Reinitialise bus-mastering, which may have been turned off before
2059 * the reset was scheduled. This is still appropriate, even in the
2060 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2061 * can respond to requests. */
2062 pci_set_master(efx
->pci_dev
);
2065 /* Leave device stopped if necessary */
2066 disabled
= rc
|| method
== RESET_TYPE_DISABLE
;
2067 rc2
= efx_reset_up(efx
, method
, !disabled
);
2075 dev_close(efx
->net_dev
);
2076 netif_err(efx
, drv
, efx
->net_dev
, "has been disabled\n");
2077 efx
->state
= STATE_DISABLED
;
2079 netif_dbg(efx
, drv
, efx
->net_dev
, "reset complete\n");
2084 /* The worker thread exists so that code that cannot sleep can
2085 * schedule a reset for later.
2087 static void efx_reset_work(struct work_struct
*data
)
2089 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, reset_work
);
2091 if (efx
->reset_pending
== RESET_TYPE_NONE
)
2094 /* If we're not RUNNING then don't reset. Leave the reset_pending
2095 * flag set so that efx_pci_probe_main will be retried */
2096 if (efx
->state
!= STATE_RUNNING
) {
2097 netif_info(efx
, drv
, efx
->net_dev
,
2098 "scheduled reset quenched. NIC not RUNNING\n");
2103 (void)efx_reset(efx
, efx
->reset_pending
);
2107 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
2109 enum reset_type method
;
2111 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
2112 netif_info(efx
, drv
, efx
->net_dev
,
2113 "quenching already scheduled reset\n");
2118 case RESET_TYPE_INVISIBLE
:
2119 case RESET_TYPE_ALL
:
2120 case RESET_TYPE_WORLD
:
2121 case RESET_TYPE_DISABLE
:
2124 case RESET_TYPE_RX_RECOVERY
:
2125 case RESET_TYPE_RX_DESC_FETCH
:
2126 case RESET_TYPE_TX_DESC_FETCH
:
2127 case RESET_TYPE_TX_SKIP
:
2128 method
= RESET_TYPE_INVISIBLE
;
2130 case RESET_TYPE_MC_FAILURE
:
2132 method
= RESET_TYPE_ALL
;
2137 netif_dbg(efx
, drv
, efx
->net_dev
,
2138 "scheduling %s reset for %s\n",
2139 RESET_TYPE(method
), RESET_TYPE(type
));
2141 netif_dbg(efx
, drv
, efx
->net_dev
, "scheduling %s reset\n",
2142 RESET_TYPE(method
));
2144 efx
->reset_pending
= method
;
2146 /* efx_process_channel() will no longer read events once a
2147 * reset is scheduled. So switch back to poll'd MCDI completions. */
2148 efx_mcdi_mode_poll(efx
);
2150 queue_work(reset_workqueue
, &efx
->reset_work
);
2153 /**************************************************************************
2155 * List of NICs we support
2157 **************************************************************************/
2159 /* PCI device ID table */
2160 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table
) = {
2161 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
2162 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
2163 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
2164 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
2165 {PCI_DEVICE(EFX_VENDID_SFC
, BETHPAGE_A_P_DEVID
),
2166 .driver_data
= (unsigned long) &siena_a0_nic_type
},
2167 {PCI_DEVICE(EFX_VENDID_SFC
, SIENA_A_P_DEVID
),
2168 .driver_data
= (unsigned long) &siena_a0_nic_type
},
2169 {0} /* end of list */
2172 /**************************************************************************
2174 * Dummy PHY/MAC operations
2176 * Can be used for some unimplemented operations
2177 * Needed so all function pointers are valid and do not have to be tested
2180 **************************************************************************/
2181 int efx_port_dummy_op_int(struct efx_nic
*efx
)
2185 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
2187 static bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
2192 static struct efx_phy_operations efx_dummy_phy_operations
= {
2193 .init
= efx_port_dummy_op_int
,
2194 .reconfigure
= efx_port_dummy_op_int
,
2195 .poll
= efx_port_dummy_op_poll
,
2196 .fini
= efx_port_dummy_op_void
,
2199 /**************************************************************************
2203 **************************************************************************/
2205 /* This zeroes out and then fills in the invariants in a struct
2206 * efx_nic (including all sub-structures).
2208 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
2209 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
2213 /* Initialise common structures */
2214 memset(efx
, 0, sizeof(*efx
));
2215 spin_lock_init(&efx
->biu_lock
);
2216 #ifdef CONFIG_SFC_MTD
2217 INIT_LIST_HEAD(&efx
->mtd_list
);
2219 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
2220 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
2221 efx
->pci_dev
= pci_dev
;
2222 efx
->msg_enable
= debug
;
2223 efx
->state
= STATE_INIT
;
2224 efx
->reset_pending
= RESET_TYPE_NONE
;
2225 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
2227 efx
->net_dev
= net_dev
;
2228 efx
->rx_checksum_enabled
= true;
2229 spin_lock_init(&efx
->stats_lock
);
2230 mutex_init(&efx
->mac_lock
);
2231 efx
->mac_op
= type
->default_mac_ops
;
2232 efx
->phy_op
= &efx_dummy_phy_operations
;
2233 efx
->mdio
.dev
= net_dev
;
2234 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
2236 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
2237 efx
->channel
[i
] = efx_alloc_channel(efx
, i
, NULL
);
2238 if (!efx
->channel
[i
])
2244 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
2246 /* Higher numbered interrupt modes are less capable! */
2247 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
2250 /* Would be good to use the net_dev name, but we're too early */
2251 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
2253 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
2254 if (!efx
->workqueue
)
2260 efx_fini_struct(efx
);
2264 static void efx_fini_struct(struct efx_nic
*efx
)
2268 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++)
2269 kfree(efx
->channel
[i
]);
2271 if (efx
->workqueue
) {
2272 destroy_workqueue(efx
->workqueue
);
2273 efx
->workqueue
= NULL
;
2277 /**************************************************************************
2281 **************************************************************************/
2283 /* Main body of final NIC shutdown code
2284 * This is called only at module unload (or hotplug removal).
2286 static void efx_pci_remove_main(struct efx_nic
*efx
)
2288 efx_nic_fini_interrupt(efx
);
2289 efx_fini_channels(efx
);
2291 efx
->type
->fini(efx
);
2293 efx_remove_all(efx
);
2296 /* Final NIC shutdown
2297 * This is called only at module unload (or hotplug removal).
2299 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2301 struct efx_nic
*efx
;
2303 efx
= pci_get_drvdata(pci_dev
);
2307 /* Mark the NIC as fini, then stop the interface */
2309 efx
->state
= STATE_FINI
;
2310 dev_close(efx
->net_dev
);
2312 /* Allow any queued efx_resets() to complete */
2315 efx_unregister_netdev(efx
);
2317 efx_mtd_remove(efx
);
2319 /* Wait for any scheduled resets to complete. No more will be
2320 * scheduled from this point because efx_stop_all() has been
2321 * called, we are no longer registered with driverlink, and
2322 * the net_device's have been removed. */
2323 cancel_work_sync(&efx
->reset_work
);
2325 efx_pci_remove_main(efx
);
2328 netif_dbg(efx
, drv
, efx
->net_dev
, "shutdown successful\n");
2330 pci_set_drvdata(pci_dev
, NULL
);
2331 efx_fini_struct(efx
);
2332 free_netdev(efx
->net_dev
);
2335 /* Main body of NIC initialisation
2336 * This is called at module load (or hotplug insertion, theoretically).
2338 static int efx_pci_probe_main(struct efx_nic
*efx
)
2342 /* Do start-of-day initialisation */
2343 rc
= efx_probe_all(efx
);
2349 rc
= efx
->type
->init(efx
);
2351 netif_err(efx
, probe
, efx
->net_dev
,
2352 "failed to initialise NIC\n");
2356 rc
= efx_init_port(efx
);
2358 netif_err(efx
, probe
, efx
->net_dev
,
2359 "failed to initialise port\n");
2363 efx_init_channels(efx
);
2365 rc
= efx_nic_init_interrupt(efx
);
2372 efx_fini_channels(efx
);
2375 efx
->type
->fini(efx
);
2378 efx_remove_all(efx
);
2383 /* NIC initialisation
2385 * This is called at module load (or hotplug insertion,
2386 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2387 * sets up and registers the network devices with the kernel and hooks
2388 * the interrupt service routine. It does not prepare the device for
2389 * transmission; this is left to the first time one of the network
2390 * interfaces is brought up (i.e. efx_net_open).
2392 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2393 const struct pci_device_id
*entry
)
2395 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2396 struct net_device
*net_dev
;
2397 struct efx_nic
*efx
;
2400 /* Allocate and initialise a struct net_device and struct efx_nic */
2401 net_dev
= alloc_etherdev_mq(sizeof(*efx
), EFX_MAX_CORE_TX_QUEUES
);
2404 net_dev
->features
|= (type
->offload_features
| NETIF_F_SG
|
2405 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2407 if (type
->offload_features
& NETIF_F_V6_CSUM
)
2408 net_dev
->features
|= NETIF_F_TSO6
;
2409 /* Mask for features that also apply to VLAN devices */
2410 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2411 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2412 efx
= netdev_priv(net_dev
);
2413 pci_set_drvdata(pci_dev
, efx
);
2414 SET_NETDEV_DEV(net_dev
, &pci_dev
->dev
);
2415 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2419 netif_info(efx
, probe
, efx
->net_dev
,
2420 "Solarflare Communications NIC detected\n");
2422 /* Set up basic I/O (BAR mappings etc) */
2423 rc
= efx_init_io(efx
);
2427 /* No serialisation is required with the reset path because
2428 * we're in STATE_INIT. */
2429 for (i
= 0; i
< 5; i
++) {
2430 rc
= efx_pci_probe_main(efx
);
2432 /* Serialise against efx_reset(). No more resets will be
2433 * scheduled since efx_stop_all() has been called, and we
2434 * have not and never have been registered with either
2435 * the rtnetlink or driverlink layers. */
2436 cancel_work_sync(&efx
->reset_work
);
2439 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
2440 /* If there was a scheduled reset during
2441 * probe, the NIC is probably hosed anyway */
2442 efx_pci_remove_main(efx
);
2449 /* Retry if a recoverably reset event has been scheduled */
2450 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2451 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2454 efx
->reset_pending
= RESET_TYPE_NONE
;
2458 netif_err(efx
, probe
, efx
->net_dev
, "Could not reset NIC\n");
2462 /* Switch to the running state before we expose the device to the OS,
2463 * so that dev_open()|efx_start_all() will actually start the device */
2464 efx
->state
= STATE_RUNNING
;
2466 rc
= efx_register_netdev(efx
);
2470 netif_dbg(efx
, probe
, efx
->net_dev
, "initialisation successful\n");
2473 efx_mtd_probe(efx
); /* allowed to fail */
2478 efx_pci_remove_main(efx
);
2483 efx_fini_struct(efx
);
2486 netif_dbg(efx
, drv
, efx
->net_dev
, "initialisation failed. rc=%d\n", rc
);
2487 free_netdev(net_dev
);
2491 static int efx_pm_freeze(struct device
*dev
)
2493 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2495 efx
->state
= STATE_FINI
;
2497 netif_device_detach(efx
->net_dev
);
2500 efx_fini_channels(efx
);
2505 static int efx_pm_thaw(struct device
*dev
)
2507 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2509 efx
->state
= STATE_INIT
;
2511 efx_init_channels(efx
);
2513 mutex_lock(&efx
->mac_lock
);
2514 efx
->phy_op
->reconfigure(efx
);
2515 mutex_unlock(&efx
->mac_lock
);
2519 netif_device_attach(efx
->net_dev
);
2521 efx
->state
= STATE_RUNNING
;
2523 efx
->type
->resume_wol(efx
);
2525 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2526 queue_work(reset_workqueue
, &efx
->reset_work
);
2531 static int efx_pm_poweroff(struct device
*dev
)
2533 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2534 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2536 efx
->type
->fini(efx
);
2538 efx
->reset_pending
= RESET_TYPE_NONE
;
2540 pci_save_state(pci_dev
);
2541 return pci_set_power_state(pci_dev
, PCI_D3hot
);
2544 /* Used for both resume and restore */
2545 static int efx_pm_resume(struct device
*dev
)
2547 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2548 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2551 rc
= pci_set_power_state(pci_dev
, PCI_D0
);
2554 pci_restore_state(pci_dev
);
2555 rc
= pci_enable_device(pci_dev
);
2558 pci_set_master(efx
->pci_dev
);
2559 rc
= efx
->type
->reset(efx
, RESET_TYPE_ALL
);
2562 rc
= efx
->type
->init(efx
);
2569 static int efx_pm_suspend(struct device
*dev
)
2574 rc
= efx_pm_poweroff(dev
);
2580 static struct dev_pm_ops efx_pm_ops
= {
2581 .suspend
= efx_pm_suspend
,
2582 .resume
= efx_pm_resume
,
2583 .freeze
= efx_pm_freeze
,
2584 .thaw
= efx_pm_thaw
,
2585 .poweroff
= efx_pm_poweroff
,
2586 .restore
= efx_pm_resume
,
2589 static struct pci_driver efx_pci_driver
= {
2590 .name
= KBUILD_MODNAME
,
2591 .id_table
= efx_pci_table
,
2592 .probe
= efx_pci_probe
,
2593 .remove
= efx_pci_remove
,
2594 .driver
.pm
= &efx_pm_ops
,
2597 /**************************************************************************
2599 * Kernel module interface
2601 *************************************************************************/
2603 module_param(interrupt_mode
, uint
, 0444);
2604 MODULE_PARM_DESC(interrupt_mode
,
2605 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2607 static int __init
efx_init_module(void)
2611 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2613 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2617 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2618 if (!reset_workqueue
) {
2623 rc
= pci_register_driver(&efx_pci_driver
);
2630 destroy_workqueue(reset_workqueue
);
2632 unregister_netdevice_notifier(&efx_netdev_notifier
);
2637 static void __exit
efx_exit_module(void)
2639 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2641 pci_unregister_driver(&efx_pci_driver
);
2642 destroy_workqueue(reset_workqueue
);
2643 unregister_netdevice_notifier(&efx_netdev_notifier
);
2647 module_init(efx_init_module
);
2648 module_exit(efx_exit_module
);
2650 MODULE_AUTHOR("Solarflare Communications and "
2651 "Michael Brown <mbrown@fensystems.co.uk>");
2652 MODULE_DESCRIPTION("Solarflare Communications network driver");
2653 MODULE_LICENSE("GPL");
2654 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);