1 /* linux/drivers/spi/spi_s3c24xx.c
3 * Copyright (c) 2006 Ben Dooks
4 * Copyright (c) 2006 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/spinlock.h>
15 #include <linux/workqueue.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/errno.h>
19 #include <linux/err.h>
20 #include <linux/clk.h>
21 #include <linux/platform_device.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/spi_bitbang.h>
28 #include <asm/hardware.h>
30 #include <asm/arch/regs-gpio.h>
31 #include <asm/plat-s3c24xx/regs-spi.h>
32 #include <asm/arch/spi.h>
35 /* bitbang has to be first */
36 struct spi_bitbang bitbang
;
37 struct completion done
;
44 void (*set_cs
)(struct s3c2410_spi_info
*spi
,
48 const unsigned char *tx
;
52 struct resource
*ioarea
;
53 struct spi_master
*master
;
54 struct spi_device
*curdev
;
56 struct s3c2410_spi_info
*pdata
;
59 #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
60 #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
62 static inline struct s3c24xx_spi
*to_hw(struct spi_device
*sdev
)
64 return spi_master_get_devdata(sdev
->master
);
67 static void s3c24xx_spi_gpiocs(struct s3c2410_spi_info
*spi
, int cs
, int pol
)
69 s3c2410_gpio_setpin(spi
->pin_cs
, pol
);
72 static void s3c24xx_spi_chipsel(struct spi_device
*spi
, int value
)
74 struct s3c24xx_spi
*hw
= to_hw(spi
);
75 unsigned int cspol
= spi
->mode
& SPI_CS_HIGH
? 1 : 0;
79 case BITBANG_CS_INACTIVE
:
80 hw
->set_cs(hw
->pdata
, spi
->chip_select
, cspol
^1);
83 case BITBANG_CS_ACTIVE
:
84 spcon
= readb(hw
->regs
+ S3C2410_SPCON
);
86 if (spi
->mode
& SPI_CPHA
)
87 spcon
|= S3C2410_SPCON_CPHA_FMTB
;
89 spcon
&= ~S3C2410_SPCON_CPHA_FMTB
;
91 if (spi
->mode
& SPI_CPOL
)
92 spcon
|= S3C2410_SPCON_CPOL_HIGH
;
94 spcon
&= ~S3C2410_SPCON_CPOL_HIGH
;
96 spcon
|= S3C2410_SPCON_ENSCK
;
98 /* write new configration */
100 writeb(spcon
, hw
->regs
+ S3C2410_SPCON
);
101 hw
->set_cs(hw
->pdata
, spi
->chip_select
, cspol
);
107 static int s3c24xx_spi_setupxfer(struct spi_device
*spi
,
108 struct spi_transfer
*t
)
110 struct s3c24xx_spi
*hw
= to_hw(spi
);
115 bpw
= t
? t
->bits_per_word
: spi
->bits_per_word
;
116 hz
= t
? t
->speed_hz
: spi
->max_speed_hz
;
119 dev_err(&spi
->dev
, "invalid bits-per-word (%d)\n", bpw
);
123 div
= clk_get_rate(hw
->clk
) / hz
;
125 /* is clk = pclk / (2 * (pre+1)), or is it
126 * clk = (pclk * 2) / ( pre + 1) */
136 dev_dbg(&spi
->dev
, "setting pre-scaler to %d (hz %d)\n", div
, hz
);
137 writeb(div
, hw
->regs
+ S3C2410_SPPRE
);
139 spin_lock(&hw
->bitbang
.lock
);
140 if (!hw
->bitbang
.busy
) {
141 hw
->bitbang
.chipselect(spi
, BITBANG_CS_INACTIVE
);
142 /* need to ndelay for 0.5 clocktick ? */
144 spin_unlock(&hw
->bitbang
.lock
);
149 /* the spi->mode bits understood by this driver: */
150 #define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH)
152 static int s3c24xx_spi_setup(struct spi_device
*spi
)
156 if (!spi
->bits_per_word
)
157 spi
->bits_per_word
= 8;
159 if (spi
->mode
& ~MODEBITS
) {
160 dev_dbg(&spi
->dev
, "setup: unsupported mode bits %x\n",
161 spi
->mode
& ~MODEBITS
);
165 ret
= s3c24xx_spi_setupxfer(spi
, NULL
);
167 dev_err(&spi
->dev
, "setupxfer returned %d\n", ret
);
171 dev_dbg(&spi
->dev
, "%s: mode %d, %u bpw, %d hz\n",
172 __FUNCTION__
, spi
->mode
, spi
->bits_per_word
,
178 static inline unsigned int hw_txbyte(struct s3c24xx_spi
*hw
, int count
)
180 return hw
->tx
? hw
->tx
[count
] : 0;
183 static int s3c24xx_spi_txrx(struct spi_device
*spi
, struct spi_transfer
*t
)
185 struct s3c24xx_spi
*hw
= to_hw(spi
);
187 dev_dbg(&spi
->dev
, "txrx: tx %p, rx %p, len %d\n",
188 t
->tx_buf
, t
->rx_buf
, t
->len
);
195 /* send the first byte */
196 writeb(hw_txbyte(hw
, 0), hw
->regs
+ S3C2410_SPTDAT
);
197 wait_for_completion(&hw
->done
);
202 static irqreturn_t
s3c24xx_spi_irq(int irq
, void *dev
)
204 struct s3c24xx_spi
*hw
= dev
;
205 unsigned int spsta
= readb(hw
->regs
+ S3C2410_SPSTA
);
206 unsigned int count
= hw
->count
;
208 if (spsta
& S3C2410_SPSTA_DCOL
) {
209 dev_dbg(hw
->dev
, "data-collision\n");
214 if (!(spsta
& S3C2410_SPSTA_READY
)) {
215 dev_dbg(hw
->dev
, "spi not ready for tx?\n");
223 hw
->rx
[count
] = readb(hw
->regs
+ S3C2410_SPRDAT
);
228 writeb(hw_txbyte(hw
, count
), hw
->regs
+ S3C2410_SPTDAT
);
236 static int s3c24xx_spi_probe(struct platform_device
*pdev
)
238 struct s3c24xx_spi
*hw
;
239 struct spi_master
*master
;
240 struct spi_board_info
*bi
;
241 struct resource
*res
;
245 master
= spi_alloc_master(&pdev
->dev
, sizeof(struct s3c24xx_spi
));
246 if (master
== NULL
) {
247 dev_err(&pdev
->dev
, "No memory for spi_master\n");
252 hw
= spi_master_get_devdata(master
);
253 memset(hw
, 0, sizeof(struct s3c24xx_spi
));
255 hw
->master
= spi_master_get(master
);
256 hw
->pdata
= pdev
->dev
.platform_data
;
257 hw
->dev
= &pdev
->dev
;
259 if (hw
->pdata
== NULL
) {
260 dev_err(&pdev
->dev
, "No platform data supplied\n");
265 platform_set_drvdata(pdev
, hw
);
266 init_completion(&hw
->done
);
268 /* setup the state for the bitbang driver */
270 hw
->bitbang
.master
= hw
->master
;
271 hw
->bitbang
.setup_transfer
= s3c24xx_spi_setupxfer
;
272 hw
->bitbang
.chipselect
= s3c24xx_spi_chipsel
;
273 hw
->bitbang
.txrx_bufs
= s3c24xx_spi_txrx
;
274 hw
->bitbang
.master
->setup
= s3c24xx_spi_setup
;
276 dev_dbg(hw
->dev
, "bitbang at %p\n", &hw
->bitbang
);
278 /* find and map our resources */
280 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
282 dev_err(&pdev
->dev
, "Cannot get IORESOURCE_MEM\n");
287 hw
->ioarea
= request_mem_region(res
->start
, (res
->end
- res
->start
)+1,
290 if (hw
->ioarea
== NULL
) {
291 dev_err(&pdev
->dev
, "Cannot reserve region\n");
296 hw
->regs
= ioremap(res
->start
, (res
->end
- res
->start
)+1);
297 if (hw
->regs
== NULL
) {
298 dev_err(&pdev
->dev
, "Cannot map IO\n");
303 hw
->irq
= platform_get_irq(pdev
, 0);
305 dev_err(&pdev
->dev
, "No IRQ specified\n");
310 err
= request_irq(hw
->irq
, s3c24xx_spi_irq
, 0, pdev
->name
, hw
);
312 dev_err(&pdev
->dev
, "Cannot claim IRQ\n");
316 hw
->clk
= clk_get(&pdev
->dev
, "spi");
317 if (IS_ERR(hw
->clk
)) {
318 dev_err(&pdev
->dev
, "No clock for device\n");
319 err
= PTR_ERR(hw
->clk
);
323 /* for the moment, permanently enable the clock */
327 /* program defaults into the registers */
329 writeb(0xff, hw
->regs
+ S3C2410_SPPRE
);
330 writeb(SPPIN_DEFAULT
, hw
->regs
+ S3C2410_SPPIN
);
331 writeb(SPCON_DEFAULT
, hw
->regs
+ S3C2410_SPCON
);
333 /* setup any gpio we can */
335 if (!hw
->pdata
->set_cs
) {
336 hw
->set_cs
= s3c24xx_spi_gpiocs
;
338 s3c2410_gpio_setpin(hw
->pdata
->pin_cs
, 1);
339 s3c2410_gpio_cfgpin(hw
->pdata
->pin_cs
, S3C2410_GPIO_OUTPUT
);
341 hw
->set_cs
= hw
->pdata
->set_cs
;
343 /* register our spi controller */
345 err
= spi_bitbang_start(&hw
->bitbang
);
347 dev_err(&pdev
->dev
, "Failed to register SPI master\n");
351 /* register all the devices associated */
353 bi
= &hw
->pdata
->board_info
[0];
354 for (i
= 0; i
< hw
->pdata
->board_size
; i
++, bi
++) {
355 dev_info(hw
->dev
, "registering %s\n", bi
->modalias
);
357 bi
->controller_data
= hw
;
358 spi_new_device(master
, bi
);
364 clk_disable(hw
->clk
);
368 free_irq(hw
->irq
, hw
);
374 release_resource(hw
->ioarea
);
379 spi_master_put(hw
->master
);;
385 static int s3c24xx_spi_remove(struct platform_device
*dev
)
387 struct s3c24xx_spi
*hw
= platform_get_drvdata(dev
);
389 platform_set_drvdata(dev
, NULL
);
391 spi_unregister_master(hw
->master
);
393 clk_disable(hw
->clk
);
396 free_irq(hw
->irq
, hw
);
399 release_resource(hw
->ioarea
);
402 spi_master_put(hw
->master
);
409 static int s3c24xx_spi_suspend(struct platform_device
*pdev
, pm_message_t msg
)
411 struct s3c24xx_spi
*hw
= platform_get_drvdata(pdev
);
413 clk_disable(hw
->clk
);
417 static int s3c24xx_spi_resume(struct platform_device
*pdev
)
419 struct s3c24xx_spi
*hw
= platform_get_drvdata(pdev
);
426 #define s3c24xx_spi_suspend NULL
427 #define s3c24xx_spi_resume NULL
430 MODULE_ALIAS("s3c2410_spi"); /* for platform bus hotplug */
431 static struct platform_driver s3c24xx_spidrv
= {
432 .probe
= s3c24xx_spi_probe
,
433 .remove
= s3c24xx_spi_remove
,
434 .suspend
= s3c24xx_spi_suspend
,
435 .resume
= s3c24xx_spi_resume
,
437 .name
= "s3c2410-spi",
438 .owner
= THIS_MODULE
,
442 static int __init
s3c24xx_spi_init(void)
444 return platform_driver_register(&s3c24xx_spidrv
);
447 static void __exit
s3c24xx_spi_exit(void)
449 platform_driver_unregister(&s3c24xx_spidrv
);
452 module_init(s3c24xx_spi_init
);
453 module_exit(s3c24xx_spi_exit
);
455 MODULE_DESCRIPTION("S3C24XX SPI Driver");
456 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
457 MODULE_LICENSE("GPL");