drivers/ide/ide-dma.c

   1 /*
   2  *  linux/drivers/ide/ide-dma.c         Version 4.10    June 9, 2000
   3  *
   4  *  Copyright (c) 1999-2000     Andre Hedrick <andre@linux-ide.org>
   5  *  May be copied or modified under the terms of the GNU General Public License
   6  */
   7
   8 /*
   9  *  Special Thanks to Mark for his Six years of work.
  10  *
  11  *  Copyright (c) 1995-1998  Mark Lord
  12  *  May be copied or modified under the terms of the GNU General Public License
  13  */
  14
  15 /*
  16  * This module provides support for the bus-master IDE DMA functions
  17  * of various PCI chipsets, including the Intel PIIX (i82371FB for
  18  * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
  19  * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
  20  * ("PIIX" stands for "PCI ISA IDE Xcellerator").
  21  *
  22  * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
  23  *
  24  * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  25  *
  26  * By default, DMA support is prepared for use, but is currently enabled only
  27  * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
  28  * or which are recognized as "good" (see table below).  Drives with only mode0
  29  * or mode1 (multi/single) DMA should also work with this chipset/driver
  30  * (eg. MC2112A) but are not enabled by default.
  31  *
  32  * Use "hdparm -i" to view modes supported by a given drive.
  33  *
  34  * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
  35  * DMA support, but must be (re-)compiled against this kernel version or later.
  36  *
  37  * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
  38  * If problems arise, ide.c will disable DMA operation after a few retries.
  39  * This error recovery mechanism works and has been extremely well exercised.
  40  *
  41  * IDE drives, depending on their vintage, may support several different modes
  42  * of DMA operation.  The boot-time modes are indicated with a "*" in
  43  * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
  44  * the "hdparm -X" feature.  There is seldom a need to do this, as drives
  45  * normally power-up with their "best" PIO/DMA modes enabled.
  46  *
  47  * Testing has been done with a rather extensive number of drives,
  48  * with Quantum & Western Digital models generally outperforming the pack,
  49  * and Fujitsu & Conner (and some Seagate which are really Conner) drives
  50  * showing more lackluster throughput.
  51  *
  52  * Keep an eye on /var/adm/messages for "DMA disabled" messages.
  53  *
  54  * Some people have reported trouble with Intel Zappa motherboards.
  55  * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
  56  * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
  57  * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
  58  *
  59  * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  60  * fixing the problem with the BIOS on some Acer motherboards.
  61  *
  62  * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  63  * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  64  *
  65  * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  66  * at generic DMA -- his patches were referred to when preparing this code.
  67  *
  68  * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  69  * for supplying a Promise UDMA board & WD UDMA drive for this work!
  70  *
  71  * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
  72  *
  73  * ATA-66/100 and recovery functions, I forgot the rest......
  74  *
  75  */
  76
  77 #include <linux/module.h>
  78 #include <linux/types.h>
  79 #include <linux/kernel.h>
  80 #include <linux/timer.h>
  81 #include <linux/mm.h>
  82 #include <linux/interrupt.h>
  83 #include <linux/pci.h>
  84 #include <linux/init.h>
  85 #include <linux/ide.h>
  86 #include <linux/delay.h>
  87 #include <linux/scatterlist.h>
  88
  89 #include <asm/io.h>
  90 #include <asm/irq.h>
  91
  92 static const struct drive_list_entry drive_whitelist [] = {
  93
  94         { "Micropolis 2112A"    ,       "ALL"           },
  95         { "CONNER CTMA 4000"    ,       "ALL"           },
  96         { "CONNER CTT8000-A"    ,       "ALL"           },
  97         { "ST34342A"            ,       "ALL"           },
  98         { NULL                  ,       NULL            }
  99 };
 100
 101 static const struct drive_list_entry drive_blacklist [] = {
 102
 103         { "WDC AC11000H"        ,       "ALL"           },
 104         { "WDC AC22100H"        ,       "ALL"           },
 105         { "WDC AC32500H"        ,       "ALL"           },
 106         { "WDC AC33100H"        ,       "ALL"           },
 107         { "WDC AC31600H"        ,       "ALL"           },
 108         { "WDC AC32100H"        ,       "24.09P07"      },
 109         { "WDC AC23200L"        ,       "21.10N21"      },
 110         { "Compaq CRD-8241B"    ,       "ALL"           },
 111         { "CRD-8400B"           ,       "ALL"           },
 112         { "CRD-8480B",                  "ALL"           },
 113         { "CRD-8482B",                  "ALL"           },
 114         { "CRD-84"              ,       "ALL"           },
 115         { "SanDisk SDP3B"       ,       "ALL"           },
 116         { "SanDisk SDP3B-64"    ,       "ALL"           },
 117         { "SANYO CD-ROM CRD"    ,       "ALL"           },
 118         { "HITACHI CDR-8"       ,       "ALL"           },
 119         { "HITACHI CDR-8335"    ,       "ALL"           },
 120         { "HITACHI CDR-8435"    ,       "ALL"           },
 121         { "Toshiba CD-ROM XM-6202B"     ,       "ALL"           },
 122         { "CD-532E-A"           ,       "ALL"           },
 123         { "E-IDE CD-ROM CR-840",        "ALL"           },
 124         { "CD-ROM Drive/F5A",   "ALL"           },
 125         { "WPI CDD-820",                "ALL"           },
 126         { "SAMSUNG CD-ROM SC-148C",     "ALL"           },
 127         { "SAMSUNG CD-ROM SC",  "ALL"           },
 128         { "SanDisk SDP3B-64"    ,       "ALL"           },
 129         { "ATAPI CD-ROM DRIVE 40X MAXIMUM",     "ALL"           },
 130         { "_NEC DV5800A",               "ALL"           },
 131         { NULL                  ,       NULL            }
 132
 133 };
 134
 135 /**
 136  *      ide_in_drive_list       -       look for drive in black/white list
 137  *      @id: drive identifier
 138  *      @drive_table: list to inspect
 139  *
 140  *      Look for a drive in the blacklist and the whitelist tables
 141  *      Returns 1 if the drive is found in the table.
 142  */
 143
 144 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 145 {
 146         for ( ; drive_table->id_model ; drive_table++)
 147                 if ((!strcmp(drive_table->id_model, id->model)) &&
 148                     ((strstr(id->fw_rev, drive_table->id_firmware)) ||
 149                      (!strcmp(drive_table->id_firmware, "ALL"))))
 150                         return 1;
 151         return 0;
 152 }
 153
 154 /**
 155  *      ide_dma_intr    -       IDE DMA interrupt handler
 156  *      @drive: the drive the interrupt is for
 157  *
 158  *      Handle an interrupt completing a read/write DMA transfer on an
 159  *      IDE device
 160  */
 161
 162 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
 163 {
 164         u8 stat = 0, dma_stat = 0;
 165
 166         dma_stat = HWIF(drive)->ide_dma_end(drive);
 167         stat = HWIF(drive)->INB(IDE_STATUS_REG);        /* get drive status */
 168         if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
 169                 if (!dma_stat) {
 170                         struct request *rq = HWGROUP(drive)->rq;
 171
 172                         if (rq->rq_disk) {
 173                                 ide_driver_t *drv;
 174
 175                                 drv = *(ide_driver_t **)rq->rq_disk->private_data;
 176                                 drv->end_request(drive, 1, rq->nr_sectors);
 177                         } else
 178                                 ide_end_request(drive, 1, rq->nr_sectors);
 179                         return ide_stopped;
 180                 }
 181                 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
 182                        drive->name, dma_stat);
 183         }
 184         return ide_error(drive, "dma_intr", stat);
 185 }
 186
 187 EXPORT_SYMBOL_GPL(ide_dma_intr);
 188
 189 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 190 /**
 191  *      ide_build_sglist        -       map IDE scatter gather for DMA I/O
 192  *      @drive: the drive to build the DMA table for
 193  *      @rq: the request holding the sg list
 194  *
 195  *      Perform the PCI mapping magic necessary to access the source or
 196  *      target buffers of a request via PCI DMA. The lower layers of the
 197  *      kernel provide the necessary cache management so that we can
 198  *      operate in a portable fashion
 199  */
 200
 201 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
 202 {
 203         ide_hwif_t *hwif = HWIF(drive);
 204         struct scatterlist *sg = hwif->sg_table;
 205
 206         BUG_ON((rq->cmd_type == REQ_TYPE_ATA_TASKFILE) && rq->nr_sectors > 256);
 207
 208         ide_map_sg(drive, rq);
 209
 210         if (rq_data_dir(rq) == READ)
 211                 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
 212         else
 213                 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
 214
 215         return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
 216 }
 217
 218 EXPORT_SYMBOL_GPL(ide_build_sglist);
 219
 220 /**
 221  *      ide_build_dmatable      -       build IDE DMA table
 222  *
 223  *      ide_build_dmatable() prepares a dma request. We map the command
 224  *      to get the pci bus addresses of the buffers and then build up
 225  *      the PRD table that the IDE layer wants to be fed. The code
 226  *      knows about the 64K wrap bug in the CS5530.
 227  *
 228  *      Returns the number of built PRD entries if all went okay,
 229  *      returns 0 otherwise.
 230  *
 231  *      May also be invoked from trm290.c
 232  */
 233
 234 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
 235 {
 236         ide_hwif_t *hwif        = HWIF(drive);
 237         unsigned int *table     = hwif->dmatable_cpu;
 238         unsigned int is_trm290  = (hwif->chipset == ide_trm290) ? 1 : 0;
 239         unsigned int count = 0;
 240         int i;
 241         struct scatterlist *sg;
 242
 243         hwif->sg_nents = i = ide_build_sglist(drive, rq);
 244
 245         if (!i)
 246                 return 0;
 247
 248         sg = hwif->sg_table;
 249         while (i) {
 250                 u32 cur_addr;
 251                 u32 cur_len;
 252
 253                 cur_addr = sg_dma_address(sg);
 254                 cur_len = sg_dma_len(sg);
 255
 256                 /*
 257                  * Fill in the dma table, without crossing any 64kB boundaries.
 258                  * Most hardware requires 16-bit alignment of all blocks,
 259                  * but the trm290 requires 32-bit alignment.
 260                  */
 261
 262                 while (cur_len) {
 263                         if (count++ >= PRD_ENTRIES) {
 264                                 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
 265                                 goto use_pio_instead;
 266                         } else {
 267                                 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
 268
 269                                 if (bcount > cur_len)
 270                                         bcount = cur_len;
 271                                 *table++ = cpu_to_le32(cur_addr);
 272                                 xcount = bcount & 0xffff;
 273                                 if (is_trm290)
 274                                         xcount = ((xcount >> 2) - 1) << 16;
 275                                 if (xcount == 0x0000) {
 276         /*
 277          * Most chipsets correctly interpret a length of 0x0000 as 64KB,
 278          * but at least one (e.g. CS5530) misinterprets it as zero (!).
 279          * So here we break the 64KB entry into two 32KB entries instead.
 280          */
 281                                         if (count++ >= PRD_ENTRIES) {
 282                                                 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
 283                                                 goto use_pio_instead;
 284                                         }
 285                                         *table++ = cpu_to_le32(0x8000);
 286                                         *table++ = cpu_to_le32(cur_addr + 0x8000);
 287                                         xcount = 0x8000;
 288                                 }
 289                                 *table++ = cpu_to_le32(xcount);
 290                                 cur_addr += bcount;
 291                                 cur_len -= bcount;
 292                         }
 293                 }
 294
 295                 sg++;
 296                 i--;
 297         }
 298
 299         if (count) {
 300                 if (!is_trm290)
 301                         *--table |= cpu_to_le32(0x80000000);
 302                 return count;
 303         }
 304         printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
 305 use_pio_instead:
 306         pci_unmap_sg(hwif->pci_dev,
 307                      hwif->sg_table,
 308                      hwif->sg_nents,
 309                      hwif->sg_dma_direction);
 310         return 0; /* revert to PIO for this request */
 311 }
 312
 313 EXPORT_SYMBOL_GPL(ide_build_dmatable);
 314
 315 /**
 316  *      ide_destroy_dmatable    -       clean up DMA mapping
 317  *      @drive: The drive to unmap
 318  *
 319  *      Teardown mappings after DMA has completed. This must be called
 320  *      after the completion of each use of ide_build_dmatable and before
 321  *      the next use of ide_build_dmatable. Failure to do so will cause
 322  *      an oops as only one mapping can be live for each target at a given
 323  *      time.
 324  */
 325
 326 void ide_destroy_dmatable (ide_drive_t *drive)
 327 {
 328         struct pci_dev *dev = HWIF(drive)->pci_dev;
 329         struct scatterlist *sg = HWIF(drive)->sg_table;
 330         int nents = HWIF(drive)->sg_nents;
 331
 332         pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
 333 }
 334
 335 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
 336
 337 /**
 338  *      config_drive_for_dma    -       attempt to activate IDE DMA
 339  *      @drive: the drive to place in DMA mode
 340  *
 341  *      If the drive supports at least mode 2 DMA or UDMA of any kind
 342  *      then attempt to place it into DMA mode. Drives that are known to
 343  *      support DMA but predate the DMA properties or that are known
 344  *      to have DMA handling bugs are also set up appropriately based
 345  *      on the good/bad drive lists.
 346  */
 347
 348 static int config_drive_for_dma (ide_drive_t *drive)
 349 {
 350         struct hd_driveid *id = drive->id;
 351         ide_hwif_t *hwif = HWIF(drive);
 352
 353         if ((id->capability & 1) && hwif->autodma) {
 354                 /*
 355                  * Enable DMA on any drive that has
 356                  * UltraDMA (mode 0/1/2/3/4/5/6) enabled
 357                  */
 358                 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
 359                         return hwif->ide_dma_on(drive);
 360                 /*
 361                  * Enable DMA on any drive that has mode2 DMA
 362                  * (multi or single) enabled
 363                  */
 364                 if (id->field_valid & 2)        /* regular DMA */
 365                         if ((id->dma_mword & 0x404) == 0x404 ||
 366                             (id->dma_1word & 0x404) == 0x404)
 367                                 return hwif->ide_dma_on(drive);
 368
 369                 /* Consult the list of known "good" drives */
 370                 if (__ide_dma_good_drive(drive))
 371                         return hwif->ide_dma_on(drive);
 372         }
 373 //      if (hwif->tuneproc != NULL) hwif->tuneproc(drive, 255);
 374         return hwif->ide_dma_off_quietly(drive);
 375 }
 376
 377 /**
 378  *      dma_timer_expiry        -       handle a DMA timeout
 379  *      @drive: Drive that timed out
 380  *
 381  *      An IDE DMA transfer timed out. In the event of an error we ask
 382  *      the driver to resolve the problem, if a DMA transfer is still
 383  *      in progress we continue to wait (arguably we need to add a
 384  *      secondary 'I don't care what the drive thinks' timeout here)
 385  *      Finally if we have an interrupt we let it complete the I/O.
 386  *      But only one time - we clear expiry and if it's still not
 387  *      completed after WAIT_CMD, we error and retry in PIO.
 388  *      This can occur if an interrupt is lost or due to hang or bugs.
 389  */
 390
 391 static int dma_timer_expiry (ide_drive_t *drive)
 392 {
 393         ide_hwif_t *hwif        = HWIF(drive);
 394         u8 dma_stat             = hwif->INB(hwif->dma_status);
 395
 396         printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
 397                 drive->name, dma_stat);
 398
 399         if ((dma_stat & 0x18) == 0x18)  /* BUSY Stupid Early Timer !! */
 400                 return WAIT_CMD;
 401
 402         HWGROUP(drive)->expiry = NULL;  /* one free ride for now */
 403
 404         /* 1 dmaing, 2 error, 4 intr */
 405         if (dma_stat & 2)       /* ERROR */
 406                 return -1;
 407
 408         if (dma_stat & 1)       /* DMAing */
 409                 return WAIT_CMD;
 410
 411         if (dma_stat & 4)       /* Got an Interrupt */
 412                 return WAIT_CMD;
 413
 414         return 0;       /* Status is unknown -- reset the bus */
 415 }
 416
 417 /**
 418  *      __ide_dma_host_off      -       Generic DMA kill
 419  *      @drive: drive to control
 420  *
 421  *      Perform the generic IDE controller DMA off operation. This
 422  *      works for most IDE bus mastering controllers
 423  */
 424
 425 int __ide_dma_host_off (ide_drive_t *drive)
 426 {
 427         ide_hwif_t *hwif        = HWIF(drive);
 428         u8 unit                 = (drive->select.b.unit & 0x01);
 429         u8 dma_stat             = hwif->INB(hwif->dma_status);
 430
 431         hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
 432         return 0;
 433 }
 434
 435 EXPORT_SYMBOL(__ide_dma_host_off);
 436
 437 /**
 438  *      __ide_dma_host_off_quietly      -       Generic DMA kill
 439  *      @drive: drive to control
 440  *
 441  *      Turn off the current DMA on this IDE controller.
 442  */
 443
 444 int __ide_dma_off_quietly (ide_drive_t *drive)
 445 {
 446         drive->using_dma = 0;
 447         ide_toggle_bounce(drive, 0);
 448
 449         if (HWIF(drive)->ide_dma_host_off(drive))
 450                 return 1;
 451
 452         return 0;
 453 }
 454
 455 EXPORT_SYMBOL(__ide_dma_off_quietly);
 456 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
 457
 458 /**
 459  *      __ide_dma_off   -       disable DMA on a device
 460  *      @drive: drive to disable DMA on
 461  *
 462  *      Disable IDE DMA for a device on this IDE controller.
 463  *      Inform the user that DMA has been disabled.
 464  */
 465
 466 int __ide_dma_off (ide_drive_t *drive)
 467 {
 468         printk(KERN_INFO "%s: DMA disabled\n", drive->name);
 469         return HWIF(drive)->ide_dma_off_quietly(drive);
 470 }
 471
 472 EXPORT_SYMBOL(__ide_dma_off);
 473
 474 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 475 /**
 476  *      __ide_dma_host_on       -       Enable DMA on a host
 477  *      @drive: drive to enable for DMA
 478  *
 479  *      Enable DMA on an IDE controller following generic bus mastering
 480  *      IDE controller behaviour
 481  */
 482
 483 int __ide_dma_host_on (ide_drive_t *drive)
 484 {
 485         if (drive->using_dma) {
 486                 ide_hwif_t *hwif        = HWIF(drive);
 487                 u8 unit                 = (drive->select.b.unit & 0x01);
 488                 u8 dma_stat             = hwif->INB(hwif->dma_status);
 489
 490                 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
 491                 return 0;
 492         }
 493         return 1;
 494 }
 495
 496 EXPORT_SYMBOL(__ide_dma_host_on);
 497
 498 /**
 499  *      __ide_dma_on            -       Enable DMA on a device
 500  *      @drive: drive to enable DMA on
 501  *
 502  *      Enable IDE DMA for a device on this IDE controller.
 503  */
 504
 505 int __ide_dma_on (ide_drive_t *drive)
 506 {
 507         /* consult the list of known "bad" drives */
 508         if (__ide_dma_bad_drive(drive))
 509                 return 1;
 510
 511         drive->using_dma = 1;
 512         ide_toggle_bounce(drive, 1);
 513
 514         if (HWIF(drive)->ide_dma_host_on(drive))
 515                 return 1;
 516
 517         return 0;
 518 }
 519
 520 EXPORT_SYMBOL(__ide_dma_on);
 521
 522 /**
 523  *      __ide_dma_check         -       check DMA setup
 524  *      @drive: drive to check
 525  *
 526  *      Don't use - due for extermination
 527  */
 528
 529 int __ide_dma_check (ide_drive_t *drive)
 530 {
 531         return config_drive_for_dma(drive);
 532 }
 533
 534 EXPORT_SYMBOL(__ide_dma_check);
 535
 536 /**
 537  *      ide_dma_setup   -       begin a DMA phase
 538  *      @drive: target device
 539  *
 540  *      Build an IDE DMA PRD (IDE speak for scatter gather table)
 541  *      and then set up the DMA transfer registers for a device
 542  *      that follows generic IDE PCI DMA behaviour. Controllers can
 543  *      override this function if they need to
 544  *
 545  *      Returns 0 on success. If a PIO fallback is required then 1
 546  *      is returned.
 547  */
 548
 549 int ide_dma_setup(ide_drive_t *drive)
 550 {
 551         ide_hwif_t *hwif = drive->hwif;
 552         struct request *rq = HWGROUP(drive)->rq;
 553         unsigned int reading;
 554         u8 dma_stat;
 555
 556         if (rq_data_dir(rq))
 557                 reading = 0;
 558         else
 559                 reading = 1 << 3;
 560
 561         /* fall back to pio! */
 562         if (!ide_build_dmatable(drive, rq)) {
 563                 ide_map_sg(drive, rq);
 564                 return 1;
 565         }
 566
 567         /* PRD table */
 568         hwif->OUTL(hwif->dmatable_dma, hwif->dma_prdtable);
 569
 570         /* specify r/w */
 571         hwif->OUTB(reading, hwif->dma_command);
 572
 573         /* read dma_status for INTR & ERROR flags */
 574         dma_stat = hwif->INB(hwif->dma_status);
 575
 576         /* clear INTR & ERROR flags */
 577         hwif->OUTB(dma_stat|6, hwif->dma_status);
 578         drive->waiting_for_dma = 1;
 579         return 0;
 580 }
 581
 582 EXPORT_SYMBOL_GPL(ide_dma_setup);
 583
 584 static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
 585 {
 586         /* issue cmd to drive */
 587         ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
 588 }
 589
 590 void ide_dma_start(ide_drive_t *drive)
 591 {
 592         ide_hwif_t *hwif        = HWIF(drive);
 593         u8 dma_cmd              = hwif->INB(hwif->dma_command);
 594
 595         /* Note that this is done *after* the cmd has
 596          * been issued to the drive, as per the BM-IDE spec.
 597          * The Promise Ultra33 doesn't work correctly when
 598          * we do this part before issuing the drive cmd.
 599          */
 600         /* start DMA */
 601         hwif->OUTB(dma_cmd|1, hwif->dma_command);
 602         hwif->dma = 1;
 603         wmb();
 604 }
 605
 606 EXPORT_SYMBOL_GPL(ide_dma_start);
 607
 608 /* returns 1 on error, 0 otherwise */
 609 int __ide_dma_end (ide_drive_t *drive)
 610 {
 611         ide_hwif_t *hwif        = HWIF(drive);
 612         u8 dma_stat = 0, dma_cmd = 0;
 613
 614         drive->waiting_for_dma = 0;
 615         /* get dma_command mode */
 616         dma_cmd = hwif->INB(hwif->dma_command);
 617         /* stop DMA */
 618         hwif->OUTB(dma_cmd&~1, hwif->dma_command);
 619         /* get DMA status */
 620         dma_stat = hwif->INB(hwif->dma_status);
 621         /* clear the INTR & ERROR bits */
 622         hwif->OUTB(dma_stat|6, hwif->dma_status);
 623         /* purge DMA mappings */
 624         ide_destroy_dmatable(drive);
 625         /* verify good DMA status */
 626         hwif->dma = 0;
 627         wmb();
 628         return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
 629 }
 630
 631 EXPORT_SYMBOL(__ide_dma_end);
 632
 633 /* returns 1 if dma irq issued, 0 otherwise */
 634 static int __ide_dma_test_irq(ide_drive_t *drive)
 635 {
 636         ide_hwif_t *hwif        = HWIF(drive);
 637         u8 dma_stat             = hwif->INB(hwif->dma_status);
 638
 639 #if 0  /* do not set unless you know what you are doing */
 640         if (dma_stat & 4) {
 641                 u8 stat = hwif->INB(IDE_STATUS_REG);
 642                 hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
 643         }
 644 #endif
 645         /* return 1 if INTR asserted */
 646         if ((dma_stat & 4) == 4)
 647                 return 1;
 648         if (!drive->waiting_for_dma)
 649                 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
 650                         drive->name, __FUNCTION__);
 651         return 0;
 652 }
 653 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
 654
 655 int __ide_dma_bad_drive (ide_drive_t *drive)
 656 {
 657         struct hd_driveid *id = drive->id;
 658
 659         int blacklist = ide_in_drive_list(id, drive_blacklist);
 660         if (blacklist) {
 661                 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
 662                                     drive->name, id->model);
 663                 return blacklist;
 664         }
 665         return 0;
 666 }
 667
 668 EXPORT_SYMBOL(__ide_dma_bad_drive);
 669
 670 int __ide_dma_good_drive (ide_drive_t *drive)
 671 {
 672         struct hd_driveid *id = drive->id;
 673         return ide_in_drive_list(id, drive_whitelist);
 674 }
 675
 676 EXPORT_SYMBOL(__ide_dma_good_drive);
 677
 678 int ide_use_dma(ide_drive_t *drive)
 679 {
 680         struct hd_driveid *id = drive->id;
 681         ide_hwif_t *hwif = drive->hwif;
 682
 683         /* consult the list of known "bad" drives */
 684         if (__ide_dma_bad_drive(drive))
 685                 return 0;
 686
 687         /* capable of UltraDMA modes */
 688         if (id->field_valid & 4) {
 689                 if (hwif->ultra_mask & id->dma_ultra)
 690                         return 1;
 691         }
 692
 693         /* capable of regular DMA modes */
 694         if (id->field_valid & 2) {
 695                 if (hwif->mwdma_mask & id->dma_mword)
 696                         return 1;
 697                 if (hwif->swdma_mask & id->dma_1word)
 698                         return 1;
 699         }
 700
 701         /* consult the list of known "good" drives */
 702         if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
 703                 return 1;
 704
 705         return 0;
 706 }
 707
 708 EXPORT_SYMBOL_GPL(ide_use_dma);
 709
 710 void ide_dma_verbose(ide_drive_t *drive)
 711 {
 712         struct hd_driveid *id   = drive->id;
 713         ide_hwif_t *hwif        = HWIF(drive);
 714
 715         if (id->field_valid & 4) {
 716                 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
 717                         goto bug_dma_off;
 718                 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
 719                         if (((id->dma_ultra >> 11) & 0x1F) &&
 720                             eighty_ninty_three(drive)) {
 721                                 if ((id->dma_ultra >> 15) & 1) {
 722                                         printk(", UDMA(mode 7)");
 723                                 } else if ((id->dma_ultra >> 14) & 1) {
 724                                         printk(", UDMA(133)");
 725                                 } else if ((id->dma_ultra >> 13) & 1) {
 726                                         printk(", UDMA(100)");
 727                                 } else if ((id->dma_ultra >> 12) & 1) {
 728                                         printk(", UDMA(66)");
 729                                 } else if ((id->dma_ultra >> 11) & 1) {
 730                                         printk(", UDMA(44)");
 731                                 } else
 732                                         goto mode_two;
 733                         } else {
 734                 mode_two:
 735                                 if ((id->dma_ultra >> 10) & 1) {
 736                                         printk(", UDMA(33)");
 737                                 } else if ((id->dma_ultra >> 9) & 1) {
 738                                         printk(", UDMA(25)");
 739                                 } else if ((id->dma_ultra >> 8) & 1) {
 740                                         printk(", UDMA(16)");
 741                                 }
 742                         }
 743                 } else {
 744                         printk(", (U)DMA");     /* Can be BIOS-enabled! */
 745                 }
 746         } else if (id->field_valid & 2) {
 747                 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
 748                         goto bug_dma_off;
 749                 printk(", DMA");
 750         } else if (id->field_valid & 1) {
 751                 goto bug_dma_off;
 752         }
 753         return;
 754 bug_dma_off:
 755         printk(", BUG DMA OFF");
 756         hwif->ide_dma_off_quietly(drive);
 757         return;
 758 }
 759
 760 EXPORT_SYMBOL(ide_dma_verbose);
 761
 762 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 763 int __ide_dma_lostirq (ide_drive_t *drive)
 764 {
 765         printk("%s: DMA interrupt recovery\n", drive->name);
 766         return 1;
 767 }
 768
 769 EXPORT_SYMBOL(__ide_dma_lostirq);
 770
 771 int __ide_dma_timeout (ide_drive_t *drive)
 772 {
 773         printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
 774         if (HWIF(drive)->ide_dma_test_irq(drive))
 775                 return 0;
 776
 777         return HWIF(drive)->ide_dma_end(drive);
 778 }
 779
 780 EXPORT_SYMBOL(__ide_dma_timeout);
 781
 782 /*
 783  * Needed for allowing full modular support of ide-driver
 784  */
 785 static int ide_release_dma_engine(ide_hwif_t *hwif)
 786 {
 787         if (hwif->dmatable_cpu) {
 788                 pci_free_consistent(hwif->pci_dev,
 789                                     PRD_ENTRIES * PRD_BYTES,
 790                                     hwif->dmatable_cpu,
 791                                     hwif->dmatable_dma);
 792                 hwif->dmatable_cpu = NULL;
 793         }
 794         return 1;
 795 }
 796
 797 static int ide_release_iomio_dma(ide_hwif_t *hwif)
 798 {
 799         release_region(hwif->dma_base, 8);
 800         if (hwif->extra_ports)
 801                 release_region(hwif->extra_base, hwif->extra_ports);
 802         return 1;
 803 }
 804
 805 /*
 806  * Needed for allowing full modular support of ide-driver
 807  */
 808 int ide_release_dma(ide_hwif_t *hwif)
 809 {
 810         ide_release_dma_engine(hwif);
 811
 812         if (hwif->mmio == 2)
 813                 return 1;
 814         else
 815                 return ide_release_iomio_dma(hwif);
 816 }
 817
 818 static int ide_allocate_dma_engine(ide_hwif_t *hwif)
 819 {
 820         hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
 821                                                   PRD_ENTRIES * PRD_BYTES,
 822                                                   &hwif->dmatable_dma);
 823
 824         if (hwif->dmatable_cpu)
 825                 return 0;
 826
 827         printk(KERN_ERR "%s: -- Error, unable to allocate DMA table.\n",
 828                hwif->cds->name);
 829
 830         return 1;
 831 }
 832
 833 static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
 834 {
 835         printk(KERN_INFO "    %s: MMIO-DMA ", hwif->name);
 836
 837         hwif->dma_base = base;
 838
 839         if(hwif->mate)
 840                 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
 841         else
 842                 hwif->dma_master = base;
 843         return 0;
 844 }
 845
 846 static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
 847 {
 848         printk(KERN_INFO "    %s: BM-DMA at 0x%04lx-0x%04lx",
 849                hwif->name, base, base + ports - 1);
 850
 851         if (!request_region(base, ports, hwif->name)) {
 852                 printk(" -- Error, ports in use.\n");
 853                 return 1;
 854         }
 855
 856         hwif->dma_base = base;
 857
 858         if (hwif->cds->extra) {
 859                 hwif->extra_base = base + (hwif->channel ? 8 : 16);
 860
 861                 if (!hwif->mate || !hwif->mate->extra_ports) {
 862                         if (!request_region(hwif->extra_base,
 863                                             hwif->cds->extra, hwif->cds->name)) {
 864                                 printk(" -- Error, extra ports in use.\n");
 865                                 release_region(base, ports);
 866                                 return 1;
 867                         }
 868                         hwif->extra_ports = hwif->cds->extra;
 869                 }
 870         }
 871
 872         if(hwif->mate)
 873                 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base:base;
 874         else
 875                 hwif->dma_master = base;
 876         return 0;
 877 }
 878
 879 static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
 880 {
 881         if (hwif->mmio == 2)
 882                 return ide_mapped_mmio_dma(hwif, base,ports);
 883         BUG_ON(hwif->mmio == 1);
 884         return ide_iomio_dma(hwif, base, ports);
 885 }
 886
 887 /*
 888  * This can be called for a dynamically installed interface. Don't __init it
 889  */
 890 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
 891 {
 892         if (ide_dma_iobase(hwif, dma_base, num_ports))
 893                 return;
 894
 895         if (ide_allocate_dma_engine(hwif)) {
 896                 ide_release_dma(hwif);
 897                 return;
 898         }
 899
 900         if (!(hwif->dma_command))
 901                 hwif->dma_command       = hwif->dma_base;
 902         if (!(hwif->dma_vendor1))
 903                 hwif->dma_vendor1       = (hwif->dma_base + 1);
 904         if (!(hwif->dma_status))
 905                 hwif->dma_status        = (hwif->dma_base + 2);
 906         if (!(hwif->dma_vendor3))
 907                 hwif->dma_vendor3       = (hwif->dma_base + 3);
 908         if (!(hwif->dma_prdtable))
 909                 hwif->dma_prdtable      = (hwif->dma_base + 4);
 910
 911         if (!hwif->ide_dma_off_quietly)
 912                 hwif->ide_dma_off_quietly = &__ide_dma_off_quietly;
 913         if (!hwif->ide_dma_host_off)
 914                 hwif->ide_dma_host_off = &__ide_dma_host_off;
 915         if (!hwif->ide_dma_on)
 916                 hwif->ide_dma_on = &__ide_dma_on;
 917         if (!hwif->ide_dma_host_on)
 918                 hwif->ide_dma_host_on = &__ide_dma_host_on;
 919         if (!hwif->ide_dma_check)
 920                 hwif->ide_dma_check = &__ide_dma_check;
 921         if (!hwif->dma_setup)
 922                 hwif->dma_setup = &ide_dma_setup;
 923         if (!hwif->dma_exec_cmd)
 924                 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
 925         if (!hwif->dma_start)
 926                 hwif->dma_start = &ide_dma_start;
 927         if (!hwif->ide_dma_end)
 928                 hwif->ide_dma_end = &__ide_dma_end;
 929         if (!hwif->ide_dma_test_irq)
 930                 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
 931         if (!hwif->ide_dma_timeout)
 932                 hwif->ide_dma_timeout = &__ide_dma_timeout;
 933         if (!hwif->ide_dma_lostirq)
 934                 hwif->ide_dma_lostirq = &__ide_dma_lostirq;
 935
 936         if (hwif->chipset != ide_trm290) {
 937                 u8 dma_stat = hwif->INB(hwif->dma_status);
 938                 printk(", BIOS settings: %s:%s, %s:%s",
 939                        hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
 940                        hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
 941         }
 942         printk("\n");
 943
 944         BUG_ON(!hwif->dma_master);
 945 }
 946
 947 EXPORT_SYMBOL_GPL(ide_setup_dma);
 948 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */