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USB: ftdi_sio: Add more identifiers
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / qla4xxx / ql4_mbx.c
blobc2593782fbbef8c203148b1661c92a3e1dbe35f6
1 /*
2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2010 QLogic Corporation
4 *
5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */
7
8 #include "ql4_def.h"
9 #include "ql4_glbl.h"
10 #include "ql4_dbg.h"
11 #include "ql4_inline.h"
12
13
14 /**
15 * qla4xxx_mailbox_command - issues mailbox commands
16 * @ha: Pointer to host adapter structure.
17 * @inCount: number of mailbox registers to load.
18 * @outCount: number of mailbox registers to return.
19 * @mbx_cmd: data pointer for mailbox in registers.
20 * @mbx_sts: data pointer for mailbox out registers.
21 *
22 * This routine issue mailbox commands and waits for completion.
23 * If outCount is 0, this routine completes successfully WITHOUT waiting
24 * for the mailbox command to complete.
25 **/
26 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
27 uint8_t outCount, uint32_t *mbx_cmd,
28 uint32_t *mbx_sts)
29 {
30 int status = QLA_ERROR;
31 uint8_t i;
32 u_long wait_count;
33 uint32_t intr_status;
34 unsigned long flags = 0;
35 uint32_t dev_state;
36
37 /* Make sure that pointers are valid */
38 if (!mbx_cmd || !mbx_sts) {
39 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
40 "pointer\n", ha->host_no, __func__));
41 return status;
42 }
43
44 if (is_qla40XX(ha)) {
45 if (test_bit(AF_HA_REMOVAL, &ha->flags)) {
46 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
47 "prematurely completing mbx cmd as "
48 "adapter removal detected\n",
49 ha->host_no, __func__));
50 return status;
51 }
52 }
53
54 if (is_qla8022(ha)) {
55 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
56 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
57 "prematurely completing mbx cmd as firmware "
58 "recovery detected\n", ha->host_no, __func__));
59 return status;
60 }
61 /* Do not send any mbx cmd if h/w is in failed state*/
62 qla4_8xxx_idc_lock(ha);
63 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
64 qla4_8xxx_idc_unlock(ha);
65 if (dev_state == QLA82XX_DEV_FAILED) {
66 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: H/W is in "
67 "failed state, do not send any mailbox commands\n",
68 ha->host_no, __func__);
69 return status;
70 }
71 }
72
73 if ((is_aer_supported(ha)) &&
74 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
75 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
76 "timeout MBX Exiting.\n", ha->host_no, __func__));
77 return status;
78 }
79
80 /* Mailbox code active */
81 wait_count = MBOX_TOV * 100;
82
83 while (wait_count--) {
84 mutex_lock(&ha->mbox_sem);
85 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
86 set_bit(AF_MBOX_COMMAND, &ha->flags);
87 mutex_unlock(&ha->mbox_sem);
88 break;
89 }
90 mutex_unlock(&ha->mbox_sem);
91 if (!wait_count) {
92 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
93 ha->host_no, __func__));
94 return status;
95 }
96 msleep(10);
97 }
98
99 spin_lock_irqsave(&ha->hardware_lock, flags);
100
101 ha->mbox_status_count = outCount;
102 for (i = 0; i < outCount; i++)
103 ha->mbox_status[i] = 0;
104
105 if (is_qla8022(ha)) {
106 /* Load all mailbox registers, except mailbox 0. */
107 DEBUG5(
108 printk("scsi%ld: %s: Cmd ", ha->host_no, __func__);
109 for (i = 0; i < inCount; i++)
110 printk("mb%d=%04x ", i, mbx_cmd[i]);
111 printk("\n"));
112
113 for (i = 1; i < inCount; i++)
114 writel(mbx_cmd[i], &ha->qla4_8xxx_reg->mailbox_in[i]);
115 writel(mbx_cmd[0], &ha->qla4_8xxx_reg->mailbox_in[0]);
116 readl(&ha->qla4_8xxx_reg->mailbox_in[0]);
117 writel(HINT_MBX_INT_PENDING, &ha->qla4_8xxx_reg->hint);
118 } else {
119 /* Load all mailbox registers, except mailbox 0. */
120 for (i = 1; i < inCount; i++)
121 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
122
123 /* Wakeup firmware */
124 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
125 readl(&ha->reg->mailbox[0]);
126 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
127 readl(&ha->reg->ctrl_status);
128 }
129
130 spin_unlock_irqrestore(&ha->hardware_lock, flags);
131
132 /* Wait for completion */
133
134 /*
135 * If we don't want status, don't wait for the mailbox command to
136 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
137 * you must poll the inbound Interrupt Mask for completion.
138 */
139 if (outCount == 0) {
140 status = QLA_SUCCESS;
141 goto mbox_exit;
142 }
143
144 /*
145 * Wait for completion: Poll or completion queue
146 */
147 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
148 test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
149 test_bit(AF_ONLINE, &ha->flags) &&
150 !test_bit(AF_HA_REMOVAL, &ha->flags)) {
151 /* Do not poll for completion. Use completion queue */
152 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
153 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
154 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
155 } else {
156 /* Poll for command to complete */
157 wait_count = jiffies + MBOX_TOV * HZ;
158 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
159 if (time_after_eq(jiffies, wait_count))
160 break;
161
162 /*
163 * Service the interrupt.
164 * The ISR will save the mailbox status registers
165 * to a temporary storage location in the adapter
166 * structure.
167 */
168
169 spin_lock_irqsave(&ha->hardware_lock, flags);
170 if (is_qla8022(ha)) {
171 intr_status =
172 readl(&ha->qla4_8xxx_reg->host_int);
173 if (intr_status & ISRX_82XX_RISC_INT) {
174 ha->mbox_status_count = outCount;
175 intr_status =
176 readl(&ha->qla4_8xxx_reg->host_status);
177 ha->isp_ops->interrupt_service_routine(
178 ha, intr_status);
179 if (test_bit(AF_INTERRUPTS_ON,
180 &ha->flags) &&
181 test_bit(AF_INTx_ENABLED,
182 &ha->flags))
183 qla4_8xxx_wr_32(ha,
184 ha->nx_legacy_intr.tgt_mask_reg,
185 0xfbff);
186 }
187 } else {
188 intr_status = readl(&ha->reg->ctrl_status);
189 if (intr_status & INTR_PENDING) {
190 /*
191 * Service the interrupt.
192 * The ISR will save the mailbox status
193 * registers to a temporary storage
194 * location in the adapter structure.
195 */
196 ha->mbox_status_count = outCount;
197 ha->isp_ops->interrupt_service_routine(
198 ha, intr_status);
199 }
200 }
201 spin_unlock_irqrestore(&ha->hardware_lock, flags);
202 msleep(10);
203 }
204 }
205
206 /* Check for mailbox timeout. */
207 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
208 if (is_qla8022(ha) &&
209 test_bit(AF_FW_RECOVERY, &ha->flags)) {
210 DEBUG2(ql4_printk(KERN_INFO, ha,
211 "scsi%ld: %s: prematurely completing mbx cmd as "
212 "firmware recovery detected\n",
213 ha->host_no, __func__));
214 goto mbox_exit;
215 }
216 DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
217 " Scheduling Adapter Reset\n", ha->host_no,
218 mbx_cmd[0]));
219 ha->mailbox_timeout_count++;
220 mbx_sts[0] = (-1);
221 set_bit(DPC_RESET_HA, &ha->dpc_flags);
222 goto mbox_exit;
223 }
224
225 /*
226 * Copy the mailbox out registers to the caller's mailbox in/out
227 * structure.
228 */
229 spin_lock_irqsave(&ha->hardware_lock, flags);
230 for (i = 0; i < outCount; i++)
231 mbx_sts[i] = ha->mbox_status[i];
232
233 /* Set return status and error flags (if applicable). */
234 switch (ha->mbox_status[0]) {
235 case MBOX_STS_COMMAND_COMPLETE:
236 status = QLA_SUCCESS;
237 break;
238
239 case MBOX_STS_INTERMEDIATE_COMPLETION:
240 status = QLA_SUCCESS;
241 break;
242
243 case MBOX_STS_BUSY:
244 DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
245 ha->host_no, __func__, mbx_cmd[0]));
246 ha->mailbox_timeout_count++;
247 break;
248
249 default:
250 DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
251 "sts = %08X ****\n", ha->host_no, __func__,
252 mbx_cmd[0], mbx_sts[0]));
253 break;
254 }
255 spin_unlock_irqrestore(&ha->hardware_lock, flags);
256
257 mbox_exit:
258 mutex_lock(&ha->mbox_sem);
259 clear_bit(AF_MBOX_COMMAND, &ha->flags);
260 mutex_unlock(&ha->mbox_sem);
261 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
262
263 return status;
264 }
265
266 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
267 {
268 set_bit(AF_FW_RECOVERY, &ha->flags);
269 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
270 ha->host_no, __func__);
271
272 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
273 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
274 complete(&ha->mbx_intr_comp);
275 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
276 "recovery, doing premature completion of "
277 "mbx cmd\n", ha->host_no, __func__);
278
279 } else {
280 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
281 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
282 "recovery, doing premature completion of "
283 "polling mbx cmd\n", ha->host_no, __func__);
284 }
285 }
286 }
287
288 static uint8_t
289 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
290 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
291 {
292 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
293 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
294
295 if (is_qla8022(ha))
296 qla4_8xxx_wr_32(ha, ha->nx_db_wr_ptr, 0);
297
298 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
299 mbox_cmd[1] = 0;
300 mbox_cmd[2] = LSDW(init_fw_cb_dma);
301 mbox_cmd[3] = MSDW(init_fw_cb_dma);
302 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
303 mbox_cmd[5] = (IFCB_VER_MAX << 8) | IFCB_VER_MIN;
304
305 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
306 QLA_SUCCESS) {
307 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
308 "MBOX_CMD_INITIALIZE_FIRMWARE"
309 " failed w/ status %04X\n",
310 ha->host_no, __func__, mbox_sts[0]));
311 return QLA_ERROR;
312 }
313 return QLA_SUCCESS;
314 }
315
316 uint8_t
317 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
318 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
319 {
320 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
321 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
322 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
323 mbox_cmd[2] = LSDW(init_fw_cb_dma);
324 mbox_cmd[3] = MSDW(init_fw_cb_dma);
325 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
326
327 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
328 QLA_SUCCESS) {
329 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
330 "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
331 " failed w/ status %04X\n",
332 ha->host_no, __func__, mbox_sts[0]));
333 return QLA_ERROR;
334 }
335 return QLA_SUCCESS;
336 }
337
338 static void
339 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
340 struct addr_ctrl_blk *init_fw_cb)
341 {
342 ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
343 ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
344 ha->ip_config.ipv4_addr_state =
345 le16_to_cpu(init_fw_cb->ipv4_addr_state);
346 ha->ip_config.eth_mtu_size =
347 le16_to_cpu(init_fw_cb->eth_mtu_size);
348 ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port);
349
350 if (ha->acb_version == ACB_SUPPORTED) {
351 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts);
352 ha->ip_config.ipv6_addl_options =
353 le16_to_cpu(init_fw_cb->ipv6_addtl_opts);
354 }
355
356 /* Save IPv4 Address Info */
357 memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr,
358 min(sizeof(ha->ip_config.ip_address),
359 sizeof(init_fw_cb->ipv4_addr)));
360 memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet,
361 min(sizeof(ha->ip_config.subnet_mask),
362 sizeof(init_fw_cb->ipv4_subnet)));
363 memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr,
364 min(sizeof(ha->ip_config.gateway),
365 sizeof(init_fw_cb->ipv4_gw_addr)));
366
367 ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag);
368
369 if (is_ipv6_enabled(ha)) {
370 /* Save IPv6 Address */
371 ha->ip_config.ipv6_link_local_state =
372 le16_to_cpu(init_fw_cb->ipv6_lnk_lcl_addr_state);
373 ha->ip_config.ipv6_addr0_state =
374 le16_to_cpu(init_fw_cb->ipv6_addr0_state);
375 ha->ip_config.ipv6_addr1_state =
376 le16_to_cpu(init_fw_cb->ipv6_addr1_state);
377 ha->ip_config.ipv6_default_router_state =
378 le16_to_cpu(init_fw_cb->ipv6_dflt_rtr_state);
379 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
380 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
381
382 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8],
383 init_fw_cb->ipv6_if_id,
384 min(sizeof(ha->ip_config.ipv6_link_local_addr)/2,
385 sizeof(init_fw_cb->ipv6_if_id)));
386 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0,
387 min(sizeof(ha->ip_config.ipv6_addr0),
388 sizeof(init_fw_cb->ipv6_addr0)));
389 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1,
390 min(sizeof(ha->ip_config.ipv6_addr1),
391 sizeof(init_fw_cb->ipv6_addr1)));
392 memcpy(&ha->ip_config.ipv6_default_router_addr,
393 init_fw_cb->ipv6_dflt_rtr_addr,
394 min(sizeof(ha->ip_config.ipv6_default_router_addr),
395 sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
396 ha->ip_config.ipv6_vlan_tag =
397 be16_to_cpu(init_fw_cb->ipv6_vlan_tag);
398 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port);
399 }
400 }
401
402 uint8_t
403 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
404 uint32_t *mbox_cmd,
405 uint32_t *mbox_sts,
406 struct addr_ctrl_blk *init_fw_cb,
407 dma_addr_t init_fw_cb_dma)
408 {
409 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
410 != QLA_SUCCESS) {
411 DEBUG2(printk(KERN_WARNING
412 "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
413 ha->host_no, __func__));
414 return QLA_ERROR;
415 }
416
417 DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
418
419 /* Save some info in adapter structure. */
420 ha->acb_version = init_fw_cb->acb_version;
421 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
422 ha->heartbeat_interval = init_fw_cb->hb_interval;
423 memcpy(ha->name_string, init_fw_cb->iscsi_name,
424 min(sizeof(ha->name_string),
425 sizeof(init_fw_cb->iscsi_name)));
426 ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout);
427 /*memcpy(ha->alias, init_fw_cb->Alias,
428 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
429
430 qla4xxx_update_local_ip(ha, init_fw_cb);
431
432 return QLA_SUCCESS;
433 }
434
435 /**
436 * qla4xxx_initialize_fw_cb - initializes firmware control block.
437 * @ha: Pointer to host adapter structure.
438 **/
439 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
440 {
441 struct addr_ctrl_blk *init_fw_cb;
442 dma_addr_t init_fw_cb_dma;
443 uint32_t mbox_cmd[MBOX_REG_COUNT];
444 uint32_t mbox_sts[MBOX_REG_COUNT];
445 int status = QLA_ERROR;
446
447 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
448 sizeof(struct addr_ctrl_blk),
449 &init_fw_cb_dma, GFP_KERNEL);
450 if (init_fw_cb == NULL) {
451 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
452 ha->host_no, __func__));
453 goto exit_init_fw_cb_no_free;
454 }
455 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
456
457 /* Get Initialize Firmware Control Block. */
458 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
459 memset(&mbox_sts, 0, sizeof(mbox_sts));
460
461 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
462 QLA_SUCCESS) {
463 dma_free_coherent(&ha->pdev->dev,
464 sizeof(struct addr_ctrl_blk),
465 init_fw_cb, init_fw_cb_dma);
466 goto exit_init_fw_cb;
467 }
468
469 /* Initialize request and response queues. */
470 qla4xxx_init_rings(ha);
471
472 /* Fill in the request and response queue information. */
473 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
474 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
475 init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
476 init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
477 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
478 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
479 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
480 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
481 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
482 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
483
484 /* Set up required options. */
485 init_fw_cb->fw_options |=
486 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
487 FWOPT_INITIATOR_MODE);
488
489 if (is_qla8022(ha))
490 init_fw_cb->fw_options |=
491 __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
492
493 init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
494
495 init_fw_cb->add_fw_options = 0;
496 init_fw_cb->add_fw_options |=
497 __constant_cpu_to_le16(ADFWOPT_SERIALIZE_TASK_MGMT);
498 init_fw_cb->add_fw_options |=
499 __constant_cpu_to_le16(ADFWOPT_AUTOCONN_DISABLE);
500
501 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
502 != QLA_SUCCESS) {
503 DEBUG2(printk(KERN_WARNING
504 "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
505 ha->host_no, __func__));
506 goto exit_init_fw_cb;
507 }
508
509 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
510 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
511 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
512 ha->host_no, __func__));
513 goto exit_init_fw_cb;
514 }
515 status = QLA_SUCCESS;
516
517 exit_init_fw_cb:
518 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
519 init_fw_cb, init_fw_cb_dma);
520 exit_init_fw_cb_no_free:
521 return status;
522 }
523
524 /**
525 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
526 * @ha: Pointer to host adapter structure.
527 **/
528 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
529 {
530 struct addr_ctrl_blk *init_fw_cb;
531 dma_addr_t init_fw_cb_dma;
532 uint32_t mbox_cmd[MBOX_REG_COUNT];
533 uint32_t mbox_sts[MBOX_REG_COUNT];
534
535 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
536 sizeof(struct addr_ctrl_blk),
537 &init_fw_cb_dma, GFP_KERNEL);
538 if (init_fw_cb == NULL) {
539 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
540 __func__);
541 return QLA_ERROR;
542 }
543
544 /* Get Initialize Firmware Control Block. */
545 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
546 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
547 QLA_SUCCESS) {
548 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
549 ha->host_no, __func__));
550 dma_free_coherent(&ha->pdev->dev,
551 sizeof(struct addr_ctrl_blk),
552 init_fw_cb, init_fw_cb_dma);
553 return QLA_ERROR;
554 }
555
556 /* Save IP Address. */
557 qla4xxx_update_local_ip(ha, init_fw_cb);
558 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
559 init_fw_cb, init_fw_cb_dma);
560
561 return QLA_SUCCESS;
562 }
563
564 /**
565 * qla4xxx_get_firmware_state - gets firmware state of HBA
566 * @ha: Pointer to host adapter structure.
567 **/
568 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
569 {
570 uint32_t mbox_cmd[MBOX_REG_COUNT];
571 uint32_t mbox_sts[MBOX_REG_COUNT];
572
573 /* Get firmware version */
574 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
575 memset(&mbox_sts, 0, sizeof(mbox_sts));
576
577 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
578
579 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
580 QLA_SUCCESS) {
581 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
582 "status %04X\n", ha->host_no, __func__,
583 mbox_sts[0]));
584 return QLA_ERROR;
585 }
586 ha->firmware_state = mbox_sts[1];
587 ha->board_id = mbox_sts[2];
588 ha->addl_fw_state = mbox_sts[3];
589 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
590 ha->host_no, __func__, ha->firmware_state);)
591
592 return QLA_SUCCESS;
593 }
594
595 /**
596 * qla4xxx_get_firmware_status - retrieves firmware status
597 * @ha: Pointer to host adapter structure.
598 **/
599 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
600 {
601 uint32_t mbox_cmd[MBOX_REG_COUNT];
602 uint32_t mbox_sts[MBOX_REG_COUNT];
603
604 /* Get firmware version */
605 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
606 memset(&mbox_sts, 0, sizeof(mbox_sts));
607
608 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
609
610 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
611 QLA_SUCCESS) {
612 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
613 "status %04X\n", ha->host_no, __func__,
614 mbox_sts[0]));
615 return QLA_ERROR;
616 }
617
618 ql4_printk(KERN_INFO, ha, "%ld firmare IOCBs available (%d).\n",
619 ha->host_no, mbox_sts[2]);
620
621 return QLA_SUCCESS;
622 }
623
624 /**
625 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
626 * @ha: Pointer to host adapter structure.
627 * @fw_ddb_index: Firmware's device database index
628 * @fw_ddb_entry: Pointer to firmware's device database entry structure
629 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
630 * @next_ddb_index: Pointer to next valid device database index
631 * @fw_ddb_device_state: Pointer to device state
632 **/
633 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
634 uint16_t fw_ddb_index,
635 struct dev_db_entry *fw_ddb_entry,
636 dma_addr_t fw_ddb_entry_dma,
637 uint32_t *num_valid_ddb_entries,
638 uint32_t *next_ddb_index,
639 uint32_t *fw_ddb_device_state,
640 uint32_t *conn_err_detail,
641 uint16_t *tcp_source_port_num,
642 uint16_t *connection_id)
643 {
644 int status = QLA_ERROR;
645 uint16_t options;
646 uint32_t mbox_cmd[MBOX_REG_COUNT];
647 uint32_t mbox_sts[MBOX_REG_COUNT];
648
649 /* Make sure the device index is valid */
650 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
651 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
652 ha->host_no, __func__, fw_ddb_index));
653 goto exit_get_fwddb;
654 }
655 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
656 memset(&mbox_sts, 0, sizeof(mbox_sts));
657
658 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
659 mbox_cmd[1] = (uint32_t) fw_ddb_index;
660 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
661 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
662 mbox_cmd[4] = sizeof(struct dev_db_entry);
663
664 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
665 QLA_ERROR) {
666 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
667 " with status 0x%04X\n", ha->host_no, __func__,
668 mbox_sts[0]));
669 goto exit_get_fwddb;
670 }
671 if (fw_ddb_index != mbox_sts[1]) {
672 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
673 ha->host_no, __func__, fw_ddb_index,
674 mbox_sts[1]));
675 goto exit_get_fwddb;
676 }
677 if (fw_ddb_entry) {
678 options = le16_to_cpu(fw_ddb_entry->options);
679 if (options & DDB_OPT_IPV6_DEVICE) {
680 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
681 "Next %d State %04x ConnErr %08x %pI6 "
682 ":%04d \"%s\"\n", __func__, fw_ddb_index,
683 mbox_sts[0], mbox_sts[2], mbox_sts[3],
684 mbox_sts[4], mbox_sts[5],
685 fw_ddb_entry->ip_addr,
686 le16_to_cpu(fw_ddb_entry->port),
687 fw_ddb_entry->iscsi_name);
688 } else {
689 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
690 "Next %d State %04x ConnErr %08x %pI4 "
691 ":%04d \"%s\"\n", __func__, fw_ddb_index,
692 mbox_sts[0], mbox_sts[2], mbox_sts[3],
693 mbox_sts[4], mbox_sts[5],
694 fw_ddb_entry->ip_addr,
695 le16_to_cpu(fw_ddb_entry->port),
696 fw_ddb_entry->iscsi_name);
697 }
698 }
699 if (num_valid_ddb_entries)
700 *num_valid_ddb_entries = mbox_sts[2];
701 if (next_ddb_index)
702 *next_ddb_index = mbox_sts[3];
703 if (fw_ddb_device_state)
704 *fw_ddb_device_state = mbox_sts[4];
705
706 /*
707 * RA: This mailbox has been changed to pass connection error and
708 * details. Its true for ISP4010 as per Version E - Not sure when it
709 * was changed. Get the time2wait from the fw_dd_entry field :
710 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
711 * struct.
712 */
713 if (conn_err_detail)
714 *conn_err_detail = mbox_sts[5];
715 if (tcp_source_port_num)
716 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
717 if (connection_id)
718 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
719 status = QLA_SUCCESS;
720
721 exit_get_fwddb:
722 return status;
723 }
724
725 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index)
726 {
727 uint32_t mbox_cmd[MBOX_REG_COUNT];
728 uint32_t mbox_sts[MBOX_REG_COUNT];
729 int status;
730
731 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
732 memset(&mbox_sts, 0, sizeof(mbox_sts));
733
734 mbox_cmd[0] = MBOX_CMD_CONN_OPEN;
735 mbox_cmd[1] = fw_ddb_index;
736
737 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
738 &mbox_sts[0]);
739 DEBUG2(ql4_printk(KERN_INFO, ha,
740 "%s: status = %d mbx0 = 0x%x mbx1 = 0x%x\n",
741 __func__, status, mbox_sts[0], mbox_sts[1]));
742 return status;
743 }
744
745 /**
746 * qla4xxx_set_fwddb_entry - sets a ddb entry.
747 * @ha: Pointer to host adapter structure.
748 * @fw_ddb_index: Firmware's device database index
749 * @fw_ddb_entry_dma: dma address of ddb entry
750 * @mbx_sts: mailbox 0 to be returned or NULL
751 *
752 * This routine initializes or updates the adapter's device database
753 * entry for the specified device.
754 **/
755 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
756 dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts)
757 {
758 uint32_t mbox_cmd[MBOX_REG_COUNT];
759 uint32_t mbox_sts[MBOX_REG_COUNT];
760 int status;
761
762 /* Do not wait for completion. The firmware will send us an
763 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
764 */
765 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
766 memset(&mbox_sts, 0, sizeof(mbox_sts));
767
768 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
769 mbox_cmd[1] = (uint32_t) fw_ddb_index;
770 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
771 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
772 mbox_cmd[4] = sizeof(struct dev_db_entry);
773
774 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
775 &mbox_sts[0]);
776 if (mbx_sts)
777 *mbx_sts = mbox_sts[0];
778 DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
779 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
780
781 return status;
782 }
783
784 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha,
785 struct ddb_entry *ddb_entry, int options)
786 {
787 int status;
788 uint32_t mbox_cmd[MBOX_REG_COUNT];
789 uint32_t mbox_sts[MBOX_REG_COUNT];
790
791 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
792 memset(&mbox_sts, 0, sizeof(mbox_sts));
793
794 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
795 mbox_cmd[1] = ddb_entry->fw_ddb_index;
796 mbox_cmd[3] = options;
797
798 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0],
799 &mbox_sts[0]);
800 if (status != QLA_SUCCESS) {
801 DEBUG2(ql4_printk(KERN_INFO, ha,
802 "%s: MBOX_CMD_CONN_CLOSE_SESS_LOGOUT "
803 "failed sts %04X %04X", __func__,
804 mbox_sts[0], mbox_sts[1]));
805 }
806
807 return status;
808 }
809
810 /**
811 * qla4xxx_get_crash_record - retrieves crash record.
812 * @ha: Pointer to host adapter structure.
813 *
814 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
815 **/
816 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
817 {
818 uint32_t mbox_cmd[MBOX_REG_COUNT];
819 uint32_t mbox_sts[MBOX_REG_COUNT];
820 struct crash_record *crash_record = NULL;
821 dma_addr_t crash_record_dma = 0;
822 uint32_t crash_record_size = 0;
823
824 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
825 memset(&mbox_sts, 0, sizeof(mbox_cmd));
826
827 /* Get size of crash record. */
828 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
829
830 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
831 QLA_SUCCESS) {
832 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
833 ha->host_no, __func__));
834 goto exit_get_crash_record;
835 }
836 crash_record_size = mbox_sts[4];
837 if (crash_record_size == 0) {
838 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
839 ha->host_no, __func__));
840 goto exit_get_crash_record;
841 }
842
843 /* Alloc Memory for Crash Record. */
844 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
845 &crash_record_dma, GFP_KERNEL);
846 if (crash_record == NULL)
847 goto exit_get_crash_record;
848
849 /* Get Crash Record. */
850 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
851 memset(&mbox_sts, 0, sizeof(mbox_cmd));
852
853 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
854 mbox_cmd[2] = LSDW(crash_record_dma);
855 mbox_cmd[3] = MSDW(crash_record_dma);
856 mbox_cmd[4] = crash_record_size;
857
858 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
859 QLA_SUCCESS)
860 goto exit_get_crash_record;
861
862 /* Dump Crash Record. */
863
864 exit_get_crash_record:
865 if (crash_record)
866 dma_free_coherent(&ha->pdev->dev, crash_record_size,
867 crash_record, crash_record_dma);
868 }
869
870 /**
871 * qla4xxx_get_conn_event_log - retrieves connection event log
872 * @ha: Pointer to host adapter structure.
873 **/
874 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
875 {
876 uint32_t mbox_cmd[MBOX_REG_COUNT];
877 uint32_t mbox_sts[MBOX_REG_COUNT];
878 struct conn_event_log_entry *event_log = NULL;
879 dma_addr_t event_log_dma = 0;
880 uint32_t event_log_size = 0;
881 uint32_t num_valid_entries;
882 uint32_t oldest_entry = 0;
883 uint32_t max_event_log_entries;
884 uint8_t i;
885
886 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
887 memset(&mbox_sts, 0, sizeof(mbox_cmd));
888
889 /* Get size of crash record. */
890 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
891
892 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
893 QLA_SUCCESS)
894 goto exit_get_event_log;
895
896 event_log_size = mbox_sts[4];
897 if (event_log_size == 0)
898 goto exit_get_event_log;
899
900 /* Alloc Memory for Crash Record. */
901 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
902 &event_log_dma, GFP_KERNEL);
903 if (event_log == NULL)
904 goto exit_get_event_log;
905
906 /* Get Crash Record. */
907 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
908 memset(&mbox_sts, 0, sizeof(mbox_cmd));
909
910 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
911 mbox_cmd[2] = LSDW(event_log_dma);
912 mbox_cmd[3] = MSDW(event_log_dma);
913
914 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
915 QLA_SUCCESS) {
916 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
917 "log!\n", ha->host_no, __func__));
918 goto exit_get_event_log;
919 }
920
921 /* Dump Event Log. */
922 num_valid_entries = mbox_sts[1];
923
924 max_event_log_entries = event_log_size /
925 sizeof(struct conn_event_log_entry);
926
927 if (num_valid_entries > max_event_log_entries)
928 oldest_entry = num_valid_entries % max_event_log_entries;
929
930 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
931 ha->host_no, num_valid_entries));
932
933 if (ql4xextended_error_logging == 3) {
934 if (oldest_entry == 0) {
935 /* Circular Buffer has not wrapped around */
936 for (i=0; i < num_valid_entries; i++) {
937 qla4xxx_dump_buffer((uint8_t *)event_log+
938 (i*sizeof(*event_log)),
939 sizeof(*event_log));
940 }
941 }
942 else {
943 /* Circular Buffer has wrapped around -
944 * display accordingly*/
945 for (i=oldest_entry; i < max_event_log_entries; i++) {
946 qla4xxx_dump_buffer((uint8_t *)event_log+
947 (i*sizeof(*event_log)),
948 sizeof(*event_log));
949 }
950 for (i=0; i < oldest_entry; i++) {
951 qla4xxx_dump_buffer((uint8_t *)event_log+
952 (i*sizeof(*event_log)),
953 sizeof(*event_log));
954 }
955 }
956 }
957
958 exit_get_event_log:
959 if (event_log)
960 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
961 event_log_dma);
962 }
963
964 /**
965 * qla4xxx_abort_task - issues Abort Task
966 * @ha: Pointer to host adapter structure.
967 * @srb: Pointer to srb entry
968 *
969 * This routine performs a LUN RESET on the specified target/lun.
970 * The caller must ensure that the ddb_entry and lun_entry pointers
971 * are valid before calling this routine.
972 **/
973 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
974 {
975 uint32_t mbox_cmd[MBOX_REG_COUNT];
976 uint32_t mbox_sts[MBOX_REG_COUNT];
977 struct scsi_cmnd *cmd = srb->cmd;
978 int status = QLA_SUCCESS;
979 unsigned long flags = 0;
980 uint32_t index;
981
982 /*
983 * Send abort task command to ISP, so that the ISP will return
984 * request with ABORT status
985 */
986 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
987 memset(&mbox_sts, 0, sizeof(mbox_sts));
988
989 spin_lock_irqsave(&ha->hardware_lock, flags);
990 index = (unsigned long)(unsigned char *)cmd->host_scribble;
991 spin_unlock_irqrestore(&ha->hardware_lock, flags);
992
993 /* Firmware already posted completion on response queue */
994 if (index == MAX_SRBS)
995 return status;
996
997 mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
998 mbox_cmd[1] = srb->ddb->fw_ddb_index;
999 mbox_cmd[2] = index;
1000 /* Immediate Command Enable */
1001 mbox_cmd[5] = 0x01;
1002
1003 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
1004 &mbox_sts[0]);
1005 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
1006 status = QLA_ERROR;
1007
1008 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%d: abort task FAILED: "
1009 "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
1010 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
1011 mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
1012 }
1013
1014 return status;
1015 }
1016
1017 /**
1018 * qla4xxx_reset_lun - issues LUN Reset
1019 * @ha: Pointer to host adapter structure.
1020 * @ddb_entry: Pointer to device database entry
1021 * @lun: lun number
1022 *
1023 * This routine performs a LUN RESET on the specified target/lun.
1024 * The caller must ensure that the ddb_entry and lun_entry pointers
1025 * are valid before calling this routine.
1026 **/
1027 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
1028 int lun)
1029 {
1030 uint32_t mbox_cmd[MBOX_REG_COUNT];
1031 uint32_t mbox_sts[MBOX_REG_COUNT];
1032 int status = QLA_SUCCESS;
1033
1034 DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
1035 ddb_entry->fw_ddb_index, lun));
1036
1037 /*
1038 * Send lun reset command to ISP, so that the ISP will return all
1039 * outstanding requests with RESET status
1040 */
1041 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1042 memset(&mbox_sts, 0, sizeof(mbox_sts));
1043
1044 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
1045 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1046 mbox_cmd[2] = lun << 8;
1047 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1048
1049 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
1050 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1051 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1052 status = QLA_ERROR;
1053
1054 return status;
1055 }
1056
1057 /**
1058 * qla4xxx_reset_target - issues target Reset
1059 * @ha: Pointer to host adapter structure.
1060 * @db_entry: Pointer to device database entry
1061 * @un_entry: Pointer to lun entry structure
1062 *
1063 * This routine performs a TARGET RESET on the specified target.
1064 * The caller must ensure that the ddb_entry pointers
1065 * are valid before calling this routine.
1066 **/
1067 int qla4xxx_reset_target(struct scsi_qla_host *ha,
1068 struct ddb_entry *ddb_entry)
1069 {
1070 uint32_t mbox_cmd[MBOX_REG_COUNT];
1071 uint32_t mbox_sts[MBOX_REG_COUNT];
1072 int status = QLA_SUCCESS;
1073
1074 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
1075 ddb_entry->fw_ddb_index));
1076
1077 /*
1078 * Send target reset command to ISP, so that the ISP will return all
1079 * outstanding requests with RESET status
1080 */
1081 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1082 memset(&mbox_sts, 0, sizeof(mbox_sts));
1083
1084 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1085 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1086 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1087
1088 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1089 &mbox_sts[0]);
1090 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1091 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1092 status = QLA_ERROR;
1093
1094 return status;
1095 }
1096
1097 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1098 uint32_t offset, uint32_t len)
1099 {
1100 uint32_t mbox_cmd[MBOX_REG_COUNT];
1101 uint32_t mbox_sts[MBOX_REG_COUNT];
1102
1103 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1104 memset(&mbox_sts, 0, sizeof(mbox_sts));
1105
1106 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1107 mbox_cmd[1] = LSDW(dma_addr);
1108 mbox_cmd[2] = MSDW(dma_addr);
1109 mbox_cmd[3] = offset;
1110 mbox_cmd[4] = len;
1111
1112 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1113 QLA_SUCCESS) {
1114 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1115 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1116 __func__, mbox_sts[0], mbox_sts[1], offset, len));
1117 return QLA_ERROR;
1118 }
1119 return QLA_SUCCESS;
1120 }
1121
1122 /**
1123 * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1124 * @ha: Pointer to host adapter structure.
1125 *
1126 * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1127 * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1128 * those mailboxes, if unused.
1129 **/
1130 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1131 {
1132 struct about_fw_info *about_fw = NULL;
1133 dma_addr_t about_fw_dma;
1134 uint32_t mbox_cmd[MBOX_REG_COUNT];
1135 uint32_t mbox_sts[MBOX_REG_COUNT];
1136 int status = QLA_ERROR;
1137
1138 about_fw = dma_alloc_coherent(&ha->pdev->dev,
1139 sizeof(struct about_fw_info),
1140 &about_fw_dma, GFP_KERNEL);
1141 if (!about_fw) {
1142 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1143 "for about_fw\n", __func__));
1144 return status;
1145 }
1146
1147 memset(about_fw, 0, sizeof(struct about_fw_info));
1148 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1149 memset(&mbox_sts, 0, sizeof(mbox_sts));
1150
1151 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1152 mbox_cmd[2] = LSDW(about_fw_dma);
1153 mbox_cmd[3] = MSDW(about_fw_dma);
1154 mbox_cmd[4] = sizeof(struct about_fw_info);
1155
1156 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1157 &mbox_cmd[0], &mbox_sts[0]);
1158 if (status != QLA_SUCCESS) {
1159 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1160 "failed w/ status %04X\n", __func__,
1161 mbox_sts[0]));
1162 goto exit_about_fw;
1163 }
1164
1165 /* Save version information. */
1166 ha->firmware_version[0] = le16_to_cpu(about_fw->fw_major);
1167 ha->firmware_version[1] = le16_to_cpu(about_fw->fw_minor);
1168 ha->patch_number = le16_to_cpu(about_fw->fw_patch);
1169 ha->build_number = le16_to_cpu(about_fw->fw_build);
1170 ha->iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1171 ha->iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1172 ha->bootload_major = le16_to_cpu(about_fw->bootload_major);
1173 ha->bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1174 ha->bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1175 ha->bootload_build = le16_to_cpu(about_fw->bootload_build);
1176 status = QLA_SUCCESS;
1177
1178 exit_about_fw:
1179 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1180 about_fw, about_fw_dma);
1181 return status;
1182 }
1183
1184 static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options,
1185 dma_addr_t dma_addr)
1186 {
1187 uint32_t mbox_cmd[MBOX_REG_COUNT];
1188 uint32_t mbox_sts[MBOX_REG_COUNT];
1189
1190 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1191 memset(&mbox_sts, 0, sizeof(mbox_sts));
1192
1193 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1194 mbox_cmd[1] = options;
1195 mbox_cmd[2] = LSDW(dma_addr);
1196 mbox_cmd[3] = MSDW(dma_addr);
1197
1198 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1199 QLA_SUCCESS) {
1200 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1201 ha->host_no, __func__, mbox_sts[0]));
1202 return QLA_ERROR;
1203 }
1204 return QLA_SUCCESS;
1205 }
1206
1207 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index,
1208 uint32_t *mbx_sts)
1209 {
1210 int status;
1211 uint32_t mbox_cmd[MBOX_REG_COUNT];
1212 uint32_t mbox_sts[MBOX_REG_COUNT];
1213
1214 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1215 memset(&mbox_sts, 0, sizeof(mbox_sts));
1216
1217 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1218 mbox_cmd[1] = ddb_index;
1219
1220 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1221 &mbox_sts[0]);
1222 if (status != QLA_SUCCESS) {
1223 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1224 __func__, mbox_sts[0]));
1225 }
1226
1227 *mbx_sts = mbox_sts[0];
1228 return status;
1229 }
1230
1231 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index)
1232 {
1233 int status;
1234 uint32_t mbox_cmd[MBOX_REG_COUNT];
1235 uint32_t mbox_sts[MBOX_REG_COUNT];
1236
1237 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1238 memset(&mbox_sts, 0, sizeof(mbox_sts));
1239
1240 mbox_cmd[0] = MBOX_CMD_CLEAR_DATABASE_ENTRY;
1241 mbox_cmd[1] = ddb_index;
1242
1243 status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0],
1244 &mbox_sts[0]);
1245 if (status != QLA_SUCCESS) {
1246 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n",
1247 __func__, mbox_sts[0]));
1248 }
1249
1250 return status;
1251 }
1252
1253 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr,
1254 uint32_t offset, uint32_t length, uint32_t options)
1255 {
1256 uint32_t mbox_cmd[MBOX_REG_COUNT];
1257 uint32_t mbox_sts[MBOX_REG_COUNT];
1258 int status = QLA_SUCCESS;
1259
1260 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1261 memset(&mbox_sts, 0, sizeof(mbox_sts));
1262
1263 mbox_cmd[0] = MBOX_CMD_WRITE_FLASH;
1264 mbox_cmd[1] = LSDW(dma_addr);
1265 mbox_cmd[2] = MSDW(dma_addr);
1266 mbox_cmd[3] = offset;
1267 mbox_cmd[4] = length;
1268 mbox_cmd[5] = options;
1269
1270 status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]);
1271 if (status != QLA_SUCCESS) {
1272 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH "
1273 "failed w/ status %04X, mbx1 %04X\n",
1274 __func__, mbox_sts[0], mbox_sts[1]));
1275 }
1276 return status;
1277 }
1278
1279 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha,
1280 struct dev_db_entry *fw_ddb_entry,
1281 dma_addr_t fw_ddb_entry_dma, uint16_t ddb_index)
1282 {
1283 uint32_t dev_db_start_offset = FLASH_OFFSET_DB_INFO;
1284 uint32_t dev_db_end_offset;
1285 int status = QLA_ERROR;
1286
1287 memset(fw_ddb_entry, 0, sizeof(*fw_ddb_entry));
1288
1289 dev_db_start_offset += (ddb_index * sizeof(*fw_ddb_entry));
1290 dev_db_end_offset = FLASH_OFFSET_DB_END;
1291
1292 if (dev_db_start_offset > dev_db_end_offset) {
1293 DEBUG2(ql4_printk(KERN_ERR, ha,
1294 "%s:Invalid DDB index %d", __func__,
1295 ddb_index));
1296 goto exit_bootdb_failed;
1297 }
1298
1299 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset,
1300 sizeof(*fw_ddb_entry)) != QLA_SUCCESS) {
1301 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash"
1302 "failed\n", ha->host_no, __func__);
1303 goto exit_bootdb_failed;
1304 }
1305
1306 if (fw_ddb_entry->cookie == DDB_VALID_COOKIE)
1307 status = QLA_SUCCESS;
1308
1309 exit_bootdb_failed:
1310 return status;
1311 }
1312
1313 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password,
1314 uint16_t idx)
1315 {
1316 int ret = 0;
1317 int rval = QLA_ERROR;
1318 uint32_t offset = 0, chap_size;
1319 struct ql4_chap_table *chap_table;
1320 dma_addr_t chap_dma;
1321
1322 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1323 if (chap_table == NULL) {
1324 ret = -ENOMEM;
1325 goto exit_get_chap;
1326 }
1327
1328 chap_size = sizeof(struct ql4_chap_table);
1329 memset(chap_table, 0, chap_size);
1330
1331 if (is_qla40XX(ha))
1332 offset = FLASH_CHAP_OFFSET | (idx * chap_size);
1333 else {
1334 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2);
1335 /* flt_chap_size is CHAP table size for both ports
1336 * so divide it by 2 to calculate the offset for second port
1337 */
1338 if (ha->port_num == 1)
1339 offset += (ha->hw.flt_chap_size / 2);
1340 offset += (idx * chap_size);
1341 }
1342
1343 rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size);
1344 if (rval != QLA_SUCCESS) {
1345 ret = -EINVAL;
1346 goto exit_get_chap;
1347 }
1348
1349 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n",
1350 __le16_to_cpu(chap_table->cookie)));
1351
1352 if (__le16_to_cpu(chap_table->cookie) != CHAP_VALID_COOKIE) {
1353 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n");
1354 goto exit_get_chap;
1355 }
1356
1357 strncpy(password, chap_table->secret, QL4_CHAP_MAX_SECRET_LEN);
1358 strncpy(username, chap_table->name, QL4_CHAP_MAX_NAME_LEN);
1359 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1360
1361 exit_get_chap:
1362 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1363 return ret;
1364 }
1365
1366 static int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username,
1367 char *password, uint16_t idx, int bidi)
1368 {
1369 int ret = 0;
1370 int rval = QLA_ERROR;
1371 uint32_t offset = 0;
1372 struct ql4_chap_table *chap_table;
1373 dma_addr_t chap_dma;
1374
1375 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma);
1376 if (chap_table == NULL) {
1377 ret = -ENOMEM;
1378 goto exit_set_chap;
1379 }
1380
1381 memset(chap_table, 0, sizeof(struct ql4_chap_table));
1382 if (bidi)
1383 chap_table->flags |= BIT_6; /* peer */
1384 else
1385 chap_table->flags |= BIT_7; /* local */
1386 chap_table->secret_len = strlen(password);
1387 strncpy(chap_table->secret, password, MAX_CHAP_SECRET_LEN);
1388 strncpy(chap_table->name, username, MAX_CHAP_NAME_LEN);
1389 chap_table->cookie = __constant_cpu_to_le16(CHAP_VALID_COOKIE);
1390 offset = FLASH_CHAP_OFFSET | (idx * sizeof(struct ql4_chap_table));
1391 rval = qla4xxx_set_flash(ha, chap_dma, offset,
1392 sizeof(struct ql4_chap_table),
1393 FLASH_OPT_RMW_COMMIT);
1394
1395 if (rval == QLA_SUCCESS && ha->chap_list) {
1396 /* Update ha chap_list cache */
1397 memcpy((struct ql4_chap_table *)ha->chap_list + idx,
1398 chap_table, sizeof(struct ql4_chap_table));
1399 }
1400 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma);
1401 if (rval != QLA_SUCCESS)
1402 ret = -EINVAL;
1403
1404 exit_set_chap:
1405 return ret;
1406 }
1407
1408 /**
1409 * qla4xxx_get_chap_index - Get chap index given username and secret
1410 * @ha: pointer to adapter structure
1411 * @username: CHAP username to be searched
1412 * @password: CHAP password to be searched
1413 * @bidi: Is this a BIDI CHAP
1414 * @chap_index: CHAP index to be returned
1415 *
1416 * Match the username and password in the chap_list, return the index if a
1417 * match is found. If a match is not found then add the entry in FLASH and
1418 * return the index at which entry is written in the FLASH.
1419 **/
1420 static int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username,
1421 char *password, int bidi, uint16_t *chap_index)
1422 {
1423 int i, rval;
1424 int free_index = -1;
1425 int found_index = 0;
1426 int max_chap_entries = 0;
1427 struct ql4_chap_table *chap_table;
1428
1429 if (is_qla8022(ha))
1430 max_chap_entries = (ha->hw.flt_chap_size / 2) /
1431 sizeof(struct ql4_chap_table);
1432 else
1433 max_chap_entries = MAX_CHAP_ENTRIES_40XX;
1434
1435 if (!ha->chap_list) {
1436 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n");
1437 return QLA_ERROR;
1438 }
1439
1440 mutex_lock(&ha->chap_sem);
1441 for (i = 0; i < max_chap_entries; i++) {
1442 chap_table = (struct ql4_chap_table *)ha->chap_list + i;
1443 if (chap_table->cookie !=
1444 __constant_cpu_to_le16(CHAP_VALID_COOKIE)) {
1445 if (i > MAX_RESRV_CHAP_IDX && free_index == -1)
1446 free_index = i;
1447 continue;
1448 }
1449 if (bidi) {
1450 if (chap_table->flags & BIT_7)
1451 continue;
1452 } else {
1453 if (chap_table->flags & BIT_6)
1454 continue;
1455 }
1456 if (!strncmp(chap_table->secret, password,
1457 MAX_CHAP_SECRET_LEN) &&
1458 !strncmp(chap_table->name, username,
1459 MAX_CHAP_NAME_LEN)) {
1460 *chap_index = i;
1461 found_index = 1;
1462 break;
1463 }
1464 }
1465
1466 /* If chap entry is not present and a free index is available then
1467 * write the entry in flash
1468 */
1469 if (!found_index && free_index != -1) {
1470 rval = qla4xxx_set_chap(ha, username, password,
1471 free_index, bidi);
1472 if (!rval) {
1473 *chap_index = free_index;
1474 found_index = 1;
1475 }
1476 }
1477
1478 mutex_unlock(&ha->chap_sem);
1479
1480 if (found_index)
1481 return QLA_SUCCESS;
1482 return QLA_ERROR;
1483 }
1484
1485 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha,
1486 uint16_t fw_ddb_index,
1487 uint16_t connection_id,
1488 uint16_t option)
1489 {
1490 uint32_t mbox_cmd[MBOX_REG_COUNT];
1491 uint32_t mbox_sts[MBOX_REG_COUNT];
1492 int status = QLA_SUCCESS;
1493
1494 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1495 memset(&mbox_sts, 0, sizeof(mbox_sts));
1496
1497 mbox_cmd[0] = MBOX_CMD_CONN_CLOSE_SESS_LOGOUT;
1498 mbox_cmd[1] = fw_ddb_index;
1499 mbox_cmd[2] = connection_id;
1500 mbox_cmd[3] = option;
1501
1502 status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]);
1503 if (status != QLA_SUCCESS) {
1504 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE "
1505 "option %04x failed w/ status %04X %04X\n",
1506 __func__, option, mbox_sts[0], mbox_sts[1]));
1507 }
1508 return status;
1509 }
1510
1511 int qla4xxx_disable_acb(struct scsi_qla_host *ha)
1512 {
1513 uint32_t mbox_cmd[MBOX_REG_COUNT];
1514 uint32_t mbox_sts[MBOX_REG_COUNT];
1515 int status = QLA_SUCCESS;
1516
1517 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1518 memset(&mbox_sts, 0, sizeof(mbox_sts));
1519
1520 mbox_cmd[0] = MBOX_CMD_DISABLE_ACB;
1521
1522 status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]);
1523 if (status != QLA_SUCCESS) {
1524 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB "
1525 "failed w/ status %04X %04X %04X", __func__,
1526 mbox_sts[0], mbox_sts[1], mbox_sts[2]));
1527 }
1528 return status;
1529 }
1530
1531 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma,
1532 uint32_t acb_type, uint32_t len)
1533 {
1534 uint32_t mbox_cmd[MBOX_REG_COUNT];
1535 uint32_t mbox_sts[MBOX_REG_COUNT];
1536 int status = QLA_SUCCESS;
1537
1538 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1539 memset(&mbox_sts, 0, sizeof(mbox_sts));
1540
1541 mbox_cmd[0] = MBOX_CMD_GET_ACB;
1542 mbox_cmd[1] = acb_type;
1543 mbox_cmd[2] = LSDW(acb_dma);
1544 mbox_cmd[3] = MSDW(acb_dma);
1545 mbox_cmd[4] = len;
1546
1547 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1548 if (status != QLA_SUCCESS) {
1549 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB "
1550 "failed w/ status %04X\n", __func__,
1551 mbox_sts[0]));
1552 }
1553 return status;
1554 }
1555
1556 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
1557 uint32_t *mbox_sts, dma_addr_t acb_dma)
1558 {
1559 int status = QLA_SUCCESS;
1560
1561 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1562 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1563 mbox_cmd[0] = MBOX_CMD_SET_ACB;
1564 mbox_cmd[1] = 0; /* Primary ACB */
1565 mbox_cmd[2] = LSDW(acb_dma);
1566 mbox_cmd[3] = MSDW(acb_dma);
1567 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
1568
1569 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]);
1570 if (status != QLA_SUCCESS) {
1571 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_SET_ACB "
1572 "failed w/ status %04X\n", __func__,
1573 mbox_sts[0]));
1574 }
1575 return status;
1576 }
1577
1578 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha,
1579 struct ddb_entry *ddb_entry,
1580 struct iscsi_cls_conn *cls_conn,
1581 uint32_t *mbx_sts)
1582 {
1583 struct dev_db_entry *fw_ddb_entry;
1584 struct iscsi_conn *conn;
1585 struct iscsi_session *sess;
1586 struct qla_conn *qla_conn;
1587 struct sockaddr *dst_addr;
1588 dma_addr_t fw_ddb_entry_dma;
1589 int status = QLA_SUCCESS;
1590 int rval = 0;
1591 struct sockaddr_in *addr;
1592 struct sockaddr_in6 *addr6;
1593 char *ip;
1594 uint16_t iscsi_opts = 0;
1595 uint32_t options = 0;
1596 uint16_t idx;
1597
1598 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1599 &fw_ddb_entry_dma, GFP_KERNEL);
1600 if (!fw_ddb_entry) {
1601 DEBUG2(ql4_printk(KERN_ERR, ha,
1602 "%s: Unable to allocate dma buffer.\n",
1603 __func__));
1604 rval = -ENOMEM;
1605 goto exit_set_param_no_free;
1606 }
1607
1608 conn = cls_conn->dd_data;
1609 qla_conn = conn->dd_data;
1610 sess = conn->session;
1611 dst_addr = &qla_conn->qla_ep->dst_addr;
1612
1613 if (dst_addr->sa_family == AF_INET6)
1614 options |= IPV6_DEFAULT_DDB_ENTRY;
1615
1616 status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma);
1617 if (status == QLA_ERROR) {
1618 rval = -EINVAL;
1619 goto exit_set_param;
1620 }
1621
1622 iscsi_opts = le16_to_cpu(fw_ddb_entry->iscsi_options);
1623 memset(fw_ddb_entry->iscsi_alias, 0, sizeof(fw_ddb_entry->iscsi_alias));
1624
1625 memset(fw_ddb_entry->iscsi_name, 0, sizeof(fw_ddb_entry->iscsi_name));
1626
1627 if (sess->targetname != NULL) {
1628 memcpy(fw_ddb_entry->iscsi_name, sess->targetname,
1629 min(strlen(sess->targetname),
1630 sizeof(fw_ddb_entry->iscsi_name)));
1631 }
1632
1633 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
1634 memset(fw_ddb_entry->tgt_addr, 0, sizeof(fw_ddb_entry->tgt_addr));
1635
1636 fw_ddb_entry->options = DDB_OPT_TARGET | DDB_OPT_AUTO_SENDTGTS_DISABLE;
1637
1638 if (dst_addr->sa_family == AF_INET) {
1639 addr = (struct sockaddr_in *)dst_addr;
1640 ip = (char *)&addr->sin_addr;
1641 memcpy(fw_ddb_entry->ip_addr, ip, IP_ADDR_LEN);
1642 fw_ddb_entry->port = cpu_to_le16(ntohs(addr->sin_port));
1643 DEBUG2(ql4_printk(KERN_INFO, ha,
1644 "%s: Destination Address [%pI4]: index [%d]\n",
1645 __func__, fw_ddb_entry->ip_addr,
1646 ddb_entry->fw_ddb_index));
1647 } else if (dst_addr->sa_family == AF_INET6) {
1648 addr6 = (struct sockaddr_in6 *)dst_addr;
1649 ip = (char *)&addr6->sin6_addr;
1650 memcpy(fw_ddb_entry->ip_addr, ip, IPv6_ADDR_LEN);
1651 fw_ddb_entry->port = cpu_to_le16(ntohs(addr6->sin6_port));
1652 fw_ddb_entry->options |= DDB_OPT_IPV6_DEVICE;
1653 DEBUG2(ql4_printk(KERN_INFO, ha,
1654 "%s: Destination Address [%pI6]: index [%d]\n",
1655 __func__, fw_ddb_entry->ip_addr,
1656 ddb_entry->fw_ddb_index));
1657 } else {
1658 ql4_printk(KERN_ERR, ha,
1659 "%s: Failed to get IP Address\n",
1660 __func__);
1661 rval = -EINVAL;
1662 goto exit_set_param;
1663 }
1664
1665 /* CHAP */
1666 if (sess->username != NULL && sess->password != NULL) {
1667 if (strlen(sess->username) && strlen(sess->password)) {
1668 iscsi_opts |= BIT_7;
1669
1670 rval = qla4xxx_get_chap_index(ha, sess->username,
1671 sess->password,
1672 LOCAL_CHAP, &idx);
1673 if (rval)
1674 goto exit_set_param;
1675
1676 fw_ddb_entry->chap_tbl_idx = cpu_to_le16(idx);
1677 }
1678 }
1679
1680 if (sess->username_in != NULL && sess->password_in != NULL) {
1681 /* Check if BIDI CHAP */
1682 if (strlen(sess->username_in) && strlen(sess->password_in)) {
1683 iscsi_opts |= BIT_4;
1684
1685 rval = qla4xxx_get_chap_index(ha, sess->username_in,
1686 sess->password_in,
1687 BIDI_CHAP, &idx);
1688 if (rval)
1689 goto exit_set_param;
1690 }
1691 }
1692
1693 if (sess->initial_r2t_en)
1694 iscsi_opts |= BIT_10;
1695
1696 if (sess->imm_data_en)
1697 iscsi_opts |= BIT_11;
1698
1699 fw_ddb_entry->iscsi_options = cpu_to_le16(iscsi_opts);
1700
1701 if (conn->max_recv_dlength)
1702 fw_ddb_entry->iscsi_max_rcv_data_seg_len =
1703 __constant_cpu_to_le16((conn->max_recv_dlength / BYTE_UNITS));
1704
1705 if (sess->max_r2t)
1706 fw_ddb_entry->iscsi_max_outsnd_r2t = cpu_to_le16(sess->max_r2t);
1707
1708 if (sess->first_burst)
1709 fw_ddb_entry->iscsi_first_burst_len =
1710 __constant_cpu_to_le16((sess->first_burst / BYTE_UNITS));
1711
1712 if (sess->max_burst)
1713 fw_ddb_entry->iscsi_max_burst_len =
1714 __constant_cpu_to_le16((sess->max_burst / BYTE_UNITS));
1715
1716 if (sess->time2wait)
1717 fw_ddb_entry->iscsi_def_time2wait =
1718 cpu_to_le16(sess->time2wait);
1719
1720 if (sess->time2retain)
1721 fw_ddb_entry->iscsi_def_time2retain =
1722 cpu_to_le16(sess->time2retain);
1723
1724 status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
1725 fw_ddb_entry_dma, mbx_sts);
1726
1727 if (status != QLA_SUCCESS)
1728 rval = -EINVAL;
1729 exit_set_param:
1730 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1731 fw_ddb_entry, fw_ddb_entry_dma);
1732 exit_set_param_no_free:
1733 return rval;
1734 }
1735
1736 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index,
1737 uint16_t stats_size, dma_addr_t stats_dma)
1738 {
1739 int status = QLA_SUCCESS;
1740 uint32_t mbox_cmd[MBOX_REG_COUNT];
1741 uint32_t mbox_sts[MBOX_REG_COUNT];
1742
1743 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
1744 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
1745 mbox_cmd[0] = MBOX_CMD_GET_MANAGEMENT_DATA;
1746 mbox_cmd[1] = fw_ddb_index;
1747 mbox_cmd[2] = LSDW(stats_dma);
1748 mbox_cmd[3] = MSDW(stats_dma);
1749 mbox_cmd[4] = stats_size;
1750
1751 status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]);
1752 if (status != QLA_SUCCESS) {
1753 DEBUG2(ql4_printk(KERN_WARNING, ha,
1754 "%s: MBOX_CMD_GET_MANAGEMENT_DATA "
1755 "failed w/ status %04X\n", __func__,
1756 mbox_sts[0]));
1757 }
1758 return status;
1759 }
1760
1761 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx,
1762 uint32_t ip_idx, uint32_t *sts)
1763 {
1764 uint32_t mbox_cmd[MBOX_REG_COUNT];
1765 uint32_t mbox_sts[MBOX_REG_COUNT];
1766 int status = QLA_SUCCESS;
1767
1768 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1769 memset(&mbox_sts, 0, sizeof(mbox_sts));
1770 mbox_cmd[0] = MBOX_CMD_GET_IP_ADDR_STATE;
1771 mbox_cmd[1] = acb_idx;
1772 mbox_cmd[2] = ip_idx;
1773
1774 status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]);
1775 if (status != QLA_SUCCESS) {
1776 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: "
1777 "MBOX_CMD_GET_IP_ADDR_STATE failed w/ "
1778 "status %04X\n", __func__, mbox_sts[0]));
1779 }
1780 memcpy(sts, mbox_sts, sizeof(mbox_sts));
1781 return status;
1782 }
1783
1784 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1785 uint32_t offset, uint32_t size)
1786 {
1787 int status = QLA_SUCCESS;
1788 uint32_t mbox_cmd[MBOX_REG_COUNT];
1789 uint32_t mbox_sts[MBOX_REG_COUNT];
1790
1791 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1792 memset(&mbox_sts, 0, sizeof(mbox_sts));
1793
1794 mbox_cmd[0] = MBOX_CMD_GET_NVRAM;
1795 mbox_cmd[1] = LSDW(nvram_dma);
1796 mbox_cmd[2] = MSDW(nvram_dma);
1797 mbox_cmd[3] = offset;
1798 mbox_cmd[4] = size;
1799
1800 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1801 &mbox_sts[0]);
1802 if (status != QLA_SUCCESS) {
1803 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1804 "status %04X\n", ha->host_no, __func__,
1805 mbox_sts[0]));
1806 }
1807 return status;
1808 }
1809
1810 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma,
1811 uint32_t offset, uint32_t size)
1812 {
1813 int status = QLA_SUCCESS;
1814 uint32_t mbox_cmd[MBOX_REG_COUNT];
1815 uint32_t mbox_sts[MBOX_REG_COUNT];
1816
1817 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1818 memset(&mbox_sts, 0, sizeof(mbox_sts));
1819
1820 mbox_cmd[0] = MBOX_CMD_SET_NVRAM;
1821 mbox_cmd[1] = LSDW(nvram_dma);
1822 mbox_cmd[2] = MSDW(nvram_dma);
1823 mbox_cmd[3] = offset;
1824 mbox_cmd[4] = size;
1825
1826 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1827 &mbox_sts[0]);
1828 if (status != QLA_SUCCESS) {
1829 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1830 "status %04X\n", ha->host_no, __func__,
1831 mbox_sts[0]));
1832 }
1833 return status;
1834 }
1835
1836 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha,
1837 uint32_t region, uint32_t field0,
1838 uint32_t field1)
1839 {
1840 int status = QLA_SUCCESS;
1841 uint32_t mbox_cmd[MBOX_REG_COUNT];
1842 uint32_t mbox_sts[MBOX_REG_COUNT];
1843
1844 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1845 memset(&mbox_sts, 0, sizeof(mbox_sts));
1846
1847 mbox_cmd[0] = MBOX_CMD_RESTORE_FACTORY_DEFAULTS;
1848 mbox_cmd[3] = region;
1849 mbox_cmd[4] = field0;
1850 mbox_cmd[5] = field1;
1851
1852 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0],
1853 &mbox_sts[0]);
1854 if (status != QLA_SUCCESS) {
1855 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed "
1856 "status %04X\n", ha->host_no, __func__,
1857 mbox_sts[0]));
1858 }
1859 return status;
1860 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree