arch/sparc/kernel/time_32.c

   1 /* linux/arch/sparc/kernel/time.c
   2  *
   3  * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
   5  *
   6  * Chris Davis (cdavis@cois.on.ca) 03/27/1998
   7  * Added support for the intersil on the sun4/4200
   8  *
   9  * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
  10  * Support for MicroSPARC-IIep, PCI CPU.
  11  *
  12  * This file handles the Sparc specific time handling details.
  13  *
  14  * 1997-09-10   Updated NTP code according to technical memorandum Jan '96
  15  *              "A Kernel Model for Precision Timekeeping" by Dave Mills
  16  */
  17 #include <linux/errno.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/kernel.h>
  21 #include <linux/param.h>
  22 #include <linux/string.h>
  23 #include <linux/mm.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/time.h>
  26 #include <linux/rtc.h>
  27 #include <linux/rtc/m48t59.h>
  28 #include <linux/timex.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/ioport.h>
  32 #include <linux/profile.h>
  33 #include <linux/of.h>
  34 #include <linux/of_device.h>
  35 #include <linux/platform_device.h>
  36
  37 #include <asm/oplib.h>
  38 #include <asm/timex.h>
  39 #include <asm/timer.h>
  40 #include <asm/system.h>
  41 #include <asm/irq.h>
  42 #include <asm/io.h>
  43 #include <asm/idprom.h>
  44 #include <asm/machines.h>
  45 #include <asm/page.h>
  46 #include <asm/pcic.h>
  47 #include <asm/irq_regs.h>
  48
  49 #include "irq.h"
  50
  51 DEFINE_SPINLOCK(rtc_lock);
  52 EXPORT_SYMBOL(rtc_lock);
  53
  54 static int set_rtc_mmss(unsigned long);
  55
  56 unsigned long profile_pc(struct pt_regs *regs)
  57 {
  58         extern char __copy_user_begin[], __copy_user_end[];
  59         extern char __atomic_begin[], __atomic_end[];
  60         extern char __bzero_begin[], __bzero_end[];
  61
  62         unsigned long pc = regs->pc;
  63
  64         if (in_lock_functions(pc) ||
  65             (pc >= (unsigned long) __copy_user_begin &&
  66              pc < (unsigned long) __copy_user_end) ||
  67             (pc >= (unsigned long) __atomic_begin &&
  68              pc < (unsigned long) __atomic_end) ||
  69             (pc >= (unsigned long) __bzero_begin &&
  70              pc < (unsigned long) __bzero_end))
  71                 pc = regs->u_regs[UREG_RETPC];
  72         return pc;
  73 }
  74
  75 EXPORT_SYMBOL(profile_pc);
  76
  77 __volatile__ unsigned int *master_l10_counter;
  78
  79 u32 (*do_arch_gettimeoffset)(void);
  80
  81 /*
  82  * timer_interrupt() needs to keep up the real-time clock,
  83  * as well as call the "do_timer()" routine every clocktick
  84  */
  85
  86 #define TICK_SIZE (tick_nsec / 1000)
  87
  88 static irqreturn_t timer_interrupt(int dummy, void *dev_id)
  89 {
  90         /* last time the cmos clock got updated */
  91         static long last_rtc_update;
  92
  93 #ifndef CONFIG_SMP
  94         profile_tick(CPU_PROFILING);
  95 #endif
  96
  97         /* Protect counter clear so that do_gettimeoffset works */
  98         write_seqlock(&xtime_lock);
  99
 100         clear_clock_irq();
 101
 102         do_timer(1);
 103
 104         /* Determine when to update the Mostek clock. */
 105         if (ntp_synced() &&
 106             xtime.tv_sec > last_rtc_update + 660 &&
 107             (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
 108             (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
 109           if (set_rtc_mmss(xtime.tv_sec) == 0)
 110             last_rtc_update = xtime.tv_sec;
 111           else
 112             last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
 113         }
 114         write_sequnlock(&xtime_lock);
 115
 116 #ifndef CONFIG_SMP
 117         update_process_times(user_mode(get_irq_regs()));
 118 #endif
 119         return IRQ_HANDLED;
 120 }
 121
 122 static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
 123 {
 124         struct platform_device *pdev = to_platform_device(dev);
 125         struct m48t59_plat_data *pdata = pdev->dev.platform_data;
 126
 127         return readb(pdata->ioaddr + ofs);
 128 }
 129
 130 static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
 131 {
 132         struct platform_device *pdev = to_platform_device(dev);
 133         struct m48t59_plat_data *pdata = pdev->dev.platform_data;
 134
 135         writeb(val, pdata->ioaddr + ofs);
 136 }
 137
 138 static struct m48t59_plat_data m48t59_data = {
 139         .read_byte = mostek_read_byte,
 140         .write_byte = mostek_write_byte,
 141 };
 142
 143 /* resource is set at runtime */
 144 static struct platform_device m48t59_rtc = {
 145         .name           = "rtc-m48t59",
 146         .id             = 0,
 147         .num_resources  = 1,
 148         .dev    = {
 149                 .platform_data = &m48t59_data,
 150         },
 151 };
 152
 153 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
 154 {
 155         struct device_node *dp = op->node;
 156         const char *model = of_get_property(dp, "model", NULL);
 157
 158         if (!model)
 159                 return -ENODEV;
 160
 161         m48t59_rtc.resource = &op->resource[0];
 162         if (!strcmp(model, "mk48t02")) {
 163                 /* Map the clock register io area read-only */
 164                 m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
 165                                                 2048, "rtc-m48t59");
 166                 m48t59_data.type = M48T59RTC_TYPE_M48T02;
 167         } else if (!strcmp(model, "mk48t08")) {
 168                 m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
 169                                                 8192, "rtc-m48t59");
 170                 m48t59_data.type = M48T59RTC_TYPE_M48T08;
 171         } else
 172                 return -ENODEV;
 173
 174         if (platform_device_register(&m48t59_rtc) < 0)
 175                 printk(KERN_ERR "Registering RTC device failed\n");
 176
 177         return 0;
 178 }
 179
 180 static struct of_device_id __initdata clock_match[] = {
 181         {
 182                 .name = "eeprom",
 183         },
 184         {},
 185 };
 186
 187 static struct of_platform_driver clock_driver = {
 188         .match_table    = clock_match,
 189         .probe          = clock_probe,
 190         .driver         = {
 191                 .name   = "rtc",
 192         },
 193 };
 194
 195
 196 /* Probe for the mostek real time clock chip. */
 197 static int __init clock_init(void)
 198 {
 199         return of_register_driver(&clock_driver, &of_platform_bus_type);
 200 }
 201 /* Must be after subsys_initcall() so that busses are probed.  Must
 202  * be before device_initcall() because things like the RTC driver
 203  * need to see the clock registers.
 204  */
 205 fs_initcall(clock_init);
 206
 207
 208 u32 sbus_do_gettimeoffset(void)
 209 {
 210         unsigned long val = *master_l10_counter;
 211         unsigned long usec = (val >> 10) & 0x1fffff;
 212
 213         /* Limit hit?  */
 214         if (val & 0x80000000)
 215                 usec += 1000000 / HZ;
 216
 217         return usec * 1000;
 218 }
 219
 220
 221 u32 arch_gettimeoffset(void)
 222 {
 223         if (unlikely(!do_arch_gettimeoffset))
 224                 return 0;
 225         return do_arch_gettimeoffset();
 226 }
 227
 228 static void __init sbus_time_init(void)
 229 {
 230         do_arch_gettimeoffset = sbus_do_gettimeoffset;
 231
 232         btfixup();
 233
 234         sparc_init_timers(timer_interrupt);
 235 }
 236
 237 void __init time_init(void)
 238 {
 239 #ifdef CONFIG_PCI
 240         extern void pci_time_init(void);
 241         if (pcic_present()) {
 242                 pci_time_init();
 243                 return;
 244         }
 245 #endif
 246         sbus_time_init();
 247 }
 248
 249
 250 static int set_rtc_mmss(unsigned long secs)
 251 {
 252         struct rtc_device *rtc = rtc_class_open("rtc0");
 253         int err = -1;
 254
 255         if (rtc) {
 256                 err = rtc_set_mmss(rtc, secs);
 257                 rtc_class_close(rtc);
 258         }
 259
 260         return err;
 261 }