arch/x86/kernel/mfgpt_32.c

   1 /*
   2  * Driver/API for AMD Geode Multi-Function General Purpose Timers (MFGPT)
   3  *
   4  * Copyright (C) 2006, Advanced Micro Devices, Inc.
   5  * Copyright (C) 2007, Andres Salomon <dilinger@debian.org>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of version 2 of the GNU General Public License
   9  * as published by the Free Software Foundation.
  10  *
  11  * The MFGPTs are documented in AMD Geode CS5536 Companion Device Data Book.
  12  */
  13
  14 /*
  15  * We are using the 32.768kHz input clock - it's the only one that has the
  16  * ranges we find desirable.  The following table lists the suitable
  17  * divisors and the associated Hz, minimum interval and the maximum interval:
  18  *
  19  *  Divisor   Hz      Min Delta (s)  Max Delta (s)
  20  *   1        32768   .00048828125      2.000
  21  *   2        16384   .0009765625       4.000
  22  *   4         8192   .001953125        8.000
  23  *   8         4096   .00390625        16.000
  24  *   16        2048   .0078125         32.000
  25  *   32        1024   .015625          64.000
  26  *   64         512   .03125          128.000
  27  *  128         256   .0625           256.000
  28  *  256         128   .125            512.000
  29  */
  30
  31 #include <linux/kernel.h>
  32 #include <linux/interrupt.h>
  33 #include <asm/geode.h>
  34
  35 static struct mfgpt_timer_t {
  36         unsigned int avail:1;
  37 } mfgpt_timers[MFGPT_MAX_TIMERS];
  38
  39 /* Selected from the table above */
  40
  41 #define MFGPT_DIVISOR 16
  42 #define MFGPT_SCALE  4     /* divisor = 2^(scale) */
  43 #define MFGPT_HZ  (32768 / MFGPT_DIVISOR)
  44 #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
  45
  46 #ifdef CONFIG_GEODE_MFGPT_TIMER
  47 static int __init mfgpt_timer_setup(void);
  48 #else
  49 #define mfgpt_timer_setup() (0)
  50 #endif
  51
  52 /* Allow for disabling of MFGPTs */
  53 static int disable;
  54 static int __init mfgpt_disable(char *s)
  55 {
  56         disable = 1;
  57         return 1;
  58 }
  59 __setup("nomfgpt", mfgpt_disable);
  60
  61 /* Reset the MFGPT timers. This is required by some broken BIOSes which already
  62  * do the same and leave the system in an unstable state. TinyBIOS 0.98 is
  63  * affected at least (0.99 is OK with MFGPT workaround left to off).
  64  */
  65 static int __init mfgpt_fix(char *s)
  66 {
  67         u32 val, dummy;
  68
  69         /* The following udocumented bit resets the MFGPT timers */
  70         val = 0xFF; dummy = 0;
  71         wrmsr(0x5140002B, val, dummy);
  72         return 1;
  73 }
  74 __setup("mfgptfix", mfgpt_fix);
  75
  76 /*
  77  * Check whether any MFGPTs are available for the kernel to use.  In most
  78  * cases, firmware that uses AMD's VSA code will claim all timers during
  79  * bootup; we certainly don't want to take them if they're already in use.
  80  * In other cases (such as with VSAless OpenFirmware), the system firmware
  81  * leaves timers available for us to use.
  82  */
  83 int __init geode_mfgpt_detect(void)
  84 {
  85         int count = 0, i;
  86         u16 val;
  87
  88         if (disable) {
  89                 printk(KERN_INFO "geode-mfgpt:  Skipping MFGPT setup\n");
  90                 return 0;
  91         }
  92
  93         for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
  94                 val = geode_mfgpt_read(i, MFGPT_REG_SETUP);
  95                 if (!(val & MFGPT_SETUP_SETUP)) {
  96                         mfgpt_timers[i].avail = 1;
  97                         count++;
  98                 }
  99         }
 100
 101         /* set up clock event device, if desired */
 102         i = mfgpt_timer_setup();
 103
 104         return count;
 105 }
 106
 107 int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable)
 108 {
 109         u32 msr, mask, value, dummy;
 110         int shift = (cmp == MFGPT_CMP1) ? 0 : 8;
 111
 112         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
 113                 return -EIO;
 114
 115         /*
 116          * The register maps for these are described in sections 6.17.1.x of
 117          * the AMD Geode CS5536 Companion Device Data Book.
 118          */
 119         switch (event) {
 120         case MFGPT_EVENT_RESET:
 121                 /*
 122                  * XXX: According to the docs, we cannot reset timers above
 123                  * 6; that is, resets for 7 and 8 will be ignored.  Is this
 124                  * a problem?   -dilinger
 125                  */
 126                 msr = MFGPT_NR_MSR;
 127                 mask = 1 << (timer + 24);
 128                 break;
 129
 130         case MFGPT_EVENT_NMI:
 131                 msr = MFGPT_NR_MSR;
 132                 mask = 1 << (timer + shift);
 133                 break;
 134
 135         case MFGPT_EVENT_IRQ:
 136                 msr = MFGPT_IRQ_MSR;
 137                 mask = 1 << (timer + shift);
 138                 break;
 139
 140         default:
 141                 return -EIO;
 142         }
 143
 144         rdmsr(msr, value, dummy);
 145
 146         if (enable)
 147                 value |= mask;
 148         else
 149                 value &= ~mask;
 150
 151         wrmsr(msr, value, dummy);
 152         return 0;
 153 }
 154
 155 int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable)
 156 {
 157         u32 val, dummy;
 158         int offset;
 159
 160         if (timer < 0 || timer >= MFGPT_MAX_TIMERS)
 161                 return -EIO;
 162
 163         if (geode_mfgpt_toggle_event(timer, cmp, MFGPT_EVENT_IRQ, enable))
 164                 return -EIO;
 165
 166         rdmsr(MSR_PIC_ZSEL_LOW, val, dummy);
 167
 168         offset = (timer % 4) * 4;
 169
 170         val &= ~((0xF << offset) | (0xF << (offset + 16)));
 171
 172         if (enable) {
 173                 val |= (irq & 0x0F) << (offset);
 174                 val |= (irq & 0x0F) << (offset + 16);
 175         }
 176
 177         wrmsr(MSR_PIC_ZSEL_LOW, val, dummy);
 178         return 0;
 179 }
 180
 181 static int mfgpt_get(int timer)
 182 {
 183         mfgpt_timers[timer].avail = 0;
 184         printk(KERN_INFO "geode-mfgpt:  Registered timer %d\n", timer);
 185         return timer;
 186 }
 187
 188 int geode_mfgpt_alloc_timer(int timer, int domain)
 189 {
 190         int i;
 191
 192         if (!geode_get_dev_base(GEODE_DEV_MFGPT))
 193                 return -ENODEV;
 194         if (timer >= MFGPT_MAX_TIMERS)
 195                 return -EIO;
 196
 197         if (timer < 0) {
 198                 /* Try to find an available timer */
 199                 for (i = 0; i < MFGPT_MAX_TIMERS; i++) {
 200                         if (mfgpt_timers[i].avail)
 201                                 return mfgpt_get(i);
 202
 203                         if (i == 5 && domain == MFGPT_DOMAIN_WORKING)
 204                                 break;
 205                 }
 206         } else {
 207                 /* If they requested a specific timer, try to honor that */
 208                 if (mfgpt_timers[timer].avail)
 209                         return mfgpt_get(timer);
 210         }
 211
 212         /* No timers available - too bad */
 213         return -1;
 214 }
 215
 216
 217 #ifdef CONFIG_GEODE_MFGPT_TIMER
 218
 219 /*
 220  * The MFPGT timers on the CS5536 provide us with suitable timers to use
 221  * as clock event sources - not as good as a HPET or APIC, but certainly
 222  * better then the PIT.  This isn't a general purpose MFGPT driver, but
 223  * a simplified one designed specifically to act as a clock event source.
 224  * For full details about the MFGPT, please consult the CS5536 data sheet.
 225  */
 226
 227 #include <linux/clocksource.h>
 228 #include <linux/clockchips.h>
 229
 230 static unsigned int mfgpt_tick_mode = CLOCK_EVT_MODE_SHUTDOWN;
 231 static u16 mfgpt_event_clock;
 232
 233 static int irq = 7;
 234 static int __init mfgpt_setup(char *str)
 235 {
 236         get_option(&str, &irq);
 237         return 1;
 238 }
 239 __setup("mfgpt_irq=", mfgpt_setup);
 240
 241 static void mfgpt_disable_timer(u16 clock)
 242 {
 243         u16 val = geode_mfgpt_read(clock, MFGPT_REG_SETUP);
 244         geode_mfgpt_write(clock, MFGPT_REG_SETUP, val & ~MFGPT_SETUP_CNTEN);
 245 }
 246
 247 static int mfgpt_next_event(unsigned long, struct clock_event_device *);
 248 static void mfgpt_set_mode(enum clock_event_mode, struct clock_event_device *);
 249
 250 static struct clock_event_device mfgpt_clockevent = {
 251         .name = "mfgpt-timer",
 252         .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 253         .set_mode = mfgpt_set_mode,
 254         .set_next_event = mfgpt_next_event,
 255         .rating = 250,
 256         .cpumask = CPU_MASK_ALL,
 257         .shift = 32
 258 };
 259
 260 static void mfgpt_start_timer(u16 delta)
 261 {
 262         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_CMP2, (u16) delta);
 263         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
 264
 265         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
 266                           MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
 267 }
 268
 269 static void mfgpt_set_mode(enum clock_event_mode mode,
 270                            struct clock_event_device *evt)
 271 {
 272         mfgpt_disable_timer(mfgpt_event_clock);
 273
 274         if (mode == CLOCK_EVT_MODE_PERIODIC)
 275                 mfgpt_start_timer(MFGPT_PERIODIC);
 276
 277         mfgpt_tick_mode = mode;
 278 }
 279
 280 static int mfgpt_next_event(unsigned long delta, struct clock_event_device *evt)
 281 {
 282         mfgpt_start_timer(delta);
 283         return 0;
 284 }
 285
 286 /* Assume (foolishly?), that this interrupt was due to our tick */
 287
 288 static irqreturn_t mfgpt_tick(int irq, void *dev_id)
 289 {
 290         /* Turn off the clock (and clear the event) */
 291         mfgpt_disable_timer(mfgpt_event_clock);
 292
 293         if (mfgpt_tick_mode == CLOCK_EVT_MODE_SHUTDOWN)
 294                 return IRQ_HANDLED;
 295
 296         /* Clear the counter */
 297         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_COUNTER, 0);
 298
 299         /* Restart the clock in periodic mode */
 300
 301         if (mfgpt_tick_mode == CLOCK_EVT_MODE_PERIODIC) {
 302                 geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP,
 303                                   MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2);
 304         }
 305
 306         mfgpt_clockevent.event_handler(&mfgpt_clockevent);
 307         return IRQ_HANDLED;
 308 }
 309
 310 static struct irqaction mfgptirq  = {
 311         .handler = mfgpt_tick,
 312         .flags = IRQF_DISABLED | IRQF_NOBALANCING,
 313         .mask = CPU_MASK_NONE,
 314         .name = "mfgpt-timer"
 315 };
 316
 317 static int __init mfgpt_timer_setup(void)
 318 {
 319         int timer, ret;
 320         u16 val;
 321
 322         timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
 323         if (timer < 0) {
 324                 printk(KERN_ERR
 325                        "mfgpt-timer:  Could not allocate a MFPGT timer\n");
 326                 return -ENODEV;
 327         }
 328
 329         mfgpt_event_clock = timer;
 330
 331         /* Set up the IRQ on the MFGPT side */
 332         if (geode_mfgpt_setup_irq(mfgpt_event_clock, MFGPT_CMP2, irq)) {
 333                 printk(KERN_ERR "mfgpt-timer:  Could not set up IRQ %d\n", irq);
 334                 return -EIO;
 335         }
 336
 337         /* And register it with the kernel */
 338         ret = setup_irq(irq, &mfgptirq);
 339
 340         if (ret) {
 341                 printk(KERN_ERR
 342                        "mfgpt-timer:  Unable to set up the interrupt.\n");
 343                 goto err;
 344         }
 345
 346         /* Set the clock scale and enable the event mode for CMP2 */
 347         val = MFGPT_SCALE | (3 << 8);
 348
 349         geode_mfgpt_write(mfgpt_event_clock, MFGPT_REG_SETUP, val);
 350
 351         /* Set up the clock event */
 352         mfgpt_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC, 32);
 353         mfgpt_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
 354                         &mfgpt_clockevent);
 355         mfgpt_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
 356                         &mfgpt_clockevent);
 357
 358         printk(KERN_INFO
 359                "mfgpt-timer:  registering the MFGT timer as a clock event.\n");
 360         clockevents_register_device(&mfgpt_clockevent);
 361
 362         return 0;
 363
 364 err:
 365         geode_mfgpt_release_irq(mfgpt_event_clock, MFGPT_CMP2, irq);
 366         printk(KERN_ERR
 367                "mfgpt-timer:  Unable to set up the MFGPT clock source\n");
 368         return -EIO;
 369 }
 370
 371 #endif