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RS485: fix inconsistencies in the meaning of some variables
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / hpsa.c
blobe76107b2ade3a2b7a2666daab0c7a0b683e53d74
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/delay.h>
29 #include <linux/fs.h>
30 #include <linux/timer.h>
31 #include <linux/seq_file.h>
32 #include <linux/init.h>
33 #include <linux/spinlock.h>
34 #include <linux/compat.h>
35 #include <linux/blktrace_api.h>
36 #include <linux/uaccess.h>
37 #include <linux/io.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/completion.h>
40 #include <linux/moduleparam.h>
41 #include <scsi/scsi.h>
42 #include <scsi/scsi_cmnd.h>
43 #include <scsi/scsi_device.h>
44 #include <scsi/scsi_host.h>
45 #include <scsi/scsi_tcq.h>
46 #include <linux/cciss_ioctl.h>
47 #include <linux/string.h>
48 #include <linux/bitmap.h>
49 #include <linux/atomic.h>
50 #include <linux/kthread.h>
51 #include <linux/jiffies.h>
52 #include "hpsa_cmd.h"
53 #include "hpsa.h"
54
55 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
56 #define HPSA_DRIVER_VERSION "2.0.2-1"
57 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
58
59 /* How long to wait (in milliseconds) for board to go into simple mode */
60 #define MAX_CONFIG_WAIT 30000
61 #define MAX_IOCTL_CONFIG_WAIT 1000
62
63 /*define how many times we will try a command because of bus resets */
64 #define MAX_CMD_RETRIES 3
65
66 /* Embedded module documentation macros - see modules.h */
67 MODULE_AUTHOR("Hewlett-Packard Company");
68 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
69 HPSA_DRIVER_VERSION);
70 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
71 MODULE_VERSION(HPSA_DRIVER_VERSION);
72 MODULE_LICENSE("GPL");
73
74 static int hpsa_allow_any;
75 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
76 MODULE_PARM_DESC(hpsa_allow_any,
77 "Allow hpsa driver to access unknown HP Smart Array hardware");
78 static int hpsa_simple_mode;
79 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
80 MODULE_PARM_DESC(hpsa_simple_mode,
81 "Use 'simple mode' rather than 'performant mode'");
82
83 /* define the PCI info for the cards we can control */
84 static const struct pci_device_id hpsa_pci_device_id[] = {
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
100 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
101 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
102 {0,}
103 };
104
105 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
106
107 /* board_id = Subsystem Device ID & Vendor ID
108 * product = Marketing Name for the board
109 * access = Address of the struct of function pointers
110 */
111 static struct board_type products[] = {
112 {0x3241103C, "Smart Array P212", &SA5_access},
113 {0x3243103C, "Smart Array P410", &SA5_access},
114 {0x3245103C, "Smart Array P410i", &SA5_access},
115 {0x3247103C, "Smart Array P411", &SA5_access},
116 {0x3249103C, "Smart Array P812", &SA5_access},
117 {0x324a103C, "Smart Array P712m", &SA5_access},
118 {0x324b103C, "Smart Array P711m", &SA5_access},
119 {0x3350103C, "Smart Array", &SA5_access},
120 {0x3351103C, "Smart Array", &SA5_access},
121 {0x3352103C, "Smart Array", &SA5_access},
122 {0x3353103C, "Smart Array", &SA5_access},
123 {0x3354103C, "Smart Array", &SA5_access},
124 {0x3355103C, "Smart Array", &SA5_access},
125 {0x3356103C, "Smart Array", &SA5_access},
126 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
127 };
128
129 static int number_of_controllers;
130
131 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
132 static spinlock_t lockup_detector_lock;
133 static struct task_struct *hpsa_lockup_detector;
134
135 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
136 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
137 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
138 static void start_io(struct ctlr_info *h);
139
140 #ifdef CONFIG_COMPAT
141 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
142 #endif
143
144 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
145 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
146 static struct CommandList *cmd_alloc(struct ctlr_info *h);
147 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
148 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
149 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
150 int cmd_type);
151
152 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
153 static void hpsa_scan_start(struct Scsi_Host *);
154 static int hpsa_scan_finished(struct Scsi_Host *sh,
155 unsigned long elapsed_time);
156 static int hpsa_change_queue_depth(struct scsi_device *sdev,
157 int qdepth, int reason);
158
159 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
160 static int hpsa_slave_alloc(struct scsi_device *sdev);
161 static void hpsa_slave_destroy(struct scsi_device *sdev);
162
163 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
164 static int check_for_unit_attention(struct ctlr_info *h,
165 struct CommandList *c);
166 static void check_ioctl_unit_attention(struct ctlr_info *h,
167 struct CommandList *c);
168 /* performant mode helper functions */
169 static void calc_bucket_map(int *bucket, int num_buckets,
170 int nsgs, int *bucket_map);
171 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
172 static inline u32 next_command(struct ctlr_info *h);
173 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
174 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
175 u64 *cfg_offset);
176 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
177 unsigned long *memory_bar);
178 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
179 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
180 void __iomem *vaddr, int wait_for_ready);
181 #define BOARD_NOT_READY 0
182 #define BOARD_READY 1
183
184 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
185 {
186 unsigned long *priv = shost_priv(sdev->host);
187 return (struct ctlr_info *) *priv;
188 }
189
190 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
191 {
192 unsigned long *priv = shost_priv(sh);
193 return (struct ctlr_info *) *priv;
194 }
195
196 static int check_for_unit_attention(struct ctlr_info *h,
197 struct CommandList *c)
198 {
199 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
200 return 0;
201
202 switch (c->err_info->SenseInfo[12]) {
203 case STATE_CHANGED:
204 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
205 "detected, command retried\n", h->ctlr);
206 break;
207 case LUN_FAILED:
208 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
209 "detected, action required\n", h->ctlr);
210 break;
211 case REPORT_LUNS_CHANGED:
212 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
213 "changed, action required\n", h->ctlr);
214 /*
215 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
216 */
217 break;
218 case POWER_OR_RESET:
219 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
220 "or device reset detected\n", h->ctlr);
221 break;
222 case UNIT_ATTENTION_CLEARED:
223 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
224 "cleared by another initiator\n", h->ctlr);
225 break;
226 default:
227 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
228 "unit attention detected\n", h->ctlr);
229 break;
230 }
231 return 1;
232 }
233
234 static ssize_t host_store_rescan(struct device *dev,
235 struct device_attribute *attr,
236 const char *buf, size_t count)
237 {
238 struct ctlr_info *h;
239 struct Scsi_Host *shost = class_to_shost(dev);
240 h = shost_to_hba(shost);
241 hpsa_scan_start(h->scsi_host);
242 return count;
243 }
244
245 static ssize_t host_show_firmware_revision(struct device *dev,
246 struct device_attribute *attr, char *buf)
247 {
248 struct ctlr_info *h;
249 struct Scsi_Host *shost = class_to_shost(dev);
250 unsigned char *fwrev;
251
252 h = shost_to_hba(shost);
253 if (!h->hba_inquiry_data)
254 return 0;
255 fwrev = &h->hba_inquiry_data[32];
256 return snprintf(buf, 20, "%c%c%c%c\n",
257 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
258 }
259
260 static ssize_t host_show_commands_outstanding(struct device *dev,
261 struct device_attribute *attr, char *buf)
262 {
263 struct Scsi_Host *shost = class_to_shost(dev);
264 struct ctlr_info *h = shost_to_hba(shost);
265
266 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
267 }
268
269 static ssize_t host_show_transport_mode(struct device *dev,
270 struct device_attribute *attr, char *buf)
271 {
272 struct ctlr_info *h;
273 struct Scsi_Host *shost = class_to_shost(dev);
274
275 h = shost_to_hba(shost);
276 return snprintf(buf, 20, "%s\n",
277 h->transMethod & CFGTBL_Trans_Performant ?
278 "performant" : "simple");
279 }
280
281 /* List of controllers which cannot be hard reset on kexec with reset_devices */
282 static u32 unresettable_controller[] = {
283 0x324a103C, /* Smart Array P712m */
284 0x324b103C, /* SmartArray P711m */
285 0x3223103C, /* Smart Array P800 */
286 0x3234103C, /* Smart Array P400 */
287 0x3235103C, /* Smart Array P400i */
288 0x3211103C, /* Smart Array E200i */
289 0x3212103C, /* Smart Array E200 */
290 0x3213103C, /* Smart Array E200i */
291 0x3214103C, /* Smart Array E200i */
292 0x3215103C, /* Smart Array E200i */
293 0x3237103C, /* Smart Array E500 */
294 0x323D103C, /* Smart Array P700m */
295 0x409C0E11, /* Smart Array 6400 */
296 0x409D0E11, /* Smart Array 6400 EM */
297 };
298
299 /* List of controllers which cannot even be soft reset */
300 static u32 soft_unresettable_controller[] = {
301 /* Exclude 640x boards. These are two pci devices in one slot
302 * which share a battery backed cache module. One controls the
303 * cache, the other accesses the cache through the one that controls
304 * it. If we reset the one controlling the cache, the other will
305 * likely not be happy. Just forbid resetting this conjoined mess.
306 * The 640x isn't really supported by hpsa anyway.
307 */
308 0x409C0E11, /* Smart Array 6400 */
309 0x409D0E11, /* Smart Array 6400 EM */
310 };
311
312 static int ctlr_is_hard_resettable(u32 board_id)
313 {
314 int i;
315
316 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
317 if (unresettable_controller[i] == board_id)
318 return 0;
319 return 1;
320 }
321
322 static int ctlr_is_soft_resettable(u32 board_id)
323 {
324 int i;
325
326 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
327 if (soft_unresettable_controller[i] == board_id)
328 return 0;
329 return 1;
330 }
331
332 static int ctlr_is_resettable(u32 board_id)
333 {
334 return ctlr_is_hard_resettable(board_id) ||
335 ctlr_is_soft_resettable(board_id);
336 }
337
338 static ssize_t host_show_resettable(struct device *dev,
339 struct device_attribute *attr, char *buf)
340 {
341 struct ctlr_info *h;
342 struct Scsi_Host *shost = class_to_shost(dev);
343
344 h = shost_to_hba(shost);
345 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
346 }
347
348 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
349 {
350 return (scsi3addr[3] & 0xC0) == 0x40;
351 }
352
353 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
354 "UNKNOWN"
355 };
356 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
357
358 static ssize_t raid_level_show(struct device *dev,
359 struct device_attribute *attr, char *buf)
360 {
361 ssize_t l = 0;
362 unsigned char rlevel;
363 struct ctlr_info *h;
364 struct scsi_device *sdev;
365 struct hpsa_scsi_dev_t *hdev;
366 unsigned long flags;
367
368 sdev = to_scsi_device(dev);
369 h = sdev_to_hba(sdev);
370 spin_lock_irqsave(&h->lock, flags);
371 hdev = sdev->hostdata;
372 if (!hdev) {
373 spin_unlock_irqrestore(&h->lock, flags);
374 return -ENODEV;
375 }
376
377 /* Is this even a logical drive? */
378 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
379 spin_unlock_irqrestore(&h->lock, flags);
380 l = snprintf(buf, PAGE_SIZE, "N/A\n");
381 return l;
382 }
383
384 rlevel = hdev->raid_level;
385 spin_unlock_irqrestore(&h->lock, flags);
386 if (rlevel > RAID_UNKNOWN)
387 rlevel = RAID_UNKNOWN;
388 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
389 return l;
390 }
391
392 static ssize_t lunid_show(struct device *dev,
393 struct device_attribute *attr, char *buf)
394 {
395 struct ctlr_info *h;
396 struct scsi_device *sdev;
397 struct hpsa_scsi_dev_t *hdev;
398 unsigned long flags;
399 unsigned char lunid[8];
400
401 sdev = to_scsi_device(dev);
402 h = sdev_to_hba(sdev);
403 spin_lock_irqsave(&h->lock, flags);
404 hdev = sdev->hostdata;
405 if (!hdev) {
406 spin_unlock_irqrestore(&h->lock, flags);
407 return -ENODEV;
408 }
409 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
410 spin_unlock_irqrestore(&h->lock, flags);
411 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
412 lunid[0], lunid[1], lunid[2], lunid[3],
413 lunid[4], lunid[5], lunid[6], lunid[7]);
414 }
415
416 static ssize_t unique_id_show(struct device *dev,
417 struct device_attribute *attr, char *buf)
418 {
419 struct ctlr_info *h;
420 struct scsi_device *sdev;
421 struct hpsa_scsi_dev_t *hdev;
422 unsigned long flags;
423 unsigned char sn[16];
424
425 sdev = to_scsi_device(dev);
426 h = sdev_to_hba(sdev);
427 spin_lock_irqsave(&h->lock, flags);
428 hdev = sdev->hostdata;
429 if (!hdev) {
430 spin_unlock_irqrestore(&h->lock, flags);
431 return -ENODEV;
432 }
433 memcpy(sn, hdev->device_id, sizeof(sn));
434 spin_unlock_irqrestore(&h->lock, flags);
435 return snprintf(buf, 16 * 2 + 2,
436 "%02X%02X%02X%02X%02X%02X%02X%02X"
437 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
438 sn[0], sn[1], sn[2], sn[3],
439 sn[4], sn[5], sn[6], sn[7],
440 sn[8], sn[9], sn[10], sn[11],
441 sn[12], sn[13], sn[14], sn[15]);
442 }
443
444 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
445 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
446 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
447 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
448 static DEVICE_ATTR(firmware_revision, S_IRUGO,
449 host_show_firmware_revision, NULL);
450 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
451 host_show_commands_outstanding, NULL);
452 static DEVICE_ATTR(transport_mode, S_IRUGO,
453 host_show_transport_mode, NULL);
454 static DEVICE_ATTR(resettable, S_IRUGO,
455 host_show_resettable, NULL);
456
457 static struct device_attribute *hpsa_sdev_attrs[] = {
458 &dev_attr_raid_level,
459 &dev_attr_lunid,
460 &dev_attr_unique_id,
461 NULL,
462 };
463
464 static struct device_attribute *hpsa_shost_attrs[] = {
465 &dev_attr_rescan,
466 &dev_attr_firmware_revision,
467 &dev_attr_commands_outstanding,
468 &dev_attr_transport_mode,
469 &dev_attr_resettable,
470 NULL,
471 };
472
473 static struct scsi_host_template hpsa_driver_template = {
474 .module = THIS_MODULE,
475 .name = "hpsa",
476 .proc_name = "hpsa",
477 .queuecommand = hpsa_scsi_queue_command,
478 .scan_start = hpsa_scan_start,
479 .scan_finished = hpsa_scan_finished,
480 .change_queue_depth = hpsa_change_queue_depth,
481 .this_id = -1,
482 .use_clustering = ENABLE_CLUSTERING,
483 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
484 .ioctl = hpsa_ioctl,
485 .slave_alloc = hpsa_slave_alloc,
486 .slave_destroy = hpsa_slave_destroy,
487 #ifdef CONFIG_COMPAT
488 .compat_ioctl = hpsa_compat_ioctl,
489 #endif
490 .sdev_attrs = hpsa_sdev_attrs,
491 .shost_attrs = hpsa_shost_attrs,
492 .max_sectors = 8192,
493 };
494
495
496 /* Enqueuing and dequeuing functions for cmdlists. */
497 static inline void addQ(struct list_head *list, struct CommandList *c)
498 {
499 list_add_tail(&c->list, list);
500 }
501
502 static inline u32 next_command(struct ctlr_info *h)
503 {
504 u32 a;
505
506 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
507 return h->access.command_completed(h);
508
509 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
510 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
511 (h->reply_pool_head)++;
512 h->commands_outstanding--;
513 } else {
514 a = FIFO_EMPTY;
515 }
516 /* Check for wraparound */
517 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
518 h->reply_pool_head = h->reply_pool;
519 h->reply_pool_wraparound ^= 1;
520 }
521 return a;
522 }
523
524 /* set_performant_mode: Modify the tag for cciss performant
525 * set bit 0 for pull model, bits 3-1 for block fetch
526 * register number
527 */
528 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
529 {
530 if (likely(h->transMethod & CFGTBL_Trans_Performant))
531 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
532 }
533
534 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
535 struct CommandList *c)
536 {
537 unsigned long flags;
538
539 set_performant_mode(h, c);
540 spin_lock_irqsave(&h->lock, flags);
541 addQ(&h->reqQ, c);
542 h->Qdepth++;
543 start_io(h);
544 spin_unlock_irqrestore(&h->lock, flags);
545 }
546
547 static inline void removeQ(struct CommandList *c)
548 {
549 if (WARN_ON(list_empty(&c->list)))
550 return;
551 list_del_init(&c->list);
552 }
553
554 static inline int is_hba_lunid(unsigned char scsi3addr[])
555 {
556 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
557 }
558
559 static inline int is_scsi_rev_5(struct ctlr_info *h)
560 {
561 if (!h->hba_inquiry_data)
562 return 0;
563 if ((h->hba_inquiry_data[2] & 0x07) == 5)
564 return 1;
565 return 0;
566 }
567
568 static int hpsa_find_target_lun(struct ctlr_info *h,
569 unsigned char scsi3addr[], int bus, int *target, int *lun)
570 {
571 /* finds an unused bus, target, lun for a new physical device
572 * assumes h->devlock is held
573 */
574 int i, found = 0;
575 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
576
577 memset(&lun_taken[0], 0, HPSA_MAX_DEVICES >> 3);
578
579 for (i = 0; i < h->ndevices; i++) {
580 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
581 set_bit(h->dev[i]->target, lun_taken);
582 }
583
584 for (i = 0; i < HPSA_MAX_DEVICES; i++) {
585 if (!test_bit(i, lun_taken)) {
586 /* *bus = 1; */
587 *target = i;
588 *lun = 0;
589 found = 1;
590 break;
591 }
592 }
593 return !found;
594 }
595
596 /* Add an entry into h->dev[] array. */
597 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
598 struct hpsa_scsi_dev_t *device,
599 struct hpsa_scsi_dev_t *added[], int *nadded)
600 {
601 /* assumes h->devlock is held */
602 int n = h->ndevices;
603 int i;
604 unsigned char addr1[8], addr2[8];
605 struct hpsa_scsi_dev_t *sd;
606
607 if (n >= HPSA_MAX_DEVICES) {
608 dev_err(&h->pdev->dev, "too many devices, some will be "
609 "inaccessible.\n");
610 return -1;
611 }
612
613 /* physical devices do not have lun or target assigned until now. */
614 if (device->lun != -1)
615 /* Logical device, lun is already assigned. */
616 goto lun_assigned;
617
618 /* If this device a non-zero lun of a multi-lun device
619 * byte 4 of the 8-byte LUN addr will contain the logical
620 * unit no, zero otherise.
621 */
622 if (device->scsi3addr[4] == 0) {
623 /* This is not a non-zero lun of a multi-lun device */
624 if (hpsa_find_target_lun(h, device->scsi3addr,
625 device->bus, &device->target, &device->lun) != 0)
626 return -1;
627 goto lun_assigned;
628 }
629
630 /* This is a non-zero lun of a multi-lun device.
631 * Search through our list and find the device which
632 * has the same 8 byte LUN address, excepting byte 4.
633 * Assign the same bus and target for this new LUN.
634 * Use the logical unit number from the firmware.
635 */
636 memcpy(addr1, device->scsi3addr, 8);
637 addr1[4] = 0;
638 for (i = 0; i < n; i++) {
639 sd = h->dev[i];
640 memcpy(addr2, sd->scsi3addr, 8);
641 addr2[4] = 0;
642 /* differ only in byte 4? */
643 if (memcmp(addr1, addr2, 8) == 0) {
644 device->bus = sd->bus;
645 device->target = sd->target;
646 device->lun = device->scsi3addr[4];
647 break;
648 }
649 }
650 if (device->lun == -1) {
651 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
652 " suspect firmware bug or unsupported hardware "
653 "configuration.\n");
654 return -1;
655 }
656
657 lun_assigned:
658
659 h->dev[n] = device;
660 h->ndevices++;
661 added[*nadded] = device;
662 (*nadded)++;
663
664 /* initially, (before registering with scsi layer) we don't
665 * know our hostno and we don't want to print anything first
666 * time anyway (the scsi layer's inquiries will show that info)
667 */
668 /* if (hostno != -1) */
669 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
670 scsi_device_type(device->devtype), hostno,
671 device->bus, device->target, device->lun);
672 return 0;
673 }
674
675 /* Replace an entry from h->dev[] array. */
676 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
677 int entry, struct hpsa_scsi_dev_t *new_entry,
678 struct hpsa_scsi_dev_t *added[], int *nadded,
679 struct hpsa_scsi_dev_t *removed[], int *nremoved)
680 {
681 /* assumes h->devlock is held */
682 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
683 removed[*nremoved] = h->dev[entry];
684 (*nremoved)++;
685
686 /*
687 * New physical devices won't have target/lun assigned yet
688 * so we need to preserve the values in the slot we are replacing.
689 */
690 if (new_entry->target == -1) {
691 new_entry->target = h->dev[entry]->target;
692 new_entry->lun = h->dev[entry]->lun;
693 }
694
695 h->dev[entry] = new_entry;
696 added[*nadded] = new_entry;
697 (*nadded)++;
698 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
699 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
700 new_entry->target, new_entry->lun);
701 }
702
703 /* Remove an entry from h->dev[] array. */
704 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
705 struct hpsa_scsi_dev_t *removed[], int *nremoved)
706 {
707 /* assumes h->devlock is held */
708 int i;
709 struct hpsa_scsi_dev_t *sd;
710
711 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
712
713 sd = h->dev[entry];
714 removed[*nremoved] = h->dev[entry];
715 (*nremoved)++;
716
717 for (i = entry; i < h->ndevices-1; i++)
718 h->dev[i] = h->dev[i+1];
719 h->ndevices--;
720 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
721 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
722 sd->lun);
723 }
724
725 #define SCSI3ADDR_EQ(a, b) ( \
726 (a)[7] == (b)[7] && \
727 (a)[6] == (b)[6] && \
728 (a)[5] == (b)[5] && \
729 (a)[4] == (b)[4] && \
730 (a)[3] == (b)[3] && \
731 (a)[2] == (b)[2] && \
732 (a)[1] == (b)[1] && \
733 (a)[0] == (b)[0])
734
735 static void fixup_botched_add(struct ctlr_info *h,
736 struct hpsa_scsi_dev_t *added)
737 {
738 /* called when scsi_add_device fails in order to re-adjust
739 * h->dev[] to match the mid layer's view.
740 */
741 unsigned long flags;
742 int i, j;
743
744 spin_lock_irqsave(&h->lock, flags);
745 for (i = 0; i < h->ndevices; i++) {
746 if (h->dev[i] == added) {
747 for (j = i; j < h->ndevices-1; j++)
748 h->dev[j] = h->dev[j+1];
749 h->ndevices--;
750 break;
751 }
752 }
753 spin_unlock_irqrestore(&h->lock, flags);
754 kfree(added);
755 }
756
757 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
758 struct hpsa_scsi_dev_t *dev2)
759 {
760 /* we compare everything except lun and target as these
761 * are not yet assigned. Compare parts likely
762 * to differ first
763 */
764 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
765 sizeof(dev1->scsi3addr)) != 0)
766 return 0;
767 if (memcmp(dev1->device_id, dev2->device_id,
768 sizeof(dev1->device_id)) != 0)
769 return 0;
770 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
771 return 0;
772 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
773 return 0;
774 if (dev1->devtype != dev2->devtype)
775 return 0;
776 if (dev1->bus != dev2->bus)
777 return 0;
778 return 1;
779 }
780
781 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
782 * and return needle location in *index. If scsi3addr matches, but not
783 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
784 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
785 */
786 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
787 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
788 int *index)
789 {
790 int i;
791 #define DEVICE_NOT_FOUND 0
792 #define DEVICE_CHANGED 1
793 #define DEVICE_SAME 2
794 for (i = 0; i < haystack_size; i++) {
795 if (haystack[i] == NULL) /* previously removed. */
796 continue;
797 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
798 *index = i;
799 if (device_is_the_same(needle, haystack[i]))
800 return DEVICE_SAME;
801 else
802 return DEVICE_CHANGED;
803 }
804 }
805 *index = -1;
806 return DEVICE_NOT_FOUND;
807 }
808
809 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
810 struct hpsa_scsi_dev_t *sd[], int nsds)
811 {
812 /* sd contains scsi3 addresses and devtypes, and inquiry
813 * data. This function takes what's in sd to be the current
814 * reality and updates h->dev[] to reflect that reality.
815 */
816 int i, entry, device_change, changes = 0;
817 struct hpsa_scsi_dev_t *csd;
818 unsigned long flags;
819 struct hpsa_scsi_dev_t **added, **removed;
820 int nadded, nremoved;
821 struct Scsi_Host *sh = NULL;
822
823 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
824 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
825
826 if (!added || !removed) {
827 dev_warn(&h->pdev->dev, "out of memory in "
828 "adjust_hpsa_scsi_table\n");
829 goto free_and_out;
830 }
831
832 spin_lock_irqsave(&h->devlock, flags);
833
834 /* find any devices in h->dev[] that are not in
835 * sd[] and remove them from h->dev[], and for any
836 * devices which have changed, remove the old device
837 * info and add the new device info.
838 */
839 i = 0;
840 nremoved = 0;
841 nadded = 0;
842 while (i < h->ndevices) {
843 csd = h->dev[i];
844 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
845 if (device_change == DEVICE_NOT_FOUND) {
846 changes++;
847 hpsa_scsi_remove_entry(h, hostno, i,
848 removed, &nremoved);
849 continue; /* remove ^^^, hence i not incremented */
850 } else if (device_change == DEVICE_CHANGED) {
851 changes++;
852 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
853 added, &nadded, removed, &nremoved);
854 /* Set it to NULL to prevent it from being freed
855 * at the bottom of hpsa_update_scsi_devices()
856 */
857 sd[entry] = NULL;
858 }
859 i++;
860 }
861
862 /* Now, make sure every device listed in sd[] is also
863 * listed in h->dev[], adding them if they aren't found
864 */
865
866 for (i = 0; i < nsds; i++) {
867 if (!sd[i]) /* if already added above. */
868 continue;
869 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
870 h->ndevices, &entry);
871 if (device_change == DEVICE_NOT_FOUND) {
872 changes++;
873 if (hpsa_scsi_add_entry(h, hostno, sd[i],
874 added, &nadded) != 0)
875 break;
876 sd[i] = NULL; /* prevent from being freed later. */
877 } else if (device_change == DEVICE_CHANGED) {
878 /* should never happen... */
879 changes++;
880 dev_warn(&h->pdev->dev,
881 "device unexpectedly changed.\n");
882 /* but if it does happen, we just ignore that device */
883 }
884 }
885 spin_unlock_irqrestore(&h->devlock, flags);
886
887 /* Don't notify scsi mid layer of any changes the first time through
888 * (or if there are no changes) scsi_scan_host will do it later the
889 * first time through.
890 */
891 if (hostno == -1 || !changes)
892 goto free_and_out;
893
894 sh = h->scsi_host;
895 /* Notify scsi mid layer of any removed devices */
896 for (i = 0; i < nremoved; i++) {
897 struct scsi_device *sdev =
898 scsi_device_lookup(sh, removed[i]->bus,
899 removed[i]->target, removed[i]->lun);
900 if (sdev != NULL) {
901 scsi_remove_device(sdev);
902 scsi_device_put(sdev);
903 } else {
904 /* We don't expect to get here.
905 * future cmds to this device will get selection
906 * timeout as if the device was gone.
907 */
908 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
909 " for removal.", hostno, removed[i]->bus,
910 removed[i]->target, removed[i]->lun);
911 }
912 kfree(removed[i]);
913 removed[i] = NULL;
914 }
915
916 /* Notify scsi mid layer of any added devices */
917 for (i = 0; i < nadded; i++) {
918 if (scsi_add_device(sh, added[i]->bus,
919 added[i]->target, added[i]->lun) == 0)
920 continue;
921 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
922 "device not added.\n", hostno, added[i]->bus,
923 added[i]->target, added[i]->lun);
924 /* now we have to remove it from h->dev,
925 * since it didn't get added to scsi mid layer
926 */
927 fixup_botched_add(h, added[i]);
928 }
929
930 free_and_out:
931 kfree(added);
932 kfree(removed);
933 }
934
935 /*
936 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
937 * Assume's h->devlock is held.
938 */
939 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
940 int bus, int target, int lun)
941 {
942 int i;
943 struct hpsa_scsi_dev_t *sd;
944
945 for (i = 0; i < h->ndevices; i++) {
946 sd = h->dev[i];
947 if (sd->bus == bus && sd->target == target && sd->lun == lun)
948 return sd;
949 }
950 return NULL;
951 }
952
953 /* link sdev->hostdata to our per-device structure. */
954 static int hpsa_slave_alloc(struct scsi_device *sdev)
955 {
956 struct hpsa_scsi_dev_t *sd;
957 unsigned long flags;
958 struct ctlr_info *h;
959
960 h = sdev_to_hba(sdev);
961 spin_lock_irqsave(&h->devlock, flags);
962 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
963 sdev_id(sdev), sdev->lun);
964 if (sd != NULL)
965 sdev->hostdata = sd;
966 spin_unlock_irqrestore(&h->devlock, flags);
967 return 0;
968 }
969
970 static void hpsa_slave_destroy(struct scsi_device *sdev)
971 {
972 /* nothing to do. */
973 }
974
975 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
976 {
977 int i;
978
979 if (!h->cmd_sg_list)
980 return;
981 for (i = 0; i < h->nr_cmds; i++) {
982 kfree(h->cmd_sg_list[i]);
983 h->cmd_sg_list[i] = NULL;
984 }
985 kfree(h->cmd_sg_list);
986 h->cmd_sg_list = NULL;
987 }
988
989 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
990 {
991 int i;
992
993 if (h->chainsize <= 0)
994 return 0;
995
996 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
997 GFP_KERNEL);
998 if (!h->cmd_sg_list)
999 return -ENOMEM;
1000 for (i = 0; i < h->nr_cmds; i++) {
1001 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1002 h->chainsize, GFP_KERNEL);
1003 if (!h->cmd_sg_list[i])
1004 goto clean;
1005 }
1006 return 0;
1007
1008 clean:
1009 hpsa_free_sg_chain_blocks(h);
1010 return -ENOMEM;
1011 }
1012
1013 static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1014 struct CommandList *c)
1015 {
1016 struct SGDescriptor *chain_sg, *chain_block;
1017 u64 temp64;
1018
1019 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1020 chain_block = h->cmd_sg_list[c->cmdindex];
1021 chain_sg->Ext = HPSA_SG_CHAIN;
1022 chain_sg->Len = sizeof(*chain_sg) *
1023 (c->Header.SGTotal - h->max_cmd_sg_entries);
1024 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1025 PCI_DMA_TODEVICE);
1026 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1027 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1028 }
1029
1030 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1031 struct CommandList *c)
1032 {
1033 struct SGDescriptor *chain_sg;
1034 union u64bit temp64;
1035
1036 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1037 return;
1038
1039 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1040 temp64.val32.lower = chain_sg->Addr.lower;
1041 temp64.val32.upper = chain_sg->Addr.upper;
1042 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1043 }
1044
1045 static void complete_scsi_command(struct CommandList *cp)
1046 {
1047 struct scsi_cmnd *cmd;
1048 struct ctlr_info *h;
1049 struct ErrorInfo *ei;
1050
1051 unsigned char sense_key;
1052 unsigned char asc; /* additional sense code */
1053 unsigned char ascq; /* additional sense code qualifier */
1054 unsigned long sense_data_size;
1055
1056 ei = cp->err_info;
1057 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1058 h = cp->h;
1059
1060 scsi_dma_unmap(cmd); /* undo the DMA mappings */
1061 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1062 hpsa_unmap_sg_chain_block(h, cp);
1063
1064 cmd->result = (DID_OK << 16); /* host byte */
1065 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1066 cmd->result |= ei->ScsiStatus;
1067
1068 /* copy the sense data whether we need to or not. */
1069 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1070 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1071 else
1072 sense_data_size = sizeof(ei->SenseInfo);
1073 if (ei->SenseLen < sense_data_size)
1074 sense_data_size = ei->SenseLen;
1075
1076 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1077 scsi_set_resid(cmd, ei->ResidualCnt);
1078
1079 if (ei->CommandStatus == 0) {
1080 cmd->scsi_done(cmd);
1081 cmd_free(h, cp);
1082 return;
1083 }
1084
1085 /* an error has occurred */
1086 switch (ei->CommandStatus) {
1087
1088 case CMD_TARGET_STATUS:
1089 if (ei->ScsiStatus) {
1090 /* Get sense key */
1091 sense_key = 0xf & ei->SenseInfo[2];
1092 /* Get additional sense code */
1093 asc = ei->SenseInfo[12];
1094 /* Get addition sense code qualifier */
1095 ascq = ei->SenseInfo[13];
1096 }
1097
1098 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1099 if (check_for_unit_attention(h, cp)) {
1100 cmd->result = DID_SOFT_ERROR << 16;
1101 break;
1102 }
1103 if (sense_key == ILLEGAL_REQUEST) {
1104 /*
1105 * SCSI REPORT_LUNS is commonly unsupported on
1106 * Smart Array. Suppress noisy complaint.
1107 */
1108 if (cp->Request.CDB[0] == REPORT_LUNS)
1109 break;
1110
1111 /* If ASC/ASCQ indicate Logical Unit
1112 * Not Supported condition,
1113 */
1114 if ((asc == 0x25) && (ascq == 0x0)) {
1115 dev_warn(&h->pdev->dev, "cp %p "
1116 "has check condition\n", cp);
1117 break;
1118 }
1119 }
1120
1121 if (sense_key == NOT_READY) {
1122 /* If Sense is Not Ready, Logical Unit
1123 * Not ready, Manual Intervention
1124 * required
1125 */
1126 if ((asc == 0x04) && (ascq == 0x03)) {
1127 dev_warn(&h->pdev->dev, "cp %p "
1128 "has check condition: unit "
1129 "not ready, manual "
1130 "intervention required\n", cp);
1131 break;
1132 }
1133 }
1134 if (sense_key == ABORTED_COMMAND) {
1135 /* Aborted command is retryable */
1136 dev_warn(&h->pdev->dev, "cp %p "
1137 "has check condition: aborted command: "
1138 "ASC: 0x%x, ASCQ: 0x%x\n",
1139 cp, asc, ascq);
1140 cmd->result = DID_SOFT_ERROR << 16;
1141 break;
1142 }
1143 /* Must be some other type of check condition */
1144 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1145 "unknown type: "
1146 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1147 "Returning result: 0x%x, "
1148 "cmd=[%02x %02x %02x %02x %02x "
1149 "%02x %02x %02x %02x %02x %02x "
1150 "%02x %02x %02x %02x %02x]\n",
1151 cp, sense_key, asc, ascq,
1152 cmd->result,
1153 cmd->cmnd[0], cmd->cmnd[1],
1154 cmd->cmnd[2], cmd->cmnd[3],
1155 cmd->cmnd[4], cmd->cmnd[5],
1156 cmd->cmnd[6], cmd->cmnd[7],
1157 cmd->cmnd[8], cmd->cmnd[9],
1158 cmd->cmnd[10], cmd->cmnd[11],
1159 cmd->cmnd[12], cmd->cmnd[13],
1160 cmd->cmnd[14], cmd->cmnd[15]);
1161 break;
1162 }
1163
1164
1165 /* Problem was not a check condition
1166 * Pass it up to the upper layers...
1167 */
1168 if (ei->ScsiStatus) {
1169 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1170 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1171 "Returning result: 0x%x\n",
1172 cp, ei->ScsiStatus,
1173 sense_key, asc, ascq,
1174 cmd->result);
1175 } else { /* scsi status is zero??? How??? */
1176 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1177 "Returning no connection.\n", cp),
1178
1179 /* Ordinarily, this case should never happen,
1180 * but there is a bug in some released firmware
1181 * revisions that allows it to happen if, for
1182 * example, a 4100 backplane loses power and
1183 * the tape drive is in it. We assume that
1184 * it's a fatal error of some kind because we
1185 * can't show that it wasn't. We will make it
1186 * look like selection timeout since that is
1187 * the most common reason for this to occur,
1188 * and it's severe enough.
1189 */
1190
1191 cmd->result = DID_NO_CONNECT << 16;
1192 }
1193 break;
1194
1195 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1196 break;
1197 case CMD_DATA_OVERRUN:
1198 dev_warn(&h->pdev->dev, "cp %p has"
1199 " completed with data overrun "
1200 "reported\n", cp);
1201 break;
1202 case CMD_INVALID: {
1203 /* print_bytes(cp, sizeof(*cp), 1, 0);
1204 print_cmd(cp); */
1205 /* We get CMD_INVALID if you address a non-existent device
1206 * instead of a selection timeout (no response). You will
1207 * see this if you yank out a drive, then try to access it.
1208 * This is kind of a shame because it means that any other
1209 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1210 * missing target. */
1211 cmd->result = DID_NO_CONNECT << 16;
1212 }
1213 break;
1214 case CMD_PROTOCOL_ERR:
1215 dev_warn(&h->pdev->dev, "cp %p has "
1216 "protocol error \n", cp);
1217 break;
1218 case CMD_HARDWARE_ERR:
1219 cmd->result = DID_ERROR << 16;
1220 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1221 break;
1222 case CMD_CONNECTION_LOST:
1223 cmd->result = DID_ERROR << 16;
1224 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1225 break;
1226 case CMD_ABORTED:
1227 cmd->result = DID_ABORT << 16;
1228 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1229 cp, ei->ScsiStatus);
1230 break;
1231 case CMD_ABORT_FAILED:
1232 cmd->result = DID_ERROR << 16;
1233 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1234 break;
1235 case CMD_UNSOLICITED_ABORT:
1236 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1237 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1238 "abort\n", cp);
1239 break;
1240 case CMD_TIMEOUT:
1241 cmd->result = DID_TIME_OUT << 16;
1242 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1243 break;
1244 case CMD_UNABORTABLE:
1245 cmd->result = DID_ERROR << 16;
1246 dev_warn(&h->pdev->dev, "Command unabortable\n");
1247 break;
1248 default:
1249 cmd->result = DID_ERROR << 16;
1250 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1251 cp, ei->CommandStatus);
1252 }
1253 cmd->scsi_done(cmd);
1254 cmd_free(h, cp);
1255 }
1256
1257 static int hpsa_scsi_detect(struct ctlr_info *h)
1258 {
1259 struct Scsi_Host *sh;
1260 int error;
1261
1262 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1263 if (sh == NULL)
1264 goto fail;
1265
1266 sh->io_port = 0;
1267 sh->n_io_port = 0;
1268 sh->this_id = -1;
1269 sh->max_channel = 3;
1270 sh->max_cmd_len = MAX_COMMAND_SIZE;
1271 sh->max_lun = HPSA_MAX_LUN;
1272 sh->max_id = HPSA_MAX_LUN;
1273 sh->can_queue = h->nr_cmds;
1274 sh->cmd_per_lun = h->nr_cmds;
1275 sh->sg_tablesize = h->maxsgentries;
1276 h->scsi_host = sh;
1277 sh->hostdata[0] = (unsigned long) h;
1278 sh->irq = h->intr[h->intr_mode];
1279 sh->unique_id = sh->irq;
1280 error = scsi_add_host(sh, &h->pdev->dev);
1281 if (error)
1282 goto fail_host_put;
1283 scsi_scan_host(sh);
1284 return 0;
1285
1286 fail_host_put:
1287 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1288 " failed for controller %d\n", h->ctlr);
1289 scsi_host_put(sh);
1290 return error;
1291 fail:
1292 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1293 " failed for controller %d\n", h->ctlr);
1294 return -ENOMEM;
1295 }
1296
1297 static void hpsa_pci_unmap(struct pci_dev *pdev,
1298 struct CommandList *c, int sg_used, int data_direction)
1299 {
1300 int i;
1301 union u64bit addr64;
1302
1303 for (i = 0; i < sg_used; i++) {
1304 addr64.val32.lower = c->SG[i].Addr.lower;
1305 addr64.val32.upper = c->SG[i].Addr.upper;
1306 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1307 data_direction);
1308 }
1309 }
1310
1311 static void hpsa_map_one(struct pci_dev *pdev,
1312 struct CommandList *cp,
1313 unsigned char *buf,
1314 size_t buflen,
1315 int data_direction)
1316 {
1317 u64 addr64;
1318
1319 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1320 cp->Header.SGList = 0;
1321 cp->Header.SGTotal = 0;
1322 return;
1323 }
1324
1325 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1326 cp->SG[0].Addr.lower =
1327 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1328 cp->SG[0].Addr.upper =
1329 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1330 cp->SG[0].Len = buflen;
1331 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1332 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1333 }
1334
1335 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1336 struct CommandList *c)
1337 {
1338 DECLARE_COMPLETION_ONSTACK(wait);
1339
1340 c->waiting = &wait;
1341 enqueue_cmd_and_start_io(h, c);
1342 wait_for_completion(&wait);
1343 }
1344
1345 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1346 struct CommandList *c)
1347 {
1348 unsigned long flags;
1349
1350 /* If controller lockup detected, fake a hardware error. */
1351 spin_lock_irqsave(&h->lock, flags);
1352 if (unlikely(h->lockup_detected)) {
1353 spin_unlock_irqrestore(&h->lock, flags);
1354 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1355 } else {
1356 spin_unlock_irqrestore(&h->lock, flags);
1357 hpsa_scsi_do_simple_cmd_core(h, c);
1358 }
1359 }
1360
1361 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1362 struct CommandList *c, int data_direction)
1363 {
1364 int retry_count = 0;
1365
1366 do {
1367 memset(c->err_info, 0, sizeof(*c->err_info));
1368 hpsa_scsi_do_simple_cmd_core(h, c);
1369 retry_count++;
1370 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1371 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1372 }
1373
1374 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1375 {
1376 struct ErrorInfo *ei;
1377 struct device *d = &cp->h->pdev->dev;
1378
1379 ei = cp->err_info;
1380 switch (ei->CommandStatus) {
1381 case CMD_TARGET_STATUS:
1382 dev_warn(d, "cmd %p has completed with errors\n", cp);
1383 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1384 ei->ScsiStatus);
1385 if (ei->ScsiStatus == 0)
1386 dev_warn(d, "SCSI status is abnormally zero. "
1387 "(probably indicates selection timeout "
1388 "reported incorrectly due to a known "
1389 "firmware bug, circa July, 2001.)\n");
1390 break;
1391 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1392 dev_info(d, "UNDERRUN\n");
1393 break;
1394 case CMD_DATA_OVERRUN:
1395 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1396 break;
1397 case CMD_INVALID: {
1398 /* controller unfortunately reports SCSI passthru's
1399 * to non-existent targets as invalid commands.
1400 */
1401 dev_warn(d, "cp %p is reported invalid (probably means "
1402 "target device no longer present)\n", cp);
1403 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1404 print_cmd(cp); */
1405 }
1406 break;
1407 case CMD_PROTOCOL_ERR:
1408 dev_warn(d, "cp %p has protocol error \n", cp);
1409 break;
1410 case CMD_HARDWARE_ERR:
1411 /* cmd->result = DID_ERROR << 16; */
1412 dev_warn(d, "cp %p had hardware error\n", cp);
1413 break;
1414 case CMD_CONNECTION_LOST:
1415 dev_warn(d, "cp %p had connection lost\n", cp);
1416 break;
1417 case CMD_ABORTED:
1418 dev_warn(d, "cp %p was aborted\n", cp);
1419 break;
1420 case CMD_ABORT_FAILED:
1421 dev_warn(d, "cp %p reports abort failed\n", cp);
1422 break;
1423 case CMD_UNSOLICITED_ABORT:
1424 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1425 break;
1426 case CMD_TIMEOUT:
1427 dev_warn(d, "cp %p timed out\n", cp);
1428 break;
1429 case CMD_UNABORTABLE:
1430 dev_warn(d, "Command unabortable\n");
1431 break;
1432 default:
1433 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1434 ei->CommandStatus);
1435 }
1436 }
1437
1438 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1439 unsigned char page, unsigned char *buf,
1440 unsigned char bufsize)
1441 {
1442 int rc = IO_OK;
1443 struct CommandList *c;
1444 struct ErrorInfo *ei;
1445
1446 c = cmd_special_alloc(h);
1447
1448 if (c == NULL) { /* trouble... */
1449 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1450 return -ENOMEM;
1451 }
1452
1453 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1454 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1455 ei = c->err_info;
1456 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1457 hpsa_scsi_interpret_error(c);
1458 rc = -1;
1459 }
1460 cmd_special_free(h, c);
1461 return rc;
1462 }
1463
1464 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1465 {
1466 int rc = IO_OK;
1467 struct CommandList *c;
1468 struct ErrorInfo *ei;
1469
1470 c = cmd_special_alloc(h);
1471
1472 if (c == NULL) { /* trouble... */
1473 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1474 return -ENOMEM;
1475 }
1476
1477 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1478 hpsa_scsi_do_simple_cmd_core(h, c);
1479 /* no unmap needed here because no data xfer. */
1480
1481 ei = c->err_info;
1482 if (ei->CommandStatus != 0) {
1483 hpsa_scsi_interpret_error(c);
1484 rc = -1;
1485 }
1486 cmd_special_free(h, c);
1487 return rc;
1488 }
1489
1490 static void hpsa_get_raid_level(struct ctlr_info *h,
1491 unsigned char *scsi3addr, unsigned char *raid_level)
1492 {
1493 int rc;
1494 unsigned char *buf;
1495
1496 *raid_level = RAID_UNKNOWN;
1497 buf = kzalloc(64, GFP_KERNEL);
1498 if (!buf)
1499 return;
1500 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1501 if (rc == 0)
1502 *raid_level = buf[8];
1503 if (*raid_level > RAID_UNKNOWN)
1504 *raid_level = RAID_UNKNOWN;
1505 kfree(buf);
1506 return;
1507 }
1508
1509 /* Get the device id from inquiry page 0x83 */
1510 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1511 unsigned char *device_id, int buflen)
1512 {
1513 int rc;
1514 unsigned char *buf;
1515
1516 if (buflen > 16)
1517 buflen = 16;
1518 buf = kzalloc(64, GFP_KERNEL);
1519 if (!buf)
1520 return -1;
1521 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1522 if (rc == 0)
1523 memcpy(device_id, &buf[8], buflen);
1524 kfree(buf);
1525 return rc != 0;
1526 }
1527
1528 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1529 struct ReportLUNdata *buf, int bufsize,
1530 int extended_response)
1531 {
1532 int rc = IO_OK;
1533 struct CommandList *c;
1534 unsigned char scsi3addr[8];
1535 struct ErrorInfo *ei;
1536
1537 c = cmd_special_alloc(h);
1538 if (c == NULL) { /* trouble... */
1539 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1540 return -1;
1541 }
1542 /* address the controller */
1543 memset(scsi3addr, 0, sizeof(scsi3addr));
1544 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1545 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1546 if (extended_response)
1547 c->Request.CDB[1] = extended_response;
1548 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1549 ei = c->err_info;
1550 if (ei->CommandStatus != 0 &&
1551 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1552 hpsa_scsi_interpret_error(c);
1553 rc = -1;
1554 }
1555 cmd_special_free(h, c);
1556 return rc;
1557 }
1558
1559 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1560 struct ReportLUNdata *buf,
1561 int bufsize, int extended_response)
1562 {
1563 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1564 }
1565
1566 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1567 struct ReportLUNdata *buf, int bufsize)
1568 {
1569 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1570 }
1571
1572 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1573 int bus, int target, int lun)
1574 {
1575 device->bus = bus;
1576 device->target = target;
1577 device->lun = lun;
1578 }
1579
1580 static int hpsa_update_device_info(struct ctlr_info *h,
1581 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1582 unsigned char *is_OBDR_device)
1583 {
1584
1585 #define OBDR_SIG_OFFSET 43
1586 #define OBDR_TAPE_SIG "$DR-10"
1587 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1588 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1589
1590 unsigned char *inq_buff;
1591 unsigned char *obdr_sig;
1592
1593 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1594 if (!inq_buff)
1595 goto bail_out;
1596
1597 /* Do an inquiry to the device to see what it is. */
1598 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1599 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1600 /* Inquiry failed (msg printed already) */
1601 dev_err(&h->pdev->dev,
1602 "hpsa_update_device_info: inquiry failed\n");
1603 goto bail_out;
1604 }
1605
1606 this_device->devtype = (inq_buff[0] & 0x1f);
1607 memcpy(this_device->scsi3addr, scsi3addr, 8);
1608 memcpy(this_device->vendor, &inq_buff[8],
1609 sizeof(this_device->vendor));
1610 memcpy(this_device->model, &inq_buff[16],
1611 sizeof(this_device->model));
1612 memset(this_device->device_id, 0,
1613 sizeof(this_device->device_id));
1614 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1615 sizeof(this_device->device_id));
1616
1617 if (this_device->devtype == TYPE_DISK &&
1618 is_logical_dev_addr_mode(scsi3addr))
1619 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1620 else
1621 this_device->raid_level = RAID_UNKNOWN;
1622
1623 if (is_OBDR_device) {
1624 /* See if this is a One-Button-Disaster-Recovery device
1625 * by looking for "$DR-10" at offset 43 in inquiry data.
1626 */
1627 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1628 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1629 strncmp(obdr_sig, OBDR_TAPE_SIG,
1630 OBDR_SIG_LEN) == 0);
1631 }
1632
1633 kfree(inq_buff);
1634 return 0;
1635
1636 bail_out:
1637 kfree(inq_buff);
1638 return 1;
1639 }
1640
1641 static unsigned char *msa2xxx_model[] = {
1642 "MSA2012",
1643 "MSA2024",
1644 "MSA2312",
1645 "MSA2324",
1646 "P2000 G3 SAS",
1647 NULL,
1648 };
1649
1650 static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1651 {
1652 int i;
1653
1654 for (i = 0; msa2xxx_model[i]; i++)
1655 if (strncmp(device->model, msa2xxx_model[i],
1656 strlen(msa2xxx_model[i])) == 0)
1657 return 1;
1658 return 0;
1659 }
1660
1661 /* Helper function to assign bus, target, lun mapping of devices.
1662 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1663 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1664 * Logical drive target and lun are assigned at this time, but
1665 * physical device lun and target assignment are deferred (assigned
1666 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1667 */
1668 static void figure_bus_target_lun(struct ctlr_info *h,
1669 u8 *lunaddrbytes, int *bus, int *target, int *lun,
1670 struct hpsa_scsi_dev_t *device)
1671 {
1672 u32 lunid;
1673
1674 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1675 /* logical device */
1676 if (unlikely(is_scsi_rev_5(h))) {
1677 /* p1210m, logical drives lun assignments
1678 * match SCSI REPORT LUNS data.
1679 */
1680 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1681 *bus = 0;
1682 *target = 0;
1683 *lun = (lunid & 0x3fff) + 1;
1684 } else {
1685 /* not p1210m... */
1686 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1687 if (is_msa2xxx(h, device)) {
1688 /* msa2xxx way, put logicals on bus 1
1689 * and match target/lun numbers box
1690 * reports.
1691 */
1692 *bus = 1;
1693 *target = (lunid >> 16) & 0x3fff;
1694 *lun = lunid & 0x00ff;
1695 } else {
1696 /* Traditional smart array way. */
1697 *bus = 0;
1698 *lun = 0;
1699 *target = lunid & 0x3fff;
1700 }
1701 }
1702 } else {
1703 /* physical device */
1704 if (is_hba_lunid(lunaddrbytes))
1705 if (unlikely(is_scsi_rev_5(h))) {
1706 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1707 *target = 0;
1708 *lun = 0;
1709 return;
1710 } else
1711 *bus = 3; /* traditional smartarray */
1712 else
1713 *bus = 2; /* physical disk */
1714 *target = -1;
1715 *lun = -1; /* we will fill these in later. */
1716 }
1717 }
1718
1719 /*
1720 * If there is no lun 0 on a target, linux won't find any devices.
1721 * For the MSA2xxx boxes, we have to manually detect the enclosure
1722 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1723 * it for some reason. *tmpdevice is the target we're adding,
1724 * this_device is a pointer into the current element of currentsd[]
1725 * that we're building up in update_scsi_devices(), below.
1726 * lunzerobits is a bitmap that tracks which targets already have a
1727 * lun 0 assigned.
1728 * Returns 1 if an enclosure was added, 0 if not.
1729 */
1730 static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1731 struct hpsa_scsi_dev_t *tmpdevice,
1732 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1733 int bus, int target, int lun, unsigned long lunzerobits[],
1734 int *nmsa2xxx_enclosures)
1735 {
1736 unsigned char scsi3addr[8];
1737
1738 if (test_bit(target, lunzerobits))
1739 return 0; /* There is already a lun 0 on this target. */
1740
1741 if (!is_logical_dev_addr_mode(lunaddrbytes))
1742 return 0; /* It's the logical targets that may lack lun 0. */
1743
1744 if (!is_msa2xxx(h, tmpdevice))
1745 return 0; /* It's only the MSA2xxx that have this problem. */
1746
1747 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1748 return 0;
1749
1750 memset(scsi3addr, 0, 8);
1751 scsi3addr[3] = target;
1752 if (is_hba_lunid(scsi3addr))
1753 return 0; /* Don't add the RAID controller here. */
1754
1755 if (is_scsi_rev_5(h))
1756 return 0; /* p1210m doesn't need to do this. */
1757
1758 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1759 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1760 "enclosures exceeded. Check your hardware "
1761 "configuration.");
1762 return 0;
1763 }
1764
1765 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1766 return 0;
1767 (*nmsa2xxx_enclosures)++;
1768 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1769 set_bit(target, lunzerobits);
1770 return 1;
1771 }
1772
1773 /*
1774 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1775 * logdev. The number of luns in physdev and logdev are returned in
1776 * *nphysicals and *nlogicals, respectively.
1777 * Returns 0 on success, -1 otherwise.
1778 */
1779 static int hpsa_gather_lun_info(struct ctlr_info *h,
1780 int reportlunsize,
1781 struct ReportLUNdata *physdev, u32 *nphysicals,
1782 struct ReportLUNdata *logdev, u32 *nlogicals)
1783 {
1784 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1785 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1786 return -1;
1787 }
1788 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1789 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1790 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1791 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1792 *nphysicals - HPSA_MAX_PHYS_LUN);
1793 *nphysicals = HPSA_MAX_PHYS_LUN;
1794 }
1795 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1796 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1797 return -1;
1798 }
1799 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1800 /* Reject Logicals in excess of our max capability. */
1801 if (*nlogicals > HPSA_MAX_LUN) {
1802 dev_warn(&h->pdev->dev,
1803 "maximum logical LUNs (%d) exceeded. "
1804 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1805 *nlogicals - HPSA_MAX_LUN);
1806 *nlogicals = HPSA_MAX_LUN;
1807 }
1808 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1809 dev_warn(&h->pdev->dev,
1810 "maximum logical + physical LUNs (%d) exceeded. "
1811 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1812 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1813 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1814 }
1815 return 0;
1816 }
1817
1818 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1819 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1820 struct ReportLUNdata *logdev_list)
1821 {
1822 /* Helper function, figure out where the LUN ID info is coming from
1823 * given index i, lists of physical and logical devices, where in
1824 * the list the raid controller is supposed to appear (first or last)
1825 */
1826
1827 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1828 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1829
1830 if (i == raid_ctlr_position)
1831 return RAID_CTLR_LUNID;
1832
1833 if (i < logicals_start)
1834 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1835
1836 if (i < last_device)
1837 return &logdev_list->LUN[i - nphysicals -
1838 (raid_ctlr_position == 0)][0];
1839 BUG();
1840 return NULL;
1841 }
1842
1843 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1844 {
1845 /* the idea here is we could get notified
1846 * that some devices have changed, so we do a report
1847 * physical luns and report logical luns cmd, and adjust
1848 * our list of devices accordingly.
1849 *
1850 * The scsi3addr's of devices won't change so long as the
1851 * adapter is not reset. That means we can rescan and
1852 * tell which devices we already know about, vs. new
1853 * devices, vs. disappearing devices.
1854 */
1855 struct ReportLUNdata *physdev_list = NULL;
1856 struct ReportLUNdata *logdev_list = NULL;
1857 u32 nphysicals = 0;
1858 u32 nlogicals = 0;
1859 u32 ndev_allocated = 0;
1860 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1861 int ncurrent = 0;
1862 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1863 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1864 int bus, target, lun;
1865 int raid_ctlr_position;
1866 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1867
1868 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
1869 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1870 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1871 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1872
1873 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1874 dev_err(&h->pdev->dev, "out of memory\n");
1875 goto out;
1876 }
1877 memset(lunzerobits, 0, sizeof(lunzerobits));
1878
1879 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1880 logdev_list, &nlogicals))
1881 goto out;
1882
1883 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1884 * but each of them 4 times through different paths. The plus 1
1885 * is for the RAID controller.
1886 */
1887 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1888
1889 /* Allocate the per device structures */
1890 for (i = 0; i < ndevs_to_allocate; i++) {
1891 if (i >= HPSA_MAX_DEVICES) {
1892 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1893 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1894 ndevs_to_allocate - HPSA_MAX_DEVICES);
1895 break;
1896 }
1897
1898 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1899 if (!currentsd[i]) {
1900 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1901 __FILE__, __LINE__);
1902 goto out;
1903 }
1904 ndev_allocated++;
1905 }
1906
1907 if (unlikely(is_scsi_rev_5(h)))
1908 raid_ctlr_position = 0;
1909 else
1910 raid_ctlr_position = nphysicals + nlogicals;
1911
1912 /* adjust our table of devices */
1913 nmsa2xxx_enclosures = 0;
1914 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1915 u8 *lunaddrbytes, is_OBDR = 0;
1916
1917 /* Figure out where the LUN ID info is coming from */
1918 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1919 i, nphysicals, nlogicals, physdev_list, logdev_list);
1920 /* skip masked physical devices. */
1921 if (lunaddrbytes[3] & 0xC0 &&
1922 i < nphysicals + (raid_ctlr_position == 0))
1923 continue;
1924
1925 /* Get device type, vendor, model, device id */
1926 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1927 &is_OBDR))
1928 continue; /* skip it if we can't talk to it. */
1929 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1930 tmpdevice);
1931 this_device = currentsd[ncurrent];
1932
1933 /*
1934 * For the msa2xxx boxes, we have to insert a LUN 0 which
1935 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1936 * is nonetheless an enclosure device there. We have to
1937 * present that otherwise linux won't find anything if
1938 * there is no lun 0.
1939 */
1940 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1941 lunaddrbytes, bus, target, lun, lunzerobits,
1942 &nmsa2xxx_enclosures)) {
1943 ncurrent++;
1944 this_device = currentsd[ncurrent];
1945 }
1946
1947 *this_device = *tmpdevice;
1948 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1949
1950 switch (this_device->devtype) {
1951 case TYPE_ROM:
1952 /* We don't *really* support actual CD-ROM devices,
1953 * just "One Button Disaster Recovery" tape drive
1954 * which temporarily pretends to be a CD-ROM drive.
1955 * So we check that the device is really an OBDR tape
1956 * device by checking for "$DR-10" in bytes 43-48 of
1957 * the inquiry data.
1958 */
1959 if (is_OBDR)
1960 ncurrent++;
1961 break;
1962 case TYPE_DISK:
1963 if (i < nphysicals)
1964 break;
1965 ncurrent++;
1966 break;
1967 case TYPE_TAPE:
1968 case TYPE_MEDIUM_CHANGER:
1969 ncurrent++;
1970 break;
1971 case TYPE_RAID:
1972 /* Only present the Smartarray HBA as a RAID controller.
1973 * If it's a RAID controller other than the HBA itself
1974 * (an external RAID controller, MSA500 or similar)
1975 * don't present it.
1976 */
1977 if (!is_hba_lunid(lunaddrbytes))
1978 break;
1979 ncurrent++;
1980 break;
1981 default:
1982 break;
1983 }
1984 if (ncurrent >= HPSA_MAX_DEVICES)
1985 break;
1986 }
1987 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1988 out:
1989 kfree(tmpdevice);
1990 for (i = 0; i < ndev_allocated; i++)
1991 kfree(currentsd[i]);
1992 kfree(currentsd);
1993 kfree(physdev_list);
1994 kfree(logdev_list);
1995 }
1996
1997 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1998 * dma mapping and fills in the scatter gather entries of the
1999 * hpsa command, cp.
2000 */
2001 static int hpsa_scatter_gather(struct ctlr_info *h,
2002 struct CommandList *cp,
2003 struct scsi_cmnd *cmd)
2004 {
2005 unsigned int len;
2006 struct scatterlist *sg;
2007 u64 addr64;
2008 int use_sg, i, sg_index, chained;
2009 struct SGDescriptor *curr_sg;
2010
2011 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
2012
2013 use_sg = scsi_dma_map(cmd);
2014 if (use_sg < 0)
2015 return use_sg;
2016
2017 if (!use_sg)
2018 goto sglist_finished;
2019
2020 curr_sg = cp->SG;
2021 chained = 0;
2022 sg_index = 0;
2023 scsi_for_each_sg(cmd, sg, use_sg, i) {
2024 if (i == h->max_cmd_sg_entries - 1 &&
2025 use_sg > h->max_cmd_sg_entries) {
2026 chained = 1;
2027 curr_sg = h->cmd_sg_list[cp->cmdindex];
2028 sg_index = 0;
2029 }
2030 addr64 = (u64) sg_dma_address(sg);
2031 len = sg_dma_len(sg);
2032 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2033 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2034 curr_sg->Len = len;
2035 curr_sg->Ext = 0; /* we are not chaining */
2036 curr_sg++;
2037 }
2038
2039 if (use_sg + chained > h->maxSG)
2040 h->maxSG = use_sg + chained;
2041
2042 if (chained) {
2043 cp->Header.SGList = h->max_cmd_sg_entries;
2044 cp->Header.SGTotal = (u16) (use_sg + 1);
2045 hpsa_map_sg_chain_block(h, cp);
2046 return 0;
2047 }
2048
2049 sglist_finished:
2050
2051 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2052 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2053 return 0;
2054 }
2055
2056
2057 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2058 void (*done)(struct scsi_cmnd *))
2059 {
2060 struct ctlr_info *h;
2061 struct hpsa_scsi_dev_t *dev;
2062 unsigned char scsi3addr[8];
2063 struct CommandList *c;
2064 unsigned long flags;
2065
2066 /* Get the ptr to our adapter structure out of cmd->host. */
2067 h = sdev_to_hba(cmd->device);
2068 dev = cmd->device->hostdata;
2069 if (!dev) {
2070 cmd->result = DID_NO_CONNECT << 16;
2071 done(cmd);
2072 return 0;
2073 }
2074 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2075
2076 spin_lock_irqsave(&h->lock, flags);
2077 if (unlikely(h->lockup_detected)) {
2078 spin_unlock_irqrestore(&h->lock, flags);
2079 cmd->result = DID_ERROR << 16;
2080 done(cmd);
2081 return 0;
2082 }
2083 /* Need a lock as this is being allocated from the pool */
2084 c = cmd_alloc(h);
2085 spin_unlock_irqrestore(&h->lock, flags);
2086 if (c == NULL) { /* trouble... */
2087 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2088 return SCSI_MLQUEUE_HOST_BUSY;
2089 }
2090
2091 /* Fill in the command list header */
2092
2093 cmd->scsi_done = done; /* save this for use by completion code */
2094
2095 /* save c in case we have to abort it */
2096 cmd->host_scribble = (unsigned char *) c;
2097
2098 c->cmd_type = CMD_SCSI;
2099 c->scsi_cmd = cmd;
2100 c->Header.ReplyQueue = 0; /* unused in simple mode */
2101 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2102 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2103 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2104
2105 /* Fill in the request block... */
2106
2107 c->Request.Timeout = 0;
2108 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2109 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2110 c->Request.CDBLen = cmd->cmd_len;
2111 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2112 c->Request.Type.Type = TYPE_CMD;
2113 c->Request.Type.Attribute = ATTR_SIMPLE;
2114 switch (cmd->sc_data_direction) {
2115 case DMA_TO_DEVICE:
2116 c->Request.Type.Direction = XFER_WRITE;
2117 break;
2118 case DMA_FROM_DEVICE:
2119 c->Request.Type.Direction = XFER_READ;
2120 break;
2121 case DMA_NONE:
2122 c->Request.Type.Direction = XFER_NONE;
2123 break;
2124 case DMA_BIDIRECTIONAL:
2125 /* This can happen if a buggy application does a scsi passthru
2126 * and sets both inlen and outlen to non-zero. ( see
2127 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2128 */
2129
2130 c->Request.Type.Direction = XFER_RSVD;
2131 /* This is technically wrong, and hpsa controllers should
2132 * reject it with CMD_INVALID, which is the most correct
2133 * response, but non-fibre backends appear to let it
2134 * slide by, and give the same results as if this field
2135 * were set correctly. Either way is acceptable for
2136 * our purposes here.
2137 */
2138
2139 break;
2140
2141 default:
2142 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2143 cmd->sc_data_direction);
2144 BUG();
2145 break;
2146 }
2147
2148 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2149 cmd_free(h, c);
2150 return SCSI_MLQUEUE_HOST_BUSY;
2151 }
2152 enqueue_cmd_and_start_io(h, c);
2153 /* the cmd'll come back via intr handler in complete_scsi_command() */
2154 return 0;
2155 }
2156
2157 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2158
2159 static void hpsa_scan_start(struct Scsi_Host *sh)
2160 {
2161 struct ctlr_info *h = shost_to_hba(sh);
2162 unsigned long flags;
2163
2164 /* wait until any scan already in progress is finished. */
2165 while (1) {
2166 spin_lock_irqsave(&h->scan_lock, flags);
2167 if (h->scan_finished)
2168 break;
2169 spin_unlock_irqrestore(&h->scan_lock, flags);
2170 wait_event(h->scan_wait_queue, h->scan_finished);
2171 /* Note: We don't need to worry about a race between this
2172 * thread and driver unload because the midlayer will
2173 * have incremented the reference count, so unload won't
2174 * happen if we're in here.
2175 */
2176 }
2177 h->scan_finished = 0; /* mark scan as in progress */
2178 spin_unlock_irqrestore(&h->scan_lock, flags);
2179
2180 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2181
2182 spin_lock_irqsave(&h->scan_lock, flags);
2183 h->scan_finished = 1; /* mark scan as finished. */
2184 wake_up_all(&h->scan_wait_queue);
2185 spin_unlock_irqrestore(&h->scan_lock, flags);
2186 }
2187
2188 static int hpsa_scan_finished(struct Scsi_Host *sh,
2189 unsigned long elapsed_time)
2190 {
2191 struct ctlr_info *h = shost_to_hba(sh);
2192 unsigned long flags;
2193 int finished;
2194
2195 spin_lock_irqsave(&h->scan_lock, flags);
2196 finished = h->scan_finished;
2197 spin_unlock_irqrestore(&h->scan_lock, flags);
2198 return finished;
2199 }
2200
2201 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2202 int qdepth, int reason)
2203 {
2204 struct ctlr_info *h = sdev_to_hba(sdev);
2205
2206 if (reason != SCSI_QDEPTH_DEFAULT)
2207 return -ENOTSUPP;
2208
2209 if (qdepth < 1)
2210 qdepth = 1;
2211 else
2212 if (qdepth > h->nr_cmds)
2213 qdepth = h->nr_cmds;
2214 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2215 return sdev->queue_depth;
2216 }
2217
2218 static void hpsa_unregister_scsi(struct ctlr_info *h)
2219 {
2220 /* we are being forcibly unloaded, and may not refuse. */
2221 scsi_remove_host(h->scsi_host);
2222 scsi_host_put(h->scsi_host);
2223 h->scsi_host = NULL;
2224 }
2225
2226 static int hpsa_register_scsi(struct ctlr_info *h)
2227 {
2228 int rc;
2229
2230 rc = hpsa_scsi_detect(h);
2231 if (rc != 0)
2232 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2233 " hpsa_scsi_detect(), rc is %d\n", rc);
2234 return rc;
2235 }
2236
2237 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2238 unsigned char lunaddr[])
2239 {
2240 int rc = 0;
2241 int count = 0;
2242 int waittime = 1; /* seconds */
2243 struct CommandList *c;
2244
2245 c = cmd_special_alloc(h);
2246 if (!c) {
2247 dev_warn(&h->pdev->dev, "out of memory in "
2248 "wait_for_device_to_become_ready.\n");
2249 return IO_ERROR;
2250 }
2251
2252 /* Send test unit ready until device ready, or give up. */
2253 while (count < HPSA_TUR_RETRY_LIMIT) {
2254
2255 /* Wait for a bit. do this first, because if we send
2256 * the TUR right away, the reset will just abort it.
2257 */
2258 msleep(1000 * waittime);
2259 count++;
2260
2261 /* Increase wait time with each try, up to a point. */
2262 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2263 waittime = waittime * 2;
2264
2265 /* Send the Test Unit Ready */
2266 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2267 hpsa_scsi_do_simple_cmd_core(h, c);
2268 /* no unmap needed here because no data xfer. */
2269
2270 if (c->err_info->CommandStatus == CMD_SUCCESS)
2271 break;
2272
2273 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2274 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2275 (c->err_info->SenseInfo[2] == NO_SENSE ||
2276 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2277 break;
2278
2279 dev_warn(&h->pdev->dev, "waiting %d secs "
2280 "for device to become ready.\n", waittime);
2281 rc = 1; /* device not ready. */
2282 }
2283
2284 if (rc)
2285 dev_warn(&h->pdev->dev, "giving up on device.\n");
2286 else
2287 dev_warn(&h->pdev->dev, "device is ready.\n");
2288
2289 cmd_special_free(h, c);
2290 return rc;
2291 }
2292
2293 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2294 * complaining. Doing a host- or bus-reset can't do anything good here.
2295 */
2296 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2297 {
2298 int rc;
2299 struct ctlr_info *h;
2300 struct hpsa_scsi_dev_t *dev;
2301
2302 /* find the controller to which the command to be aborted was sent */
2303 h = sdev_to_hba(scsicmd->device);
2304 if (h == NULL) /* paranoia */
2305 return FAILED;
2306 dev = scsicmd->device->hostdata;
2307 if (!dev) {
2308 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2309 "device lookup failed.\n");
2310 return FAILED;
2311 }
2312 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2313 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2314 /* send a reset to the SCSI LUN which the command was sent to */
2315 rc = hpsa_send_reset(h, dev->scsi3addr);
2316 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2317 return SUCCESS;
2318
2319 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2320 return FAILED;
2321 }
2322
2323 /*
2324 * For operations that cannot sleep, a command block is allocated at init,
2325 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2326 * which ones are free or in use. Lock must be held when calling this.
2327 * cmd_free() is the complement.
2328 */
2329 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2330 {
2331 struct CommandList *c;
2332 int i;
2333 union u64bit temp64;
2334 dma_addr_t cmd_dma_handle, err_dma_handle;
2335
2336 do {
2337 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2338 if (i == h->nr_cmds)
2339 return NULL;
2340 } while (test_and_set_bit
2341 (i & (BITS_PER_LONG - 1),
2342 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2343 c = h->cmd_pool + i;
2344 memset(c, 0, sizeof(*c));
2345 cmd_dma_handle = h->cmd_pool_dhandle
2346 + i * sizeof(*c);
2347 c->err_info = h->errinfo_pool + i;
2348 memset(c->err_info, 0, sizeof(*c->err_info));
2349 err_dma_handle = h->errinfo_pool_dhandle
2350 + i * sizeof(*c->err_info);
2351 h->nr_allocs++;
2352
2353 c->cmdindex = i;
2354
2355 INIT_LIST_HEAD(&c->list);
2356 c->busaddr = (u32) cmd_dma_handle;
2357 temp64.val = (u64) err_dma_handle;
2358 c->ErrDesc.Addr.lower = temp64.val32.lower;
2359 c->ErrDesc.Addr.upper = temp64.val32.upper;
2360 c->ErrDesc.Len = sizeof(*c->err_info);
2361
2362 c->h = h;
2363 return c;
2364 }
2365
2366 /* For operations that can wait for kmalloc to possibly sleep,
2367 * this routine can be called. Lock need not be held to call
2368 * cmd_special_alloc. cmd_special_free() is the complement.
2369 */
2370 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2371 {
2372 struct CommandList *c;
2373 union u64bit temp64;
2374 dma_addr_t cmd_dma_handle, err_dma_handle;
2375
2376 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2377 if (c == NULL)
2378 return NULL;
2379 memset(c, 0, sizeof(*c));
2380
2381 c->cmdindex = -1;
2382
2383 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2384 &err_dma_handle);
2385
2386 if (c->err_info == NULL) {
2387 pci_free_consistent(h->pdev,
2388 sizeof(*c), c, cmd_dma_handle);
2389 return NULL;
2390 }
2391 memset(c->err_info, 0, sizeof(*c->err_info));
2392
2393 INIT_LIST_HEAD(&c->list);
2394 c->busaddr = (u32) cmd_dma_handle;
2395 temp64.val = (u64) err_dma_handle;
2396 c->ErrDesc.Addr.lower = temp64.val32.lower;
2397 c->ErrDesc.Addr.upper = temp64.val32.upper;
2398 c->ErrDesc.Len = sizeof(*c->err_info);
2399
2400 c->h = h;
2401 return c;
2402 }
2403
2404 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2405 {
2406 int i;
2407
2408 i = c - h->cmd_pool;
2409 clear_bit(i & (BITS_PER_LONG - 1),
2410 h->cmd_pool_bits + (i / BITS_PER_LONG));
2411 h->nr_frees++;
2412 }
2413
2414 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2415 {
2416 union u64bit temp64;
2417
2418 temp64.val32.lower = c->ErrDesc.Addr.lower;
2419 temp64.val32.upper = c->ErrDesc.Addr.upper;
2420 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2421 c->err_info, (dma_addr_t) temp64.val);
2422 pci_free_consistent(h->pdev, sizeof(*c),
2423 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2424 }
2425
2426 #ifdef CONFIG_COMPAT
2427
2428 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2429 {
2430 IOCTL32_Command_struct __user *arg32 =
2431 (IOCTL32_Command_struct __user *) arg;
2432 IOCTL_Command_struct arg64;
2433 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2434 int err;
2435 u32 cp;
2436
2437 memset(&arg64, 0, sizeof(arg64));
2438 err = 0;
2439 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2440 sizeof(arg64.LUN_info));
2441 err |= copy_from_user(&arg64.Request, &arg32->Request,
2442 sizeof(arg64.Request));
2443 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2444 sizeof(arg64.error_info));
2445 err |= get_user(arg64.buf_size, &arg32->buf_size);
2446 err |= get_user(cp, &arg32->buf);
2447 arg64.buf = compat_ptr(cp);
2448 err |= copy_to_user(p, &arg64, sizeof(arg64));
2449
2450 if (err)
2451 return -EFAULT;
2452
2453 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2454 if (err)
2455 return err;
2456 err |= copy_in_user(&arg32->error_info, &p->error_info,
2457 sizeof(arg32->error_info));
2458 if (err)
2459 return -EFAULT;
2460 return err;
2461 }
2462
2463 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2464 int cmd, void *arg)
2465 {
2466 BIG_IOCTL32_Command_struct __user *arg32 =
2467 (BIG_IOCTL32_Command_struct __user *) arg;
2468 BIG_IOCTL_Command_struct arg64;
2469 BIG_IOCTL_Command_struct __user *p =
2470 compat_alloc_user_space(sizeof(arg64));
2471 int err;
2472 u32 cp;
2473
2474 memset(&arg64, 0, sizeof(arg64));
2475 err = 0;
2476 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2477 sizeof(arg64.LUN_info));
2478 err |= copy_from_user(&arg64.Request, &arg32->Request,
2479 sizeof(arg64.Request));
2480 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2481 sizeof(arg64.error_info));
2482 err |= get_user(arg64.buf_size, &arg32->buf_size);
2483 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2484 err |= get_user(cp, &arg32->buf);
2485 arg64.buf = compat_ptr(cp);
2486 err |= copy_to_user(p, &arg64, sizeof(arg64));
2487
2488 if (err)
2489 return -EFAULT;
2490
2491 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2492 if (err)
2493 return err;
2494 err |= copy_in_user(&arg32->error_info, &p->error_info,
2495 sizeof(arg32->error_info));
2496 if (err)
2497 return -EFAULT;
2498 return err;
2499 }
2500
2501 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2502 {
2503 switch (cmd) {
2504 case CCISS_GETPCIINFO:
2505 case CCISS_GETINTINFO:
2506 case CCISS_SETINTINFO:
2507 case CCISS_GETNODENAME:
2508 case CCISS_SETNODENAME:
2509 case CCISS_GETHEARTBEAT:
2510 case CCISS_GETBUSTYPES:
2511 case CCISS_GETFIRMVER:
2512 case CCISS_GETDRIVVER:
2513 case CCISS_REVALIDVOLS:
2514 case CCISS_DEREGDISK:
2515 case CCISS_REGNEWDISK:
2516 case CCISS_REGNEWD:
2517 case CCISS_RESCANDISK:
2518 case CCISS_GETLUNINFO:
2519 return hpsa_ioctl(dev, cmd, arg);
2520
2521 case CCISS_PASSTHRU32:
2522 return hpsa_ioctl32_passthru(dev, cmd, arg);
2523 case CCISS_BIG_PASSTHRU32:
2524 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2525
2526 default:
2527 return -ENOIOCTLCMD;
2528 }
2529 }
2530 #endif
2531
2532 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2533 {
2534 struct hpsa_pci_info pciinfo;
2535
2536 if (!argp)
2537 return -EINVAL;
2538 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2539 pciinfo.bus = h->pdev->bus->number;
2540 pciinfo.dev_fn = h->pdev->devfn;
2541 pciinfo.board_id = h->board_id;
2542 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2543 return -EFAULT;
2544 return 0;
2545 }
2546
2547 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2548 {
2549 DriverVer_type DriverVer;
2550 unsigned char vmaj, vmin, vsubmin;
2551 int rc;
2552
2553 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2554 &vmaj, &vmin, &vsubmin);
2555 if (rc != 3) {
2556 dev_info(&h->pdev->dev, "driver version string '%s' "
2557 "unrecognized.", HPSA_DRIVER_VERSION);
2558 vmaj = 0;
2559 vmin = 0;
2560 vsubmin = 0;
2561 }
2562 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2563 if (!argp)
2564 return -EINVAL;
2565 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2566 return -EFAULT;
2567 return 0;
2568 }
2569
2570 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2571 {
2572 IOCTL_Command_struct iocommand;
2573 struct CommandList *c;
2574 char *buff = NULL;
2575 union u64bit temp64;
2576
2577 if (!argp)
2578 return -EINVAL;
2579 if (!capable(CAP_SYS_RAWIO))
2580 return -EPERM;
2581 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2582 return -EFAULT;
2583 if ((iocommand.buf_size < 1) &&
2584 (iocommand.Request.Type.Direction != XFER_NONE)) {
2585 return -EINVAL;
2586 }
2587 if (iocommand.buf_size > 0) {
2588 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2589 if (buff == NULL)
2590 return -EFAULT;
2591 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2592 /* Copy the data into the buffer we created */
2593 if (copy_from_user(buff, iocommand.buf,
2594 iocommand.buf_size)) {
2595 kfree(buff);
2596 return -EFAULT;
2597 }
2598 } else {
2599 memset(buff, 0, iocommand.buf_size);
2600 }
2601 }
2602 c = cmd_special_alloc(h);
2603 if (c == NULL) {
2604 kfree(buff);
2605 return -ENOMEM;
2606 }
2607 /* Fill in the command type */
2608 c->cmd_type = CMD_IOCTL_PEND;
2609 /* Fill in Command Header */
2610 c->Header.ReplyQueue = 0; /* unused in simple mode */
2611 if (iocommand.buf_size > 0) { /* buffer to fill */
2612 c->Header.SGList = 1;
2613 c->Header.SGTotal = 1;
2614 } else { /* no buffers to fill */
2615 c->Header.SGList = 0;
2616 c->Header.SGTotal = 0;
2617 }
2618 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2619 /* use the kernel address the cmd block for tag */
2620 c->Header.Tag.lower = c->busaddr;
2621
2622 /* Fill in Request block */
2623 memcpy(&c->Request, &iocommand.Request,
2624 sizeof(c->Request));
2625
2626 /* Fill in the scatter gather information */
2627 if (iocommand.buf_size > 0) {
2628 temp64.val = pci_map_single(h->pdev, buff,
2629 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2630 c->SG[0].Addr.lower = temp64.val32.lower;
2631 c->SG[0].Addr.upper = temp64.val32.upper;
2632 c->SG[0].Len = iocommand.buf_size;
2633 c->SG[0].Ext = 0; /* we are not chaining*/
2634 }
2635 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2636 if (iocommand.buf_size > 0)
2637 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2638 check_ioctl_unit_attention(h, c);
2639
2640 /* Copy the error information out */
2641 memcpy(&iocommand.error_info, c->err_info,
2642 sizeof(iocommand.error_info));
2643 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2644 kfree(buff);
2645 cmd_special_free(h, c);
2646 return -EFAULT;
2647 }
2648 if (iocommand.Request.Type.Direction == XFER_READ &&
2649 iocommand.buf_size > 0) {
2650 /* Copy the data out of the buffer we created */
2651 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2652 kfree(buff);
2653 cmd_special_free(h, c);
2654 return -EFAULT;
2655 }
2656 }
2657 kfree(buff);
2658 cmd_special_free(h, c);
2659 return 0;
2660 }
2661
2662 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2663 {
2664 BIG_IOCTL_Command_struct *ioc;
2665 struct CommandList *c;
2666 unsigned char **buff = NULL;
2667 int *buff_size = NULL;
2668 union u64bit temp64;
2669 BYTE sg_used = 0;
2670 int status = 0;
2671 int i;
2672 u32 left;
2673 u32 sz;
2674 BYTE __user *data_ptr;
2675
2676 if (!argp)
2677 return -EINVAL;
2678 if (!capable(CAP_SYS_RAWIO))
2679 return -EPERM;
2680 ioc = (BIG_IOCTL_Command_struct *)
2681 kmalloc(sizeof(*ioc), GFP_KERNEL);
2682 if (!ioc) {
2683 status = -ENOMEM;
2684 goto cleanup1;
2685 }
2686 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2687 status = -EFAULT;
2688 goto cleanup1;
2689 }
2690 if ((ioc->buf_size < 1) &&
2691 (ioc->Request.Type.Direction != XFER_NONE)) {
2692 status = -EINVAL;
2693 goto cleanup1;
2694 }
2695 /* Check kmalloc limits using all SGs */
2696 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2697 status = -EINVAL;
2698 goto cleanup1;
2699 }
2700 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2701 status = -EINVAL;
2702 goto cleanup1;
2703 }
2704 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2705 if (!buff) {
2706 status = -ENOMEM;
2707 goto cleanup1;
2708 }
2709 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2710 if (!buff_size) {
2711 status = -ENOMEM;
2712 goto cleanup1;
2713 }
2714 left = ioc->buf_size;
2715 data_ptr = ioc->buf;
2716 while (left) {
2717 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2718 buff_size[sg_used] = sz;
2719 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2720 if (buff[sg_used] == NULL) {
2721 status = -ENOMEM;
2722 goto cleanup1;
2723 }
2724 if (ioc->Request.Type.Direction == XFER_WRITE) {
2725 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2726 status = -ENOMEM;
2727 goto cleanup1;
2728 }
2729 } else
2730 memset(buff[sg_used], 0, sz);
2731 left -= sz;
2732 data_ptr += sz;
2733 sg_used++;
2734 }
2735 c = cmd_special_alloc(h);
2736 if (c == NULL) {
2737 status = -ENOMEM;
2738 goto cleanup1;
2739 }
2740 c->cmd_type = CMD_IOCTL_PEND;
2741 c->Header.ReplyQueue = 0;
2742 c->Header.SGList = c->Header.SGTotal = sg_used;
2743 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2744 c->Header.Tag.lower = c->busaddr;
2745 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2746 if (ioc->buf_size > 0) {
2747 int i;
2748 for (i = 0; i < sg_used; i++) {
2749 temp64.val = pci_map_single(h->pdev, buff[i],
2750 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2751 c->SG[i].Addr.lower = temp64.val32.lower;
2752 c->SG[i].Addr.upper = temp64.val32.upper;
2753 c->SG[i].Len = buff_size[i];
2754 /* we are not chaining */
2755 c->SG[i].Ext = 0;
2756 }
2757 }
2758 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2759 if (sg_used)
2760 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
2761 check_ioctl_unit_attention(h, c);
2762 /* Copy the error information out */
2763 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2764 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2765 cmd_special_free(h, c);
2766 status = -EFAULT;
2767 goto cleanup1;
2768 }
2769 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
2770 /* Copy the data out of the buffer we created */
2771 BYTE __user *ptr = ioc->buf;
2772 for (i = 0; i < sg_used; i++) {
2773 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2774 cmd_special_free(h, c);
2775 status = -EFAULT;
2776 goto cleanup1;
2777 }
2778 ptr += buff_size[i];
2779 }
2780 }
2781 cmd_special_free(h, c);
2782 status = 0;
2783 cleanup1:
2784 if (buff) {
2785 for (i = 0; i < sg_used; i++)
2786 kfree(buff[i]);
2787 kfree(buff);
2788 }
2789 kfree(buff_size);
2790 kfree(ioc);
2791 return status;
2792 }
2793
2794 static void check_ioctl_unit_attention(struct ctlr_info *h,
2795 struct CommandList *c)
2796 {
2797 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2798 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2799 (void) check_for_unit_attention(h, c);
2800 }
2801 /*
2802 * ioctl
2803 */
2804 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2805 {
2806 struct ctlr_info *h;
2807 void __user *argp = (void __user *)arg;
2808
2809 h = sdev_to_hba(dev);
2810
2811 switch (cmd) {
2812 case CCISS_DEREGDISK:
2813 case CCISS_REGNEWDISK:
2814 case CCISS_REGNEWD:
2815 hpsa_scan_start(h->scsi_host);
2816 return 0;
2817 case CCISS_GETPCIINFO:
2818 return hpsa_getpciinfo_ioctl(h, argp);
2819 case CCISS_GETDRIVVER:
2820 return hpsa_getdrivver_ioctl(h, argp);
2821 case CCISS_PASSTHRU:
2822 return hpsa_passthru_ioctl(h, argp);
2823 case CCISS_BIG_PASSTHRU:
2824 return hpsa_big_passthru_ioctl(h, argp);
2825 default:
2826 return -ENOTTY;
2827 }
2828 }
2829
2830 static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
2831 unsigned char *scsi3addr, u8 reset_type)
2832 {
2833 struct CommandList *c;
2834
2835 c = cmd_alloc(h);
2836 if (!c)
2837 return -ENOMEM;
2838 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2839 RAID_CTLR_LUNID, TYPE_MSG);
2840 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2841 c->waiting = NULL;
2842 enqueue_cmd_and_start_io(h, c);
2843 /* Don't wait for completion, the reset won't complete. Don't free
2844 * the command either. This is the last command we will send before
2845 * re-initializing everything, so it doesn't matter and won't leak.
2846 */
2847 return 0;
2848 }
2849
2850 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2851 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
2852 int cmd_type)
2853 {
2854 int pci_dir = XFER_NONE;
2855
2856 c->cmd_type = CMD_IOCTL_PEND;
2857 c->Header.ReplyQueue = 0;
2858 if (buff != NULL && size > 0) {
2859 c->Header.SGList = 1;
2860 c->Header.SGTotal = 1;
2861 } else {
2862 c->Header.SGList = 0;
2863 c->Header.SGTotal = 0;
2864 }
2865 c->Header.Tag.lower = c->busaddr;
2866 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2867
2868 c->Request.Type.Type = cmd_type;
2869 if (cmd_type == TYPE_CMD) {
2870 switch (cmd) {
2871 case HPSA_INQUIRY:
2872 /* are we trying to read a vital product page */
2873 if (page_code != 0) {
2874 c->Request.CDB[1] = 0x01;
2875 c->Request.CDB[2] = page_code;
2876 }
2877 c->Request.CDBLen = 6;
2878 c->Request.Type.Attribute = ATTR_SIMPLE;
2879 c->Request.Type.Direction = XFER_READ;
2880 c->Request.Timeout = 0;
2881 c->Request.CDB[0] = HPSA_INQUIRY;
2882 c->Request.CDB[4] = size & 0xFF;
2883 break;
2884 case HPSA_REPORT_LOG:
2885 case HPSA_REPORT_PHYS:
2886 /* Talking to controller so It's a physical command
2887 mode = 00 target = 0. Nothing to write.
2888 */
2889 c->Request.CDBLen = 12;
2890 c->Request.Type.Attribute = ATTR_SIMPLE;
2891 c->Request.Type.Direction = XFER_READ;
2892 c->Request.Timeout = 0;
2893 c->Request.CDB[0] = cmd;
2894 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2895 c->Request.CDB[7] = (size >> 16) & 0xFF;
2896 c->Request.CDB[8] = (size >> 8) & 0xFF;
2897 c->Request.CDB[9] = size & 0xFF;
2898 break;
2899 case HPSA_CACHE_FLUSH:
2900 c->Request.CDBLen = 12;
2901 c->Request.Type.Attribute = ATTR_SIMPLE;
2902 c->Request.Type.Direction = XFER_WRITE;
2903 c->Request.Timeout = 0;
2904 c->Request.CDB[0] = BMIC_WRITE;
2905 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2906 c->Request.CDB[7] = (size >> 8) & 0xFF;
2907 c->Request.CDB[8] = size & 0xFF;
2908 break;
2909 case TEST_UNIT_READY:
2910 c->Request.CDBLen = 6;
2911 c->Request.Type.Attribute = ATTR_SIMPLE;
2912 c->Request.Type.Direction = XFER_NONE;
2913 c->Request.Timeout = 0;
2914 break;
2915 default:
2916 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2917 BUG();
2918 return;
2919 }
2920 } else if (cmd_type == TYPE_MSG) {
2921 switch (cmd) {
2922
2923 case HPSA_DEVICE_RESET_MSG:
2924 c->Request.CDBLen = 16;
2925 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2926 c->Request.Type.Attribute = ATTR_SIMPLE;
2927 c->Request.Type.Direction = XFER_NONE;
2928 c->Request.Timeout = 0; /* Don't time out */
2929 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2930 c->Request.CDB[0] = cmd;
2931 c->Request.CDB[1] = 0x03; /* Reset target above */
2932 /* If bytes 4-7 are zero, it means reset the */
2933 /* LunID device */
2934 c->Request.CDB[4] = 0x00;
2935 c->Request.CDB[5] = 0x00;
2936 c->Request.CDB[6] = 0x00;
2937 c->Request.CDB[7] = 0x00;
2938 break;
2939
2940 default:
2941 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2942 cmd);
2943 BUG();
2944 }
2945 } else {
2946 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2947 BUG();
2948 }
2949
2950 switch (c->Request.Type.Direction) {
2951 case XFER_READ:
2952 pci_dir = PCI_DMA_FROMDEVICE;
2953 break;
2954 case XFER_WRITE:
2955 pci_dir = PCI_DMA_TODEVICE;
2956 break;
2957 case XFER_NONE:
2958 pci_dir = PCI_DMA_NONE;
2959 break;
2960 default:
2961 pci_dir = PCI_DMA_BIDIRECTIONAL;
2962 }
2963
2964 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2965
2966 return;
2967 }
2968
2969 /*
2970 * Map (physical) PCI mem into (virtual) kernel space
2971 */
2972 static void __iomem *remap_pci_mem(ulong base, ulong size)
2973 {
2974 ulong page_base = ((ulong) base) & PAGE_MASK;
2975 ulong page_offs = ((ulong) base) - page_base;
2976 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2977
2978 return page_remapped ? (page_remapped + page_offs) : NULL;
2979 }
2980
2981 /* Takes cmds off the submission queue and sends them to the hardware,
2982 * then puts them on the queue of cmds waiting for completion.
2983 */
2984 static void start_io(struct ctlr_info *h)
2985 {
2986 struct CommandList *c;
2987
2988 while (!list_empty(&h->reqQ)) {
2989 c = list_entry(h->reqQ.next, struct CommandList, list);
2990 /* can't do anything if fifo is full */
2991 if ((h->access.fifo_full(h))) {
2992 dev_warn(&h->pdev->dev, "fifo full\n");
2993 break;
2994 }
2995
2996 /* Get the first entry from the Request Q */
2997 removeQ(c);
2998 h->Qdepth--;
2999
3000 /* Tell the controller execute command */
3001 h->access.submit_command(h, c);
3002
3003 /* Put job onto the completed Q */
3004 addQ(&h->cmpQ, c);
3005 }
3006 }
3007
3008 static inline unsigned long get_next_completion(struct ctlr_info *h)
3009 {
3010 return h->access.command_completed(h);
3011 }
3012
3013 static inline bool interrupt_pending(struct ctlr_info *h)
3014 {
3015 return h->access.intr_pending(h);
3016 }
3017
3018 static inline long interrupt_not_for_us(struct ctlr_info *h)
3019 {
3020 return (h->access.intr_pending(h) == 0) ||
3021 (h->interrupts_enabled == 0);
3022 }
3023
3024 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3025 u32 raw_tag)
3026 {
3027 if (unlikely(tag_index >= h->nr_cmds)) {
3028 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3029 return 1;
3030 }
3031 return 0;
3032 }
3033
3034 static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
3035 {
3036 removeQ(c);
3037 if (likely(c->cmd_type == CMD_SCSI))
3038 complete_scsi_command(c);
3039 else if (c->cmd_type == CMD_IOCTL_PEND)
3040 complete(c->waiting);
3041 }
3042
3043 static inline u32 hpsa_tag_contains_index(u32 tag)
3044 {
3045 return tag & DIRECT_LOOKUP_BIT;
3046 }
3047
3048 static inline u32 hpsa_tag_to_index(u32 tag)
3049 {
3050 return tag >> DIRECT_LOOKUP_SHIFT;
3051 }
3052
3053
3054 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3055 {
3056 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3057 #define HPSA_SIMPLE_ERROR_BITS 0x03
3058 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3059 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3060 return tag & ~HPSA_PERF_ERROR_BITS;
3061 }
3062
3063 /* process completion of an indexed ("direct lookup") command */
3064 static inline u32 process_indexed_cmd(struct ctlr_info *h,
3065 u32 raw_tag)
3066 {
3067 u32 tag_index;
3068 struct CommandList *c;
3069
3070 tag_index = hpsa_tag_to_index(raw_tag);
3071 if (bad_tag(h, tag_index, raw_tag))
3072 return next_command(h);
3073 c = h->cmd_pool + tag_index;
3074 finish_cmd(c, raw_tag);
3075 return next_command(h);
3076 }
3077
3078 /* process completion of a non-indexed command */
3079 static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
3080 u32 raw_tag)
3081 {
3082 u32 tag;
3083 struct CommandList *c = NULL;
3084
3085 tag = hpsa_tag_discard_error_bits(h, raw_tag);
3086 list_for_each_entry(c, &h->cmpQ, list) {
3087 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3088 finish_cmd(c, raw_tag);
3089 return next_command(h);
3090 }
3091 }
3092 bad_tag(h, h->nr_cmds + 1, raw_tag);
3093 return next_command(h);
3094 }
3095
3096 /* Some controllers, like p400, will give us one interrupt
3097 * after a soft reset, even if we turned interrupts off.
3098 * Only need to check for this in the hpsa_xxx_discard_completions
3099 * functions.
3100 */
3101 static int ignore_bogus_interrupt(struct ctlr_info *h)
3102 {
3103 if (likely(!reset_devices))
3104 return 0;
3105
3106 if (likely(h->interrupts_enabled))
3107 return 0;
3108
3109 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3110 "(known firmware bug.) Ignoring.\n");
3111
3112 return 1;
3113 }
3114
3115 static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
3116 {
3117 struct ctlr_info *h = dev_id;
3118 unsigned long flags;
3119 u32 raw_tag;
3120
3121 if (ignore_bogus_interrupt(h))
3122 return IRQ_NONE;
3123
3124 if (interrupt_not_for_us(h))
3125 return IRQ_NONE;
3126 spin_lock_irqsave(&h->lock, flags);
3127 h->last_intr_timestamp = get_jiffies_64();
3128 while (interrupt_pending(h)) {
3129 raw_tag = get_next_completion(h);
3130 while (raw_tag != FIFO_EMPTY)
3131 raw_tag = next_command(h);
3132 }
3133 spin_unlock_irqrestore(&h->lock, flags);
3134 return IRQ_HANDLED;
3135 }
3136
3137 static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
3138 {
3139 struct ctlr_info *h = dev_id;
3140 unsigned long flags;
3141 u32 raw_tag;
3142
3143 if (ignore_bogus_interrupt(h))
3144 return IRQ_NONE;
3145
3146 spin_lock_irqsave(&h->lock, flags);
3147 h->last_intr_timestamp = get_jiffies_64();
3148 raw_tag = get_next_completion(h);
3149 while (raw_tag != FIFO_EMPTY)
3150 raw_tag = next_command(h);
3151 spin_unlock_irqrestore(&h->lock, flags);
3152 return IRQ_HANDLED;
3153 }
3154
3155 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
3156 {
3157 struct ctlr_info *h = dev_id;
3158 unsigned long flags;
3159 u32 raw_tag;
3160
3161 if (interrupt_not_for_us(h))
3162 return IRQ_NONE;
3163 spin_lock_irqsave(&h->lock, flags);
3164 h->last_intr_timestamp = get_jiffies_64();
3165 while (interrupt_pending(h)) {
3166 raw_tag = get_next_completion(h);
3167 while (raw_tag != FIFO_EMPTY) {
3168 if (hpsa_tag_contains_index(raw_tag))
3169 raw_tag = process_indexed_cmd(h, raw_tag);
3170 else
3171 raw_tag = process_nonindexed_cmd(h, raw_tag);
3172 }
3173 }
3174 spin_unlock_irqrestore(&h->lock, flags);
3175 return IRQ_HANDLED;
3176 }
3177
3178 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
3179 {
3180 struct ctlr_info *h = dev_id;
3181 unsigned long flags;
3182 u32 raw_tag;
3183
3184 spin_lock_irqsave(&h->lock, flags);
3185 h->last_intr_timestamp = get_jiffies_64();
3186 raw_tag = get_next_completion(h);
3187 while (raw_tag != FIFO_EMPTY) {
3188 if (hpsa_tag_contains_index(raw_tag))
3189 raw_tag = process_indexed_cmd(h, raw_tag);
3190 else
3191 raw_tag = process_nonindexed_cmd(h, raw_tag);
3192 }
3193 spin_unlock_irqrestore(&h->lock, flags);
3194 return IRQ_HANDLED;
3195 }
3196
3197 /* Send a message CDB to the firmware. Careful, this only works
3198 * in simple mode, not performant mode due to the tag lookup.
3199 * We only ever use this immediately after a controller reset.
3200 */
3201 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3202 unsigned char type)
3203 {
3204 struct Command {
3205 struct CommandListHeader CommandHeader;
3206 struct RequestBlock Request;
3207 struct ErrDescriptor ErrorDescriptor;
3208 };
3209 struct Command *cmd;
3210 static const size_t cmd_sz = sizeof(*cmd) +
3211 sizeof(cmd->ErrorDescriptor);
3212 dma_addr_t paddr64;
3213 uint32_t paddr32, tag;
3214 void __iomem *vaddr;
3215 int i, err;
3216
3217 vaddr = pci_ioremap_bar(pdev, 0);
3218 if (vaddr == NULL)
3219 return -ENOMEM;
3220
3221 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3222 * CCISS commands, so they must be allocated from the lower 4GiB of
3223 * memory.
3224 */
3225 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3226 if (err) {
3227 iounmap(vaddr);
3228 return -ENOMEM;
3229 }
3230
3231 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3232 if (cmd == NULL) {
3233 iounmap(vaddr);
3234 return -ENOMEM;
3235 }
3236
3237 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3238 * although there's no guarantee, we assume that the address is at
3239 * least 4-byte aligned (most likely, it's page-aligned).
3240 */
3241 paddr32 = paddr64;
3242
3243 cmd->CommandHeader.ReplyQueue = 0;
3244 cmd->CommandHeader.SGList = 0;
3245 cmd->CommandHeader.SGTotal = 0;
3246 cmd->CommandHeader.Tag.lower = paddr32;
3247 cmd->CommandHeader.Tag.upper = 0;
3248 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3249
3250 cmd->Request.CDBLen = 16;
3251 cmd->Request.Type.Type = TYPE_MSG;
3252 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3253 cmd->Request.Type.Direction = XFER_NONE;
3254 cmd->Request.Timeout = 0; /* Don't time out */
3255 cmd->Request.CDB[0] = opcode;
3256 cmd->Request.CDB[1] = type;
3257 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3258 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3259 cmd->ErrorDescriptor.Addr.upper = 0;
3260 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3261
3262 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3263
3264 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3265 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3266 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3267 break;
3268 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3269 }
3270
3271 iounmap(vaddr);
3272
3273 /* we leak the DMA buffer here ... no choice since the controller could
3274 * still complete the command.
3275 */
3276 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3277 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3278 opcode, type);
3279 return -ETIMEDOUT;
3280 }
3281
3282 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3283
3284 if (tag & HPSA_ERROR_BIT) {
3285 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3286 opcode, type);
3287 return -EIO;
3288 }
3289
3290 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3291 opcode, type);
3292 return 0;
3293 }
3294
3295 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3296
3297 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3298 void * __iomem vaddr, u32 use_doorbell)
3299 {
3300 u16 pmcsr;
3301 int pos;
3302
3303 if (use_doorbell) {
3304 /* For everything after the P600, the PCI power state method
3305 * of resetting the controller doesn't work, so we have this
3306 * other way using the doorbell register.
3307 */
3308 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3309 writel(use_doorbell, vaddr + SA5_DOORBELL);
3310 } else { /* Try to do it the PCI power state way */
3311
3312 /* Quoting from the Open CISS Specification: "The Power
3313 * Management Control/Status Register (CSR) controls the power
3314 * state of the device. The normal operating state is D0,
3315 * CSR=00h. The software off state is D3, CSR=03h. To reset
3316 * the controller, place the interface device in D3 then to D0,
3317 * this causes a secondary PCI reset which will reset the
3318 * controller." */
3319
3320 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3321 if (pos == 0) {
3322 dev_err(&pdev->dev,
3323 "hpsa_reset_controller: "
3324 "PCI PM not supported\n");
3325 return -ENODEV;
3326 }
3327 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3328 /* enter the D3hot power management state */
3329 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3330 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3331 pmcsr |= PCI_D3hot;
3332 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3333
3334 msleep(500);
3335
3336 /* enter the D0 power management state */
3337 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3338 pmcsr |= PCI_D0;
3339 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3340
3341 /*
3342 * The P600 requires a small delay when changing states.
3343 * Otherwise we may think the board did not reset and we bail.
3344 * This for kdump only and is particular to the P600.
3345 */
3346 msleep(500);
3347 }
3348 return 0;
3349 }
3350
3351 static __devinit void init_driver_version(char *driver_version, int len)
3352 {
3353 memset(driver_version, 0, len);
3354 strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
3355 }
3356
3357 static __devinit int write_driver_ver_to_cfgtable(
3358 struct CfgTable __iomem *cfgtable)
3359 {
3360 char *driver_version;
3361 int i, size = sizeof(cfgtable->driver_version);
3362
3363 driver_version = kmalloc(size, GFP_KERNEL);
3364 if (!driver_version)
3365 return -ENOMEM;
3366
3367 init_driver_version(driver_version, size);
3368 for (i = 0; i < size; i++)
3369 writeb(driver_version[i], &cfgtable->driver_version[i]);
3370 kfree(driver_version);
3371 return 0;
3372 }
3373
3374 static __devinit void read_driver_ver_from_cfgtable(
3375 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3376 {
3377 int i;
3378
3379 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3380 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3381 }
3382
3383 static __devinit int controller_reset_failed(
3384 struct CfgTable __iomem *cfgtable)
3385 {
3386
3387 char *driver_ver, *old_driver_ver;
3388 int rc, size = sizeof(cfgtable->driver_version);
3389
3390 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3391 if (!old_driver_ver)
3392 return -ENOMEM;
3393 driver_ver = old_driver_ver + size;
3394
3395 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3396 * should have been changed, otherwise we know the reset failed.
3397 */
3398 init_driver_version(old_driver_ver, size);
3399 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3400 rc = !memcmp(driver_ver, old_driver_ver, size);
3401 kfree(old_driver_ver);
3402 return rc;
3403 }
3404 /* This does a hard reset of the controller using PCI power management
3405 * states or the using the doorbell register.
3406 */
3407 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3408 {
3409 u64 cfg_offset;
3410 u32 cfg_base_addr;
3411 u64 cfg_base_addr_index;
3412 void __iomem *vaddr;
3413 unsigned long paddr;
3414 u32 misc_fw_support;
3415 int rc;
3416 struct CfgTable __iomem *cfgtable;
3417 u32 use_doorbell;
3418 u32 board_id;
3419 u16 command_register;
3420
3421 /* For controllers as old as the P600, this is very nearly
3422 * the same thing as
3423 *
3424 * pci_save_state(pci_dev);
3425 * pci_set_power_state(pci_dev, PCI_D3hot);
3426 * pci_set_power_state(pci_dev, PCI_D0);
3427 * pci_restore_state(pci_dev);
3428 *
3429 * For controllers newer than the P600, the pci power state
3430 * method of resetting doesn't work so we have another way
3431 * using the doorbell register.
3432 */
3433
3434 rc = hpsa_lookup_board_id(pdev, &board_id);
3435 if (rc < 0 || !ctlr_is_resettable(board_id)) {
3436 dev_warn(&pdev->dev, "Not resetting device.\n");
3437 return -ENODEV;
3438 }
3439
3440 /* if controller is soft- but not hard resettable... */
3441 if (!ctlr_is_hard_resettable(board_id))
3442 return -ENOTSUPP; /* try soft reset later. */
3443
3444 /* Save the PCI command register */
3445 pci_read_config_word(pdev, 4, &command_register);
3446 /* Turn the board off. This is so that later pci_restore_state()
3447 * won't turn the board on before the rest of config space is ready.
3448 */
3449 pci_disable_device(pdev);
3450 pci_save_state(pdev);
3451
3452 /* find the first memory BAR, so we can find the cfg table */
3453 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3454 if (rc)
3455 return rc;
3456 vaddr = remap_pci_mem(paddr, 0x250);
3457 if (!vaddr)
3458 return -ENOMEM;
3459
3460 /* find cfgtable in order to check if reset via doorbell is supported */
3461 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3462 &cfg_base_addr_index, &cfg_offset);
3463 if (rc)
3464 goto unmap_vaddr;
3465 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3466 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3467 if (!cfgtable) {
3468 rc = -ENOMEM;
3469 goto unmap_vaddr;
3470 }
3471 rc = write_driver_ver_to_cfgtable(cfgtable);
3472 if (rc)
3473 goto unmap_vaddr;
3474
3475 /* If reset via doorbell register is supported, use that.
3476 * There are two such methods. Favor the newest method.
3477 */
3478 misc_fw_support = readl(&cfgtable->misc_fw_support);
3479 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3480 if (use_doorbell) {
3481 use_doorbell = DOORBELL_CTLR_RESET2;
3482 } else {
3483 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3484 if (use_doorbell) {
3485 dev_warn(&pdev->dev, "Soft reset not supported. "
3486 "Firmware update is required.\n");
3487 rc = -ENOTSUPP; /* try soft reset */
3488 goto unmap_cfgtable;
3489 }
3490 }
3491
3492 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3493 if (rc)
3494 goto unmap_cfgtable;
3495
3496 pci_restore_state(pdev);
3497 rc = pci_enable_device(pdev);
3498 if (rc) {
3499 dev_warn(&pdev->dev, "failed to enable device.\n");
3500 goto unmap_cfgtable;
3501 }
3502 pci_write_config_word(pdev, 4, command_register);
3503
3504 /* Some devices (notably the HP Smart Array 5i Controller)
3505 need a little pause here */
3506 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3507
3508 /* Wait for board to become not ready, then ready. */
3509 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3510 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3511 if (rc) {
3512 dev_warn(&pdev->dev,
3513 "failed waiting for board to reset."
3514 " Will try soft reset.\n");
3515 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3516 goto unmap_cfgtable;
3517 }
3518 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3519 if (rc) {
3520 dev_warn(&pdev->dev,
3521 "failed waiting for board to become ready "
3522 "after hard reset\n");
3523 goto unmap_cfgtable;
3524 }
3525
3526 rc = controller_reset_failed(vaddr);
3527 if (rc < 0)
3528 goto unmap_cfgtable;
3529 if (rc) {
3530 dev_warn(&pdev->dev, "Unable to successfully reset "
3531 "controller. Will try soft reset.\n");
3532 rc = -ENOTSUPP;
3533 } else {
3534 dev_info(&pdev->dev, "board ready after hard reset.\n");
3535 }
3536
3537 unmap_cfgtable:
3538 iounmap(cfgtable);
3539
3540 unmap_vaddr:
3541 iounmap(vaddr);
3542 return rc;
3543 }
3544
3545 /*
3546 * We cannot read the structure directly, for portability we must use
3547 * the io functions.
3548 * This is for debug only.
3549 */
3550 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3551 {
3552 #ifdef HPSA_DEBUG
3553 int i;
3554 char temp_name[17];
3555
3556 dev_info(dev, "Controller Configuration information\n");
3557 dev_info(dev, "------------------------------------\n");
3558 for (i = 0; i < 4; i++)
3559 temp_name[i] = readb(&(tb->Signature[i]));
3560 temp_name[4] = '\0';
3561 dev_info(dev, " Signature = %s\n", temp_name);
3562 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3563 dev_info(dev, " Transport methods supported = 0x%x\n",
3564 readl(&(tb->TransportSupport)));
3565 dev_info(dev, " Transport methods active = 0x%x\n",
3566 readl(&(tb->TransportActive)));
3567 dev_info(dev, " Requested transport Method = 0x%x\n",
3568 readl(&(tb->HostWrite.TransportRequest)));
3569 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3570 readl(&(tb->HostWrite.CoalIntDelay)));
3571 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3572 readl(&(tb->HostWrite.CoalIntCount)));
3573 dev_info(dev, " Max outstanding commands = 0x%d\n",
3574 readl(&(tb->CmdsOutMax)));
3575 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3576 for (i = 0; i < 16; i++)
3577 temp_name[i] = readb(&(tb->ServerName[i]));
3578 temp_name[16] = '\0';
3579 dev_info(dev, " Server Name = %s\n", temp_name);
3580 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3581 readl(&(tb->HeartBeat)));
3582 #endif /* HPSA_DEBUG */
3583 }
3584
3585 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3586 {
3587 int i, offset, mem_type, bar_type;
3588
3589 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3590 return 0;
3591 offset = 0;
3592 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3593 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3594 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3595 offset += 4;
3596 else {
3597 mem_type = pci_resource_flags(pdev, i) &
3598 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3599 switch (mem_type) {
3600 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3601 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3602 offset += 4; /* 32 bit */
3603 break;
3604 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3605 offset += 8;
3606 break;
3607 default: /* reserved in PCI 2.2 */
3608 dev_warn(&pdev->dev,
3609 "base address is invalid\n");
3610 return -1;
3611 break;
3612 }
3613 }
3614 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3615 return i + 1;
3616 }
3617 return -1;
3618 }
3619
3620 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
3621 * controllers that are capable. If not, we use IO-APIC mode.
3622 */
3623
3624 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
3625 {
3626 #ifdef CONFIG_PCI_MSI
3627 int err;
3628 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3629 {0, 2}, {0, 3}
3630 };
3631
3632 /* Some boards advertise MSI but don't really support it */
3633 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3634 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
3635 goto default_int_mode;
3636 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3637 dev_info(&h->pdev->dev, "MSIX\n");
3638 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
3639 if (!err) {
3640 h->intr[0] = hpsa_msix_entries[0].vector;
3641 h->intr[1] = hpsa_msix_entries[1].vector;
3642 h->intr[2] = hpsa_msix_entries[2].vector;
3643 h->intr[3] = hpsa_msix_entries[3].vector;
3644 h->msix_vector = 1;
3645 return;
3646 }
3647 if (err > 0) {
3648 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
3649 "available\n", err);
3650 goto default_int_mode;
3651 } else {
3652 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
3653 err);
3654 goto default_int_mode;
3655 }
3656 }
3657 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3658 dev_info(&h->pdev->dev, "MSI\n");
3659 if (!pci_enable_msi(h->pdev))
3660 h->msi_vector = 1;
3661 else
3662 dev_warn(&h->pdev->dev, "MSI init failed\n");
3663 }
3664 default_int_mode:
3665 #endif /* CONFIG_PCI_MSI */
3666 /* if we get here we're going to use the default interrupt mode */
3667 h->intr[h->intr_mode] = h->pdev->irq;
3668 }
3669
3670 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3671 {
3672 int i;
3673 u32 subsystem_vendor_id, subsystem_device_id;
3674
3675 subsystem_vendor_id = pdev->subsystem_vendor;
3676 subsystem_device_id = pdev->subsystem_device;
3677 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3678 subsystem_vendor_id;
3679
3680 for (i = 0; i < ARRAY_SIZE(products); i++)
3681 if (*board_id == products[i].board_id)
3682 return i;
3683
3684 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3685 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3686 !hpsa_allow_any) {
3687 dev_warn(&pdev->dev, "unrecognized board ID: "
3688 "0x%08x, ignoring.\n", *board_id);
3689 return -ENODEV;
3690 }
3691 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3692 }
3693
3694 static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3695 {
3696 u16 command;
3697
3698 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3699 return ((command & PCI_COMMAND_MEMORY) == 0);
3700 }
3701
3702 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3703 unsigned long *memory_bar)
3704 {
3705 int i;
3706
3707 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3708 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3709 /* addressing mode bits already removed */
3710 *memory_bar = pci_resource_start(pdev, i);
3711 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3712 *memory_bar);
3713 return 0;
3714 }
3715 dev_warn(&pdev->dev, "no memory BAR found\n");
3716 return -ENODEV;
3717 }
3718
3719 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3720 void __iomem *vaddr, int wait_for_ready)
3721 {
3722 int i, iterations;
3723 u32 scratchpad;
3724 if (wait_for_ready)
3725 iterations = HPSA_BOARD_READY_ITERATIONS;
3726 else
3727 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
3728
3729 for (i = 0; i < iterations; i++) {
3730 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3731 if (wait_for_ready) {
3732 if (scratchpad == HPSA_FIRMWARE_READY)
3733 return 0;
3734 } else {
3735 if (scratchpad != HPSA_FIRMWARE_READY)
3736 return 0;
3737 }
3738 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3739 }
3740 dev_warn(&pdev->dev, "board not ready, timed out.\n");
3741 return -ENODEV;
3742 }
3743
3744 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3745 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3746 u64 *cfg_offset)
3747 {
3748 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3749 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3750 *cfg_base_addr &= (u32) 0x0000ffff;
3751 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3752 if (*cfg_base_addr_index == -1) {
3753 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3754 return -ENODEV;
3755 }
3756 return 0;
3757 }
3758
3759 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
3760 {
3761 u64 cfg_offset;
3762 u32 cfg_base_addr;
3763 u64 cfg_base_addr_index;
3764 u32 trans_offset;
3765 int rc;
3766
3767 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3768 &cfg_base_addr_index, &cfg_offset);
3769 if (rc)
3770 return rc;
3771 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
3772 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
3773 if (!h->cfgtable)
3774 return -ENOMEM;
3775 rc = write_driver_ver_to_cfgtable(h->cfgtable);
3776 if (rc)
3777 return rc;
3778 /* Find performant mode table. */
3779 trans_offset = readl(&h->cfgtable->TransMethodOffset);
3780 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3781 cfg_base_addr_index)+cfg_offset+trans_offset,
3782 sizeof(*h->transtable));
3783 if (!h->transtable)
3784 return -ENOMEM;
3785 return 0;
3786 }
3787
3788 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3789 {
3790 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
3791
3792 /* Limit commands in memory limited kdump scenario. */
3793 if (reset_devices && h->max_commands > 32)
3794 h->max_commands = 32;
3795
3796 if (h->max_commands < 16) {
3797 dev_warn(&h->pdev->dev, "Controller reports "
3798 "max supported commands of %d, an obvious lie. "
3799 "Using 16. Ensure that firmware is up to date.\n",
3800 h->max_commands);
3801 h->max_commands = 16;
3802 }
3803 }
3804
3805 /* Interrogate the hardware for some limits:
3806 * max commands, max SG elements without chaining, and with chaining,
3807 * SG chain block size, etc.
3808 */
3809 static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3810 {
3811 hpsa_get_max_perf_mode_cmds(h);
3812 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3813 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3814 /*
3815 * Limit in-command s/g elements to 32 save dma'able memory.
3816 * Howvever spec says if 0, use 31
3817 */
3818 h->max_cmd_sg_entries = 31;
3819 if (h->maxsgentries > 512) {
3820 h->max_cmd_sg_entries = 32;
3821 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3822 h->maxsgentries--; /* save one for chain pointer */
3823 } else {
3824 h->maxsgentries = 31; /* default to traditional values */
3825 h->chainsize = 0;
3826 }
3827 }
3828
3829 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3830 {
3831 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3832 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3833 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3834 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3835 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3836 return false;
3837 }
3838 return true;
3839 }
3840
3841 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
3842 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3843 {
3844 #ifdef CONFIG_X86
3845 u32 prefetch;
3846
3847 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3848 prefetch |= 0x100;
3849 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3850 #endif
3851 }
3852
3853 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3854 * in a prefetch beyond physical memory.
3855 */
3856 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3857 {
3858 u32 dma_prefetch;
3859
3860 if (h->board_id != 0x3225103C)
3861 return;
3862 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3863 dma_prefetch |= 0x8000;
3864 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3865 }
3866
3867 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
3868 {
3869 int i;
3870 u32 doorbell_value;
3871 unsigned long flags;
3872
3873 /* under certain very rare conditions, this can take awhile.
3874 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3875 * as we enter this code.)
3876 */
3877 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3878 spin_lock_irqsave(&h->lock, flags);
3879 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
3880 spin_unlock_irqrestore(&h->lock, flags);
3881 if (!(doorbell_value & CFGTBL_ChangeReq))
3882 break;
3883 /* delay and try again */
3884 usleep_range(10000, 20000);
3885 }
3886 }
3887
3888 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3889 {
3890 u32 trans_support;
3891
3892 trans_support = readl(&(h->cfgtable->TransportSupport));
3893 if (!(trans_support & SIMPLE_MODE))
3894 return -ENOTSUPP;
3895
3896 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3897 /* Update the field, and then ring the doorbell */
3898 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3899 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3900 hpsa_wait_for_mode_change_ack(h);
3901 print_cfg_table(&h->pdev->dev, h->cfgtable);
3902 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3903 dev_warn(&h->pdev->dev,
3904 "unable to get board into simple mode\n");
3905 return -ENODEV;
3906 }
3907 h->transMethod = CFGTBL_Trans_Simple;
3908 return 0;
3909 }
3910
3911 static int __devinit hpsa_pci_init(struct ctlr_info *h)
3912 {
3913 int prod_index, err;
3914
3915 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3916 if (prod_index < 0)
3917 return -ENODEV;
3918 h->product_name = products[prod_index].product_name;
3919 h->access = *(products[prod_index].access);
3920
3921 if (hpsa_board_disabled(h->pdev)) {
3922 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
3923 return -ENODEV;
3924 }
3925 err = pci_enable_device(h->pdev);
3926 if (err) {
3927 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
3928 return err;
3929 }
3930
3931 err = pci_request_regions(h->pdev, "hpsa");
3932 if (err) {
3933 dev_err(&h->pdev->dev,
3934 "cannot obtain PCI resources, aborting\n");
3935 return err;
3936 }
3937 hpsa_interrupt_mode(h);
3938 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3939 if (err)
3940 goto err_out_free_res;
3941 h->vaddr = remap_pci_mem(h->paddr, 0x250);
3942 if (!h->vaddr) {
3943 err = -ENOMEM;
3944 goto err_out_free_res;
3945 }
3946 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
3947 if (err)
3948 goto err_out_free_res;
3949 err = hpsa_find_cfgtables(h);
3950 if (err)
3951 goto err_out_free_res;
3952 hpsa_find_board_params(h);
3953
3954 if (!hpsa_CISS_signature_present(h)) {
3955 err = -ENODEV;
3956 goto err_out_free_res;
3957 }
3958 hpsa_enable_scsi_prefetch(h);
3959 hpsa_p600_dma_prefetch_quirk(h);
3960 err = hpsa_enter_simple_mode(h);
3961 if (err)
3962 goto err_out_free_res;
3963 return 0;
3964
3965 err_out_free_res:
3966 if (h->transtable)
3967 iounmap(h->transtable);
3968 if (h->cfgtable)
3969 iounmap(h->cfgtable);
3970 if (h->vaddr)
3971 iounmap(h->vaddr);
3972 /*
3973 * Deliberately omit pci_disable_device(): it does something nasty to
3974 * Smart Array controllers that pci_enable_device does not undo
3975 */
3976 pci_release_regions(h->pdev);
3977 return err;
3978 }
3979
3980 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3981 {
3982 int rc;
3983
3984 #define HBA_INQUIRY_BYTE_COUNT 64
3985 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3986 if (!h->hba_inquiry_data)
3987 return;
3988 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3989 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3990 if (rc != 0) {
3991 kfree(h->hba_inquiry_data);
3992 h->hba_inquiry_data = NULL;
3993 }
3994 }
3995
3996 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3997 {
3998 int rc, i;
3999
4000 if (!reset_devices)
4001 return 0;
4002
4003 /* Reset the controller with a PCI power-cycle or via doorbell */
4004 rc = hpsa_kdump_hard_reset_controller(pdev);
4005
4006 /* -ENOTSUPP here means we cannot reset the controller
4007 * but it's already (and still) up and running in
4008 * "performant mode". Or, it might be 640x, which can't reset
4009 * due to concerns about shared bbwc between 6402/6404 pair.
4010 */
4011 if (rc == -ENOTSUPP)
4012 return rc; /* just try to do the kdump anyhow. */
4013 if (rc)
4014 return -ENODEV;
4015
4016 /* Now try to get the controller to respond to a no-op */
4017 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4018 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4019 if (hpsa_noop(pdev) == 0)
4020 break;
4021 else
4022 dev_warn(&pdev->dev, "no-op failed%s\n",
4023 (i < 11 ? "; re-trying" : ""));
4024 }
4025 return 0;
4026 }
4027
4028 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4029 {
4030 h->cmd_pool_bits = kzalloc(
4031 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4032 sizeof(unsigned long), GFP_KERNEL);
4033 h->cmd_pool = pci_alloc_consistent(h->pdev,
4034 h->nr_cmds * sizeof(*h->cmd_pool),
4035 &(h->cmd_pool_dhandle));
4036 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4037 h->nr_cmds * sizeof(*h->errinfo_pool),
4038 &(h->errinfo_pool_dhandle));
4039 if ((h->cmd_pool_bits == NULL)
4040 || (h->cmd_pool == NULL)
4041 || (h->errinfo_pool == NULL)) {
4042 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4043 return -ENOMEM;
4044 }
4045 return 0;
4046 }
4047
4048 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4049 {
4050 kfree(h->cmd_pool_bits);
4051 if (h->cmd_pool)
4052 pci_free_consistent(h->pdev,
4053 h->nr_cmds * sizeof(struct CommandList),
4054 h->cmd_pool, h->cmd_pool_dhandle);
4055 if (h->errinfo_pool)
4056 pci_free_consistent(h->pdev,
4057 h->nr_cmds * sizeof(struct ErrorInfo),
4058 h->errinfo_pool,
4059 h->errinfo_pool_dhandle);
4060 }
4061
4062 static int hpsa_request_irq(struct ctlr_info *h,
4063 irqreturn_t (*msixhandler)(int, void *),
4064 irqreturn_t (*intxhandler)(int, void *))
4065 {
4066 int rc;
4067
4068 if (h->msix_vector || h->msi_vector)
4069 rc = request_irq(h->intr[h->intr_mode], msixhandler,
4070 IRQF_DISABLED, h->devname, h);
4071 else
4072 rc = request_irq(h->intr[h->intr_mode], intxhandler,
4073 IRQF_DISABLED, h->devname, h);
4074 if (rc) {
4075 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4076 h->intr[h->intr_mode], h->devname);
4077 return -ENODEV;
4078 }
4079 return 0;
4080 }
4081
4082 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4083 {
4084 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4085 HPSA_RESET_TYPE_CONTROLLER)) {
4086 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4087 return -EIO;
4088 }
4089
4090 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4091 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4092 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4093 return -1;
4094 }
4095
4096 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4097 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4098 dev_warn(&h->pdev->dev, "Board failed to become ready "
4099 "after soft reset.\n");
4100 return -1;
4101 }
4102
4103 return 0;
4104 }
4105
4106 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4107 {
4108 free_irq(h->intr[h->intr_mode], h);
4109 #ifdef CONFIG_PCI_MSI
4110 if (h->msix_vector)
4111 pci_disable_msix(h->pdev);
4112 else if (h->msi_vector)
4113 pci_disable_msi(h->pdev);
4114 #endif /* CONFIG_PCI_MSI */
4115 hpsa_free_sg_chain_blocks(h);
4116 hpsa_free_cmd_pool(h);
4117 kfree(h->blockFetchTable);
4118 pci_free_consistent(h->pdev, h->reply_pool_size,
4119 h->reply_pool, h->reply_pool_dhandle);
4120 if (h->vaddr)
4121 iounmap(h->vaddr);
4122 if (h->transtable)
4123 iounmap(h->transtable);
4124 if (h->cfgtable)
4125 iounmap(h->cfgtable);
4126 pci_release_regions(h->pdev);
4127 kfree(h);
4128 }
4129
4130 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4131 {
4132 assert_spin_locked(&lockup_detector_lock);
4133 if (!hpsa_lockup_detector)
4134 return;
4135 if (h->lockup_detected)
4136 return; /* already stopped the lockup detector */
4137 list_del(&h->lockup_list);
4138 }
4139
4140 /* Called when controller lockup detected. */
4141 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4142 {
4143 struct CommandList *c = NULL;
4144
4145 assert_spin_locked(&h->lock);
4146 /* Mark all outstanding commands as failed and complete them. */
4147 while (!list_empty(list)) {
4148 c = list_entry(list->next, struct CommandList, list);
4149 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4150 finish_cmd(c, c->Header.Tag.lower);
4151 }
4152 }
4153
4154 static void controller_lockup_detected(struct ctlr_info *h)
4155 {
4156 unsigned long flags;
4157
4158 assert_spin_locked(&lockup_detector_lock);
4159 remove_ctlr_from_lockup_detector_list(h);
4160 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4161 spin_lock_irqsave(&h->lock, flags);
4162 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4163 spin_unlock_irqrestore(&h->lock, flags);
4164 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4165 h->lockup_detected);
4166 pci_disable_device(h->pdev);
4167 spin_lock_irqsave(&h->lock, flags);
4168 fail_all_cmds_on_list(h, &h->cmpQ);
4169 fail_all_cmds_on_list(h, &h->reqQ);
4170 spin_unlock_irqrestore(&h->lock, flags);
4171 }
4172
4173 #define HEARTBEAT_SAMPLE_INTERVAL (10 * HZ)
4174 #define HEARTBEAT_CHECK_MINIMUM_INTERVAL (HEARTBEAT_SAMPLE_INTERVAL / 2)
4175
4176 static void detect_controller_lockup(struct ctlr_info *h)
4177 {
4178 u64 now;
4179 u32 heartbeat;
4180 unsigned long flags;
4181
4182 assert_spin_locked(&lockup_detector_lock);
4183 now = get_jiffies_64();
4184 /* If we've received an interrupt recently, we're ok. */
4185 if (time_after64(h->last_intr_timestamp +
4186 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4187 return;
4188
4189 /*
4190 * If we've already checked the heartbeat recently, we're ok.
4191 * This could happen if someone sends us a signal. We
4192 * otherwise don't care about signals in this thread.
4193 */
4194 if (time_after64(h->last_heartbeat_timestamp +
4195 (HEARTBEAT_CHECK_MINIMUM_INTERVAL), now))
4196 return;
4197
4198 /* If heartbeat has not changed since we last looked, we're not ok. */
4199 spin_lock_irqsave(&h->lock, flags);
4200 heartbeat = readl(&h->cfgtable->HeartBeat);
4201 spin_unlock_irqrestore(&h->lock, flags);
4202 if (h->last_heartbeat == heartbeat) {
4203 controller_lockup_detected(h);
4204 return;
4205 }
4206
4207 /* We're ok. */
4208 h->last_heartbeat = heartbeat;
4209 h->last_heartbeat_timestamp = now;
4210 }
4211
4212 static int detect_controller_lockup_thread(void *notused)
4213 {
4214 struct ctlr_info *h;
4215 unsigned long flags;
4216
4217 while (1) {
4218 struct list_head *this, *tmp;
4219
4220 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4221 if (kthread_should_stop())
4222 break;
4223 spin_lock_irqsave(&lockup_detector_lock, flags);
4224 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4225 h = list_entry(this, struct ctlr_info, lockup_list);
4226 detect_controller_lockup(h);
4227 }
4228 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4229 }
4230 return 0;
4231 }
4232
4233 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4234 {
4235 unsigned long flags;
4236
4237 spin_lock_irqsave(&lockup_detector_lock, flags);
4238 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4239 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4240 }
4241
4242 static void start_controller_lockup_detector(struct ctlr_info *h)
4243 {
4244 /* Start the lockup detector thread if not already started */
4245 if (!hpsa_lockup_detector) {
4246 spin_lock_init(&lockup_detector_lock);
4247 hpsa_lockup_detector =
4248 kthread_run(detect_controller_lockup_thread,
4249 NULL, "hpsa");
4250 }
4251 if (!hpsa_lockup_detector) {
4252 dev_warn(&h->pdev->dev,
4253 "Could not start lockup detector thread\n");
4254 return;
4255 }
4256 add_ctlr_to_lockup_detector_list(h);
4257 }
4258
4259 static void stop_controller_lockup_detector(struct ctlr_info *h)
4260 {
4261 unsigned long flags;
4262
4263 spin_lock_irqsave(&lockup_detector_lock, flags);
4264 remove_ctlr_from_lockup_detector_list(h);
4265 /* If the list of ctlr's to monitor is empty, stop the thread */
4266 if (list_empty(&hpsa_ctlr_list)) {
4267 kthread_stop(hpsa_lockup_detector);
4268 hpsa_lockup_detector = NULL;
4269 }
4270 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4271 }
4272
4273 static int __devinit hpsa_init_one(struct pci_dev *pdev,
4274 const struct pci_device_id *ent)
4275 {
4276 int dac, rc;
4277 struct ctlr_info *h;
4278 int try_soft_reset = 0;
4279 unsigned long flags;
4280
4281 if (number_of_controllers == 0)
4282 printk(KERN_INFO DRIVER_NAME "\n");
4283
4284 rc = hpsa_init_reset_devices(pdev);
4285 if (rc) {
4286 if (rc != -ENOTSUPP)
4287 return rc;
4288 /* If the reset fails in a particular way (it has no way to do
4289 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4290 * a soft reset once we get the controller configured up to the
4291 * point that it can accept a command.
4292 */
4293 try_soft_reset = 1;
4294 rc = 0;
4295 }
4296
4297 reinit_after_soft_reset:
4298
4299 /* Command structures must be aligned on a 32-byte boundary because
4300 * the 5 lower bits of the address are used by the hardware. and by
4301 * the driver. See comments in hpsa.h for more info.
4302 */
4303 #define COMMANDLIST_ALIGNMENT 32
4304 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4305 h = kzalloc(sizeof(*h), GFP_KERNEL);
4306 if (!h)
4307 return -ENOMEM;
4308
4309 h->pdev = pdev;
4310 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4311 INIT_LIST_HEAD(&h->cmpQ);
4312 INIT_LIST_HEAD(&h->reqQ);
4313 spin_lock_init(&h->lock);
4314 spin_lock_init(&h->scan_lock);
4315 rc = hpsa_pci_init(h);
4316 if (rc != 0)
4317 goto clean1;
4318
4319 sprintf(h->devname, "hpsa%d", number_of_controllers);
4320 h->ctlr = number_of_controllers;
4321 number_of_controllers++;
4322
4323 /* configure PCI DMA stuff */
4324 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4325 if (rc == 0) {
4326 dac = 1;
4327 } else {
4328 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4329 if (rc == 0) {
4330 dac = 0;
4331 } else {
4332 dev_err(&pdev->dev, "no suitable DMA available\n");
4333 goto clean1;
4334 }
4335 }
4336
4337 /* make sure the board interrupts are off */
4338 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4339
4340 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4341 goto clean2;
4342 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4343 h->devname, pdev->device,
4344 h->intr[h->intr_mode], dac ? "" : " not");
4345 if (hpsa_allocate_cmd_pool(h))
4346 goto clean4;
4347 if (hpsa_allocate_sg_chain_blocks(h))
4348 goto clean4;
4349 init_waitqueue_head(&h->scan_wait_queue);
4350 h->scan_finished = 1; /* no scan currently in progress */
4351
4352 pci_set_drvdata(pdev, h);
4353 h->ndevices = 0;
4354 h->scsi_host = NULL;
4355 spin_lock_init(&h->devlock);
4356 hpsa_put_ctlr_into_performant_mode(h);
4357
4358 /* At this point, the controller is ready to take commands.
4359 * Now, if reset_devices and the hard reset didn't work, try
4360 * the soft reset and see if that works.
4361 */
4362 if (try_soft_reset) {
4363
4364 /* This is kind of gross. We may or may not get a completion
4365 * from the soft reset command, and if we do, then the value
4366 * from the fifo may or may not be valid. So, we wait 10 secs
4367 * after the reset throwing away any completions we get during
4368 * that time. Unregister the interrupt handler and register
4369 * fake ones to scoop up any residual completions.
4370 */
4371 spin_lock_irqsave(&h->lock, flags);
4372 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4373 spin_unlock_irqrestore(&h->lock, flags);
4374 free_irq(h->intr[h->intr_mode], h);
4375 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4376 hpsa_intx_discard_completions);
4377 if (rc) {
4378 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4379 "soft reset.\n");
4380 goto clean4;
4381 }
4382
4383 rc = hpsa_kdump_soft_reset(h);
4384 if (rc)
4385 /* Neither hard nor soft reset worked, we're hosed. */
4386 goto clean4;
4387
4388 dev_info(&h->pdev->dev, "Board READY.\n");
4389 dev_info(&h->pdev->dev,
4390 "Waiting for stale completions to drain.\n");
4391 h->access.set_intr_mask(h, HPSA_INTR_ON);
4392 msleep(10000);
4393 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4394
4395 rc = controller_reset_failed(h->cfgtable);
4396 if (rc)
4397 dev_info(&h->pdev->dev,
4398 "Soft reset appears to have failed.\n");
4399
4400 /* since the controller's reset, we have to go back and re-init
4401 * everything. Easiest to just forget what we've done and do it
4402 * all over again.
4403 */
4404 hpsa_undo_allocations_after_kdump_soft_reset(h);
4405 try_soft_reset = 0;
4406 if (rc)
4407 /* don't go to clean4, we already unallocated */
4408 return -ENODEV;
4409
4410 goto reinit_after_soft_reset;
4411 }
4412
4413 /* Turn the interrupts on so we can service requests */
4414 h->access.set_intr_mask(h, HPSA_INTR_ON);
4415
4416 hpsa_hba_inquiry(h);
4417 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4418 start_controller_lockup_detector(h);
4419 return 1;
4420
4421 clean4:
4422 hpsa_free_sg_chain_blocks(h);
4423 hpsa_free_cmd_pool(h);
4424 free_irq(h->intr[h->intr_mode], h);
4425 clean2:
4426 clean1:
4427 kfree(h);
4428 return rc;
4429 }
4430
4431 static void hpsa_flush_cache(struct ctlr_info *h)
4432 {
4433 char *flush_buf;
4434 struct CommandList *c;
4435
4436 flush_buf = kzalloc(4, GFP_KERNEL);
4437 if (!flush_buf)
4438 return;
4439
4440 c = cmd_special_alloc(h);
4441 if (!c) {
4442 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4443 goto out_of_memory;
4444 }
4445 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4446 RAID_CTLR_LUNID, TYPE_CMD);
4447 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4448 if (c->err_info->CommandStatus != 0)
4449 dev_warn(&h->pdev->dev,
4450 "error flushing cache on controller\n");
4451 cmd_special_free(h, c);
4452 out_of_memory:
4453 kfree(flush_buf);
4454 }
4455
4456 static void hpsa_shutdown(struct pci_dev *pdev)
4457 {
4458 struct ctlr_info *h;
4459
4460 h = pci_get_drvdata(pdev);
4461 /* Turn board interrupts off and send the flush cache command
4462 * sendcmd will turn off interrupt, and send the flush...
4463 * To write all data in the battery backed cache to disks
4464 */
4465 hpsa_flush_cache(h);
4466 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4467 free_irq(h->intr[h->intr_mode], h);
4468 #ifdef CONFIG_PCI_MSI
4469 if (h->msix_vector)
4470 pci_disable_msix(h->pdev);
4471 else if (h->msi_vector)
4472 pci_disable_msi(h->pdev);
4473 #endif /* CONFIG_PCI_MSI */
4474 }
4475
4476 static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4477 {
4478 struct ctlr_info *h;
4479
4480 if (pci_get_drvdata(pdev) == NULL) {
4481 dev_err(&pdev->dev, "unable to remove device\n");
4482 return;
4483 }
4484 h = pci_get_drvdata(pdev);
4485 stop_controller_lockup_detector(h);
4486 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4487 hpsa_shutdown(pdev);
4488 iounmap(h->vaddr);
4489 iounmap(h->transtable);
4490 iounmap(h->cfgtable);
4491 hpsa_free_sg_chain_blocks(h);
4492 pci_free_consistent(h->pdev,
4493 h->nr_cmds * sizeof(struct CommandList),
4494 h->cmd_pool, h->cmd_pool_dhandle);
4495 pci_free_consistent(h->pdev,
4496 h->nr_cmds * sizeof(struct ErrorInfo),
4497 h->errinfo_pool, h->errinfo_pool_dhandle);
4498 pci_free_consistent(h->pdev, h->reply_pool_size,
4499 h->reply_pool, h->reply_pool_dhandle);
4500 kfree(h->cmd_pool_bits);
4501 kfree(h->blockFetchTable);
4502 kfree(h->hba_inquiry_data);
4503 /*
4504 * Deliberately omit pci_disable_device(): it does something nasty to
4505 * Smart Array controllers that pci_enable_device does not undo
4506 */
4507 pci_release_regions(pdev);
4508 pci_set_drvdata(pdev, NULL);
4509 kfree(h);
4510 }
4511
4512 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4513 __attribute__((unused)) pm_message_t state)
4514 {
4515 return -ENOSYS;
4516 }
4517
4518 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4519 {
4520 return -ENOSYS;
4521 }
4522
4523 static struct pci_driver hpsa_pci_driver = {
4524 .name = "hpsa",
4525 .probe = hpsa_init_one,
4526 .remove = __devexit_p(hpsa_remove_one),
4527 .id_table = hpsa_pci_device_id, /* id_table */
4528 .shutdown = hpsa_shutdown,
4529 .suspend = hpsa_suspend,
4530 .resume = hpsa_resume,
4531 };
4532
4533 /* Fill in bucket_map[], given nsgs (the max number of
4534 * scatter gather elements supported) and bucket[],
4535 * which is an array of 8 integers. The bucket[] array
4536 * contains 8 different DMA transfer sizes (in 16
4537 * byte increments) which the controller uses to fetch
4538 * commands. This function fills in bucket_map[], which
4539 * maps a given number of scatter gather elements to one of
4540 * the 8 DMA transfer sizes. The point of it is to allow the
4541 * controller to only do as much DMA as needed to fetch the
4542 * command, with the DMA transfer size encoded in the lower
4543 * bits of the command address.
4544 */
4545 static void calc_bucket_map(int bucket[], int num_buckets,
4546 int nsgs, int *bucket_map)
4547 {
4548 int i, j, b, size;
4549
4550 /* even a command with 0 SGs requires 4 blocks */
4551 #define MINIMUM_TRANSFER_BLOCKS 4
4552 #define NUM_BUCKETS 8
4553 /* Note, bucket_map must have nsgs+1 entries. */
4554 for (i = 0; i <= nsgs; i++) {
4555 /* Compute size of a command with i SG entries */
4556 size = i + MINIMUM_TRANSFER_BLOCKS;
4557 b = num_buckets; /* Assume the biggest bucket */
4558 /* Find the bucket that is just big enough */
4559 for (j = 0; j < 8; j++) {
4560 if (bucket[j] >= size) {
4561 b = j;
4562 break;
4563 }
4564 }
4565 /* for a command with i SG entries, use bucket b. */
4566 bucket_map[i] = b;
4567 }
4568 }
4569
4570 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4571 u32 use_short_tags)
4572 {
4573 int i;
4574 unsigned long register_value;
4575
4576 /* This is a bit complicated. There are 8 registers on
4577 * the controller which we write to to tell it 8 different
4578 * sizes of commands which there may be. It's a way of
4579 * reducing the DMA done to fetch each command. Encoded into
4580 * each command's tag are 3 bits which communicate to the controller
4581 * which of the eight sizes that command fits within. The size of
4582 * each command depends on how many scatter gather entries there are.
4583 * Each SG entry requires 16 bytes. The eight registers are programmed
4584 * with the number of 16-byte blocks a command of that size requires.
4585 * The smallest command possible requires 5 such 16 byte blocks.
4586 * the largest command possible requires MAXSGENTRIES + 4 16-byte
4587 * blocks. Note, this only extends to the SG entries contained
4588 * within the command block, and does not extend to chained blocks
4589 * of SG elements. bft[] contains the eight values we write to
4590 * the registers. They are not evenly distributed, but have more
4591 * sizes for small commands, and fewer sizes for larger commands.
4592 */
4593 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
4594 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
4595 /* 5 = 1 s/g entry or 4k
4596 * 6 = 2 s/g entry or 8k
4597 * 8 = 4 s/g entry or 16k
4598 * 10 = 6 s/g entry or 24k
4599 */
4600
4601 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4602
4603 /* Controller spec: zero out this buffer. */
4604 memset(h->reply_pool, 0, h->reply_pool_size);
4605 h->reply_pool_head = h->reply_pool;
4606
4607 bft[7] = h->max_sg_entries + 4;
4608 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4609 for (i = 0; i < 8; i++)
4610 writel(bft[i], &h->transtable->BlockFetch[i]);
4611
4612 /* size of controller ring buffer */
4613 writel(h->max_commands, &h->transtable->RepQSize);
4614 writel(1, &h->transtable->RepQCount);
4615 writel(0, &h->transtable->RepQCtrAddrLow32);
4616 writel(0, &h->transtable->RepQCtrAddrHigh32);
4617 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4618 writel(0, &h->transtable->RepQAddr0High32);
4619 writel(CFGTBL_Trans_Performant | use_short_tags,
4620 &(h->cfgtable->HostWrite.TransportRequest));
4621 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4622 hpsa_wait_for_mode_change_ack(h);
4623 register_value = readl(&(h->cfgtable->TransportActive));
4624 if (!(register_value & CFGTBL_Trans_Performant)) {
4625 dev_warn(&h->pdev->dev, "unable to get board into"
4626 " performant mode\n");
4627 return;
4628 }
4629 /* Change the access methods to the performant access methods */
4630 h->access = SA5_performant_access;
4631 h->transMethod = CFGTBL_Trans_Performant;
4632 }
4633
4634 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4635 {
4636 u32 trans_support;
4637
4638 if (hpsa_simple_mode)
4639 return;
4640
4641 trans_support = readl(&(h->cfgtable->TransportSupport));
4642 if (!(trans_support & PERFORMANT_MODE))
4643 return;
4644
4645 hpsa_get_max_perf_mode_cmds(h);
4646 h->max_sg_entries = 32;
4647 /* Performant mode ring buffer and supporting data structures */
4648 h->reply_pool_size = h->max_commands * sizeof(u64);
4649 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4650 &(h->reply_pool_dhandle));
4651
4652 /* Need a block fetch table for performant mode */
4653 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4654 sizeof(u32)), GFP_KERNEL);
4655
4656 if ((h->reply_pool == NULL)
4657 || (h->blockFetchTable == NULL))
4658 goto clean_up;
4659
4660 hpsa_enter_performant_mode(h,
4661 trans_support & CFGTBL_Trans_use_short_tags);
4662
4663 return;
4664
4665 clean_up:
4666 if (h->reply_pool)
4667 pci_free_consistent(h->pdev, h->reply_pool_size,
4668 h->reply_pool, h->reply_pool_dhandle);
4669 kfree(h->blockFetchTable);
4670 }
4671
4672 /*
4673 * This is it. Register the PCI driver information for the cards we control
4674 * the OS will call our registered routines when it finds one of our cards.
4675 */
4676 static int __init hpsa_init(void)
4677 {
4678 return pci_register_driver(&hpsa_pci_driver);
4679 }
4680
4681 static void __exit hpsa_cleanup(void)
4682 {
4683 pci_unregister_driver(&hpsa_pci_driver);
4684 }
4685
4686 module_init(hpsa_init);
4687 module_exit(hpsa_cleanup);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree