3 * BRIEF MODULE DESCRIPTION
4 * IT8172 IDE controller support
6 * Copyright (C) 2000 MontaVista Software Inc.
7 * Copyright (C) 2008 Shane McDonald
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/ioport.h>
34 #include <linux/pci.h>
35 #include <linux/ide.h>
36 #include <linux/init.h>
38 #define DRV_NAME "IT8172"
40 static void it8172_set_pio_mode(ide_hwif_t
*hwif
, ide_drive_t
*drive
)
42 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
45 const u8 pio
= drive
->pio_mode
- XFER_PIO_0
;
48 * The highest value of DIOR/DIOW pulse width and recovery time
49 * that can be set in the IT8172 is 8 PCI clock cycles. As a result,
50 * it cannot be configured for PIO mode 0. This table sets these
51 * parameters to the maximum supported by the IT8172.
53 static const u8 timings
[] = { 0x3f, 0x3c, 0x1b, 0x12, 0x0a };
55 pci_read_config_word(dev
, 0x40, &drive_enables
);
56 pci_read_config_dword(dev
, 0x44, &drive_timing
);
59 * Enable port 0x44. The IT8172 spec is confused; it calls
60 * this register the "Slave IDE Timing Register", but in fact,
61 * it controls timing for both master and slave drives.
63 drive_enables
|= 0x4000;
65 drive_enables
&= drive
->dn
? 0xc006 : 0xc060;
66 if (drive
->media
== ide_disk
)
68 drive_enables
|= 0x0004 << (drive
->dn
* 4);
69 if (ide_pio_need_iordy(drive
, pio
))
70 /* enable IORDY sample-point */
71 drive_enables
|= 0x0002 << (drive
->dn
* 4);
73 drive_timing
&= drive
->dn
? 0x00003f00 : 0x000fc000;
74 drive_timing
|= timings
[pio
] << (drive
->dn
* 6 + 8);
76 pci_write_config_word(dev
, 0x40, drive_enables
);
77 pci_write_config_dword(dev
, 0x44, drive_timing
);
80 static void it8172_set_dma_mode(ide_hwif_t
*hwif
, ide_drive_t
*drive
)
82 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
83 int a_speed
= 3 << (drive
->dn
* 4);
84 int u_flag
= 1 << drive
->dn
;
87 const u8 speed
= drive
->dma_mode
;
89 pci_read_config_byte(dev
, 0x48, ®48
);
90 pci_read_config_byte(dev
, 0x4a, ®4a
);
92 if (speed
>= XFER_UDMA_0
) {
93 u8 udma
= speed
- XFER_UDMA_0
;
94 u_speed
= udma
<< (drive
->dn
* 4);
96 pci_write_config_byte(dev
, 0x48, reg48
| u_flag
);
98 pci_write_config_byte(dev
, 0x4a, reg4a
| u_speed
);
100 const u8 mwdma_to_pio
[] = { 0, 3, 4 };
102 pci_write_config_byte(dev
, 0x48, reg48
& ~u_flag
);
103 pci_write_config_byte(dev
, 0x4a, reg4a
& ~a_speed
);
106 mwdma_to_pio
[speed
- XFER_MW_DMA_0
] + XFER_PIO_0
;
108 it8172_set_pio_mode(hwif
, drive
);
113 static const struct ide_port_ops it8172_port_ops
= {
114 .set_pio_mode
= it8172_set_pio_mode
,
115 .set_dma_mode
= it8172_set_dma_mode
,
118 static const struct ide_port_info it8172_port_info __devinitdata
= {
120 .port_ops
= &it8172_port_ops
,
121 .enablebits
= { {0x41, 0x80, 0x80}, {0x00, 0x00, 0x00} },
122 .host_flags
= IDE_HFLAG_SINGLE
,
123 .pio_mask
= ATA_PIO4
& ~ATA_PIO0
,
124 .mwdma_mask
= ATA_MWDMA2
,
125 .udma_mask
= ATA_UDMA2
,
128 static int __devinit
it8172_init_one(struct pci_dev
*dev
,
129 const struct pci_device_id
*id
)
131 if ((dev
->class >> 8) != PCI_CLASS_STORAGE_IDE
)
132 return -ENODEV
; /* IT8172 is more than an IDE controller */
133 return ide_pci_init_one(dev
, &it8172_port_info
, NULL
);
136 static struct pci_device_id it8172_pci_tbl
[] = {
137 { PCI_VDEVICE(ITE
, PCI_DEVICE_ID_ITE_8172
), 0 },
140 MODULE_DEVICE_TABLE(pci
, it8172_pci_tbl
);
142 static struct pci_driver it8172_pci_driver
= {
143 .name
= "IT8172_IDE",
144 .id_table
= it8172_pci_tbl
,
145 .probe
= it8172_init_one
,
146 .remove
= ide_pci_remove
,
147 .suspend
= ide_pci_suspend
,
148 .resume
= ide_pci_resume
,
151 static int __init
it8172_ide_init(void)
153 return ide_pci_register_driver(&it8172_pci_driver
);
156 static void __exit
it8172_ide_exit(void)
158 pci_unregister_driver(&it8172_pci_driver
);
161 module_init(it8172_ide_init
);
162 module_exit(it8172_ide_exit
);
164 MODULE_AUTHOR("Steve Longerbeam");
165 MODULE_DESCRIPTION("PCI driver module for ITE 8172 IDE");
166 MODULE_LICENSE("GPL");