drivers/ide/ide-dma.c

   1 /*
   2  *  linux/drivers/ide/ide-dma.c         Version 4.10    June 9, 2000
   3  *
   4  *  Copyright (c) 1999-2000     Andre Hedrick <andre@linux-ide.org>
   5  *  May be copied or modified under the terms of the GNU General Public License
   6  */
   7
   8 /*
   9  *  Special Thanks to Mark for his Six years of work.
  10  *
  11  *  Copyright (c) 1995-1998  Mark Lord
  12  *  May be copied or modified under the terms of the GNU General Public License
  13  */
  14
  15 /*
  16  * This module provides support for the bus-master IDE DMA functions
  17  * of various PCI chipsets, including the Intel PIIX (i82371FB for
  18  * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
  19  * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
  20  * ("PIIX" stands for "PCI ISA IDE Xcellerator").
  21  *
  22  * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
  23  *
  24  * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  25  *
  26  * By default, DMA support is prepared for use, but is currently enabled only
  27  * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
  28  * or which are recognized as "good" (see table below).  Drives with only mode0
  29  * or mode1 (multi/single) DMA should also work with this chipset/driver
  30  * (eg. MC2112A) but are not enabled by default.
  31  *
  32  * Use "hdparm -i" to view modes supported by a given drive.
  33  *
  34  * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
  35  * DMA support, but must be (re-)compiled against this kernel version or later.
  36  *
  37  * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
  38  * If problems arise, ide.c will disable DMA operation after a few retries.
  39  * This error recovery mechanism works and has been extremely well exercised.
  40  *
  41  * IDE drives, depending on their vintage, may support several different modes
  42  * of DMA operation.  The boot-time modes are indicated with a "*" in
  43  * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
  44  * the "hdparm -X" feature.  There is seldom a need to do this, as drives
  45  * normally power-up with their "best" PIO/DMA modes enabled.
  46  *
  47  * Testing has been done with a rather extensive number of drives,
  48  * with Quantum & Western Digital models generally outperforming the pack,
  49  * and Fujitsu & Conner (and some Seagate which are really Conner) drives
  50  * showing more lackluster throughput.
  51  *
  52  * Keep an eye on /var/adm/messages for "DMA disabled" messages.
  53  *
  54  * Some people have reported trouble with Intel Zappa motherboards.
  55  * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
  56  * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
  57  * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
  58  *
  59  * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  60  * fixing the problem with the BIOS on some Acer motherboards.
  61  *
  62  * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  63  * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  64  *
  65  * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  66  * at generic DMA -- his patches were referred to when preparing this code.
  67  *
  68  * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  69  * for supplying a Promise UDMA board & WD UDMA drive for this work!
  70  *
  71  * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
  72  *
  73  * ATA-66/100 and recovery functions, I forgot the rest......
  74  *
  75  */
  76
  77 #include <linux/module.h>
  78 #include <linux/types.h>
  79 #include <linux/kernel.h>
  80 #include <linux/timer.h>
  81 #include <linux/mm.h>
  82 #include <linux/interrupt.h>
  83 #include <linux/pci.h>
  84 #include <linux/init.h>
  85 #include <linux/ide.h>
  86 #include <linux/delay.h>
  87 #include <linux/scatterlist.h>
  88
  89 #include <asm/io.h>
  90 #include <asm/irq.h>
  91
  92 static const struct drive_list_entry drive_whitelist [] = {
  93
  94         { "Micropolis 2112A"    ,       NULL            },
  95         { "CONNER CTMA 4000"    ,       NULL            },
  96         { "CONNER CTT8000-A"    ,       NULL            },
  97         { "ST34342A"            ,       NULL            },
  98         { NULL                  ,       NULL            }
  99 };
 100
 101 static const struct drive_list_entry drive_blacklist [] = {
 102
 103         { "WDC AC11000H"        ,       NULL            },
 104         { "WDC AC22100H"        ,       NULL            },
 105         { "WDC AC32500H"        ,       NULL            },
 106         { "WDC AC33100H"        ,       NULL            },
 107         { "WDC AC31600H"        ,       NULL            },
 108         { "WDC AC32100H"        ,       "24.09P07"      },
 109         { "WDC AC23200L"        ,       "21.10N21"      },
 110         { "Compaq CRD-8241B"    ,       NULL            },
 111         { "CRD-8400B"           ,       NULL            },
 112         { "CRD-8480B",                  NULL            },
 113         { "CRD-8482B",                  NULL            },
 114         { "CRD-84"              ,       NULL            },
 115         { "SanDisk SDP3B"       ,       NULL            },
 116         { "SanDisk SDP3B-64"    ,       NULL            },
 117         { "SANYO CD-ROM CRD"    ,       NULL            },
 118         { "HITACHI CDR-8"       ,       NULL            },
 119         { "HITACHI CDR-8335"    ,       NULL            },
 120         { "HITACHI CDR-8435"    ,       NULL            },
 121         { "Toshiba CD-ROM XM-6202B"     ,       NULL            },
 122         { "TOSHIBA CD-ROM XM-1702BC",   NULL            },
 123         { "CD-532E-A"           ,       NULL            },
 124         { "E-IDE CD-ROM CR-840",        NULL            },
 125         { "CD-ROM Drive/F5A",   NULL            },
 126         { "WPI CDD-820",                NULL            },
 127         { "SAMSUNG CD-ROM SC-148C",     NULL            },
 128         { "SAMSUNG CD-ROM SC",  NULL            },
 129         { "ATAPI CD-ROM DRIVE 40X MAXIMUM",     NULL            },
 130         { "_NEC DV5800A",               NULL            },
 131         { "SAMSUNG CD-ROM SN-124",      "N001" },
 132         { "Seagate STT20000A",          NULL  },
 133         { NULL                  ,       NULL            }
 134
 135 };
 136
 137 /**
 138  *      ide_dma_intr    -       IDE DMA interrupt handler
 139  *      @drive: the drive the interrupt is for
 140  *
 141  *      Handle an interrupt completing a read/write DMA transfer on an
 142  *      IDE device
 143  */
 144
 145 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
 146 {
 147         u8 stat = 0, dma_stat = 0;
 148
 149         dma_stat = HWIF(drive)->ide_dma_end(drive);
 150         stat = HWIF(drive)->INB(IDE_STATUS_REG);        /* get drive status */
 151         if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
 152                 if (!dma_stat) {
 153                         struct request *rq = HWGROUP(drive)->rq;
 154
 155                         if (rq->rq_disk) {
 156                                 ide_driver_t *drv;
 157
 158                                 drv = *(ide_driver_t **)rq->rq_disk->private_data;
 159                                 drv->end_request(drive, 1, rq->nr_sectors);
 160                         } else
 161                                 ide_end_request(drive, 1, rq->nr_sectors);
 162                         return ide_stopped;
 163                 }
 164                 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
 165                        drive->name, dma_stat);
 166         }
 167         return ide_error(drive, "dma_intr", stat);
 168 }
 169
 170 EXPORT_SYMBOL_GPL(ide_dma_intr);
 171
 172 static int ide_dma_good_drive(ide_drive_t *drive)
 173 {
 174         return ide_in_drive_list(drive->id, drive_whitelist);
 175 }
 176
 177 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 178 /**
 179  *      ide_build_sglist        -       map IDE scatter gather for DMA I/O
 180  *      @drive: the drive to build the DMA table for
 181  *      @rq: the request holding the sg list
 182  *
 183  *      Perform the PCI mapping magic necessary to access the source or
 184  *      target buffers of a request via PCI DMA. The lower layers of the
 185  *      kernel provide the necessary cache management so that we can
 186  *      operate in a portable fashion
 187  */
 188
 189 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
 190 {
 191         ide_hwif_t *hwif = HWIF(drive);
 192         struct scatterlist *sg = hwif->sg_table;
 193
 194         BUG_ON((rq->cmd_type == REQ_TYPE_ATA_TASKFILE) && rq->nr_sectors > 256);
 195
 196         ide_map_sg(drive, rq);
 197
 198         if (rq_data_dir(rq) == READ)
 199                 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
 200         else
 201                 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
 202
 203         return pci_map_sg(hwif->pci_dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
 204 }
 205
 206 EXPORT_SYMBOL_GPL(ide_build_sglist);
 207
 208 /**
 209  *      ide_build_dmatable      -       build IDE DMA table
 210  *
 211  *      ide_build_dmatable() prepares a dma request. We map the command
 212  *      to get the pci bus addresses of the buffers and then build up
 213  *      the PRD table that the IDE layer wants to be fed. The code
 214  *      knows about the 64K wrap bug in the CS5530.
 215  *
 216  *      Returns the number of built PRD entries if all went okay,
 217  *      returns 0 otherwise.
 218  *
 219  *      May also be invoked from trm290.c
 220  */
 221
 222 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
 223 {
 224         ide_hwif_t *hwif        = HWIF(drive);
 225         unsigned int *table     = hwif->dmatable_cpu;
 226         unsigned int is_trm290  = (hwif->chipset == ide_trm290) ? 1 : 0;
 227         unsigned int count = 0;
 228         int i;
 229         struct scatterlist *sg;
 230
 231         hwif->sg_nents = i = ide_build_sglist(drive, rq);
 232
 233         if (!i)
 234                 return 0;
 235
 236         sg = hwif->sg_table;
 237         while (i) {
 238                 u32 cur_addr;
 239                 u32 cur_len;
 240
 241                 cur_addr = sg_dma_address(sg);
 242                 cur_len = sg_dma_len(sg);
 243
 244                 /*
 245                  * Fill in the dma table, without crossing any 64kB boundaries.
 246                  * Most hardware requires 16-bit alignment of all blocks,
 247                  * but the trm290 requires 32-bit alignment.
 248                  */
 249
 250                 while (cur_len) {
 251                         if (count++ >= PRD_ENTRIES) {
 252                                 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
 253                                 goto use_pio_instead;
 254                         } else {
 255                                 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
 256
 257                                 if (bcount > cur_len)
 258                                         bcount = cur_len;
 259                                 *table++ = cpu_to_le32(cur_addr);
 260                                 xcount = bcount & 0xffff;
 261                                 if (is_trm290)
 262                                         xcount = ((xcount >> 2) - 1) << 16;
 263                                 if (xcount == 0x0000) {
 264         /*
 265          * Most chipsets correctly interpret a length of 0x0000 as 64KB,
 266          * but at least one (e.g. CS5530) misinterprets it as zero (!).
 267          * So here we break the 64KB entry into two 32KB entries instead.
 268          */
 269                                         if (count++ >= PRD_ENTRIES) {
 270                                                 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
 271                                                 goto use_pio_instead;
 272                                         }
 273                                         *table++ = cpu_to_le32(0x8000);
 274                                         *table++ = cpu_to_le32(cur_addr + 0x8000);
 275                                         xcount = 0x8000;
 276                                 }
 277                                 *table++ = cpu_to_le32(xcount);
 278                                 cur_addr += bcount;
 279                                 cur_len -= bcount;
 280                         }
 281                 }
 282
 283                 sg = sg_next(sg);
 284                 i--;
 285         }
 286
 287         if (count) {
 288                 if (!is_trm290)
 289                         *--table |= cpu_to_le32(0x80000000);
 290                 return count;
 291         }
 292         printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
 293 use_pio_instead:
 294         pci_unmap_sg(hwif->pci_dev,
 295                      hwif->sg_table,
 296                      hwif->sg_nents,
 297                      hwif->sg_dma_direction);
 298         return 0; /* revert to PIO for this request */
 299 }
 300
 301 EXPORT_SYMBOL_GPL(ide_build_dmatable);
 302
 303 /**
 304  *      ide_destroy_dmatable    -       clean up DMA mapping
 305  *      @drive: The drive to unmap
 306  *
 307  *      Teardown mappings after DMA has completed. This must be called
 308  *      after the completion of each use of ide_build_dmatable and before
 309  *      the next use of ide_build_dmatable. Failure to do so will cause
 310  *      an oops as only one mapping can be live for each target at a given
 311  *      time.
 312  */
 313
 314 void ide_destroy_dmatable (ide_drive_t *drive)
 315 {
 316         struct pci_dev *dev = HWIF(drive)->pci_dev;
 317         struct scatterlist *sg = HWIF(drive)->sg_table;
 318         int nents = HWIF(drive)->sg_nents;
 319
 320         pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
 321 }
 322
 323 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
 324
 325 /**
 326  *      config_drive_for_dma    -       attempt to activate IDE DMA
 327  *      @drive: the drive to place in DMA mode
 328  *
 329  *      If the drive supports at least mode 2 DMA or UDMA of any kind
 330  *      then attempt to place it into DMA mode. Drives that are known to
 331  *      support DMA but predate the DMA properties or that are known
 332  *      to have DMA handling bugs are also set up appropriately based
 333  *      on the good/bad drive lists.
 334  */
 335
 336 static int config_drive_for_dma (ide_drive_t *drive)
 337 {
 338         ide_hwif_t *hwif = drive->hwif;
 339         struct hd_driveid *id = drive->id;
 340
 341         if (drive->media != ide_disk) {
 342                 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
 343                         return -1;
 344         }
 345
 346         /*
 347          * Enable DMA on any drive that has
 348          * UltraDMA (mode 0/1/2/3/4/5/6) enabled
 349          */
 350         if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
 351                 return 1;
 352
 353         /*
 354          * Enable DMA on any drive that has mode2 DMA
 355          * (multi or single) enabled
 356          */
 357         if (id->field_valid & 2)        /* regular DMA */
 358                 if ((id->dma_mword & 0x404) == 0x404 ||
 359                     (id->dma_1word & 0x404) == 0x404)
 360                         return 1;
 361
 362         /* Consult the list of known "good" drives */
 363         if (ide_dma_good_drive(drive))
 364                 return 1;
 365
 366         return 0;
 367 }
 368
 369 /**
 370  *      dma_timer_expiry        -       handle a DMA timeout
 371  *      @drive: Drive that timed out
 372  *
 373  *      An IDE DMA transfer timed out. In the event of an error we ask
 374  *      the driver to resolve the problem, if a DMA transfer is still
 375  *      in progress we continue to wait (arguably we need to add a
 376  *      secondary 'I don't care what the drive thinks' timeout here)
 377  *      Finally if we have an interrupt we let it complete the I/O.
 378  *      But only one time - we clear expiry and if it's still not
 379  *      completed after WAIT_CMD, we error and retry in PIO.
 380  *      This can occur if an interrupt is lost or due to hang or bugs.
 381  */
 382
 383 static int dma_timer_expiry (ide_drive_t *drive)
 384 {
 385         ide_hwif_t *hwif        = HWIF(drive);
 386         u8 dma_stat             = hwif->INB(hwif->dma_status);
 387
 388         printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
 389                 drive->name, dma_stat);
 390
 391         if ((dma_stat & 0x18) == 0x18)  /* BUSY Stupid Early Timer !! */
 392                 return WAIT_CMD;
 393
 394         HWGROUP(drive)->expiry = NULL;  /* one free ride for now */
 395
 396         /* 1 dmaing, 2 error, 4 intr */
 397         if (dma_stat & 2)       /* ERROR */
 398                 return -1;
 399
 400         if (dma_stat & 1)       /* DMAing */
 401                 return WAIT_CMD;
 402
 403         if (dma_stat & 4)       /* Got an Interrupt */
 404                 return WAIT_CMD;
 405
 406         return 0;       /* Status is unknown -- reset the bus */
 407 }
 408
 409 /**
 410  *      ide_dma_host_off        -       Generic DMA kill
 411  *      @drive: drive to control
 412  *
 413  *      Perform the generic IDE controller DMA off operation. This
 414  *      works for most IDE bus mastering controllers
 415  */
 416
 417 void ide_dma_host_off(ide_drive_t *drive)
 418 {
 419         ide_hwif_t *hwif        = HWIF(drive);
 420         u8 unit                 = (drive->select.b.unit & 0x01);
 421         u8 dma_stat             = hwif->INB(hwif->dma_status);
 422
 423         hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
 424 }
 425
 426 EXPORT_SYMBOL(ide_dma_host_off);
 427
 428 /**
 429  *      ide_dma_off_quietly     -       Generic DMA kill
 430  *      @drive: drive to control
 431  *
 432  *      Turn off the current DMA on this IDE controller.
 433  */
 434
 435 void ide_dma_off_quietly(ide_drive_t *drive)
 436 {
 437         drive->using_dma = 0;
 438         ide_toggle_bounce(drive, 0);
 439
 440         drive->hwif->dma_host_off(drive);
 441 }
 442
 443 EXPORT_SYMBOL(ide_dma_off_quietly);
 444 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
 445
 446 /**
 447  *      ide_dma_off     -       disable DMA on a device
 448  *      @drive: drive to disable DMA on
 449  *
 450  *      Disable IDE DMA for a device on this IDE controller.
 451  *      Inform the user that DMA has been disabled.
 452  */
 453
 454 void ide_dma_off(ide_drive_t *drive)
 455 {
 456         printk(KERN_INFO "%s: DMA disabled\n", drive->name);
 457         drive->hwif->dma_off_quietly(drive);
 458 }
 459
 460 EXPORT_SYMBOL(ide_dma_off);
 461
 462 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 463 /**
 464  *      ide_dma_host_on -       Enable DMA on a host
 465  *      @drive: drive to enable for DMA
 466  *
 467  *      Enable DMA on an IDE controller following generic bus mastering
 468  *      IDE controller behaviour
 469  */
 470
 471 void ide_dma_host_on(ide_drive_t *drive)
 472 {
 473         if (drive->using_dma) {
 474                 ide_hwif_t *hwif        = HWIF(drive);
 475                 u8 unit                 = (drive->select.b.unit & 0x01);
 476                 u8 dma_stat             = hwif->INB(hwif->dma_status);
 477
 478                 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
 479         }
 480 }
 481
 482 EXPORT_SYMBOL(ide_dma_host_on);
 483
 484 /**
 485  *      __ide_dma_on            -       Enable DMA on a device
 486  *      @drive: drive to enable DMA on
 487  *
 488  *      Enable IDE DMA for a device on this IDE controller.
 489  */
 490
 491 int __ide_dma_on (ide_drive_t *drive)
 492 {
 493         /* consult the list of known "bad" drives */
 494         if (__ide_dma_bad_drive(drive))
 495                 return 1;
 496
 497         drive->using_dma = 1;
 498         ide_toggle_bounce(drive, 1);
 499
 500         drive->hwif->dma_host_on(drive);
 501
 502         return 0;
 503 }
 504
 505 EXPORT_SYMBOL(__ide_dma_on);
 506
 507 /**
 508  *      ide_dma_setup   -       begin a DMA phase
 509  *      @drive: target device
 510  *
 511  *      Build an IDE DMA PRD (IDE speak for scatter gather table)
 512  *      and then set up the DMA transfer registers for a device
 513  *      that follows generic IDE PCI DMA behaviour. Controllers can
 514  *      override this function if they need to
 515  *
 516  *      Returns 0 on success. If a PIO fallback is required then 1
 517  *      is returned.
 518  */
 519
 520 int ide_dma_setup(ide_drive_t *drive)
 521 {
 522         ide_hwif_t *hwif = drive->hwif;
 523         struct request *rq = HWGROUP(drive)->rq;
 524         unsigned int reading;
 525         u8 dma_stat;
 526
 527         if (rq_data_dir(rq))
 528                 reading = 0;
 529         else
 530                 reading = 1 << 3;
 531
 532         /* fall back to pio! */
 533         if (!ide_build_dmatable(drive, rq)) {
 534                 ide_map_sg(drive, rq);
 535                 return 1;
 536         }
 537
 538         /* PRD table */
 539         if (hwif->mmio)
 540                 writel(hwif->dmatable_dma, (void __iomem *)hwif->dma_prdtable);
 541         else
 542                 outl(hwif->dmatable_dma, hwif->dma_prdtable);
 543
 544         /* specify r/w */
 545         hwif->OUTB(reading, hwif->dma_command);
 546
 547         /* read dma_status for INTR & ERROR flags */
 548         dma_stat = hwif->INB(hwif->dma_status);
 549
 550         /* clear INTR & ERROR flags */
 551         hwif->OUTB(dma_stat|6, hwif->dma_status);
 552         drive->waiting_for_dma = 1;
 553         return 0;
 554 }
 555
 556 EXPORT_SYMBOL_GPL(ide_dma_setup);
 557
 558 static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
 559 {
 560         /* issue cmd to drive */
 561         ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
 562 }
 563
 564 void ide_dma_start(ide_drive_t *drive)
 565 {
 566         ide_hwif_t *hwif        = HWIF(drive);
 567         u8 dma_cmd              = hwif->INB(hwif->dma_command);
 568
 569         /* Note that this is done *after* the cmd has
 570          * been issued to the drive, as per the BM-IDE spec.
 571          * The Promise Ultra33 doesn't work correctly when
 572          * we do this part before issuing the drive cmd.
 573          */
 574         /* start DMA */
 575         hwif->OUTB(dma_cmd|1, hwif->dma_command);
 576         hwif->dma = 1;
 577         wmb();
 578 }
 579
 580 EXPORT_SYMBOL_GPL(ide_dma_start);
 581
 582 /* returns 1 on error, 0 otherwise */
 583 int __ide_dma_end (ide_drive_t *drive)
 584 {
 585         ide_hwif_t *hwif        = HWIF(drive);
 586         u8 dma_stat = 0, dma_cmd = 0;
 587
 588         drive->waiting_for_dma = 0;
 589         /* get dma_command mode */
 590         dma_cmd = hwif->INB(hwif->dma_command);
 591         /* stop DMA */
 592         hwif->OUTB(dma_cmd&~1, hwif->dma_command);
 593         /* get DMA status */
 594         dma_stat = hwif->INB(hwif->dma_status);
 595         /* clear the INTR & ERROR bits */
 596         hwif->OUTB(dma_stat|6, hwif->dma_status);
 597         /* purge DMA mappings */
 598         ide_destroy_dmatable(drive);
 599         /* verify good DMA status */
 600         hwif->dma = 0;
 601         wmb();
 602         return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
 603 }
 604
 605 EXPORT_SYMBOL(__ide_dma_end);
 606
 607 /* returns 1 if dma irq issued, 0 otherwise */
 608 static int __ide_dma_test_irq(ide_drive_t *drive)
 609 {
 610         ide_hwif_t *hwif        = HWIF(drive);
 611         u8 dma_stat             = hwif->INB(hwif->dma_status);
 612
 613 #if 0  /* do not set unless you know what you are doing */
 614         if (dma_stat & 4) {
 615                 u8 stat = hwif->INB(IDE_STATUS_REG);
 616                 hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
 617         }
 618 #endif
 619         /* return 1 if INTR asserted */
 620         if ((dma_stat & 4) == 4)
 621                 return 1;
 622         if (!drive->waiting_for_dma)
 623                 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
 624                         drive->name, __FUNCTION__);
 625         return 0;
 626 }
 627 #else
 628 static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
 629 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
 630
 631 int __ide_dma_bad_drive (ide_drive_t *drive)
 632 {
 633         struct hd_driveid *id = drive->id;
 634
 635         int blacklist = ide_in_drive_list(id, drive_blacklist);
 636         if (blacklist) {
 637                 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
 638                                     drive->name, id->model);
 639                 return blacklist;
 640         }
 641         return 0;
 642 }
 643
 644 EXPORT_SYMBOL(__ide_dma_bad_drive);
 645
 646 static const u8 xfer_mode_bases[] = {
 647         XFER_UDMA_0,
 648         XFER_MW_DMA_0,
 649         XFER_SW_DMA_0,
 650 };
 651
 652 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
 653 {
 654         struct hd_driveid *id = drive->id;
 655         ide_hwif_t *hwif = drive->hwif;
 656         unsigned int mask = 0;
 657
 658         switch(base) {
 659         case XFER_UDMA_0:
 660                 if ((id->field_valid & 4) == 0)
 661                         break;
 662
 663                 if (hwif->udma_filter)
 664                         mask = hwif->udma_filter(drive);
 665                 else
 666                         mask = hwif->ultra_mask;
 667                 mask &= id->dma_ultra;
 668
 669                 /*
 670                  * avoid false cable warning from eighty_ninty_three()
 671                  */
 672                 if (req_mode > XFER_UDMA_2) {
 673                         if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
 674                                 mask &= 0x07;
 675                 }
 676                 break;
 677         case XFER_MW_DMA_0:
 678                 if ((id->field_valid & 2) == 0)
 679                         break;
 680                 if (hwif->mdma_filter)
 681                         mask = hwif->mdma_filter(drive);
 682                 else
 683                         mask = hwif->mwdma_mask;
 684                 mask &= id->dma_mword;
 685                 break;
 686         case XFER_SW_DMA_0:
 687                 if (id->field_valid & 2) {
 688                         mask = id->dma_1word & hwif->swdma_mask;
 689                 } else if (id->tDMA) {
 690                         /*
 691                          * ide_fix_driveid() doesn't convert ->tDMA to the
 692                          * CPU endianness so we need to do it here
 693                          */
 694                         u8 mode = le16_to_cpu(id->tDMA);
 695
 696                         /*
 697                          * if the mode is valid convert it to the mask
 698                          * (the maximum allowed mode is XFER_SW_DMA_2)
 699                          */
 700                         if (mode <= 2)
 701                                 mask = ((2 << mode) - 1) & hwif->swdma_mask;
 702                 }
 703                 break;
 704         default:
 705                 BUG();
 706                 break;
 707         }
 708
 709         return mask;
 710 }
 711
 712 /**
 713  *      ide_find_dma_mode       -       compute DMA speed
 714  *      @drive: IDE device
 715  *      @req_mode: requested mode
 716  *
 717  *      Checks the drive/host capabilities and finds the speed to use for
 718  *      the DMA transfer.  The speed is then limited by the requested mode.
 719  *
 720  *      Returns 0 if the drive/host combination is incapable of DMA transfers
 721  *      or if the requested mode is not a DMA mode.
 722  */
 723
 724 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
 725 {
 726         ide_hwif_t *hwif = drive->hwif;
 727         unsigned int mask;
 728         int x, i;
 729         u8 mode = 0;
 730
 731         if (drive->media != ide_disk) {
 732                 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
 733                         return 0;
 734         }
 735
 736         for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
 737                 if (req_mode < xfer_mode_bases[i])
 738                         continue;
 739                 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
 740                 x = fls(mask) - 1;
 741                 if (x >= 0) {
 742                         mode = xfer_mode_bases[i] + x;
 743                         break;
 744                 }
 745         }
 746
 747         if (hwif->chipset == ide_acorn && mode == 0) {
 748                 /*
 749                  * is this correct?
 750                  */
 751                 if (ide_dma_good_drive(drive) && drive->id->eide_dma_time < 150)
 752                         mode = XFER_MW_DMA_1;
 753         }
 754
 755         printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode);
 756
 757         return min(mode, req_mode);
 758 }
 759
 760 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
 761
 762 static int ide_tune_dma(ide_drive_t *drive)
 763 {
 764         u8 speed;
 765
 766         if (noautodma || drive->nodma || (drive->id->capability & 1) == 0)
 767                 return 0;
 768
 769         /* consult the list of known "bad" drives */
 770         if (__ide_dma_bad_drive(drive))
 771                 return 0;
 772
 773         if (drive->hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
 774                 return config_drive_for_dma(drive);
 775
 776         speed = ide_max_dma_mode(drive);
 777
 778         if (!speed)
 779                 return 0;
 780
 781         if (drive->hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
 782                 return 0;
 783
 784         if (ide_set_dma_mode(drive, speed))
 785                 return 0;
 786
 787         return 1;
 788 }
 789
 790 static int ide_dma_check(ide_drive_t *drive)
 791 {
 792         ide_hwif_t *hwif = drive->hwif;
 793         int vdma = (hwif->host_flags & IDE_HFLAG_VDMA)? 1 : 0;
 794
 795         if (!vdma && ide_tune_dma(drive))
 796                 return 0;
 797
 798         /* TODO: always do PIO fallback */
 799         if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
 800                 return -1;
 801
 802         ide_set_max_pio(drive);
 803
 804         return vdma ? 0 : -1;
 805 }
 806
 807 void ide_dma_verbose(ide_drive_t *drive)
 808 {
 809         struct hd_driveid *id   = drive->id;
 810         ide_hwif_t *hwif        = HWIF(drive);
 811
 812         if (id->field_valid & 4) {
 813                 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
 814                         goto bug_dma_off;
 815                 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
 816                         if (((id->dma_ultra >> 11) & 0x1F) &&
 817                             eighty_ninty_three(drive)) {
 818                                 if ((id->dma_ultra >> 15) & 1) {
 819                                         printk(", UDMA(mode 7)");
 820                                 } else if ((id->dma_ultra >> 14) & 1) {
 821                                         printk(", UDMA(133)");
 822                                 } else if ((id->dma_ultra >> 13) & 1) {
 823                                         printk(", UDMA(100)");
 824                                 } else if ((id->dma_ultra >> 12) & 1) {
 825                                         printk(", UDMA(66)");
 826                                 } else if ((id->dma_ultra >> 11) & 1) {
 827                                         printk(", UDMA(44)");
 828                                 } else
 829                                         goto mode_two;
 830                         } else {
 831                 mode_two:
 832                                 if ((id->dma_ultra >> 10) & 1) {
 833                                         printk(", UDMA(33)");
 834                                 } else if ((id->dma_ultra >> 9) & 1) {
 835                                         printk(", UDMA(25)");
 836                                 } else if ((id->dma_ultra >> 8) & 1) {
 837                                         printk(", UDMA(16)");
 838                                 }
 839                         }
 840                 } else {
 841                         printk(", (U)DMA");     /* Can be BIOS-enabled! */
 842                 }
 843         } else if (id->field_valid & 2) {
 844                 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
 845                         goto bug_dma_off;
 846                 printk(", DMA");
 847         } else if (id->field_valid & 1) {
 848                 goto bug_dma_off;
 849         }
 850         return;
 851 bug_dma_off:
 852         printk(", BUG DMA OFF");
 853         hwif->dma_off_quietly(drive);
 854         return;
 855 }
 856
 857 EXPORT_SYMBOL(ide_dma_verbose);
 858
 859 int ide_set_dma(ide_drive_t *drive)
 860 {
 861         ide_hwif_t *hwif = drive->hwif;
 862         int rc;
 863
 864         rc = ide_dma_check(drive);
 865
 866         switch(rc) {
 867         case -1: /* DMA needs to be disabled */
 868                 hwif->dma_off_quietly(drive);
 869                 return -1;
 870         case  0: /* DMA needs to be enabled */
 871                 return hwif->ide_dma_on(drive);
 872         case  1: /* DMA setting cannot be changed */
 873                 break;
 874         default:
 875                 BUG();
 876                 break;
 877         }
 878
 879         return rc;
 880 }
 881
 882 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 883 void ide_dma_lost_irq (ide_drive_t *drive)
 884 {
 885         printk("%s: DMA interrupt recovery\n", drive->name);
 886 }
 887
 888 EXPORT_SYMBOL(ide_dma_lost_irq);
 889
 890 void ide_dma_timeout (ide_drive_t *drive)
 891 {
 892         ide_hwif_t *hwif = HWIF(drive);
 893
 894         printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
 895
 896         if (hwif->ide_dma_test_irq(drive))
 897                 return;
 898
 899         hwif->ide_dma_end(drive);
 900 }
 901
 902 EXPORT_SYMBOL(ide_dma_timeout);
 903
 904 static void ide_release_dma_engine(ide_hwif_t *hwif)
 905 {
 906         if (hwif->dmatable_cpu) {
 907                 pci_free_consistent(hwif->pci_dev,
 908                                     PRD_ENTRIES * PRD_BYTES,
 909                                     hwif->dmatable_cpu,
 910                                     hwif->dmatable_dma);
 911                 hwif->dmatable_cpu = NULL;
 912         }
 913 }
 914
 915 static int ide_release_iomio_dma(ide_hwif_t *hwif)
 916 {
 917         release_region(hwif->dma_base, 8);
 918         if (hwif->extra_ports)
 919                 release_region(hwif->extra_base, hwif->extra_ports);
 920         return 1;
 921 }
 922
 923 /*
 924  * Needed for allowing full modular support of ide-driver
 925  */
 926 int ide_release_dma(ide_hwif_t *hwif)
 927 {
 928         ide_release_dma_engine(hwif);
 929
 930         if (hwif->mmio)
 931                 return 1;
 932         else
 933                 return ide_release_iomio_dma(hwif);
 934 }
 935
 936 static int ide_allocate_dma_engine(ide_hwif_t *hwif)
 937 {
 938         hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
 939                                                   PRD_ENTRIES * PRD_BYTES,
 940                                                   &hwif->dmatable_dma);
 941
 942         if (hwif->dmatable_cpu)
 943                 return 0;
 944
 945         printk(KERN_ERR "%s: -- Error, unable to allocate DMA table.\n",
 946                hwif->cds->name);
 947
 948         return 1;
 949 }
 950
 951 static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
 952 {
 953         printk(KERN_INFO "    %s: MMIO-DMA ", hwif->name);
 954
 955         return 0;
 956 }
 957
 958 static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
 959 {
 960         printk(KERN_INFO "    %s: BM-DMA at 0x%04lx-0x%04lx",
 961                hwif->name, base, base + ports - 1);
 962
 963         if (!request_region(base, ports, hwif->name)) {
 964                 printk(" -- Error, ports in use.\n");
 965                 return 1;
 966         }
 967
 968         if (hwif->cds->extra) {
 969                 hwif->extra_base = base + (hwif->channel ? 8 : 16);
 970
 971                 if (!hwif->mate || !hwif->mate->extra_ports) {
 972                         if (!request_region(hwif->extra_base,
 973                                             hwif->cds->extra, hwif->cds->name)) {
 974                                 printk(" -- Error, extra ports in use.\n");
 975                                 release_region(base, ports);
 976                                 return 1;
 977                         }
 978                         hwif->extra_ports = hwif->cds->extra;
 979                 }
 980         }
 981
 982         return 0;
 983 }
 984
 985 static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
 986 {
 987         if (hwif->mmio)
 988                 return ide_mapped_mmio_dma(hwif, base,ports);
 989
 990         return ide_iomio_dma(hwif, base, ports);
 991 }
 992
 993 void ide_setup_dma(ide_hwif_t *hwif, unsigned long base, unsigned num_ports)
 994 {
 995         if (ide_dma_iobase(hwif, base, num_ports))
 996                 return;
 997
 998         if (ide_allocate_dma_engine(hwif)) {
 999                 ide_release_dma(hwif);
1000                 return;
1001         }
1002
1003         hwif->dma_base = base;
1004
1005         if (hwif->mate)
1006                 hwif->dma_master = hwif->channel ? hwif->mate->dma_base : base;
1007         else
1008                 hwif->dma_master = base;
1009
1010         if (!(hwif->dma_command))
1011                 hwif->dma_command       = hwif->dma_base;
1012         if (!(hwif->dma_vendor1))
1013                 hwif->dma_vendor1       = (hwif->dma_base + 1);
1014         if (!(hwif->dma_status))
1015                 hwif->dma_status        = (hwif->dma_base + 2);
1016         if (!(hwif->dma_vendor3))
1017                 hwif->dma_vendor3       = (hwif->dma_base + 3);
1018         if (!(hwif->dma_prdtable))
1019                 hwif->dma_prdtable      = (hwif->dma_base + 4);
1020
1021         if (!hwif->dma_off_quietly)
1022                 hwif->dma_off_quietly = &ide_dma_off_quietly;
1023         if (!hwif->dma_host_off)
1024                 hwif->dma_host_off = &ide_dma_host_off;
1025         if (!hwif->ide_dma_on)
1026                 hwif->ide_dma_on = &__ide_dma_on;
1027         if (!hwif->dma_host_on)
1028                 hwif->dma_host_on = &ide_dma_host_on;
1029         if (!hwif->dma_setup)
1030                 hwif->dma_setup = &ide_dma_setup;
1031         if (!hwif->dma_exec_cmd)
1032                 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
1033         if (!hwif->dma_start)
1034                 hwif->dma_start = &ide_dma_start;
1035         if (!hwif->ide_dma_end)
1036                 hwif->ide_dma_end = &__ide_dma_end;
1037         if (!hwif->ide_dma_test_irq)
1038                 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
1039         if (!hwif->dma_timeout)
1040                 hwif->dma_timeout = &ide_dma_timeout;
1041         if (!hwif->dma_lost_irq)
1042                 hwif->dma_lost_irq = &ide_dma_lost_irq;
1043
1044         if (hwif->chipset != ide_trm290) {
1045                 u8 dma_stat = hwif->INB(hwif->dma_status);
1046                 printk(", BIOS settings: %s:%s, %s:%s",
1047                        hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
1048                        hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
1049         }
1050         printk("\n");
1051
1052         BUG_ON(!hwif->dma_master);
1053 }
1054
1055 EXPORT_SYMBOL_GPL(ide_setup_dma);
1056 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */