2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
21 #include <mach/board.h>
23 #include <mach/gpio.h>
25 #include <video/atmel_lcdc.h>
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
33 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
35 #if defined(CONFIG_ARCH_AT91)
36 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
37 | FBINFO_PARTIAL_PAN_OK \
38 | FBINFO_HWACCEL_YPAN)
40 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
41 struct fb_var_screeninfo
*var
)
45 #elif defined(CONFIG_AVR32)
46 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
47 | FBINFO_PARTIAL_PAN_OK \
48 | FBINFO_HWACCEL_XPAN \
49 | FBINFO_HWACCEL_YPAN)
51 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
52 struct fb_var_screeninfo
*var
)
57 pixeloff
= (var
->xoffset
* var
->bits_per_pixel
) & 0x1f;
59 dma2dcfg
= ((var
->xres_virtual
- var
->xres
) * var
->bits_per_pixel
) / 8;
60 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
61 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
63 /* Update configuration */
64 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
65 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
66 | ATMEL_LCDC_DMAUPDT
);
70 static const u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
71 | ATMEL_LCDC_POL_POSITIVE
72 | ATMEL_LCDC_ENA_PWMENABLE
;
74 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
76 /* some bl->props field just changed */
77 static int atmel_bl_update_status(struct backlight_device
*bl
)
79 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
80 int power
= sinfo
->bl_power
;
81 int brightness
= bl
->props
.brightness
;
83 /* REVISIT there may be a meaningful difference between
84 * fb_blank and power ... there seem to be some cases
85 * this doesn't handle correctly.
87 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
88 power
= bl
->props
.fb_blank
;
89 else if (bl
->props
.power
!= sinfo
->bl_power
)
90 power
= bl
->props
.power
;
92 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
93 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
94 else if (power
!= FB_BLANK_UNBLANK
)
97 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
98 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
99 brightness
? contrast_ctr
: 0);
101 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
106 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
108 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
110 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
113 static struct backlight_ops atmel_lcdc_bl_ops
= {
114 .update_status
= atmel_bl_update_status
,
115 .get_brightness
= atmel_bl_get_brightness
,
118 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
120 struct backlight_device
*bl
;
122 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
124 if (sinfo
->backlight
)
127 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
,
128 sinfo
, &atmel_lcdc_bl_ops
);
130 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
134 sinfo
->backlight
= bl
;
136 bl
->props
.power
= FB_BLANK_UNBLANK
;
137 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
138 bl
->props
.max_brightness
= 0xff;
139 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
142 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
144 if (sinfo
->backlight
)
145 backlight_device_unregister(sinfo
->backlight
);
150 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
152 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
155 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
161 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
163 /* have some default contrast/backlight settings */
164 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
165 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
167 if (sinfo
->lcdcon_is_backlight
)
168 init_backlight(sinfo
);
172 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata
= {
173 .type
= FB_TYPE_PACKED_PIXELS
,
174 .visual
= FB_VISUAL_TRUECOLOR
,
178 .accel
= FB_ACCEL_NONE
,
181 static unsigned long compute_hozval(unsigned long xres
, unsigned long lcdcon2
)
185 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
189 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
191 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
194 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
195 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
196 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
197 value
= DIV_ROUND_UP(value
, 4);
199 value
= DIV_ROUND_UP(value
, 8);
205 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info
*sinfo
)
207 /* Turn off the LCD controller and the DMA controller */
208 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
209 sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
211 /* Wait for the LCDC core to become idle */
212 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
215 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
218 static void atmel_lcdfb_stop(struct atmel_lcdfb_info
*sinfo
)
220 atmel_lcdfb_stop_nowait(sinfo
);
222 /* Wait for DMA engine to become idle... */
223 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
227 static void atmel_lcdfb_start(struct atmel_lcdfb_info
*sinfo
)
229 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, sinfo
->default_dmacon
);
230 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
231 (sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
)
235 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
236 struct fb_var_screeninfo
*var
)
238 struct atmel_lcdfb_info
*sinfo
= info
->par
;
239 struct fb_fix_screeninfo
*fix
= &info
->fix
;
240 unsigned long dma_addr
;
242 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
243 + var
->xoffset
* var
->bits_per_pixel
/ 8);
247 /* Set framebuffer DMA base address and pixel offset */
248 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
250 atmel_lcdfb_update_dma2d(sinfo
, var
);
253 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
255 struct fb_info
*info
= sinfo
->info
;
257 dma_free_writecombine(info
->device
, info
->fix
.smem_len
,
258 info
->screen_base
, info
->fix
.smem_start
);
262 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
263 * @sinfo: the frame buffer to allocate memory for
265 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
267 struct fb_info
*info
= sinfo
->info
;
268 struct fb_var_screeninfo
*var
= &info
->var
;
269 unsigned int smem_len
;
271 smem_len
= (var
->xres_virtual
* var
->yres_virtual
272 * ((var
->bits_per_pixel
+ 7) / 8));
273 mutex_lock(&info
->mm_lock
);
274 info
->fix
.smem_len
= max(smem_len
, sinfo
->smem_len
);
275 mutex_unlock(&info
->mm_lock
);
277 info
->screen_base
= dma_alloc_writecombine(info
->device
, info
->fix
.smem_len
,
278 (dma_addr_t
*)&info
->fix
.smem_start
, GFP_KERNEL
);
280 if (!info
->screen_base
) {
284 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
289 static const struct fb_videomode
*atmel_lcdfb_choose_mode(struct fb_var_screeninfo
*var
,
290 struct fb_info
*info
)
292 struct fb_videomode varfbmode
;
293 const struct fb_videomode
*fbmode
= NULL
;
295 fb_var_to_videomode(&varfbmode
, var
);
296 fbmode
= fb_find_nearest_mode(&varfbmode
, &info
->modelist
);
298 fb_videomode_to_var(var
, fbmode
);
304 * atmel_lcdfb_check_var - Validates a var passed in.
305 * @var: frame buffer variable screen structure
306 * @info: frame buffer structure that represents a single frame buffer
308 * Checks to see if the hardware supports the state requested by
309 * var passed in. This function does not alter the hardware
310 * state!!! This means the data stored in struct fb_info and
311 * struct atmel_lcdfb_info do not change. This includes the var
312 * inside of struct fb_info. Do NOT change these. This function
313 * can be called on its own if we intent to only test a mode and
314 * not actually set it. The stuff in modedb.c is a example of
315 * this. If the var passed in is slightly off by what the
316 * hardware can support then we alter the var PASSED in to what
317 * we can do. If the hardware doesn't support mode change a
318 * -EINVAL will be returned by the upper layers. You don't need
319 * to implement this function then. If you hardware doesn't
320 * support changing the resolution then this function is not
321 * needed. In this case the driver would just provide a var that
322 * represents the static state the screen is in.
324 * Returns negative errno on error, or zero on success.
326 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
327 struct fb_info
*info
)
329 struct device
*dev
= info
->device
;
330 struct atmel_lcdfb_info
*sinfo
= info
->par
;
331 unsigned long clk_value_khz
;
333 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
335 dev_dbg(dev
, "%s:\n", __func__
);
337 if (!(var
->pixclock
&& var
->bits_per_pixel
)) {
338 /* choose a suitable mode if possible */
339 if (!atmel_lcdfb_choose_mode(var
, info
)) {
340 dev_err(dev
, "needed value not specified\n");
345 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
346 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
347 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
348 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
350 if (PICOS2KHZ(var
->pixclock
) > clk_value_khz
) {
351 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
355 /* Do not allow to have real resoulution larger than virtual */
356 if (var
->xres
> var
->xres_virtual
)
357 var
->xres_virtual
= var
->xres
;
359 if (var
->yres
> var
->yres_virtual
)
360 var
->yres_virtual
= var
->yres
;
362 /* Force same alignment for each line */
363 var
->xres
= (var
->xres
+ 3) & ~3UL;
364 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
366 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
367 var
->transp
.msb_right
= 0;
368 var
->transp
.offset
= var
->transp
.length
= 0;
369 var
->xoffset
= var
->yoffset
= 0;
371 if (info
->fix
.smem_len
) {
372 unsigned int smem_len
= (var
->xres_virtual
* var
->yres_virtual
373 * ((var
->bits_per_pixel
+ 7) / 8));
374 if (smem_len
> info
->fix
.smem_len
)
378 /* Saturate vertical and horizontal timings at maximum values */
379 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
380 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
381 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
382 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
383 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
385 var
->right_margin
= min_t(u32
, var
->right_margin
,
386 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
387 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
388 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
389 var
->left_margin
= min_t(u32
, var
->left_margin
,
392 /* Some parameters can't be zero */
393 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
394 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
395 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
396 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
398 switch (var
->bits_per_pixel
) {
403 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
404 var
->red
.length
= var
->green
.length
= var
->blue
.length
405 = var
->bits_per_pixel
;
409 if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
411 var
->red
.offset
= 11;
412 var
->blue
.offset
= 0;
413 var
->green
.length
= 6;
414 } else if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB555
) {
415 var
->red
.offset
= 10;
416 var
->blue
.offset
= 0;
417 var
->green
.length
= 5;
421 var
->blue
.offset
= 10;
422 var
->green
.length
= 5;
424 var
->green
.offset
= 5;
425 var
->red
.length
= var
->blue
.length
= 5;
428 var
->transp
.offset
= 24;
429 var
->transp
.length
= 8;
432 if (sinfo
->lcd_wiring_mode
== ATMEL_LCDC_WIRING_RGB
) {
434 var
->red
.offset
= 16;
435 var
->blue
.offset
= 0;
439 var
->blue
.offset
= 16;
441 var
->green
.offset
= 8;
442 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
445 dev_err(dev
, "color depth %d not supported\n",
446 var
->bits_per_pixel
);
456 static void atmel_lcdfb_reset(struct atmel_lcdfb_info
*sinfo
)
460 atmel_lcdfb_stop(sinfo
);
461 atmel_lcdfb_start(sinfo
);
465 * atmel_lcdfb_set_par - Alters the hardware state.
466 * @info: frame buffer structure that represents a single frame buffer
468 * Using the fb_var_screeninfo in fb_info we set the resolution
469 * of the this particular framebuffer. This function alters the
470 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
471 * not alter var in fb_info since we are using that data. This
472 * means we depend on the data in var inside fb_info to be
473 * supported by the hardware. atmel_lcdfb_check_var is always called
474 * before atmel_lcdfb_set_par to ensure this. Again if you can't
475 * change the resolution you don't need this function.
478 static int atmel_lcdfb_set_par(struct fb_info
*info
)
480 struct atmel_lcdfb_info
*sinfo
= info
->par
;
481 unsigned long hozval_linesz
;
483 unsigned long clk_value_khz
;
484 unsigned long bits_per_line
;
488 dev_dbg(info
->device
, "%s:\n", __func__
);
489 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
490 info
->var
.xres
, info
->var
.yres
,
491 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
493 atmel_lcdfb_stop_nowait(sinfo
);
495 if (info
->var
.bits_per_pixel
== 1)
496 info
->fix
.visual
= FB_VISUAL_MONO01
;
497 else if (info
->var
.bits_per_pixel
<= 8)
498 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
500 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
502 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
503 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
505 /* Re-initialize the DMA engine... */
506 dev_dbg(info
->device
, " * update DMA engine\n");
507 atmel_lcdfb_update_dma(info
, &info
->var
);
509 /* ...set frame size and burst length = 8 words (?) */
510 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
511 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
512 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
514 /* Now, the LCDC core... */
516 /* Set pixel clock */
517 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
519 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
522 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
523 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
525 value
= (value
/ 2) - 1;
526 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n",
528 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
,
529 value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
530 info
->var
.pixclock
= KHZ2PICOS(clk_value_khz
/ (2 * (value
+ 1)));
531 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
532 PICOS2KHZ(info
->var
.pixclock
));
536 /* Initialize control register 2 */
537 value
= sinfo
->default_lcdcon2
;
539 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
540 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
541 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
542 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
544 switch (info
->var
.bits_per_pixel
) {
545 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
546 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
547 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
548 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
549 case 15: /* fall through */
550 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
551 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
552 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
553 default: BUG(); break;
555 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
556 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
558 /* Vertical timing */
559 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
560 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
561 value
|= info
->var
.lower_margin
;
562 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
563 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
565 /* Horizontal timing */
566 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
567 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
568 value
|= (info
->var
.left_margin
- 1);
569 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
570 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
572 /* Horizontal value (aka line size) */
573 hozval_linesz
= compute_hozval(info
->var
.xres
,
574 lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
));
577 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
578 value
|= info
->var
.yres
- 1;
579 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
580 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
582 /* FIFO Threshold: Use formula from data sheet */
583 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
584 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
586 /* Toggle LCD_MODE every frame */
587 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
589 /* Disable all interrupts */
590 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
591 /* Enable FIFO & DMA errors */
592 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
| ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
594 /* ...wait for DMA engine to become idle... */
595 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
598 atmel_lcdfb_start(sinfo
);
600 dev_dbg(info
->device
, " * DONE\n");
605 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
608 chan
>>= 16 - bf
->length
;
609 return chan
<< bf
->offset
;
613 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
614 * @regno: Which register in the CLUT we are programming
615 * @red: The red value which can be up to 16 bits wide
616 * @green: The green value which can be up to 16 bits wide
617 * @blue: The blue value which can be up to 16 bits wide.
618 * @transp: If supported the alpha value which can be up to 16 bits wide.
619 * @info: frame buffer info structure
621 * Set a single color register. The values supplied have a 16 bit
622 * magnitude which needs to be scaled in this function for the hardware.
623 * Things to take into consideration are how many color registers, if
624 * any, are supported with the current color visual. With truecolor mode
625 * no color palettes are supported. Here a psuedo palette is created
626 * which we store the value in pseudo_palette in struct fb_info. For
627 * pseudocolor mode we have a limited color palette. To deal with this
628 * we can program what color is displayed for a particular pixel value.
629 * DirectColor is similar in that we can program each color field. If
630 * we have a static colormap we don't need to implement this function.
632 * Returns negative errno on error, or zero on success. In an
633 * ideal world, this would have been the case, but as it turns
634 * out, the other drivers return 1 on failure, so that's what
637 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
638 unsigned int green
, unsigned int blue
,
639 unsigned int transp
, struct fb_info
*info
)
641 struct atmel_lcdfb_info
*sinfo
= info
->par
;
646 if (info
->var
.grayscale
)
647 red
= green
= blue
= (19595 * red
+ 38470 * green
648 + 7471 * blue
) >> 16;
650 switch (info
->fix
.visual
) {
651 case FB_VISUAL_TRUECOLOR
:
653 pal
= info
->pseudo_palette
;
655 val
= chan_to_field(red
, &info
->var
.red
);
656 val
|= chan_to_field(green
, &info
->var
.green
);
657 val
|= chan_to_field(blue
, &info
->var
.blue
);
664 case FB_VISUAL_PSEUDOCOLOR
:
666 val
= ((red
>> 11) & 0x001f);
667 val
|= ((green
>> 6) & 0x03e0);
668 val
|= ((blue
>> 1) & 0x7c00);
671 * TODO: intensity bit. Maybe something like
672 * ~(red[10] ^ green[10] ^ blue[10]) & 1
675 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
680 case FB_VISUAL_MONO01
:
682 val
= (regno
== 0) ? 0x00 : 0x1F;
683 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
693 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
694 struct fb_info
*info
)
696 dev_dbg(info
->device
, "%s\n", __func__
);
698 atmel_lcdfb_update_dma(info
, var
);
703 static struct fb_ops atmel_lcdfb_ops
= {
704 .owner
= THIS_MODULE
,
705 .fb_check_var
= atmel_lcdfb_check_var
,
706 .fb_set_par
= atmel_lcdfb_set_par
,
707 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
708 .fb_pan_display
= atmel_lcdfb_pan_display
,
709 .fb_fillrect
= cfb_fillrect
,
710 .fb_copyarea
= cfb_copyarea
,
711 .fb_imageblit
= cfb_imageblit
,
714 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
716 struct fb_info
*info
= dev_id
;
717 struct atmel_lcdfb_info
*sinfo
= info
->par
;
720 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
721 if (status
& ATMEL_LCDC_UFLWI
) {
722 dev_warn(info
->device
, "FIFO underflow %#x\n", status
);
723 /* reset DMA and FIFO to avoid screen shifting */
724 schedule_work(&sinfo
->task
);
726 lcdc_writel(sinfo
, ATMEL_LCDC_ICR
, status
);
731 * LCD controller task (to reset the LCD)
733 static void atmel_lcdfb_task(struct work_struct
*work
)
735 struct atmel_lcdfb_info
*sinfo
=
736 container_of(work
, struct atmel_lcdfb_info
, task
);
738 atmel_lcdfb_reset(sinfo
);
741 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
743 struct fb_info
*info
= sinfo
->info
;
746 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
748 dev_info(info
->device
,
749 "%luKiB frame buffer at %08lx (mapped at %p)\n",
750 (unsigned long)info
->fix
.smem_len
/ 1024,
751 (unsigned long)info
->fix
.smem_start
,
754 /* Allocate colormap */
755 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
757 dev_err(info
->device
, "Alloc color map failed\n");
762 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
765 clk_enable(sinfo
->bus_clk
);
766 clk_enable(sinfo
->lcdc_clk
);
769 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
772 clk_disable(sinfo
->bus_clk
);
773 clk_disable(sinfo
->lcdc_clk
);
777 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
779 struct device
*dev
= &pdev
->dev
;
780 struct fb_info
*info
;
781 struct atmel_lcdfb_info
*sinfo
;
782 struct atmel_lcdfb_info
*pdata_sinfo
;
783 struct fb_videomode fbmode
;
784 struct resource
*regs
= NULL
;
785 struct resource
*map
= NULL
;
788 dev_dbg(dev
, "%s BEGIN\n", __func__
);
791 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
793 dev_err(dev
, "cannot allocate memory\n");
799 if (dev
->platform_data
) {
800 pdata_sinfo
= (struct atmel_lcdfb_info
*)dev
->platform_data
;
801 sinfo
->default_bpp
= pdata_sinfo
->default_bpp
;
802 sinfo
->default_dmacon
= pdata_sinfo
->default_dmacon
;
803 sinfo
->default_lcdcon2
= pdata_sinfo
->default_lcdcon2
;
804 sinfo
->default_monspecs
= pdata_sinfo
->default_monspecs
;
805 sinfo
->atmel_lcdfb_power_control
= pdata_sinfo
->atmel_lcdfb_power_control
;
806 sinfo
->guard_time
= pdata_sinfo
->guard_time
;
807 sinfo
->smem_len
= pdata_sinfo
->smem_len
;
808 sinfo
->lcdcon_is_backlight
= pdata_sinfo
->lcdcon_is_backlight
;
809 sinfo
->lcd_wiring_mode
= pdata_sinfo
->lcd_wiring_mode
;
811 dev_err(dev
, "cannot get default configuration\n");
817 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
818 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
819 info
->pseudo_palette
= sinfo
->pseudo_palette
;
820 info
->fbops
= &atmel_lcdfb_ops
;
822 memcpy(&info
->monspecs
, sinfo
->default_monspecs
, sizeof(info
->monspecs
));
823 info
->fix
= atmel_lcdfb_fix
;
825 /* Enable LCDC Clocks */
826 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
827 sinfo
->bus_clk
= clk_get(dev
, "hck1");
828 if (IS_ERR(sinfo
->bus_clk
)) {
829 ret
= PTR_ERR(sinfo
->bus_clk
);
833 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
834 if (IS_ERR(sinfo
->lcdc_clk
)) {
835 ret
= PTR_ERR(sinfo
->lcdc_clk
);
838 atmel_lcdfb_start_clock(sinfo
);
840 ret
= fb_find_mode(&info
->var
, info
, NULL
, info
->monspecs
.modedb
,
841 info
->monspecs
.modedb_len
, info
->monspecs
.modedb
,
844 dev_err(dev
, "no suitable video mode found\n");
849 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
851 dev_err(dev
, "resources unusable\n");
856 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
857 if (sinfo
->irq_base
< 0) {
858 dev_err(dev
, "unable to get irq\n");
859 ret
= sinfo
->irq_base
;
863 /* Initialize video memory */
864 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
866 /* use a pre-allocated memory buffer */
867 info
->fix
.smem_start
= map
->start
;
868 info
->fix
.smem_len
= map
->end
- map
->start
+ 1;
869 if (!request_mem_region(info
->fix
.smem_start
,
870 info
->fix
.smem_len
, pdev
->name
)) {
875 info
->screen_base
= ioremap(info
->fix
.smem_start
, info
->fix
.smem_len
);
876 if (!info
->screen_base
)
880 * Don't clear the framebuffer -- someone may have set
884 /* alocate memory buffer */
885 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
887 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
893 info
->fix
.mmio_start
= regs
->start
;
894 info
->fix
.mmio_len
= regs
->end
- regs
->start
+ 1;
896 if (!request_mem_region(info
->fix
.mmio_start
,
897 info
->fix
.mmio_len
, pdev
->name
)) {
902 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
904 dev_err(dev
, "cannot map LCDC registers\n");
908 /* Initialize PWM for contrast or backlight ("off") */
909 init_contrast(sinfo
);
912 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
914 dev_err(dev
, "request_irq failed: %d\n", ret
);
918 /* Some operations on the LCDC might sleep and
919 * require a preemptible task context */
920 INIT_WORK(&sinfo
->task
, atmel_lcdfb_task
);
922 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
924 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
925 goto unregister_irqs
;
929 * This makes sure that our colour bitfield
930 * descriptors are correctly initialised.
932 atmel_lcdfb_check_var(&info
->var
, info
);
934 ret
= fb_set_var(info
, &info
->var
);
936 dev_warn(dev
, "unable to set display parameters\n");
940 dev_set_drvdata(dev
, info
);
943 * Tell the world that we're ready to go
945 ret
= register_framebuffer(info
);
947 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
951 /* add selected videomode to modelist */
952 fb_var_to_videomode(&fbmode
, &info
->var
);
953 fb_add_videomode(&fbmode
, &info
->modelist
);
955 /* Power up the LCDC screen */
956 if (sinfo
->atmel_lcdfb_power_control
)
957 sinfo
->atmel_lcdfb_power_control(1);
959 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
960 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
965 dev_set_drvdata(dev
, NULL
);
967 fb_dealloc_cmap(&info
->cmap
);
969 cancel_work_sync(&sinfo
->task
);
970 free_irq(sinfo
->irq_base
, info
);
972 exit_backlight(sinfo
);
973 iounmap(sinfo
->mmio
);
975 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
978 iounmap(info
->screen_base
);
980 atmel_lcdfb_free_video_memory(sinfo
);
984 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
986 atmel_lcdfb_stop_clock(sinfo
);
987 clk_put(sinfo
->lcdc_clk
);
990 clk_put(sinfo
->bus_clk
);
992 framebuffer_release(info
);
994 dev_dbg(dev
, "%s FAILED\n", __func__
);
998 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
1000 struct device
*dev
= &pdev
->dev
;
1001 struct fb_info
*info
= dev_get_drvdata(dev
);
1002 struct atmel_lcdfb_info
*sinfo
;
1004 if (!info
|| !info
->par
)
1008 cancel_work_sync(&sinfo
->task
);
1009 exit_backlight(sinfo
);
1010 if (sinfo
->atmel_lcdfb_power_control
)
1011 sinfo
->atmel_lcdfb_power_control(0);
1012 unregister_framebuffer(info
);
1013 atmel_lcdfb_stop_clock(sinfo
);
1014 clk_put(sinfo
->lcdc_clk
);
1016 clk_put(sinfo
->bus_clk
);
1017 fb_dealloc_cmap(&info
->cmap
);
1018 free_irq(sinfo
->irq_base
, info
);
1019 iounmap(sinfo
->mmio
);
1020 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
1021 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
1022 iounmap(info
->screen_base
);
1023 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
1025 atmel_lcdfb_free_video_memory(sinfo
);
1028 dev_set_drvdata(dev
, NULL
);
1029 framebuffer_release(info
);
1036 static int atmel_lcdfb_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1038 struct fb_info
*info
= platform_get_drvdata(pdev
);
1039 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1042 * We don't want to handle interrupts while the clock is
1043 * stopped. It may take forever.
1045 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
1047 sinfo
->saved_lcdcon
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
1048 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, 0);
1049 if (sinfo
->atmel_lcdfb_power_control
)
1050 sinfo
->atmel_lcdfb_power_control(0);
1052 atmel_lcdfb_stop(sinfo
);
1053 atmel_lcdfb_stop_clock(sinfo
);
1058 static int atmel_lcdfb_resume(struct platform_device
*pdev
)
1060 struct fb_info
*info
= platform_get_drvdata(pdev
);
1061 struct atmel_lcdfb_info
*sinfo
= info
->par
;
1063 atmel_lcdfb_start_clock(sinfo
);
1064 atmel_lcdfb_start(sinfo
);
1065 if (sinfo
->atmel_lcdfb_power_control
)
1066 sinfo
->atmel_lcdfb_power_control(1);
1067 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, sinfo
->saved_lcdcon
);
1069 /* Enable FIFO & DMA errors */
1070 lcdc_writel(sinfo
, ATMEL_LCDC_IER
, ATMEL_LCDC_UFLWI
1071 | ATMEL_LCDC_OWRI
| ATMEL_LCDC_MERI
);
1077 #define atmel_lcdfb_suspend NULL
1078 #define atmel_lcdfb_resume NULL
1081 static struct platform_driver atmel_lcdfb_driver
= {
1082 .remove
= __exit_p(atmel_lcdfb_remove
),
1083 .suspend
= atmel_lcdfb_suspend
,
1084 .resume
= atmel_lcdfb_resume
,
1087 .name
= "atmel_lcdfb",
1088 .owner
= THIS_MODULE
,
1092 static int __init
atmel_lcdfb_init(void)
1094 return platform_driver_probe(&atmel_lcdfb_driver
, atmel_lcdfb_probe
);
1097 static void __exit
atmel_lcdfb_exit(void)
1099 platform_driver_unregister(&atmel_lcdfb_driver
);
1102 module_init(atmel_lcdfb_init
);
1103 module_exit(atmel_lcdfb_exit
);
1105 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1106 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1107 MODULE_LICENSE("GPL");