4 #include <linux/hw_random.h>
5 #include <linux/kernel.h>
6 #include <linux/spinlock.h>
7 #include <linux/interrupt.h>
8 #include <linux/stringify.h>
9 #include <linux/netdevice.h>
10 #include <linux/pci.h>
11 #include <asm/atomic.h>
14 #include <linux/ssb/ssb.h>
15 #include <linux/ssb/ssb_driver_chipcommon.h>
17 #include <linux/wireless.h>
18 #include <net/mac80211.h>
26 #define B43legacy_IRQWAIT_MAX_RETRIES 100
28 #define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */
31 #define B43legacy_MMIO_DMA0_REASON 0x20
32 #define B43legacy_MMIO_DMA0_IRQ_MASK 0x24
33 #define B43legacy_MMIO_DMA1_REASON 0x28
34 #define B43legacy_MMIO_DMA1_IRQ_MASK 0x2C
35 #define B43legacy_MMIO_DMA2_REASON 0x30
36 #define B43legacy_MMIO_DMA2_IRQ_MASK 0x34
37 #define B43legacy_MMIO_DMA3_REASON 0x38
38 #define B43legacy_MMIO_DMA3_IRQ_MASK 0x3C
39 #define B43legacy_MMIO_DMA4_REASON 0x40
40 #define B43legacy_MMIO_DMA4_IRQ_MASK 0x44
41 #define B43legacy_MMIO_DMA5_REASON 0x48
42 #define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C
43 #define B43legacy_MMIO_MACCTL 0x120
44 #define B43legacy_MMIO_STATUS_BITFIELD 0x120
45 #define B43legacy_MMIO_STATUS2_BITFIELD 0x124
46 #define B43legacy_MMIO_GEN_IRQ_REASON 0x128
47 #define B43legacy_MMIO_GEN_IRQ_MASK 0x12C
48 #define B43legacy_MMIO_RAM_CONTROL 0x130
49 #define B43legacy_MMIO_RAM_DATA 0x134
50 #define B43legacy_MMIO_PS_STATUS 0x140
51 #define B43legacy_MMIO_RADIO_HWENABLED_HI 0x158
52 #define B43legacy_MMIO_SHM_CONTROL 0x160
53 #define B43legacy_MMIO_SHM_DATA 0x164
54 #define B43legacy_MMIO_SHM_DATA_UNALIGNED 0x166
55 #define B43legacy_MMIO_XMITSTAT_0 0x170
56 #define B43legacy_MMIO_XMITSTAT_1 0x174
57 #define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
58 #define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
61 #define B43legacy_MMIO_DMA32_BASE0 0x200
62 #define B43legacy_MMIO_DMA32_BASE1 0x220
63 #define B43legacy_MMIO_DMA32_BASE2 0x240
64 #define B43legacy_MMIO_DMA32_BASE3 0x260
65 #define B43legacy_MMIO_DMA32_BASE4 0x280
66 #define B43legacy_MMIO_DMA32_BASE5 0x2A0
68 #define B43legacy_MMIO_DMA64_BASE0 0x200
69 #define B43legacy_MMIO_DMA64_BASE1 0x240
70 #define B43legacy_MMIO_DMA64_BASE2 0x280
71 #define B43legacy_MMIO_DMA64_BASE3 0x2C0
72 #define B43legacy_MMIO_DMA64_BASE4 0x300
73 #define B43legacy_MMIO_DMA64_BASE5 0x340
75 #define B43legacy_MMIO_PIO1_BASE 0x300
76 #define B43legacy_MMIO_PIO2_BASE 0x310
77 #define B43legacy_MMIO_PIO3_BASE 0x320
78 #define B43legacy_MMIO_PIO4_BASE 0x330
80 #define B43legacy_MMIO_PHY_VER 0x3E0
81 #define B43legacy_MMIO_PHY_RADIO 0x3E2
82 #define B43legacy_MMIO_PHY0 0x3E6
83 #define B43legacy_MMIO_ANTENNA 0x3E8
84 #define B43legacy_MMIO_CHANNEL 0x3F0
85 #define B43legacy_MMIO_CHANNEL_EXT 0x3F4
86 #define B43legacy_MMIO_RADIO_CONTROL 0x3F6
87 #define B43legacy_MMIO_RADIO_DATA_HIGH 0x3F8
88 #define B43legacy_MMIO_RADIO_DATA_LOW 0x3FA
89 #define B43legacy_MMIO_PHY_CONTROL 0x3FC
90 #define B43legacy_MMIO_PHY_DATA 0x3FE
91 #define B43legacy_MMIO_MACFILTER_CONTROL 0x420
92 #define B43legacy_MMIO_MACFILTER_DATA 0x422
93 #define B43legacy_MMIO_RCMTA_COUNT 0x43C /* Receive Match Transmitter Addr */
94 #define B43legacy_MMIO_RADIO_HWENABLED_LO 0x49A
95 #define B43legacy_MMIO_GPIO_CONTROL 0x49C
96 #define B43legacy_MMIO_GPIO_MASK 0x49E
97 #define B43legacy_MMIO_TSF_0 0x632 /* core rev < 3 only */
98 #define B43legacy_MMIO_TSF_1 0x634 /* core rev < 3 only */
99 #define B43legacy_MMIO_TSF_2 0x636 /* core rev < 3 only */
100 #define B43legacy_MMIO_TSF_3 0x638 /* core rev < 3 only */
101 #define B43legacy_MMIO_RNG 0x65A
102 #define B43legacy_MMIO_POWERUP_DELAY 0x6A8
104 /* SPROM boardflags_lo values */
105 #define B43legacy_BFL_PACTRL 0x0002
106 #define B43legacy_BFL_RSSI 0x0008
107 #define B43legacy_BFL_EXTLNA 0x1000
109 /* GPIO register offset, in both ChipCommon and PCI core. */
110 #define B43legacy_GPIO_CONTROL 0x6c
113 #define B43legacy_SHM_SHARED 0x0001
114 #define B43legacy_SHM_WIRELESS 0x0002
115 #define B43legacy_SHM_HW 0x0004
116 #define B43legacy_SHM_UCODE 0x0300
118 /* SHM Routing modifiers */
119 #define B43legacy_SHM_AUTOINC_R 0x0200 /* Read Auto-increment */
120 #define B43legacy_SHM_AUTOINC_W 0x0100 /* Write Auto-increment */
121 #define B43legacy_SHM_AUTOINC_RW (B43legacy_SHM_AUTOINC_R | \
122 B43legacy_SHM_AUTOINC_W)
124 /* Misc SHM_SHARED offsets */
125 #define B43legacy_SHM_SH_WLCOREREV 0x0016 /* 802.11 core revision */
126 #define B43legacy_SHM_SH_HOSTFLO 0x005E /* Hostflags ucode opts (low) */
127 #define B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */
128 /* SHM_SHARED crypto engine */
129 #define B43legacy_SHM_SH_KEYIDXBLOCK 0x05D4 /* Key index/algorithm block */
130 /* SHM_SHARED beacon variables */
131 #define B43legacy_SHM_SH_BEACPHYCTL 0x0054 /* Beacon PHY TX control word */
132 /* SHM_SHARED ACK/CTS control */
133 #define B43legacy_SHM_SH_ACKCTSPHYCTL 0x0022 /* ACK/CTS PHY control word */
134 /* SHM_SHARED probe response variables */
135 #define B43legacy_SHM_SH_PRPHYCTL 0x0188 /* Probe Resp PHY TX control */
136 #define B43legacy_SHM_SH_PRMAXTIME 0x0074 /* Probe Response max time */
137 /* SHM_SHARED rate tables */
138 /* SHM_SHARED microcode soft registers */
139 #define B43legacy_SHM_SH_UCODEREV 0x0000 /* Microcode revision */
140 #define B43legacy_SHM_SH_UCODEPATCH 0x0002 /* Microcode patchlevel */
141 #define B43legacy_SHM_SH_UCODEDATE 0x0004 /* Microcode date */
142 #define B43legacy_SHM_SH_UCODETIME 0x0006 /* Microcode time */
144 #define B43legacy_UCODEFLAGS_OFFSET 0x005E
146 /* Hardware Radio Enable masks */
147 #define B43legacy_MMIO_RADIO_HWENABLED_HI_MASK (1 << 16)
148 #define B43legacy_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4)
150 /* HostFlags. See b43legacy_hf_read/write() */
151 #define B43legacy_HF_SYMW 0x00000002 /* G-PHY SYM workaround */
152 #define B43legacy_HF_GDCW 0x00000020 /* G-PHY DV cancel filter */
153 #define B43legacy_HF_OFDMPABOOST 0x00000040 /* Enable PA boost OFDM */
154 #define B43legacy_HF_EDCF 0x00000100 /* on if WME/MAC suspended */
156 /* MacFilter offsets. */
157 #define B43legacy_MACFILTER_SELF 0x0000
158 #define B43legacy_MACFILTER_BSSID 0x0003
159 #define B43legacy_MACFILTER_MAC 0x0010
162 #define B43legacy_PHYTYPE_B 0x01
163 #define B43legacy_PHYTYPE_G 0x02
166 #define B43legacy_PHY_G_LO_CONTROL 0x0810
167 #define B43legacy_PHY_ILT_G_CTRL 0x0472
168 #define B43legacy_PHY_ILT_G_DATA1 0x0473
169 #define B43legacy_PHY_ILT_G_DATA2 0x0474
170 #define B43legacy_PHY_G_PCTL 0x0029
171 #define B43legacy_PHY_RADIO_BITFIELD 0x0401
172 #define B43legacy_PHY_G_CRS 0x0429
173 #define B43legacy_PHY_NRSSILT_CTRL 0x0803
174 #define B43legacy_PHY_NRSSILT_DATA 0x0804
177 #define B43legacy_RADIOCTL_ID 0x01
179 /* MAC Control bitfield */
180 #define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */
181 #define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */
182 #define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */
183 #define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */
184 #define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */
185 #define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */
186 #define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */
187 #define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */
188 #define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */
191 #define B43legacy_SBF_MAC_ENABLED 0x00000001
192 #define B43legacy_SBF_CORE_READY 0x00000004
193 #define B43legacy_SBF_400 0x00000400 /*FIXME: fix name*/
194 #define B43legacy_SBF_XFER_REG_BYTESWAP 0x00010000
195 #define B43legacy_SBF_MODE_NOTADHOC 0x00020000
196 #define B43legacy_SBF_MODE_AP 0x00040000
197 #define B43legacy_SBF_RADIOREG_LOCK 0x00080000
198 #define B43legacy_SBF_MODE_MONITOR 0x00400000
199 #define B43legacy_SBF_MODE_PROMISC 0x01000000
200 #define B43legacy_SBF_PS1 0x02000000
201 #define B43legacy_SBF_PS2 0x04000000
202 #define B43legacy_SBF_NO_SSID_BCAST 0x08000000
203 #define B43legacy_SBF_TIME_UPDATE 0x10000000
205 /* 802.11 core specific TM State Low flags */
206 #define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
207 #define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */
208 #define B43legacy_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Ctrl Enbl */
209 #define B43legacy_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */
210 #define B43legacy_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */
212 /* 802.11 core specific TM State High flags */
213 #define B43legacy_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available */
214 #define B43legacy_TMSHIGH_GPHY 0x00010000 /* G-PHY avail (rev >= 5) */
216 #define B43legacy_UCODEFLAG_AUTODIV 0x0001
218 /* Generic-Interrupt reasons. */
219 #define B43legacy_IRQ_MAC_SUSPENDED 0x00000001
220 #define B43legacy_IRQ_BEACON 0x00000002
221 #define B43legacy_IRQ_TBTT_INDI 0x00000004 /* Target Beacon Transmit Time */
222 #define B43legacy_IRQ_BEACON_TX_OK 0x00000008
223 #define B43legacy_IRQ_BEACON_CANCEL 0x00000010
224 #define B43legacy_IRQ_ATIM_END 0x00000020
225 #define B43legacy_IRQ_PMQ 0x00000040
226 #define B43legacy_IRQ_PIO_WORKAROUND 0x00000100
227 #define B43legacy_IRQ_MAC_TXERR 0x00000200
228 #define B43legacy_IRQ_PHY_TXERR 0x00000800
229 #define B43legacy_IRQ_PMEVENT 0x00001000
230 #define B43legacy_IRQ_TIMER0 0x00002000
231 #define B43legacy_IRQ_TIMER1 0x00004000
232 #define B43legacy_IRQ_DMA 0x00008000
233 #define B43legacy_IRQ_TXFIFO_FLUSH_OK 0x00010000
234 #define B43legacy_IRQ_CCA_MEASURE_OK 0x00020000
235 #define B43legacy_IRQ_NOISESAMPLE_OK 0x00040000
236 #define B43legacy_IRQ_UCODE_DEBUG 0x08000000
237 #define B43legacy_IRQ_RFKILL 0x10000000
238 #define B43legacy_IRQ_TX_OK 0x20000000
239 #define B43legacy_IRQ_PHY_G_CHANGED 0x40000000
240 #define B43legacy_IRQ_TIMEOUT 0x80000000
242 #define B43legacy_IRQ_ALL 0xFFFFFFFF
243 #define B43legacy_IRQ_MASKTEMPLATE (B43legacy_IRQ_MAC_SUSPENDED | \
244 B43legacy_IRQ_BEACON | \
245 B43legacy_IRQ_TBTT_INDI | \
246 B43legacy_IRQ_ATIM_END | \
247 B43legacy_IRQ_PMQ | \
248 B43legacy_IRQ_MAC_TXERR | \
249 B43legacy_IRQ_PHY_TXERR | \
250 B43legacy_IRQ_DMA | \
251 B43legacy_IRQ_TXFIFO_FLUSH_OK | \
252 B43legacy_IRQ_NOISESAMPLE_OK | \
253 B43legacy_IRQ_UCODE_DEBUG | \
254 B43legacy_IRQ_RFKILL | \
257 /* Device specific rate values.
258 * The actual values defined here are (rate_in_mbps * 2).
259 * Some code depends on this. Don't change it. */
260 #define B43legacy_CCK_RATE_1MB 2
261 #define B43legacy_CCK_RATE_2MB 4
262 #define B43legacy_CCK_RATE_5MB 11
263 #define B43legacy_CCK_RATE_11MB 22
264 #define B43legacy_OFDM_RATE_6MB 12
265 #define B43legacy_OFDM_RATE_9MB 18
266 #define B43legacy_OFDM_RATE_12MB 24
267 #define B43legacy_OFDM_RATE_18MB 36
268 #define B43legacy_OFDM_RATE_24MB 48
269 #define B43legacy_OFDM_RATE_36MB 72
270 #define B43legacy_OFDM_RATE_48MB 96
271 #define B43legacy_OFDM_RATE_54MB 108
272 /* Convert a b43legacy rate value to a rate in 100kbps */
273 #define B43legacy_RATE_TO_100KBPS(rate) (((rate) * 10) / 2)
276 #define B43legacy_DEFAULT_SHORT_RETRY_LIMIT 7
277 #define B43legacy_DEFAULT_LONG_RETRY_LIMIT 4
279 /* Max size of a security key */
280 #define B43legacy_SEC_KEYSIZE 16
281 /* Security algorithms. */
283 B43legacy_SEC_ALGO_NONE
= 0, /* unencrypted, as of TX header. */
284 B43legacy_SEC_ALGO_WEP40
,
285 B43legacy_SEC_ALGO_TKIP
,
286 B43legacy_SEC_ALGO_AES
,
287 B43legacy_SEC_ALGO_WEP104
,
288 B43legacy_SEC_ALGO_AES_LEGACY
,
291 /* Core Information Registers */
292 #define B43legacy_CIR_BASE 0xf00
293 #define B43legacy_CIR_SBTPSFLAG (B43legacy_CIR_BASE + 0x18)
294 #define B43legacy_CIR_SBIMSTATE (B43legacy_CIR_BASE + 0x90)
295 #define B43legacy_CIR_SBINTVEC (B43legacy_CIR_BASE + 0x94)
296 #define B43legacy_CIR_SBTMSTATELOW (B43legacy_CIR_BASE + 0x98)
297 #define B43legacy_CIR_SBTMSTATEHIGH (B43legacy_CIR_BASE + 0x9c)
298 #define B43legacy_CIR_SBIMCONFIGLOW (B43legacy_CIR_BASE + 0xa8)
299 #define B43legacy_CIR_SB_ID_HI (B43legacy_CIR_BASE + 0xfc)
301 /* sbtmstatehigh state flags */
302 #define B43legacy_SBTMSTATEHIGH_SERROR 0x00000001
303 #define B43legacy_SBTMSTATEHIGH_BUSY 0x00000004
304 #define B43legacy_SBTMSTATEHIGH_TIMEOUT 0x00000020
305 #define B43legacy_SBTMSTATEHIGH_G_PHY_AVAIL 0x00010000
306 #define B43legacy_SBTMSTATEHIGH_COREFLAGS 0x1FFF0000
307 #define B43legacy_SBTMSTATEHIGH_DMA64BIT 0x10000000
308 #define B43legacy_SBTMSTATEHIGH_GATEDCLK 0x20000000
309 #define B43legacy_SBTMSTATEHIGH_BISTFAILED 0x40000000
310 #define B43legacy_SBTMSTATEHIGH_BISTCOMPLETE 0x80000000
312 /* sbimstate flags */
313 #define B43legacy_SBIMSTATE_IB_ERROR 0x20000
314 #define B43legacy_SBIMSTATE_TIMEOUT 0x40000
316 #define PFX KBUILD_MODNAME ": "
320 #ifdef CONFIG_B43LEGACY_DEBUG
321 # define B43legacy_WARN_ON(expr) \
323 if (unlikely((expr))) { \
324 printk(KERN_INFO PFX "Test (%s) failed at:" \
327 __LINE__, __FUNCTION__); \
330 # define B43legacy_BUG_ON(expr) \
332 if (unlikely((expr))) { \
333 printk(KERN_INFO PFX "Test (%s) failed\n", \
338 # define B43legacy_DEBUG 1
340 # define B43legacy_WARN_ON(x) do { /* nothing */ } while (0)
341 # define B43legacy_BUG_ON(x) do { /* nothing */ } while (0)
342 # define B43legacy_DEBUG 0
348 struct b43legacy_dmaring
;
349 struct b43legacy_pioqueue
;
351 /* The firmware file header */
352 #define B43legacy_FW_TYPE_UCODE 'u'
353 #define B43legacy_FW_TYPE_PCM 'p'
354 #define B43legacy_FW_TYPE_IV 'i'
355 struct b43legacy_fw_header
{
358 /* File format version */
361 /* Size of the data. For ucode and PCM this is in bytes.
362 * For IV this is number-of-ivs. */
364 } __attribute__((__packed__
));
366 /* Initial Value file format */
367 #define B43legacy_IV_OFFSET_MASK 0x7FFF
368 #define B43legacy_IV_32BIT 0x8000
369 struct b43legacy_iv
{
374 } data
__attribute__((__packed__
));
375 } __attribute__((__packed__
));
377 #define B43legacy_PHYMODE(phytype) (1 << (phytype))
378 #define B43legacy_PHYMODE_B B43legacy_PHYMODE \
379 ((B43legacy_PHYTYPE_B))
380 #define B43legacy_PHYMODE_G B43legacy_PHYMODE \
381 ((B43legacy_PHYTYPE_G))
383 /* Value pair to measure the LocalOscillator. */
384 struct b43legacy_lopair
{
389 #define B43legacy_LO_COUNT (14*4)
391 struct b43legacy_phy
{
392 /* Possible PHYMODEs on this PHY */
393 u8 possible_phymodes
;
394 /* GMODE bit enabled in MACCTL? */
396 /* Possible ieee80211 subsystem hwmodes for this PHY.
397 * Which mode is selected, depends on thr GMODE enabled bit */
398 #define B43legacy_MAX_PHYHWMODES 2
399 struct ieee80211_hw_mode hwmodes
[B43legacy_MAX_PHYHWMODES
];
403 /* B43legacy_PHYTYPE_ */
405 /* PHY revision number. */
408 u16 antenna_diversity
;
410 /* Radio versioning */
411 u16 radio_manuf
; /* Radio manufacturer */
412 u16 radio_ver
; /* Radio version */
414 u8 radio_rev
; /* Radio revision */
416 bool locked
; /* Only used in b43legacy_phy_{un}lock() */
417 bool dyn_tssi_tbl
; /* tssi2dbm is kmalloc()ed. */
419 /* ACI (adjacent channel interference) flags. */
421 bool aci_wlan_automatic
;
424 /* Radio switched on/off */
427 /* Values saved when turning the radio off.
428 * They are needed when turning it on again. */
437 /* LO Measurement Data.
438 * Use b43legacy_get_lopair() to get a value.
440 struct b43legacy_lopair
*_lo_pairs
;
441 /* TSSI to dBm table in use */
443 /* idle TSSI value */
445 /* Target idle TSSI */
447 /* Current idle TSSI */
450 /* LocalOscillator control values. */
451 struct b43legacy_txpower_lo_control
*lo_control
;
452 /* Values from b43legacy_calc_loopback_gain() */
453 s16 max_lb_gain
; /* Maximum Loopback gain in hdB */
454 s16 trsw_rx_gain
; /* TRSW RX gain in hdB */
455 s16 lna_lod_gain
; /* LNA lod */
456 s16 lna_gain
; /* LNA */
457 s16 pga_gain
; /* PGA */
459 /* PHY lock for core.rev < 3
460 * This lock is only used by b43legacy_phy_{un}lock()
464 /* Desired TX power level (in dBm). This is set by the user and
465 * adjusted in b43legacy_phy_xmitpower(). */
468 /* Values from b43legacy_calc_loopback_gain() */
469 u16 loopback_gain
[2];
471 /* TX Power control values. */
474 /* Current Radio Attenuation for TXpower recalculation. */
476 /* Current Baseband Attenuation for TXpower recalculation. */
478 /* Current TXpower control value for TXpower recalculation. */
487 #ifdef CONFIG_B43LEGACY_DEBUG
488 bool manual_txpower_control
; /* Manual TX-power control enabled? */
490 /* Current Interference Mitigation mode */
492 /* Stack of saved values from the Interference Mitigation code.
493 * Each value in the stack is layed out as follows:
495 * bit 12-15: register ID
497 * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
499 #define B43legacy_INTERFSTACK_SIZE 26
500 u32 interfstack
[B43legacy_INTERFSTACK_SIZE
];
502 /* Saved values from the NRSSI Slope calculation */
505 /* In memory nrssi lookup table. */
508 /* current channel */
516 /* Data structures for DMA transmission, per 80211 core. */
517 struct b43legacy_dma
{
518 struct b43legacy_dmaring
*tx_ring0
;
519 struct b43legacy_dmaring
*tx_ring1
;
520 struct b43legacy_dmaring
*tx_ring2
;
521 struct b43legacy_dmaring
*tx_ring3
;
522 struct b43legacy_dmaring
*tx_ring4
;
523 struct b43legacy_dmaring
*tx_ring5
;
525 struct b43legacy_dmaring
*rx_ring0
;
526 struct b43legacy_dmaring
*rx_ring3
; /* only on core.rev < 5 */
529 /* Data structures for PIO transmission, per 80211 core. */
530 struct b43legacy_pio
{
531 struct b43legacy_pioqueue
*queue0
;
532 struct b43legacy_pioqueue
*queue1
;
533 struct b43legacy_pioqueue
*queue2
;
534 struct b43legacy_pioqueue
*queue3
;
537 /* Context information for a noise calculation (Link Quality). */
538 struct b43legacy_noise_calculation
{
540 bool calculation_running
;
545 struct b43legacy_stats
{
547 /* Store the last TX/RX times here for updating the leds. */
548 unsigned long last_tx
;
549 unsigned long last_rx
;
552 struct b43legacy_key
{
558 struct b43legacy_wldev
;
560 /* Data structure for the WLAN parts (802.11 cores) of the b43legacy chip. */
561 struct b43legacy_wl
{
562 /* Pointer to the active wireless device on this chip */
563 struct b43legacy_wldev
*current_dev
;
564 /* Pointer to the ieee80211 hardware data structure */
565 struct ieee80211_hw
*hw
;
567 spinlock_t irq_lock
; /* locks IRQ */
568 struct mutex mutex
; /* locks wireless core state */
569 spinlock_t leds_lock
; /* lock for leds */
571 /* We can only have one operating interface (802.11 core)
572 * at a time. General information about this interface follows.
575 /* Opaque ID of the operating interface from the ieee80211
576 * subsystem. Do not modify.
579 /* MAC address (can be NULL). */
580 u8 mac_addr
[ETH_ALEN
];
581 /* Current BSSID (can be NULL). */
583 /* Interface type. (IEEE80211_IF_TYPE_XXX) */
585 /* Is the card operating in AP, STA or IBSS mode? */
588 unsigned int filter_flags
;
589 /* Stats about the wireless interface */
590 struct ieee80211_low_level_stats ieee_stats
;
594 char rng_name
[30 + 1];
596 /* The RF-kill button */
597 struct b43legacy_rfkill rfkill
;
599 /* List of all wireless devices on this chip */
600 struct list_head devlist
;
604 /* Pointers to the firmware data and meta information about it. */
605 struct b43legacy_firmware
{
607 const struct firmware
*ucode
;
609 const struct firmware
*pcm
;
610 /* Initial MMIO values for the firmware */
611 const struct firmware
*initvals
;
612 /* Initial MMIO values for the firmware, band-specific */
613 const struct firmware
*initvals_band
;
614 /* Firmware revision */
616 /* Firmware patchlevel */
620 /* Device (802.11 core) initialization status. */
622 B43legacy_STAT_UNINIT
= 0, /* Uninitialized. */
623 B43legacy_STAT_INITIALIZED
= 1, /* Initialized, not yet started. */
624 B43legacy_STAT_STARTED
= 2, /* Up and running. */
626 #define b43legacy_status(wldev) atomic_read(&(wldev)->__init_status)
627 #define b43legacy_set_status(wldev, stat) do { \
628 atomic_set(&(wldev)->__init_status, (stat)); \
632 /* *** --- HOW LOCKING WORKS IN B43legacy --- ***
634 * You should always acquire both, wl->mutex and wl->irq_lock unless:
635 * - You don't need to acquire wl->irq_lock, if the interface is stopped.
636 * - You don't need to acquire wl->mutex in the IRQ handler, IRQ tasklet
637 * and packet TX path (and _ONLY_ there.)
640 /* Data structure for one wireless device (802.11 core) */
641 struct b43legacy_wldev
{
642 struct ssb_device
*dev
;
643 struct b43legacy_wl
*wl
;
645 /* The device initialization status.
646 * Use b43legacy_status() to query. */
647 atomic_t __init_status
;
648 /* Saved init status for handling suspend. */
649 int suspend_init_status
;
651 bool __using_pio
; /* Using pio rather than dma. */
652 bool bad_frames_preempt
;/* Use "Bad Frames Preemption". */
653 bool reg124_set_0x4
; /* Variable to keep track of IRQ. */
654 bool short_preamble
; /* TRUE if using short preamble. */
655 bool short_slot
; /* TRUE if using short slot timing. */
656 bool radio_hw_enable
; /* State of radio hardware enable bit. */
658 /* PHY/Radio device. */
659 struct b43legacy_phy phy
;
662 struct b43legacy_dma dma
;
664 struct b43legacy_pio pio
;
667 /* Various statistics about the physical device. */
668 struct b43legacy_stats stats
;
670 /* The device LEDs. */
671 struct b43legacy_led led_tx
;
672 struct b43legacy_led led_rx
;
673 struct b43legacy_led led_assoc
;
674 struct b43legacy_led led_radio
;
676 /* Reason code of the last interrupt. */
679 /* saved irq enable/disable state bitfield. */
681 /* Link Quality calculation context. */
682 struct b43legacy_noise_calculation noisecalc
;
683 /* if > 0 MAC is suspended. if == 0 MAC is enabled. */
686 /* Interrupt Service Routine tasklet (bottom-half) */
687 struct tasklet_struct isr_tasklet
;
690 struct delayed_work periodic_work
;
691 unsigned int periodic_state
;
693 struct work_struct restart_work
;
695 /* encryption/decryption */
696 u16 ktp
; /* Key table pointer */
698 struct b43legacy_key key
[58];
700 /* Cached beacon template while uploading the template. */
701 struct sk_buff
*cached_beacon
;
704 struct b43legacy_firmware fw
;
706 /* Devicelist in struct b43legacy_wl (all 802.11 cores) */
707 struct list_head list
;
709 /* Debugging stuff follows. */
710 #ifdef CONFIG_B43LEGACY_DEBUG
711 struct b43legacy_dfsentry
*dfsentry
;
717 struct b43legacy_wl
*hw_to_b43legacy_wl(struct ieee80211_hw
*hw
)
722 /* Helper function, which returns a boolean.
723 * TRUE, if PIO is used; FALSE, if DMA is used.
725 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
727 int b43legacy_using_pio(struct b43legacy_wldev
*dev
)
729 return dev
->__using_pio
;
731 #elif defined(CONFIG_B43LEGACY_DMA)
733 int b43legacy_using_pio(struct b43legacy_wldev
*dev
)
737 #elif defined(CONFIG_B43LEGACY_PIO)
739 int b43legacy_using_pio(struct b43legacy_wldev
*dev
)
744 # error "Using neither DMA nor PIO? Confused..."
749 struct b43legacy_wldev
*dev_to_b43legacy_wldev(struct device
*dev
)
751 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
752 return ssb_get_drvdata(ssb_dev
);
755 /* Is the device operating in a specified mode (IEEE80211_IF_TYPE_XXX). */
757 int b43legacy_is_mode(struct b43legacy_wl
*wl
, int type
)
759 return (wl
->operating
&&
760 wl
->if_type
== type
);
764 bool is_bcm_board_vendor(struct b43legacy_wldev
*dev
)
766 return (dev
->dev
->bus
->boardinfo
.vendor
== PCI_VENDOR_ID_BROADCOM
);
770 u16
b43legacy_read16(struct b43legacy_wldev
*dev
, u16 offset
)
772 return ssb_read16(dev
->dev
, offset
);
776 void b43legacy_write16(struct b43legacy_wldev
*dev
, u16 offset
, u16 value
)
778 ssb_write16(dev
->dev
, offset
, value
);
782 u32
b43legacy_read32(struct b43legacy_wldev
*dev
, u16 offset
)
784 return ssb_read32(dev
->dev
, offset
);
788 void b43legacy_write32(struct b43legacy_wldev
*dev
, u16 offset
, u32 value
)
790 ssb_write32(dev
->dev
, offset
, value
);
794 struct b43legacy_lopair
*b43legacy_get_lopair(struct b43legacy_phy
*phy
,
795 u16 radio_attenuation
,
796 u16 baseband_attenuation
)
798 return phy
->_lo_pairs
+ (radio_attenuation
799 + 14 * (baseband_attenuation
/ 2));
804 /* Message printing */
805 void b43legacyinfo(struct b43legacy_wl
*wl
, const char *fmt
, ...)
806 __attribute__((format(printf
, 2, 3)));
807 void b43legacyerr(struct b43legacy_wl
*wl
, const char *fmt
, ...)
808 __attribute__((format(printf
, 2, 3)));
809 void b43legacywarn(struct b43legacy_wl
*wl
, const char *fmt
, ...)
810 __attribute__((format(printf
, 2, 3)));
812 void b43legacydbg(struct b43legacy_wl
*wl
, const char *fmt
, ...)
813 __attribute__((format(printf
, 2, 3)));
815 # define b43legacydbg(wl, fmt...) do { /* nothing */ } while (0)
819 /** Limit a value between two limits */
823 #define limit_value(value, min, max) \
825 typeof(value) __value = (value); \
826 typeof(value) __min = (min); \
827 typeof(value) __max = (max); \
828 if (__value < __min) \
830 else if (__value > __max) \
835 /* Macros for printing a value in Q5.2 format */
836 #define Q52_FMT "%u.%u"
837 #define Q52_ARG(q52) ((q52) / 4), (((q52) & 3) * 100 / 4)
839 #endif /* B43legacy_H_ */