UML - use correct register file size everywhere
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-x86_64 / cacheflush.h
blobab1cb5c7dc9296c91df181db8fe82b3aaf2ab2ad
1 #ifndef _X8664_CACHEFLUSH_H
2 #define _X8664_CACHEFLUSH_H
4 /* Keep includes the same across arches. */
5 #include <linux/mm.h>
7 /* Caches aren't brain-dead on the intel. */
8 #define flush_cache_all() do { } while (0)
9 #define flush_cache_mm(mm) do { } while (0)
10 #define flush_cache_dup_mm(mm) do { } while (0)
11 #define flush_cache_range(vma, start, end) do { } while (0)
12 #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
13 #define flush_dcache_page(page) do { } while (0)
14 #define flush_dcache_mmap_lock(mapping) do { } while (0)
15 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
16 #define flush_icache_range(start, end) do { } while (0)
17 #define flush_icache_page(vma,pg) do { } while (0)
18 #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
19 #define flush_cache_vmap(start, end) do { } while (0)
20 #define flush_cache_vunmap(start, end) do { } while (0)
22 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
23 memcpy(dst, src, len)
24 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
25 memcpy(dst, src, len)
27 void global_flush_tlb(void);
28 int change_page_attr(struct page *page, int numpages, pgprot_t prot);
29 int change_page_attr_addr(unsigned long addr, int numpages, pgprot_t prot);
31 #ifdef CONFIG_DEBUG_RODATA
32 void mark_rodata_ro(void);
33 #endif
35 #endif /* _X8664_CACHEFLUSH_H */