arch/arm/mach-s5p64x0/dma.c

   1 /* linux/arch/arm/mach-s5p64x0/dma.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * Copyright (C) 2010 Samsung Electronics Co. Ltd.
   7  *      Jaswinder Singh <jassi.brar@samsung.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 #include <linux/dma-mapping.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/pl330.h>
  27
  28 #include <asm/irq.h>
  29
  30 #include <mach/map.h>
  31 #include <mach/irqs.h>
  32 #include <mach/regs-clock.h>
  33 #include <mach/dma.h>
  34
  35 #include <plat/cpu.h>
  36 #include <plat/devs.h>
  37 #include <plat/irqs.h>
  38
  39 static u64 dma_dmamask = DMA_BIT_MASK(32);
  40
  41 struct dma_pl330_peri s5p6440_pdma_peri[22] = {
  42         {
  43                 .peri_id = (u8)DMACH_UART0_RX,
  44                 .rqtype = DEVTOMEM,
  45         }, {
  46                 .peri_id = (u8)DMACH_UART0_TX,
  47                 .rqtype = MEMTODEV,
  48         }, {
  49                 .peri_id = (u8)DMACH_UART1_RX,
  50                 .rqtype = DEVTOMEM,
  51         }, {
  52                 .peri_id = (u8)DMACH_UART1_TX,
  53                 .rqtype = MEMTODEV,
  54         }, {
  55                 .peri_id = (u8)DMACH_UART2_RX,
  56                 .rqtype = DEVTOMEM,
  57         }, {
  58                 .peri_id = (u8)DMACH_UART2_TX,
  59                 .rqtype = MEMTODEV,
  60         }, {
  61                 .peri_id = (u8)DMACH_UART3_RX,
  62                 .rqtype = DEVTOMEM,
  63         }, {
  64                 .peri_id = (u8)DMACH_UART3_TX,
  65                 .rqtype = MEMTODEV,
  66         }, {
  67                 .peri_id = DMACH_MAX,
  68         }, {
  69                 .peri_id = DMACH_MAX,
  70         }, {
  71                 .peri_id = (u8)DMACH_PCM0_TX,
  72                 .rqtype = MEMTODEV,
  73         }, {
  74                 .peri_id = (u8)DMACH_PCM0_RX,
  75                 .rqtype = DEVTOMEM,
  76         }, {
  77                 .peri_id = (u8)DMACH_I2S0_TX,
  78                 .rqtype = MEMTODEV,
  79         }, {
  80                 .peri_id = (u8)DMACH_I2S0_RX,
  81                 .rqtype = DEVTOMEM,
  82         }, {
  83                 .peri_id = (u8)DMACH_SPI0_TX,
  84                 .rqtype = MEMTODEV,
  85         }, {
  86                 .peri_id = (u8)DMACH_SPI0_RX,
  87                 .rqtype = DEVTOMEM,
  88         }, {
  89                 .peri_id = (u8)DMACH_MAX,
  90         }, {
  91                 .peri_id = (u8)DMACH_MAX,
  92         }, {
  93                 .peri_id = (u8)DMACH_MAX,
  94         }, {
  95                 .peri_id = (u8)DMACH_MAX,
  96         }, {
  97                 .peri_id = (u8)DMACH_SPI1_TX,
  98                 .rqtype = MEMTODEV,
  99         }, {
 100                 .peri_id = (u8)DMACH_SPI1_RX,
 101                 .rqtype = DEVTOMEM,
 102         },
 103 };
 104
 105 struct dma_pl330_platdata s5p6440_pdma_pdata = {
 106         .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
 107         .peri = s5p6440_pdma_peri,
 108 };
 109
 110 struct dma_pl330_peri s5p6450_pdma_peri[32] = {
 111         {
 112                 .peri_id = (u8)DMACH_UART0_RX,
 113                 .rqtype = DEVTOMEM,
 114         }, {
 115                 .peri_id = (u8)DMACH_UART0_TX,
 116                 .rqtype = MEMTODEV,
 117         }, {
 118                 .peri_id = (u8)DMACH_UART1_RX,
 119                 .rqtype = DEVTOMEM,
 120         }, {
 121                 .peri_id = (u8)DMACH_UART1_TX,
 122                 .rqtype = MEMTODEV,
 123         }, {
 124                 .peri_id = (u8)DMACH_UART2_RX,
 125                 .rqtype = DEVTOMEM,
 126         }, {
 127                 .peri_id = (u8)DMACH_UART2_TX,
 128                 .rqtype = MEMTODEV,
 129         }, {
 130                 .peri_id = (u8)DMACH_UART3_RX,
 131                 .rqtype = DEVTOMEM,
 132         }, {
 133                 .peri_id = (u8)DMACH_UART3_TX,
 134                 .rqtype = MEMTODEV,
 135         }, {
 136                 .peri_id = (u8)DMACH_UART4_RX,
 137                 .rqtype = DEVTOMEM,
 138         }, {
 139                 .peri_id = (u8)DMACH_UART4_TX,
 140                 .rqtype = MEMTODEV,
 141         }, {
 142                 .peri_id = (u8)DMACH_PCM0_TX,
 143                 .rqtype = MEMTODEV,
 144         }, {
 145                 .peri_id = (u8)DMACH_PCM0_RX,
 146                 .rqtype = DEVTOMEM,
 147         }, {
 148                 .peri_id = (u8)DMACH_I2S0_TX,
 149                 .rqtype = MEMTODEV,
 150         }, {
 151                 .peri_id = (u8)DMACH_I2S0_RX,
 152                 .rqtype = DEVTOMEM,
 153         }, {
 154                 .peri_id = (u8)DMACH_SPI0_TX,
 155                 .rqtype = MEMTODEV,
 156         }, {
 157                 .peri_id = (u8)DMACH_SPI0_RX,
 158                 .rqtype = DEVTOMEM,
 159         }, {
 160                 .peri_id = (u8)DMACH_PCM1_TX,
 161                 .rqtype = MEMTODEV,
 162         }, {
 163                 .peri_id = (u8)DMACH_PCM1_RX,
 164                 .rqtype = DEVTOMEM,
 165         }, {
 166                 .peri_id = (u8)DMACH_PCM2_TX,
 167                 .rqtype = MEMTODEV,
 168         }, {
 169                 .peri_id = (u8)DMACH_PCM2_RX,
 170                 .rqtype = DEVTOMEM,
 171         }, {
 172                 .peri_id = (u8)DMACH_SPI1_TX,
 173                 .rqtype = MEMTODEV,
 174         }, {
 175                 .peri_id = (u8)DMACH_SPI1_RX,
 176                 .rqtype = DEVTOMEM,
 177         }, {
 178                 .peri_id = (u8)DMACH_USI_TX,
 179                 .rqtype = MEMTODEV,
 180         }, {
 181                 .peri_id = (u8)DMACH_USI_RX,
 182                 .rqtype = DEVTOMEM,
 183         }, {
 184                 .peri_id = (u8)DMACH_MAX,
 185         }, {
 186                 .peri_id = (u8)DMACH_I2S1_TX,
 187                 .rqtype = MEMTODEV,
 188         }, {
 189                 .peri_id = (u8)DMACH_I2S1_RX,
 190                 .rqtype = DEVTOMEM,
 191         }, {
 192                 .peri_id = (u8)DMACH_I2S2_TX,
 193                 .rqtype = MEMTODEV,
 194         }, {
 195                 .peri_id = (u8)DMACH_I2S2_RX,
 196                 .rqtype = DEVTOMEM,
 197         }, {
 198                 .peri_id = (u8)DMACH_PWM,
 199         }, {
 200                 .peri_id = (u8)DMACH_UART5_RX,
 201                 .rqtype = DEVTOMEM,
 202         }, {
 203                 .peri_id = (u8)DMACH_UART5_TX,
 204                 .rqtype = MEMTODEV,
 205         },
 206 };
 207
 208 struct dma_pl330_platdata s5p6450_pdma_pdata = {
 209         .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
 210         .peri = s5p6450_pdma_peri,
 211 };
 212
 213 struct amba_device s5p64x0_device_pdma = {
 214         .dev = {
 215                 .init_name = "dma-pl330",
 216                 .dma_mask = &dma_dmamask,
 217                 .coherent_dma_mask = DMA_BIT_MASK(32),
 218         },
 219         .res = {
 220                 .start = S5P64X0_PA_PDMA,
 221                 .end = S5P64X0_PA_PDMA + SZ_4K,
 222                 .flags = IORESOURCE_MEM,
 223         },
 224         .irq = {IRQ_DMA0, NO_IRQ},
 225         .periphid = 0x00041330,
 226 };
 227
 228 static int __init s5p64x0_dma_init(void)
 229 {
 230         if (soc_is_s5p6450())
 231                 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
 232         else
 233                 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
 234
 235         amba_device_register(&s5p64x0_device_pdma, &iomem_resource);
 236
 237         return 0;
 238 }
 239 arch_initcall(s5p64x0_dma_init);