ARM: 6071/1: perf-events: allow modules to query the number of hardware counters
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / kernel / ptrace.c
blob3f562a7c0a99445f3747ec0d0198d4f53a4d83fd
1 /*
2 * linux/arch/arm/kernel/ptrace.c
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/mm.h>
15 #include <linux/smp.h>
16 #include <linux/ptrace.h>
17 #include <linux/user.h>
18 #include <linux/security.h>
19 #include <linux/init.h>
20 #include <linux/signal.h>
21 #include <linux/uaccess.h>
23 #include <asm/pgtable.h>
24 #include <asm/system.h>
25 #include <asm/traps.h>
27 #include "ptrace.h"
29 #define REG_PC 15
30 #define REG_PSR 16
32 * does not yet catch signals sent when the child dies.
33 * in exit.c or in signal.c.
36 #if 0
38 * Breakpoint SWI instruction: SWI &9F0001
40 #define BREAKINST_ARM 0xef9f0001
41 #define BREAKINST_THUMB 0xdf00 /* fill this in later */
42 #else
44 * New breakpoints - use an undefined instruction. The ARM architecture
45 * reference manual guarantees that the following instruction space
46 * will produce an undefined instruction exception on all CPUs:
48 * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
49 * Thumb: 1101 1110 xxxx xxxx
51 #define BREAKINST_ARM 0xe7f001f0
52 #define BREAKINST_THUMB 0xde01
53 #endif
56 * this routine will get a word off of the processes privileged stack.
57 * the offset is how far from the base addr as stored in the THREAD.
58 * this routine assumes that all the privileged stacks are in our
59 * data space.
61 static inline long get_user_reg(struct task_struct *task, int offset)
63 return task_pt_regs(task)->uregs[offset];
67 * this routine will put a word on the processes privileged stack.
68 * the offset is how far from the base addr as stored in the THREAD.
69 * this routine assumes that all the privileged stacks are in our
70 * data space.
72 static inline int
73 put_user_reg(struct task_struct *task, int offset, long data)
75 struct pt_regs newregs, *regs = task_pt_regs(task);
76 int ret = -EINVAL;
78 newregs = *regs;
79 newregs.uregs[offset] = data;
81 if (valid_user_regs(&newregs)) {
82 regs->uregs[offset] = data;
83 ret = 0;
86 return ret;
89 static inline int
90 read_u32(struct task_struct *task, unsigned long addr, u32 *res)
92 int ret;
94 ret = access_process_vm(task, addr, res, sizeof(*res), 0);
96 return ret == sizeof(*res) ? 0 : -EIO;
99 static inline int
100 read_instr(struct task_struct *task, unsigned long addr, u32 *res)
102 int ret;
104 if (addr & 1) {
105 u16 val;
106 ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
107 ret = ret == sizeof(val) ? 0 : -EIO;
108 *res = val;
109 } else {
110 u32 val;
111 ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
112 ret = ret == sizeof(val) ? 0 : -EIO;
113 *res = val;
115 return ret;
119 * Get value of register `rn' (in the instruction)
121 static unsigned long
122 ptrace_getrn(struct task_struct *child, unsigned long insn)
124 unsigned int reg = (insn >> 16) & 15;
125 unsigned long val;
127 val = get_user_reg(child, reg);
128 if (reg == 15)
129 val += 8;
131 return val;
135 * Get value of operand 2 (in an ALU instruction)
137 static unsigned long
138 ptrace_getaluop2(struct task_struct *child, unsigned long insn)
140 unsigned long val;
141 int shift;
142 int type;
144 if (insn & 1 << 25) {
145 val = insn & 255;
146 shift = (insn >> 8) & 15;
147 type = 3;
148 } else {
149 val = get_user_reg (child, insn & 15);
151 if (insn & (1 << 4))
152 shift = (int)get_user_reg (child, (insn >> 8) & 15);
153 else
154 shift = (insn >> 7) & 31;
156 type = (insn >> 5) & 3;
159 switch (type) {
160 case 0: val <<= shift; break;
161 case 1: val >>= shift; break;
162 case 2:
163 val = (((signed long)val) >> shift);
164 break;
165 case 3:
166 val = (val >> shift) | (val << (32 - shift));
167 break;
169 return val;
173 * Get value of operand 2 (in a LDR instruction)
175 static unsigned long
176 ptrace_getldrop2(struct task_struct *child, unsigned long insn)
178 unsigned long val;
179 int shift;
180 int type;
182 val = get_user_reg(child, insn & 15);
183 shift = (insn >> 7) & 31;
184 type = (insn >> 5) & 3;
186 switch (type) {
187 case 0: val <<= shift; break;
188 case 1: val >>= shift; break;
189 case 2:
190 val = (((signed long)val) >> shift);
191 break;
192 case 3:
193 val = (val >> shift) | (val << (32 - shift));
194 break;
196 return val;
199 #define OP_MASK 0x01e00000
200 #define OP_AND 0x00000000
201 #define OP_EOR 0x00200000
202 #define OP_SUB 0x00400000
203 #define OP_RSB 0x00600000
204 #define OP_ADD 0x00800000
205 #define OP_ADC 0x00a00000
206 #define OP_SBC 0x00c00000
207 #define OP_RSC 0x00e00000
208 #define OP_ORR 0x01800000
209 #define OP_MOV 0x01a00000
210 #define OP_BIC 0x01c00000
211 #define OP_MVN 0x01e00000
213 static unsigned long
214 get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
216 u32 alt = 0;
218 switch (insn & 0x0e000000) {
219 case 0x00000000:
220 case 0x02000000: {
222 * data processing
224 long aluop1, aluop2, ccbit;
226 if ((insn & 0x0fffffd0) == 0x012fff10) {
228 * bx or blx
230 alt = get_user_reg(child, insn & 15);
231 break;
235 if ((insn & 0xf000) != 0xf000)
236 break;
238 aluop1 = ptrace_getrn(child, insn);
239 aluop2 = ptrace_getaluop2(child, insn);
240 ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
242 switch (insn & OP_MASK) {
243 case OP_AND: alt = aluop1 & aluop2; break;
244 case OP_EOR: alt = aluop1 ^ aluop2; break;
245 case OP_SUB: alt = aluop1 - aluop2; break;
246 case OP_RSB: alt = aluop2 - aluop1; break;
247 case OP_ADD: alt = aluop1 + aluop2; break;
248 case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
249 case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
250 case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
251 case OP_ORR: alt = aluop1 | aluop2; break;
252 case OP_MOV: alt = aluop2; break;
253 case OP_BIC: alt = aluop1 & ~aluop2; break;
254 case OP_MVN: alt = ~aluop2; break;
256 break;
259 case 0x04000000:
260 case 0x06000000:
262 * ldr
264 if ((insn & 0x0010f000) == 0x0010f000) {
265 unsigned long base;
267 base = ptrace_getrn(child, insn);
268 if (insn & 1 << 24) {
269 long aluop2;
271 if (insn & 0x02000000)
272 aluop2 = ptrace_getldrop2(child, insn);
273 else
274 aluop2 = insn & 0xfff;
276 if (insn & 1 << 23)
277 base += aluop2;
278 else
279 base -= aluop2;
281 read_u32(child, base, &alt);
283 break;
285 case 0x08000000:
287 * ldm
289 if ((insn & 0x00108000) == 0x00108000) {
290 unsigned long base;
291 unsigned int nr_regs;
293 if (insn & (1 << 23)) {
294 nr_regs = hweight16(insn & 65535) << 2;
296 if (!(insn & (1 << 24)))
297 nr_regs -= 4;
298 } else {
299 if (insn & (1 << 24))
300 nr_regs = -4;
301 else
302 nr_regs = 0;
305 base = ptrace_getrn(child, insn);
307 read_u32(child, base + nr_regs, &alt);
308 break;
310 break;
312 case 0x0a000000: {
314 * bl or b
316 signed long displ;
317 /* It's a branch/branch link: instead of trying to
318 * figure out whether the branch will be taken or not,
319 * we'll put a breakpoint at both locations. This is
320 * simpler, more reliable, and probably not a whole lot
321 * slower than the alternative approach of emulating the
322 * branch.
324 displ = (insn & 0x00ffffff) << 8;
325 displ = (displ >> 6) + 8;
326 if (displ != 0 && displ != 4)
327 alt = pc + displ;
329 break;
332 return alt;
335 static int
336 swap_insn(struct task_struct *task, unsigned long addr,
337 void *old_insn, void *new_insn, int size)
339 int ret;
341 ret = access_process_vm(task, addr, old_insn, size, 0);
342 if (ret == size)
343 ret = access_process_vm(task, addr, new_insn, size, 1);
344 return ret;
347 static void
348 add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
350 int nr = dbg->nsaved;
352 if (nr < 2) {
353 u32 new_insn = BREAKINST_ARM;
354 int res;
356 res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
358 if (res == 4) {
359 dbg->bp[nr].address = addr;
360 dbg->nsaved += 1;
362 } else
363 printk(KERN_ERR "ptrace: too many breakpoints\n");
367 * Clear one breakpoint in the user program. We copy what the hardware
368 * does and use bit 0 of the address to indicate whether this is a Thumb
369 * breakpoint or an ARM breakpoint.
371 static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
373 unsigned long addr = bp->address;
374 union debug_insn old_insn;
375 int ret;
377 if (addr & 1) {
378 ret = swap_insn(task, addr & ~1, &old_insn.thumb,
379 &bp->insn.thumb, 2);
381 if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
382 printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
383 "0x%08lx (0x%04x)\n", task->comm,
384 task_pid_nr(task), addr, old_insn.thumb);
385 } else {
386 ret = swap_insn(task, addr & ~3, &old_insn.arm,
387 &bp->insn.arm, 4);
389 if (ret != 4 || old_insn.arm != BREAKINST_ARM)
390 printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
391 "0x%08lx (0x%08x)\n", task->comm,
392 task_pid_nr(task), addr, old_insn.arm);
396 void ptrace_set_bpt(struct task_struct *child)
398 struct pt_regs *regs;
399 unsigned long pc;
400 u32 insn;
401 int res;
403 regs = task_pt_regs(child);
404 pc = instruction_pointer(regs);
406 if (thumb_mode(regs)) {
407 printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
408 return;
411 res = read_instr(child, pc, &insn);
412 if (!res) {
413 struct debug_info *dbg = &child->thread.debug;
414 unsigned long alt;
416 dbg->nsaved = 0;
418 alt = get_branch_address(child, pc, insn);
419 if (alt)
420 add_breakpoint(child, dbg, alt);
423 * Note that we ignore the result of setting the above
424 * breakpoint since it may fail. When it does, this is
425 * not so much an error, but a forewarning that we may
426 * be receiving a prefetch abort shortly.
428 * If we don't set this breakpoint here, then we can
429 * lose control of the thread during single stepping.
431 if (!alt || predicate(insn) != PREDICATE_ALWAYS)
432 add_breakpoint(child, dbg, pc + 4);
437 * Ensure no single-step breakpoint is pending. Returns non-zero
438 * value if child was being single-stepped.
440 void ptrace_cancel_bpt(struct task_struct *child)
442 int i, nsaved = child->thread.debug.nsaved;
444 child->thread.debug.nsaved = 0;
446 if (nsaved > 2) {
447 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
448 nsaved = 2;
451 for (i = 0; i < nsaved; i++)
452 clear_breakpoint(child, &child->thread.debug.bp[i]);
455 void user_disable_single_step(struct task_struct *task)
457 task->ptrace &= ~PT_SINGLESTEP;
458 ptrace_cancel_bpt(task);
461 void user_enable_single_step(struct task_struct *task)
463 task->ptrace |= PT_SINGLESTEP;
467 * Called by kernel/ptrace.c when detaching..
469 void ptrace_disable(struct task_struct *child)
471 user_disable_single_step(child);
475 * Handle hitting a breakpoint.
477 void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
479 siginfo_t info;
481 ptrace_cancel_bpt(tsk);
483 info.si_signo = SIGTRAP;
484 info.si_errno = 0;
485 info.si_code = TRAP_BRKPT;
486 info.si_addr = (void __user *)instruction_pointer(regs);
488 force_sig_info(SIGTRAP, &info, tsk);
491 static int break_trap(struct pt_regs *regs, unsigned int instr)
493 ptrace_break(current, regs);
494 return 0;
497 static struct undef_hook arm_break_hook = {
498 .instr_mask = 0x0fffffff,
499 .instr_val = 0x07f001f0,
500 .cpsr_mask = PSR_T_BIT,
501 .cpsr_val = 0,
502 .fn = break_trap,
505 static struct undef_hook thumb_break_hook = {
506 .instr_mask = 0xffff,
507 .instr_val = 0xde01,
508 .cpsr_mask = PSR_T_BIT,
509 .cpsr_val = PSR_T_BIT,
510 .fn = break_trap,
513 static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr)
515 unsigned int instr2;
516 void __user *pc;
518 /* Check the second half of the instruction. */
519 pc = (void __user *)(instruction_pointer(regs) + 2);
521 if (processor_mode(regs) == SVC_MODE) {
522 instr2 = *(u16 *) pc;
523 } else {
524 get_user(instr2, (u16 __user *)pc);
527 if (instr2 == 0xa000) {
528 ptrace_break(current, regs);
529 return 0;
530 } else {
531 return 1;
535 static struct undef_hook thumb2_break_hook = {
536 .instr_mask = 0xffff,
537 .instr_val = 0xf7f0,
538 .cpsr_mask = PSR_T_BIT,
539 .cpsr_val = PSR_T_BIT,
540 .fn = thumb2_break_trap,
543 static int __init ptrace_break_init(void)
545 register_undef_hook(&arm_break_hook);
546 register_undef_hook(&thumb_break_hook);
547 register_undef_hook(&thumb2_break_hook);
548 return 0;
551 core_initcall(ptrace_break_init);
554 * Read the word at offset "off" into the "struct user". We
555 * actually access the pt_regs stored on the kernel stack.
557 static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
558 unsigned long __user *ret)
560 unsigned long tmp;
562 if (off & 3 || off >= sizeof(struct user))
563 return -EIO;
565 tmp = 0;
566 if (off == PT_TEXT_ADDR)
567 tmp = tsk->mm->start_code;
568 else if (off == PT_DATA_ADDR)
569 tmp = tsk->mm->start_data;
570 else if (off == PT_TEXT_END_ADDR)
571 tmp = tsk->mm->end_code;
572 else if (off < sizeof(struct pt_regs))
573 tmp = get_user_reg(tsk, off >> 2);
575 return put_user(tmp, ret);
579 * Write the word at offset "off" into "struct user". We
580 * actually access the pt_regs stored on the kernel stack.
582 static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
583 unsigned long val)
585 if (off & 3 || off >= sizeof(struct user))
586 return -EIO;
588 if (off >= sizeof(struct pt_regs))
589 return 0;
591 return put_user_reg(tsk, off >> 2, val);
595 * Get all user integer registers.
597 static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
599 struct pt_regs *regs = task_pt_regs(tsk);
601 return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
605 * Set all user integer registers.
607 static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
609 struct pt_regs newregs;
610 int ret;
612 ret = -EFAULT;
613 if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
614 struct pt_regs *regs = task_pt_regs(tsk);
616 ret = -EINVAL;
617 if (valid_user_regs(&newregs)) {
618 *regs = newregs;
619 ret = 0;
623 return ret;
627 * Get the child FPU state.
629 static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
631 return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
632 sizeof(struct user_fp)) ? -EFAULT : 0;
636 * Set the child FPU state.
638 static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
640 struct thread_info *thread = task_thread_info(tsk);
641 thread->used_cp[1] = thread->used_cp[2] = 1;
642 return copy_from_user(&thread->fpstate, ufp,
643 sizeof(struct user_fp)) ? -EFAULT : 0;
646 #ifdef CONFIG_IWMMXT
649 * Get the child iWMMXt state.
651 static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
653 struct thread_info *thread = task_thread_info(tsk);
655 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
656 return -ENODATA;
657 iwmmxt_task_disable(thread); /* force it to ram */
658 return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
659 ? -EFAULT : 0;
663 * Set the child iWMMXt state.
665 static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
667 struct thread_info *thread = task_thread_info(tsk);
669 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
670 return -EACCES;
671 iwmmxt_task_release(thread); /* force a reload */
672 return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
673 ? -EFAULT : 0;
676 #endif
678 #ifdef CONFIG_CRUNCH
680 * Get the child Crunch state.
682 static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
684 struct thread_info *thread = task_thread_info(tsk);
686 crunch_task_disable(thread); /* force it to ram */
687 return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
688 ? -EFAULT : 0;
692 * Set the child Crunch state.
694 static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
696 struct thread_info *thread = task_thread_info(tsk);
698 crunch_task_release(thread); /* force a reload */
699 return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
700 ? -EFAULT : 0;
702 #endif
704 #ifdef CONFIG_VFP
706 * Get the child VFP state.
708 static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data)
710 struct thread_info *thread = task_thread_info(tsk);
711 union vfp_state *vfp = &thread->vfpstate;
712 struct user_vfp __user *ufp = data;
714 vfp_sync_hwstate(thread);
716 /* copy the floating point registers */
717 if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs,
718 sizeof(vfp->hard.fpregs)))
719 return -EFAULT;
721 /* copy the status and control register */
722 if (put_user(vfp->hard.fpscr, &ufp->fpscr))
723 return -EFAULT;
725 return 0;
729 * Set the child VFP state.
731 static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data)
733 struct thread_info *thread = task_thread_info(tsk);
734 union vfp_state *vfp = &thread->vfpstate;
735 struct user_vfp __user *ufp = data;
737 vfp_sync_hwstate(thread);
739 /* copy the floating point registers */
740 if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs,
741 sizeof(vfp->hard.fpregs)))
742 return -EFAULT;
744 /* copy the status and control register */
745 if (get_user(vfp->hard.fpscr, &ufp->fpscr))
746 return -EFAULT;
748 vfp_flush_hwstate(thread);
750 return 0;
752 #endif
754 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
756 int ret;
758 switch (request) {
759 case PTRACE_PEEKUSR:
760 ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
761 break;
763 case PTRACE_POKEUSR:
764 ret = ptrace_write_user(child, addr, data);
765 break;
767 case PTRACE_GETREGS:
768 ret = ptrace_getregs(child, (void __user *)data);
769 break;
771 case PTRACE_SETREGS:
772 ret = ptrace_setregs(child, (void __user *)data);
773 break;
775 case PTRACE_GETFPREGS:
776 ret = ptrace_getfpregs(child, (void __user *)data);
777 break;
779 case PTRACE_SETFPREGS:
780 ret = ptrace_setfpregs(child, (void __user *)data);
781 break;
783 #ifdef CONFIG_IWMMXT
784 case PTRACE_GETWMMXREGS:
785 ret = ptrace_getwmmxregs(child, (void __user *)data);
786 break;
788 case PTRACE_SETWMMXREGS:
789 ret = ptrace_setwmmxregs(child, (void __user *)data);
790 break;
791 #endif
793 case PTRACE_GET_THREAD_AREA:
794 ret = put_user(task_thread_info(child)->tp_value,
795 (unsigned long __user *) data);
796 break;
798 case PTRACE_SET_SYSCALL:
799 task_thread_info(child)->syscall = data;
800 ret = 0;
801 break;
803 #ifdef CONFIG_CRUNCH
804 case PTRACE_GETCRUNCHREGS:
805 ret = ptrace_getcrunchregs(child, (void __user *)data);
806 break;
808 case PTRACE_SETCRUNCHREGS:
809 ret = ptrace_setcrunchregs(child, (void __user *)data);
810 break;
811 #endif
813 #ifdef CONFIG_VFP
814 case PTRACE_GETVFPREGS:
815 ret = ptrace_getvfpregs(child, (void __user *)data);
816 break;
818 case PTRACE_SETVFPREGS:
819 ret = ptrace_setvfpregs(child, (void __user *)data);
820 break;
821 #endif
823 default:
824 ret = ptrace_request(child, request, addr, data);
825 break;
828 return ret;
831 asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
833 unsigned long ip;
835 if (!test_thread_flag(TIF_SYSCALL_TRACE))
836 return scno;
837 if (!(current->ptrace & PT_PTRACED))
838 return scno;
841 * Save IP. IP is used to denote syscall entry/exit:
842 * IP = 0 -> entry, = 1 -> exit
844 ip = regs->ARM_ip;
845 regs->ARM_ip = why;
847 current_thread_info()->syscall = scno;
849 /* the 0x80 provides a way for the tracing parent to distinguish
850 between a syscall stop and SIGTRAP delivery */
851 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
852 ? 0x80 : 0));
854 * this isn't the same as continuing with a signal, but it will do
855 * for normal use. strace only continues with a signal if the
856 * stopping signal is not SIGTRAP. -brl
858 if (current->exit_code) {
859 send_sig(current->exit_code, current, 1);
860 current->exit_code = 0;
862 regs->ARM_ip = ip;
864 return current_thread_info()->syscall;