2 * pata_atiixp.c - ATI PATA for new ATA layer
7 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
9 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
10 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/blkdev.h>
19 #include <linux/delay.h>
20 #include <scsi/scsi_host.h>
21 #include <linux/libata.h>
23 #define DRV_NAME "pata_atiixp"
24 #define DRV_VERSION "0.4.6"
27 ATIIXP_IDE_PIO_TIMING
= 0x40,
28 ATIIXP_IDE_MWDMA_TIMING
= 0x44,
29 ATIIXP_IDE_PIO_CONTROL
= 0x48,
30 ATIIXP_IDE_PIO_MODE
= 0x4a,
31 ATIIXP_IDE_UDMA_CONTROL
= 0x54,
32 ATIIXP_IDE_UDMA_MODE
= 0x56
35 static int atiixp_cable_detect(struct ata_port
*ap
)
37 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
40 /* Hack from drivers/ide/pci. Really we want to know how to do the
41 raw detection not play follow the bios mode guess */
42 pci_read_config_byte(pdev
, ATIIXP_IDE_UDMA_MODE
+ ap
->port_no
, &udma
);
43 if ((udma
& 0x07) >= 0x04 || (udma
& 0x70) >= 0x40)
44 return ATA_CBL_PATA80
;
45 return ATA_CBL_PATA40
;
49 * atiixp_set_pio_timing - set initial PIO mode data
53 * Called by both the pio and dma setup functions to set the controller
54 * timings for PIO transfers. We must load both the mode number and
55 * timing values into the controller.
58 static void atiixp_set_pio_timing(struct ata_port
*ap
, struct ata_device
*adev
, int pio
)
60 static u8 pio_timings
[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
62 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
63 int dn
= 2 * ap
->port_no
+ adev
->devno
;
65 /* Check this is correct - the order is odd in both drivers */
66 int timing_shift
= (16 * ap
->port_no
) + 8 * (adev
->devno
^ 1);
67 u16 pio_mode_data
, pio_timing_data
;
69 pci_read_config_word(pdev
, ATIIXP_IDE_PIO_MODE
, &pio_mode_data
);
70 pio_mode_data
&= ~(0x7 << (4 * dn
));
71 pio_mode_data
|= pio
<< (4 * dn
);
72 pci_write_config_word(pdev
, ATIIXP_IDE_PIO_MODE
, pio_mode_data
);
74 pci_read_config_word(pdev
, ATIIXP_IDE_PIO_TIMING
, &pio_timing_data
);
75 pio_timing_data
&= ~(0xFF << timing_shift
);
76 pio_timing_data
|= (pio_timings
[pio
] << timing_shift
);
77 pci_write_config_word(pdev
, ATIIXP_IDE_PIO_TIMING
, pio_timing_data
);
81 * atiixp_set_piomode - set initial PIO mode data
85 * Called to do the PIO mode setup. We use a shared helper for this
86 * as the DMA setup must also adjust the PIO timing information.
89 static void atiixp_set_piomode(struct ata_port
*ap
, struct ata_device
*adev
)
91 atiixp_set_pio_timing(ap
, adev
, adev
->pio_mode
- XFER_PIO_0
);
95 * atiixp_set_dmamode - set initial DMA mode data
99 * Called to do the DMA mode setup. We use timing tables for most
100 * modes but must tune an appropriate PIO mode to match.
103 static void atiixp_set_dmamode(struct ata_port
*ap
, struct ata_device
*adev
)
105 static u8 mwdma_timings
[5] = { 0x77, 0x21, 0x20 };
107 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
108 int dma
= adev
->dma_mode
;
109 int dn
= 2 * ap
->port_no
+ adev
->devno
;
112 if (adev
->dma_mode
>= XFER_UDMA_0
) {
117 pci_read_config_word(pdev
, ATIIXP_IDE_UDMA_MODE
, &udma_mode_data
);
118 udma_mode_data
&= ~(0x7 << (4 * dn
));
119 udma_mode_data
|= dma
<< (4 * dn
);
120 pci_write_config_word(pdev
, ATIIXP_IDE_UDMA_MODE
, udma_mode_data
);
122 u16 mwdma_timing_data
;
123 /* Check this is correct - the order is odd in both drivers */
124 int timing_shift
= (16 * ap
->port_no
) + 8 * (adev
->devno
^ 1);
126 dma
-= XFER_MW_DMA_0
;
128 pci_read_config_word(pdev
, ATIIXP_IDE_MWDMA_TIMING
, &mwdma_timing_data
);
129 mwdma_timing_data
&= ~(0xFF << timing_shift
);
130 mwdma_timing_data
|= (mwdma_timings
[dma
] << timing_shift
);
131 pci_write_config_word(pdev
, ATIIXP_IDE_MWDMA_TIMING
, mwdma_timing_data
);
134 * We must now look at the PIO mode situation. We may need to
135 * adjust the PIO mode to keep the timings acceptable
137 if (adev
->dma_mode
>= XFER_MW_DMA_2
)
139 else if (adev
->dma_mode
== XFER_MW_DMA_1
)
141 else if (adev
->dma_mode
== XFER_MW_DMA_0
)
145 if (adev
->pio_mode
!= wanted_pio
)
146 atiixp_set_pio_timing(ap
, adev
, wanted_pio
);
150 * atiixp_bmdma_start - DMA start callback
151 * @qc: Command in progress
153 * When DMA begins we need to ensure that the UDMA control
154 * register for the channel is correctly set.
156 * Note: The host lock held by the libata layer protects
157 * us from two channels both trying to set DMA bits at once
160 static void atiixp_bmdma_start(struct ata_queued_cmd
*qc
)
162 struct ata_port
*ap
= qc
->ap
;
163 struct ata_device
*adev
= qc
->dev
;
165 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
166 int dn
= (2 * ap
->port_no
) + adev
->devno
;
169 pci_read_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, &tmp16
);
170 if (ata_using_udma(adev
))
174 pci_write_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, tmp16
);
179 * atiixp_dma_stop - DMA stop callback
180 * @qc: Command in progress
182 * DMA has completed. Clear the UDMA flag as the next operations will
183 * be PIO ones not UDMA data transfer.
185 * Note: The host lock held by the libata layer protects
186 * us from two channels both trying to set DMA bits at once
189 static void atiixp_bmdma_stop(struct ata_queued_cmd
*qc
)
191 struct ata_port
*ap
= qc
->ap
;
192 struct pci_dev
*pdev
= to_pci_dev(ap
->host
->dev
);
193 int dn
= (2 * ap
->port_no
) + qc
->dev
->devno
;
196 pci_read_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, &tmp16
);
198 pci_write_config_word(pdev
, ATIIXP_IDE_UDMA_CONTROL
, tmp16
);
202 static struct scsi_host_template atiixp_sht
= {
203 ATA_BMDMA_SHT(DRV_NAME
),
204 .sg_tablesize
= LIBATA_DUMB_MAX_PRD
,
207 static struct ata_port_operations atiixp_port_ops
= {
208 .inherits
= &ata_bmdma_port_ops
,
210 .qc_prep
= ata_sff_dumb_qc_prep
,
211 .bmdma_start
= atiixp_bmdma_start
,
212 .bmdma_stop
= atiixp_bmdma_stop
,
214 .cable_detect
= atiixp_cable_detect
,
215 .set_piomode
= atiixp_set_piomode
,
216 .set_dmamode
= atiixp_set_dmamode
,
219 static int atiixp_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
221 static const struct ata_port_info info
= {
222 .flags
= ATA_FLAG_SLAVE_POSS
,
223 .pio_mask
= ATA_PIO4
,
224 .mwdma_mask
= ATA_MWDMA12_ONLY
,
225 .udma_mask
= ATA_UDMA5
,
226 .port_ops
= &atiixp_port_ops
228 static const struct pci_bits atiixp_enable_bits
[] = {
229 { 0x48, 1, 0x01, 0x00 },
230 { 0x48, 1, 0x08, 0x00 }
232 const struct ata_port_info
*ppi
[] = { &info
, &info
};
235 for (i
= 0; i
< 2; i
++)
236 if (!pci_test_config_bits(pdev
, &atiixp_enable_bits
[i
]))
237 ppi
[i
] = &ata_dummy_port_info
;
239 return ata_pci_sff_init_one(pdev
, ppi
, &atiixp_sht
, NULL
);
242 static const struct pci_device_id atiixp
[] = {
243 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP200_IDE
), },
244 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP300_IDE
), },
245 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP400_IDE
), },
246 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP600_IDE
), },
247 { PCI_VDEVICE(ATI
, PCI_DEVICE_ID_ATI_IXP700_IDE
), },
252 static struct pci_driver atiixp_pci_driver
= {
255 .probe
= atiixp_init_one
,
256 .remove
= ata_pci_remove_one
,
258 .resume
= ata_pci_device_resume
,
259 .suspend
= ata_pci_device_suspend
,
263 static int __init
atiixp_init(void)
265 return pci_register_driver(&atiixp_pci_driver
);
269 static void __exit
atiixp_exit(void)
271 pci_unregister_driver(&atiixp_pci_driver
);
274 MODULE_AUTHOR("Alan Cox");
275 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
276 MODULE_LICENSE("GPL");
277 MODULE_DEVICE_TABLE(pci
, atiixp
);
278 MODULE_VERSION(DRV_VERSION
);
280 module_init(atiixp_init
);
281 module_exit(atiixp_exit
);