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libata: fix oops when LPM is used with PMP
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / mtd / nand / nandsim.c
bloba5aa99f014baced88b637de9e3aa61e32e6c6925
1 /*
2 * NAND flash simulator.
3 *
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 *
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
14 * version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24 */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <asm/div64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/partitions.h>
38 #include <linux/delay.h>
39 #include <linux/list.h>
40 #include <linux/random.h>
41 #include <linux/sched.h>
42 #include <linux/fs.h>
43 #include <linux/pagemap.h>
44
45 /* Default simulator parameters values */
46 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
47 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
48 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
49 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
50 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
51 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
52 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
53 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
54 #endif
55
56 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
57 #define CONFIG_NANDSIM_ACCESS_DELAY 25
58 #endif
59 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
60 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
61 #endif
62 #ifndef CONFIG_NANDSIM_ERASE_DELAY
63 #define CONFIG_NANDSIM_ERASE_DELAY 2
64 #endif
65 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
66 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
67 #endif
68 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
69 #define CONFIG_NANDSIM_INPUT_CYCLE 50
70 #endif
71 #ifndef CONFIG_NANDSIM_BUS_WIDTH
72 #define CONFIG_NANDSIM_BUS_WIDTH 8
73 #endif
74 #ifndef CONFIG_NANDSIM_DO_DELAYS
75 #define CONFIG_NANDSIM_DO_DELAYS 0
76 #endif
77 #ifndef CONFIG_NANDSIM_LOG
78 #define CONFIG_NANDSIM_LOG 0
79 #endif
80 #ifndef CONFIG_NANDSIM_DBG
81 #define CONFIG_NANDSIM_DBG 0
82 #endif
83 #ifndef CONFIG_NANDSIM_MAX_PARTS
84 #define CONFIG_NANDSIM_MAX_PARTS 32
85 #endif
86
87 static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE;
88 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
89 static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE;
90 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
91 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
92 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
93 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
94 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
95 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
96 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
97 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
98 static uint log = CONFIG_NANDSIM_LOG;
99 static uint dbg = CONFIG_NANDSIM_DBG;
100 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
101 static unsigned int parts_num;
102 static char *badblocks = NULL;
103 static char *weakblocks = NULL;
104 static char *weakpages = NULL;
105 static unsigned int bitflips = 0;
106 static char *gravepages = NULL;
107 static unsigned int rptwear = 0;
108 static unsigned int overridesize = 0;
109 static char *cache_file = NULL;
110 static unsigned int bbt;
111
112 module_param(first_id_byte, uint, 0400);
113 module_param(second_id_byte, uint, 0400);
114 module_param(third_id_byte, uint, 0400);
115 module_param(fourth_id_byte, uint, 0400);
116 module_param(access_delay, uint, 0400);
117 module_param(programm_delay, uint, 0400);
118 module_param(erase_delay, uint, 0400);
119 module_param(output_cycle, uint, 0400);
120 module_param(input_cycle, uint, 0400);
121 module_param(bus_width, uint, 0400);
122 module_param(do_delays, uint, 0400);
123 module_param(log, uint, 0400);
124 module_param(dbg, uint, 0400);
125 module_param_array(parts, ulong, &parts_num, 0400);
126 module_param(badblocks, charp, 0400);
127 module_param(weakblocks, charp, 0400);
128 module_param(weakpages, charp, 0400);
129 module_param(bitflips, uint, 0400);
130 module_param(gravepages, charp, 0400);
131 module_param(rptwear, uint, 0400);
132 module_param(overridesize, uint, 0400);
133 module_param(cache_file, charp, 0400);
134 module_param(bbt, uint, 0400);
135
136 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
137 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
138 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command");
139 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
140 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
141 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
142 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
143 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
144 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
145 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
146 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
147 MODULE_PARM_DESC(log, "Perform logging if not zero");
148 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
149 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
150 /* Page and erase block positions for the following parameters are independent of any partitions */
151 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
152 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
153 " separated by commas e.g. 113:2 means eb 113"
154 " can be erased only twice before failing");
155 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
156 " separated by commas e.g. 1401:2 means page 1401"
157 " can be written only twice before failing");
158 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
159 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
160 " separated by commas e.g. 1401:2 means page 1401"
161 " can be read only twice before failing");
162 MODULE_PARM_DESC(rptwear, "Number of erases inbetween reporting wear, if not zero");
163 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
164 "The size is specified in erase blocks and as the exponent of a power of two"
165 " e.g. 5 means a size of 32 erase blocks");
166 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
167 MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
168
169 /* The largest possible page size */
170 #define NS_LARGEST_PAGE_SIZE 4096
171
172 /* The prefix for simulator output */
173 #define NS_OUTPUT_PREFIX "[nandsim]"
174
175 /* Simulator's output macros (logging, debugging, warning, error) */
176 #define NS_LOG(args...) \
177 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
178 #define NS_DBG(args...) \
179 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
180 #define NS_WARN(args...) \
181 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
182 #define NS_ERR(args...) \
183 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
184 #define NS_INFO(args...) \
185 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
186
187 /* Busy-wait delay macros (microseconds, milliseconds) */
188 #define NS_UDELAY(us) \
189 do { if (do_delays) udelay(us); } while(0)
190 #define NS_MDELAY(us) \
191 do { if (do_delays) mdelay(us); } while(0)
192
193 /* Is the nandsim structure initialized ? */
194 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
195
196 /* Good operation completion status */
197 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
198
199 /* Operation failed completion status */
200 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
201
202 /* Calculate the page offset in flash RAM image by (row, column) address */
203 #define NS_RAW_OFFSET(ns) \
204 (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
205
206 /* Calculate the OOB offset in flash RAM image by (row, column) address */
207 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
208
209 /* After a command is input, the simulator goes to one of the following states */
210 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
211 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
212 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
213 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
214 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
215 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
216 #define STATE_CMD_STATUS 0x00000007 /* read status */
217 #define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */
218 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
219 #define STATE_CMD_READID 0x0000000A /* read ID */
220 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
221 #define STATE_CMD_RESET 0x0000000C /* reset */
222 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
223 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
224 #define STATE_CMD_MASK 0x0000000F /* command states mask */
225
226 /* After an address is input, the simulator goes to one of these states */
227 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
228 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
229 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
230 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
231 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
232
233 /* During data input/output the simulator is in these states */
234 #define STATE_DATAIN 0x00000100 /* waiting for data input */
235 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
236
237 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
238 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
239 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
240 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
241 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
242
243 /* Previous operation is done, ready to accept new requests */
244 #define STATE_READY 0x00000000
245
246 /* This state is used to mark that the next state isn't known yet */
247 #define STATE_UNKNOWN 0x10000000
248
249 /* Simulator's actions bit masks */
250 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
251 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
252 #define ACTION_SECERASE 0x00300000 /* erase sector */
253 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
254 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
255 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
256 #define ACTION_MASK 0x00700000 /* action mask */
257
258 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
259 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
260
261 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
262 #define OPT_PAGE256 0x00000001 /* 256-byte page chips */
263 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
264 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
265 #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
266 #define OPT_AUTOINCR 0x00000020 /* page number auto incrementation is possible */
267 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
268 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
269 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
270 #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */
271
272 /* Remove action bits from state */
273 #define NS_STATE(x) ((x) & ~ACTION_MASK)
274
275 /*
276 * Maximum previous states which need to be saved. Currently saving is
277 * only needed for page program operation with preceded read command
278 * (which is only valid for 512-byte pages).
279 */
280 #define NS_MAX_PREVSTATES 1
281
282 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
283 #define NS_MAX_HELD_PAGES 16
284
285 /*
286 * A union to represent flash memory contents and flash buffer.
287 */
288 union ns_mem {
289 u_char *byte; /* for byte access */
290 uint16_t *word; /* for 16-bit word access */
291 };
292
293 /*
294 * The structure which describes all the internal simulator data.
295 */
296 struct nandsim {
297 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
298 unsigned int nbparts;
299
300 uint busw; /* flash chip bus width (8 or 16) */
301 u_char ids[4]; /* chip's ID bytes */
302 uint32_t options; /* chip's characteristic bits */
303 uint32_t state; /* current chip state */
304 uint32_t nxstate; /* next expected state */
305
306 uint32_t *op; /* current operation, NULL operations isn't known yet */
307 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
308 uint16_t npstates; /* number of previous states saved */
309 uint16_t stateidx; /* current state index */
310
311 /* The simulated NAND flash pages array */
312 union ns_mem *pages;
313
314 /* Slab allocator for nand pages */
315 struct kmem_cache *nand_pages_slab;
316
317 /* Internal buffer of page + OOB size bytes */
318 union ns_mem buf;
319
320 /* NAND flash "geometry" */
321 struct {
322 uint64_t totsz; /* total flash size, bytes */
323 uint32_t secsz; /* flash sector (erase block) size, bytes */
324 uint pgsz; /* NAND flash page size, bytes */
325 uint oobsz; /* page OOB area size, bytes */
326 uint64_t totszoob; /* total flash size including OOB, bytes */
327 uint pgszoob; /* page size including OOB , bytes*/
328 uint secszoob; /* sector size including OOB, bytes */
329 uint pgnum; /* total number of pages */
330 uint pgsec; /* number of pages per sector */
331 uint secshift; /* bits number in sector size */
332 uint pgshift; /* bits number in page size */
333 uint oobshift; /* bits number in OOB size */
334 uint pgaddrbytes; /* bytes per page address */
335 uint secaddrbytes; /* bytes per sector address */
336 uint idbytes; /* the number ID bytes that this chip outputs */
337 } geom;
338
339 /* NAND flash internal registers */
340 struct {
341 unsigned command; /* the command register */
342 u_char status; /* the status register */
343 uint row; /* the page number */
344 uint column; /* the offset within page */
345 uint count; /* internal counter */
346 uint num; /* number of bytes which must be processed */
347 uint off; /* fixed page offset */
348 } regs;
349
350 /* NAND flash lines state */
351 struct {
352 int ce; /* chip Enable */
353 int cle; /* command Latch Enable */
354 int ale; /* address Latch Enable */
355 int wp; /* write Protect */
356 } lines;
357
358 /* Fields needed when using a cache file */
359 struct file *cfile; /* Open file */
360 unsigned char *pages_written; /* Which pages have been written */
361 void *file_buf;
362 struct page *held_pages[NS_MAX_HELD_PAGES];
363 int held_cnt;
364 };
365
366 /*
367 * Operations array. To perform any operation the simulator must pass
368 * through the correspondent states chain.
369 */
370 static struct nandsim_operations {
371 uint32_t reqopts; /* options which are required to perform the operation */
372 uint32_t states[NS_OPER_STATES]; /* operation's states */
373 } ops[NS_OPER_NUM] = {
374 /* Read page + OOB from the beginning */
375 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
376 STATE_DATAOUT, STATE_READY}},
377 /* Read page + OOB from the second half */
378 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
379 STATE_DATAOUT, STATE_READY}},
380 /* Read OOB */
381 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
382 STATE_DATAOUT, STATE_READY}},
383 /* Program page starting from the beginning */
384 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
385 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
386 /* Program page starting from the beginning */
387 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
388 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
389 /* Program page starting from the second half */
390 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
391 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
392 /* Program OOB */
393 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
394 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
395 /* Erase sector */
396 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
397 /* Read status */
398 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
399 /* Read multi-plane status */
400 {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
401 /* Read ID */
402 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
403 /* Large page devices read page */
404 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
405 STATE_DATAOUT, STATE_READY}},
406 /* Large page devices random page read */
407 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
408 STATE_DATAOUT, STATE_READY}},
409 };
410
411 struct weak_block {
412 struct list_head list;
413 unsigned int erase_block_no;
414 unsigned int max_erases;
415 unsigned int erases_done;
416 };
417
418 static LIST_HEAD(weak_blocks);
419
420 struct weak_page {
421 struct list_head list;
422 unsigned int page_no;
423 unsigned int max_writes;
424 unsigned int writes_done;
425 };
426
427 static LIST_HEAD(weak_pages);
428
429 struct grave_page {
430 struct list_head list;
431 unsigned int page_no;
432 unsigned int max_reads;
433 unsigned int reads_done;
434 };
435
436 static LIST_HEAD(grave_pages);
437
438 static unsigned long *erase_block_wear = NULL;
439 static unsigned int wear_eb_count = 0;
440 static unsigned long total_wear = 0;
441 static unsigned int rptwear_cnt = 0;
442
443 /* MTD structure for NAND controller */
444 static struct mtd_info *nsmtd;
445
446 static u_char ns_verify_buf[NS_LARGEST_PAGE_SIZE];
447
448 /*
449 * Allocate array of page pointers, create slab allocation for an array
450 * and initialize the array by NULL pointers.
451 *
452 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
453 */
454 static int alloc_device(struct nandsim *ns)
455 {
456 struct file *cfile;
457 int i, err;
458
459 if (cache_file) {
460 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
461 if (IS_ERR(cfile))
462 return PTR_ERR(cfile);
463 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
464 NS_ERR("alloc_device: cache file not readable\n");
465 err = -EINVAL;
466 goto err_close;
467 }
468 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
469 NS_ERR("alloc_device: cache file not writeable\n");
470 err = -EINVAL;
471 goto err_close;
472 }
473 ns->pages_written = vzalloc(ns->geom.pgnum);
474 if (!ns->pages_written) {
475 NS_ERR("alloc_device: unable to allocate pages written array\n");
476 err = -ENOMEM;
477 goto err_close;
478 }
479 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
480 if (!ns->file_buf) {
481 NS_ERR("alloc_device: unable to allocate file buf\n");
482 err = -ENOMEM;
483 goto err_free;
484 }
485 ns->cfile = cfile;
486 return 0;
487 }
488
489 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
490 if (!ns->pages) {
491 NS_ERR("alloc_device: unable to allocate page array\n");
492 return -ENOMEM;
493 }
494 for (i = 0; i < ns->geom.pgnum; i++) {
495 ns->pages[i].byte = NULL;
496 }
497 ns->nand_pages_slab = kmem_cache_create("nandsim",
498 ns->geom.pgszoob, 0, 0, NULL);
499 if (!ns->nand_pages_slab) {
500 NS_ERR("cache_create: unable to create kmem_cache\n");
501 return -ENOMEM;
502 }
503
504 return 0;
505
506 err_free:
507 vfree(ns->pages_written);
508 err_close:
509 filp_close(cfile, NULL);
510 return err;
511 }
512
513 /*
514 * Free any allocated pages, and free the array of page pointers.
515 */
516 static void free_device(struct nandsim *ns)
517 {
518 int i;
519
520 if (ns->cfile) {
521 kfree(ns->file_buf);
522 vfree(ns->pages_written);
523 filp_close(ns->cfile, NULL);
524 return;
525 }
526
527 if (ns->pages) {
528 for (i = 0; i < ns->geom.pgnum; i++) {
529 if (ns->pages[i].byte)
530 kmem_cache_free(ns->nand_pages_slab,
531 ns->pages[i].byte);
532 }
533 kmem_cache_destroy(ns->nand_pages_slab);
534 vfree(ns->pages);
535 }
536 }
537
538 static char *get_partition_name(int i)
539 {
540 char buf[64];
541 sprintf(buf, "NAND simulator partition %d", i);
542 return kstrdup(buf, GFP_KERNEL);
543 }
544
545 static uint64_t divide(uint64_t n, uint32_t d)
546 {
547 do_div(n, d);
548 return n;
549 }
550
551 /*
552 * Initialize the nandsim structure.
553 *
554 * RETURNS: 0 if success, -ERRNO if failure.
555 */
556 static int init_nandsim(struct mtd_info *mtd)
557 {
558 struct nand_chip *chip = mtd->priv;
559 struct nandsim *ns = chip->priv;
560 int i, ret = 0;
561 uint64_t remains;
562 uint64_t next_offset;
563
564 if (NS_IS_INITIALIZED(ns)) {
565 NS_ERR("init_nandsim: nandsim is already initialized\n");
566 return -EIO;
567 }
568
569 /* Force mtd to not do delays */
570 chip->chip_delay = 0;
571
572 /* Initialize the NAND flash parameters */
573 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
574 ns->geom.totsz = mtd->size;
575 ns->geom.pgsz = mtd->writesize;
576 ns->geom.oobsz = mtd->oobsize;
577 ns->geom.secsz = mtd->erasesize;
578 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
579 ns->geom.pgnum = divide(ns->geom.totsz, ns->geom.pgsz);
580 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
581 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
582 ns->geom.pgshift = chip->page_shift;
583 ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
584 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
585 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
586 ns->options = 0;
587
588 if (ns->geom.pgsz == 256) {
589 ns->options |= OPT_PAGE256;
590 }
591 else if (ns->geom.pgsz == 512) {
592 ns->options |= (OPT_PAGE512 | OPT_AUTOINCR);
593 if (ns->busw == 8)
594 ns->options |= OPT_PAGE512_8BIT;
595 } else if (ns->geom.pgsz == 2048) {
596 ns->options |= OPT_PAGE2048;
597 } else if (ns->geom.pgsz == 4096) {
598 ns->options |= OPT_PAGE4096;
599 } else {
600 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
601 return -EIO;
602 }
603
604 if (ns->options & OPT_SMALLPAGE) {
605 if (ns->geom.totsz <= (32 << 20)) {
606 ns->geom.pgaddrbytes = 3;
607 ns->geom.secaddrbytes = 2;
608 } else {
609 ns->geom.pgaddrbytes = 4;
610 ns->geom.secaddrbytes = 3;
611 }
612 } else {
613 if (ns->geom.totsz <= (128 << 20)) {
614 ns->geom.pgaddrbytes = 4;
615 ns->geom.secaddrbytes = 2;
616 } else {
617 ns->geom.pgaddrbytes = 5;
618 ns->geom.secaddrbytes = 3;
619 }
620 }
621
622 /* Fill the partition_info structure */
623 if (parts_num > ARRAY_SIZE(ns->partitions)) {
624 NS_ERR("too many partitions.\n");
625 ret = -EINVAL;
626 goto error;
627 }
628 remains = ns->geom.totsz;
629 next_offset = 0;
630 for (i = 0; i < parts_num; ++i) {
631 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
632
633 if (!part_sz || part_sz > remains) {
634 NS_ERR("bad partition size.\n");
635 ret = -EINVAL;
636 goto error;
637 }
638 ns->partitions[i].name = get_partition_name(i);
639 ns->partitions[i].offset = next_offset;
640 ns->partitions[i].size = part_sz;
641 next_offset += ns->partitions[i].size;
642 remains -= ns->partitions[i].size;
643 }
644 ns->nbparts = parts_num;
645 if (remains) {
646 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
647 NS_ERR("too many partitions.\n");
648 ret = -EINVAL;
649 goto error;
650 }
651 ns->partitions[i].name = get_partition_name(i);
652 ns->partitions[i].offset = next_offset;
653 ns->partitions[i].size = remains;
654 ns->nbparts += 1;
655 }
656
657 /* Detect how many ID bytes the NAND chip outputs */
658 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
659 if (second_id_byte != nand_flash_ids[i].id)
660 continue;
661 if (!(nand_flash_ids[i].options & NAND_NO_AUTOINCR))
662 ns->options |= OPT_AUTOINCR;
663 }
664
665 if (ns->busw == 16)
666 NS_WARN("16-bit flashes support wasn't tested\n");
667
668 printk("flash size: %llu MiB\n",
669 (unsigned long long)ns->geom.totsz >> 20);
670 printk("page size: %u bytes\n", ns->geom.pgsz);
671 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
672 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
673 printk("pages number: %u\n", ns->geom.pgnum);
674 printk("pages per sector: %u\n", ns->geom.pgsec);
675 printk("bus width: %u\n", ns->busw);
676 printk("bits in sector size: %u\n", ns->geom.secshift);
677 printk("bits in page size: %u\n", ns->geom.pgshift);
678 printk("bits in OOB size: %u\n", ns->geom.oobshift);
679 printk("flash size with OOB: %llu KiB\n",
680 (unsigned long long)ns->geom.totszoob >> 10);
681 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
682 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
683 printk("options: %#x\n", ns->options);
684
685 if ((ret = alloc_device(ns)) != 0)
686 goto error;
687
688 /* Allocate / initialize the internal buffer */
689 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
690 if (!ns->buf.byte) {
691 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
692 ns->geom.pgszoob);
693 ret = -ENOMEM;
694 goto error;
695 }
696 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
697
698 return 0;
699
700 error:
701 free_device(ns);
702
703 return ret;
704 }
705
706 /*
707 * Free the nandsim structure.
708 */
709 static void free_nandsim(struct nandsim *ns)
710 {
711 kfree(ns->buf.byte);
712 free_device(ns);
713
714 return;
715 }
716
717 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
718 {
719 char *w;
720 int zero_ok;
721 unsigned int erase_block_no;
722 loff_t offset;
723
724 if (!badblocks)
725 return 0;
726 w = badblocks;
727 do {
728 zero_ok = (*w == '0' ? 1 : 0);
729 erase_block_no = simple_strtoul(w, &w, 0);
730 if (!zero_ok && !erase_block_no) {
731 NS_ERR("invalid badblocks.\n");
732 return -EINVAL;
733 }
734 offset = erase_block_no * ns->geom.secsz;
735 if (mtd->block_markbad(mtd, offset)) {
736 NS_ERR("invalid badblocks.\n");
737 return -EINVAL;
738 }
739 if (*w == ',')
740 w += 1;
741 } while (*w);
742 return 0;
743 }
744
745 static int parse_weakblocks(void)
746 {
747 char *w;
748 int zero_ok;
749 unsigned int erase_block_no;
750 unsigned int max_erases;
751 struct weak_block *wb;
752
753 if (!weakblocks)
754 return 0;
755 w = weakblocks;
756 do {
757 zero_ok = (*w == '0' ? 1 : 0);
758 erase_block_no = simple_strtoul(w, &w, 0);
759 if (!zero_ok && !erase_block_no) {
760 NS_ERR("invalid weakblocks.\n");
761 return -EINVAL;
762 }
763 max_erases = 3;
764 if (*w == ':') {
765 w += 1;
766 max_erases = simple_strtoul(w, &w, 0);
767 }
768 if (*w == ',')
769 w += 1;
770 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
771 if (!wb) {
772 NS_ERR("unable to allocate memory.\n");
773 return -ENOMEM;
774 }
775 wb->erase_block_no = erase_block_no;
776 wb->max_erases = max_erases;
777 list_add(&wb->list, &weak_blocks);
778 } while (*w);
779 return 0;
780 }
781
782 static int erase_error(unsigned int erase_block_no)
783 {
784 struct weak_block *wb;
785
786 list_for_each_entry(wb, &weak_blocks, list)
787 if (wb->erase_block_no == erase_block_no) {
788 if (wb->erases_done >= wb->max_erases)
789 return 1;
790 wb->erases_done += 1;
791 return 0;
792 }
793 return 0;
794 }
795
796 static int parse_weakpages(void)
797 {
798 char *w;
799 int zero_ok;
800 unsigned int page_no;
801 unsigned int max_writes;
802 struct weak_page *wp;
803
804 if (!weakpages)
805 return 0;
806 w = weakpages;
807 do {
808 zero_ok = (*w == '0' ? 1 : 0);
809 page_no = simple_strtoul(w, &w, 0);
810 if (!zero_ok && !page_no) {
811 NS_ERR("invalid weakpagess.\n");
812 return -EINVAL;
813 }
814 max_writes = 3;
815 if (*w == ':') {
816 w += 1;
817 max_writes = simple_strtoul(w, &w, 0);
818 }
819 if (*w == ',')
820 w += 1;
821 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
822 if (!wp) {
823 NS_ERR("unable to allocate memory.\n");
824 return -ENOMEM;
825 }
826 wp->page_no = page_no;
827 wp->max_writes = max_writes;
828 list_add(&wp->list, &weak_pages);
829 } while (*w);
830 return 0;
831 }
832
833 static int write_error(unsigned int page_no)
834 {
835 struct weak_page *wp;
836
837 list_for_each_entry(wp, &weak_pages, list)
838 if (wp->page_no == page_no) {
839 if (wp->writes_done >= wp->max_writes)
840 return 1;
841 wp->writes_done += 1;
842 return 0;
843 }
844 return 0;
845 }
846
847 static int parse_gravepages(void)
848 {
849 char *g;
850 int zero_ok;
851 unsigned int page_no;
852 unsigned int max_reads;
853 struct grave_page *gp;
854
855 if (!gravepages)
856 return 0;
857 g = gravepages;
858 do {
859 zero_ok = (*g == '0' ? 1 : 0);
860 page_no = simple_strtoul(g, &g, 0);
861 if (!zero_ok && !page_no) {
862 NS_ERR("invalid gravepagess.\n");
863 return -EINVAL;
864 }
865 max_reads = 3;
866 if (*g == ':') {
867 g += 1;
868 max_reads = simple_strtoul(g, &g, 0);
869 }
870 if (*g == ',')
871 g += 1;
872 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
873 if (!gp) {
874 NS_ERR("unable to allocate memory.\n");
875 return -ENOMEM;
876 }
877 gp->page_no = page_no;
878 gp->max_reads = max_reads;
879 list_add(&gp->list, &grave_pages);
880 } while (*g);
881 return 0;
882 }
883
884 static int read_error(unsigned int page_no)
885 {
886 struct grave_page *gp;
887
888 list_for_each_entry(gp, &grave_pages, list)
889 if (gp->page_no == page_no) {
890 if (gp->reads_done >= gp->max_reads)
891 return 1;
892 gp->reads_done += 1;
893 return 0;
894 }
895 return 0;
896 }
897
898 static void free_lists(void)
899 {
900 struct list_head *pos, *n;
901 list_for_each_safe(pos, n, &weak_blocks) {
902 list_del(pos);
903 kfree(list_entry(pos, struct weak_block, list));
904 }
905 list_for_each_safe(pos, n, &weak_pages) {
906 list_del(pos);
907 kfree(list_entry(pos, struct weak_page, list));
908 }
909 list_for_each_safe(pos, n, &grave_pages) {
910 list_del(pos);
911 kfree(list_entry(pos, struct grave_page, list));
912 }
913 kfree(erase_block_wear);
914 }
915
916 static int setup_wear_reporting(struct mtd_info *mtd)
917 {
918 size_t mem;
919
920 if (!rptwear)
921 return 0;
922 wear_eb_count = divide(mtd->size, mtd->erasesize);
923 mem = wear_eb_count * sizeof(unsigned long);
924 if (mem / sizeof(unsigned long) != wear_eb_count) {
925 NS_ERR("Too many erase blocks for wear reporting\n");
926 return -ENOMEM;
927 }
928 erase_block_wear = kzalloc(mem, GFP_KERNEL);
929 if (!erase_block_wear) {
930 NS_ERR("Too many erase blocks for wear reporting\n");
931 return -ENOMEM;
932 }
933 return 0;
934 }
935
936 static void update_wear(unsigned int erase_block_no)
937 {
938 unsigned long wmin = -1, wmax = 0, avg;
939 unsigned long deciles[10], decile_max[10], tot = 0;
940 unsigned int i;
941
942 if (!erase_block_wear)
943 return;
944 total_wear += 1;
945 if (total_wear == 0)
946 NS_ERR("Erase counter total overflow\n");
947 erase_block_wear[erase_block_no] += 1;
948 if (erase_block_wear[erase_block_no] == 0)
949 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
950 rptwear_cnt += 1;
951 if (rptwear_cnt < rptwear)
952 return;
953 rptwear_cnt = 0;
954 /* Calc wear stats */
955 for (i = 0; i < wear_eb_count; ++i) {
956 unsigned long wear = erase_block_wear[i];
957 if (wear < wmin)
958 wmin = wear;
959 if (wear > wmax)
960 wmax = wear;
961 tot += wear;
962 }
963 for (i = 0; i < 9; ++i) {
964 deciles[i] = 0;
965 decile_max[i] = (wmax * (i + 1) + 5) / 10;
966 }
967 deciles[9] = 0;
968 decile_max[9] = wmax;
969 for (i = 0; i < wear_eb_count; ++i) {
970 int d;
971 unsigned long wear = erase_block_wear[i];
972 for (d = 0; d < 10; ++d)
973 if (wear <= decile_max[d]) {
974 deciles[d] += 1;
975 break;
976 }
977 }
978 avg = tot / wear_eb_count;
979 /* Output wear report */
980 NS_INFO("*** Wear Report ***\n");
981 NS_INFO("Total numbers of erases: %lu\n", tot);
982 NS_INFO("Number of erase blocks: %u\n", wear_eb_count);
983 NS_INFO("Average number of erases: %lu\n", avg);
984 NS_INFO("Maximum number of erases: %lu\n", wmax);
985 NS_INFO("Minimum number of erases: %lu\n", wmin);
986 for (i = 0; i < 10; ++i) {
987 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
988 if (from > decile_max[i])
989 continue;
990 NS_INFO("Number of ebs with erase counts from %lu to %lu : %lu\n",
991 from,
992 decile_max[i],
993 deciles[i]);
994 }
995 NS_INFO("*** End of Wear Report ***\n");
996 }
997
998 /*
999 * Returns the string representation of 'state' state.
1000 */
1001 static char *get_state_name(uint32_t state)
1002 {
1003 switch (NS_STATE(state)) {
1004 case STATE_CMD_READ0:
1005 return "STATE_CMD_READ0";
1006 case STATE_CMD_READ1:
1007 return "STATE_CMD_READ1";
1008 case STATE_CMD_PAGEPROG:
1009 return "STATE_CMD_PAGEPROG";
1010 case STATE_CMD_READOOB:
1011 return "STATE_CMD_READOOB";
1012 case STATE_CMD_READSTART:
1013 return "STATE_CMD_READSTART";
1014 case STATE_CMD_ERASE1:
1015 return "STATE_CMD_ERASE1";
1016 case STATE_CMD_STATUS:
1017 return "STATE_CMD_STATUS";
1018 case STATE_CMD_STATUS_M:
1019 return "STATE_CMD_STATUS_M";
1020 case STATE_CMD_SEQIN:
1021 return "STATE_CMD_SEQIN";
1022 case STATE_CMD_READID:
1023 return "STATE_CMD_READID";
1024 case STATE_CMD_ERASE2:
1025 return "STATE_CMD_ERASE2";
1026 case STATE_CMD_RESET:
1027 return "STATE_CMD_RESET";
1028 case STATE_CMD_RNDOUT:
1029 return "STATE_CMD_RNDOUT";
1030 case STATE_CMD_RNDOUTSTART:
1031 return "STATE_CMD_RNDOUTSTART";
1032 case STATE_ADDR_PAGE:
1033 return "STATE_ADDR_PAGE";
1034 case STATE_ADDR_SEC:
1035 return "STATE_ADDR_SEC";
1036 case STATE_ADDR_ZERO:
1037 return "STATE_ADDR_ZERO";
1038 case STATE_ADDR_COLUMN:
1039 return "STATE_ADDR_COLUMN";
1040 case STATE_DATAIN:
1041 return "STATE_DATAIN";
1042 case STATE_DATAOUT:
1043 return "STATE_DATAOUT";
1044 case STATE_DATAOUT_ID:
1045 return "STATE_DATAOUT_ID";
1046 case STATE_DATAOUT_STATUS:
1047 return "STATE_DATAOUT_STATUS";
1048 case STATE_DATAOUT_STATUS_M:
1049 return "STATE_DATAOUT_STATUS_M";
1050 case STATE_READY:
1051 return "STATE_READY";
1052 case STATE_UNKNOWN:
1053 return "STATE_UNKNOWN";
1054 }
1055
1056 NS_ERR("get_state_name: unknown state, BUG\n");
1057 return NULL;
1058 }
1059
1060 /*
1061 * Check if command is valid.
1062 *
1063 * RETURNS: 1 if wrong command, 0 if right.
1064 */
1065 static int check_command(int cmd)
1066 {
1067 switch (cmd) {
1068
1069 case NAND_CMD_READ0:
1070 case NAND_CMD_READ1:
1071 case NAND_CMD_READSTART:
1072 case NAND_CMD_PAGEPROG:
1073 case NAND_CMD_READOOB:
1074 case NAND_CMD_ERASE1:
1075 case NAND_CMD_STATUS:
1076 case NAND_CMD_SEQIN:
1077 case NAND_CMD_READID:
1078 case NAND_CMD_ERASE2:
1079 case NAND_CMD_RESET:
1080 case NAND_CMD_RNDOUT:
1081 case NAND_CMD_RNDOUTSTART:
1082 return 0;
1083
1084 case NAND_CMD_STATUS_MULTI:
1085 default:
1086 return 1;
1087 }
1088 }
1089
1090 /*
1091 * Returns state after command is accepted by command number.
1092 */
1093 static uint32_t get_state_by_command(unsigned command)
1094 {
1095 switch (command) {
1096 case NAND_CMD_READ0:
1097 return STATE_CMD_READ0;
1098 case NAND_CMD_READ1:
1099 return STATE_CMD_READ1;
1100 case NAND_CMD_PAGEPROG:
1101 return STATE_CMD_PAGEPROG;
1102 case NAND_CMD_READSTART:
1103 return STATE_CMD_READSTART;
1104 case NAND_CMD_READOOB:
1105 return STATE_CMD_READOOB;
1106 case NAND_CMD_ERASE1:
1107 return STATE_CMD_ERASE1;
1108 case NAND_CMD_STATUS:
1109 return STATE_CMD_STATUS;
1110 case NAND_CMD_STATUS_MULTI:
1111 return STATE_CMD_STATUS_M;
1112 case NAND_CMD_SEQIN:
1113 return STATE_CMD_SEQIN;
1114 case NAND_CMD_READID:
1115 return STATE_CMD_READID;
1116 case NAND_CMD_ERASE2:
1117 return STATE_CMD_ERASE2;
1118 case NAND_CMD_RESET:
1119 return STATE_CMD_RESET;
1120 case NAND_CMD_RNDOUT:
1121 return STATE_CMD_RNDOUT;
1122 case NAND_CMD_RNDOUTSTART:
1123 return STATE_CMD_RNDOUTSTART;
1124 }
1125
1126 NS_ERR("get_state_by_command: unknown command, BUG\n");
1127 return 0;
1128 }
1129
1130 /*
1131 * Move an address byte to the correspondent internal register.
1132 */
1133 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1134 {
1135 uint byte = (uint)bt;
1136
1137 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1138 ns->regs.column |= (byte << 8 * ns->regs.count);
1139 else {
1140 ns->regs.row |= (byte << 8 * (ns->regs.count -
1141 ns->geom.pgaddrbytes +
1142 ns->geom.secaddrbytes));
1143 }
1144
1145 return;
1146 }
1147
1148 /*
1149 * Switch to STATE_READY state.
1150 */
1151 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1152 {
1153 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1154
1155 ns->state = STATE_READY;
1156 ns->nxstate = STATE_UNKNOWN;
1157 ns->op = NULL;
1158 ns->npstates = 0;
1159 ns->stateidx = 0;
1160 ns->regs.num = 0;
1161 ns->regs.count = 0;
1162 ns->regs.off = 0;
1163 ns->regs.row = 0;
1164 ns->regs.column = 0;
1165 ns->regs.status = status;
1166 }
1167
1168 /*
1169 * If the operation isn't known yet, try to find it in the global array
1170 * of supported operations.
1171 *
1172 * Operation can be unknown because of the following.
1173 * 1. New command was accepted and this is the first call to find the
1174 * correspondent states chain. In this case ns->npstates = 0;
1175 * 2. There are several operations which begin with the same command(s)
1176 * (for example program from the second half and read from the
1177 * second half operations both begin with the READ1 command). In this
1178 * case the ns->pstates[] array contains previous states.
1179 *
1180 * Thus, the function tries to find operation containing the following
1181 * states (if the 'flag' parameter is 0):
1182 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1183 *
1184 * If (one and only one) matching operation is found, it is accepted (
1185 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1186 * zeroed).
1187 *
1188 * If there are several matches, the current state is pushed to the
1189 * ns->pstates.
1190 *
1191 * The operation can be unknown only while commands are input to the chip.
1192 * As soon as address command is accepted, the operation must be known.
1193 * In such situation the function is called with 'flag' != 0, and the
1194 * operation is searched using the following pattern:
1195 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1196 *
1197 * It is supposed that this pattern must either match one operation or
1198 * none. There can't be ambiguity in that case.
1199 *
1200 * If no matches found, the function does the following:
1201 * 1. if there are saved states present, try to ignore them and search
1202 * again only using the last command. If nothing was found, switch
1203 * to the STATE_READY state.
1204 * 2. if there are no saved states, switch to the STATE_READY state.
1205 *
1206 * RETURNS: -2 - no matched operations found.
1207 * -1 - several matches.
1208 * 0 - operation is found.
1209 */
1210 static int find_operation(struct nandsim *ns, uint32_t flag)
1211 {
1212 int opsfound = 0;
1213 int i, j, idx = 0;
1214
1215 for (i = 0; i < NS_OPER_NUM; i++) {
1216
1217 int found = 1;
1218
1219 if (!(ns->options & ops[i].reqopts))
1220 /* Ignore operations we can't perform */
1221 continue;
1222
1223 if (flag) {
1224 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1225 continue;
1226 } else {
1227 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1228 continue;
1229 }
1230
1231 for (j = 0; j < ns->npstates; j++)
1232 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1233 && (ns->options & ops[idx].reqopts)) {
1234 found = 0;
1235 break;
1236 }
1237
1238 if (found) {
1239 idx = i;
1240 opsfound += 1;
1241 }
1242 }
1243
1244 if (opsfound == 1) {
1245 /* Exact match */
1246 ns->op = &ops[idx].states[0];
1247 if (flag) {
1248 /*
1249 * In this case the find_operation function was
1250 * called when address has just began input. But it isn't
1251 * yet fully input and the current state must
1252 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1253 * state must be the next state (ns->nxstate).
1254 */
1255 ns->stateidx = ns->npstates - 1;
1256 } else {
1257 ns->stateidx = ns->npstates;
1258 }
1259 ns->npstates = 0;
1260 ns->state = ns->op[ns->stateidx];
1261 ns->nxstate = ns->op[ns->stateidx + 1];
1262 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1263 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1264 return 0;
1265 }
1266
1267 if (opsfound == 0) {
1268 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1269 if (ns->npstates != 0) {
1270 NS_DBG("find_operation: no operation found, try again with state %s\n",
1271 get_state_name(ns->state));
1272 ns->npstates = 0;
1273 return find_operation(ns, 0);
1274
1275 }
1276 NS_DBG("find_operation: no operations found\n");
1277 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1278 return -2;
1279 }
1280
1281 if (flag) {
1282 /* This shouldn't happen */
1283 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1284 return -2;
1285 }
1286
1287 NS_DBG("find_operation: there is still ambiguity\n");
1288
1289 ns->pstates[ns->npstates++] = ns->state;
1290
1291 return -1;
1292 }
1293
1294 static void put_pages(struct nandsim *ns)
1295 {
1296 int i;
1297
1298 for (i = 0; i < ns->held_cnt; i++)
1299 page_cache_release(ns->held_pages[i]);
1300 }
1301
1302 /* Get page cache pages in advance to provide NOFS memory allocation */
1303 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1304 {
1305 pgoff_t index, start_index, end_index;
1306 struct page *page;
1307 struct address_space *mapping = file->f_mapping;
1308
1309 start_index = pos >> PAGE_CACHE_SHIFT;
1310 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1311 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1312 return -EINVAL;
1313 ns->held_cnt = 0;
1314 for (index = start_index; index <= end_index; index++) {
1315 page = find_get_page(mapping, index);
1316 if (page == NULL) {
1317 page = find_or_create_page(mapping, index, GFP_NOFS);
1318 if (page == NULL) {
1319 write_inode_now(mapping->host, 1);
1320 page = find_or_create_page(mapping, index, GFP_NOFS);
1321 }
1322 if (page == NULL) {
1323 put_pages(ns);
1324 return -ENOMEM;
1325 }
1326 unlock_page(page);
1327 }
1328 ns->held_pages[ns->held_cnt++] = page;
1329 }
1330 return 0;
1331 }
1332
1333 static int set_memalloc(void)
1334 {
1335 if (current->flags & PF_MEMALLOC)
1336 return 0;
1337 current->flags |= PF_MEMALLOC;
1338 return 1;
1339 }
1340
1341 static void clear_memalloc(int memalloc)
1342 {
1343 if (memalloc)
1344 current->flags &= ~PF_MEMALLOC;
1345 }
1346
1347 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1348 {
1349 mm_segment_t old_fs;
1350 ssize_t tx;
1351 int err, memalloc;
1352
1353 err = get_pages(ns, file, count, *pos);
1354 if (err)
1355 return err;
1356 old_fs = get_fs();
1357 set_fs(get_ds());
1358 memalloc = set_memalloc();
1359 tx = vfs_read(file, (char __user *)buf, count, pos);
1360 clear_memalloc(memalloc);
1361 set_fs(old_fs);
1362 put_pages(ns);
1363 return tx;
1364 }
1365
1366 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t *pos)
1367 {
1368 mm_segment_t old_fs;
1369 ssize_t tx;
1370 int err, memalloc;
1371
1372 err = get_pages(ns, file, count, *pos);
1373 if (err)
1374 return err;
1375 old_fs = get_fs();
1376 set_fs(get_ds());
1377 memalloc = set_memalloc();
1378 tx = vfs_write(file, (char __user *)buf, count, pos);
1379 clear_memalloc(memalloc);
1380 set_fs(old_fs);
1381 put_pages(ns);
1382 return tx;
1383 }
1384
1385 /*
1386 * Returns a pointer to the current page.
1387 */
1388 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1389 {
1390 return &(ns->pages[ns->regs.row]);
1391 }
1392
1393 /*
1394 * Retuns a pointer to the current byte, within the current page.
1395 */
1396 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1397 {
1398 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1399 }
1400
1401 int do_read_error(struct nandsim *ns, int num)
1402 {
1403 unsigned int page_no = ns->regs.row;
1404
1405 if (read_error(page_no)) {
1406 int i;
1407 memset(ns->buf.byte, 0xFF, num);
1408 for (i = 0; i < num; ++i)
1409 ns->buf.byte[i] = random32();
1410 NS_WARN("simulating read error in page %u\n", page_no);
1411 return 1;
1412 }
1413 return 0;
1414 }
1415
1416 void do_bit_flips(struct nandsim *ns, int num)
1417 {
1418 if (bitflips && random32() < (1 << 22)) {
1419 int flips = 1;
1420 if (bitflips > 1)
1421 flips = (random32() % (int) bitflips) + 1;
1422 while (flips--) {
1423 int pos = random32() % (num * 8);
1424 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1425 NS_WARN("read_page: flipping bit %d in page %d "
1426 "reading from %d ecc: corrected=%u failed=%u\n",
1427 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1428 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1429 }
1430 }
1431 }
1432
1433 /*
1434 * Fill the NAND buffer with data read from the specified page.
1435 */
1436 static void read_page(struct nandsim *ns, int num)
1437 {
1438 union ns_mem *mypage;
1439
1440 if (ns->cfile) {
1441 if (!ns->pages_written[ns->regs.row]) {
1442 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1443 memset(ns->buf.byte, 0xFF, num);
1444 } else {
1445 loff_t pos;
1446 ssize_t tx;
1447
1448 NS_DBG("read_page: page %d written, reading from %d\n",
1449 ns->regs.row, ns->regs.column + ns->regs.off);
1450 if (do_read_error(ns, num))
1451 return;
1452 pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1453 tx = read_file(ns, ns->cfile, ns->buf.byte, num, &pos);
1454 if (tx != num) {
1455 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1456 return;
1457 }
1458 do_bit_flips(ns, num);
1459 }
1460 return;
1461 }
1462
1463 mypage = NS_GET_PAGE(ns);
1464 if (mypage->byte == NULL) {
1465 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1466 memset(ns->buf.byte, 0xFF, num);
1467 } else {
1468 NS_DBG("read_page: page %d allocated, reading from %d\n",
1469 ns->regs.row, ns->regs.column + ns->regs.off);
1470 if (do_read_error(ns, num))
1471 return;
1472 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1473 do_bit_flips(ns, num);
1474 }
1475 }
1476
1477 /*
1478 * Erase all pages in the specified sector.
1479 */
1480 static void erase_sector(struct nandsim *ns)
1481 {
1482 union ns_mem *mypage;
1483 int i;
1484
1485 if (ns->cfile) {
1486 for (i = 0; i < ns->geom.pgsec; i++)
1487 if (ns->pages_written[ns->regs.row + i]) {
1488 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1489 ns->pages_written[ns->regs.row + i] = 0;
1490 }
1491 return;
1492 }
1493
1494 mypage = NS_GET_PAGE(ns);
1495 for (i = 0; i < ns->geom.pgsec; i++) {
1496 if (mypage->byte != NULL) {
1497 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1498 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1499 mypage->byte = NULL;
1500 }
1501 mypage++;
1502 }
1503 }
1504
1505 /*
1506 * Program the specified page with the contents from the NAND buffer.
1507 */
1508 static int prog_page(struct nandsim *ns, int num)
1509 {
1510 int i;
1511 union ns_mem *mypage;
1512 u_char *pg_off;
1513
1514 if (ns->cfile) {
1515 loff_t off, pos;
1516 ssize_t tx;
1517 int all;
1518
1519 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1520 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1521 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1522 if (!ns->pages_written[ns->regs.row]) {
1523 all = 1;
1524 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1525 } else {
1526 all = 0;
1527 pos = off;
1528 tx = read_file(ns, ns->cfile, pg_off, num, &pos);
1529 if (tx != num) {
1530 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1531 return -1;
1532 }
1533 }
1534 for (i = 0; i < num; i++)
1535 pg_off[i] &= ns->buf.byte[i];
1536 if (all) {
1537 pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1538 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, &pos);
1539 if (tx != ns->geom.pgszoob) {
1540 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1541 return -1;
1542 }
1543 ns->pages_written[ns->regs.row] = 1;
1544 } else {
1545 pos = off;
1546 tx = write_file(ns, ns->cfile, pg_off, num, &pos);
1547 if (tx != num) {
1548 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1549 return -1;
1550 }
1551 }
1552 return 0;
1553 }
1554
1555 mypage = NS_GET_PAGE(ns);
1556 if (mypage->byte == NULL) {
1557 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1558 /*
1559 * We allocate memory with GFP_NOFS because a flash FS may
1560 * utilize this. If it is holding an FS lock, then gets here,
1561 * then kernel memory alloc runs writeback which goes to the FS
1562 * again and deadlocks. This was seen in practice.
1563 */
1564 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1565 if (mypage->byte == NULL) {
1566 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1567 return -1;
1568 }
1569 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1570 }
1571
1572 pg_off = NS_PAGE_BYTE_OFF(ns);
1573 for (i = 0; i < num; i++)
1574 pg_off[i] &= ns->buf.byte[i];
1575
1576 return 0;
1577 }
1578
1579 /*
1580 * If state has any action bit, perform this action.
1581 *
1582 * RETURNS: 0 if success, -1 if error.
1583 */
1584 static int do_state_action(struct nandsim *ns, uint32_t action)
1585 {
1586 int num;
1587 int busdiv = ns->busw == 8 ? 1 : 2;
1588 unsigned int erase_block_no, page_no;
1589
1590 action &= ACTION_MASK;
1591
1592 /* Check that page address input is correct */
1593 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1594 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1595 return -1;
1596 }
1597
1598 switch (action) {
1599
1600 case ACTION_CPY:
1601 /*
1602 * Copy page data to the internal buffer.
1603 */
1604
1605 /* Column shouldn't be very large */
1606 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1607 NS_ERR("do_state_action: column number is too large\n");
1608 break;
1609 }
1610 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1611 read_page(ns, num);
1612
1613 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1614 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1615
1616 if (ns->regs.off == 0)
1617 NS_LOG("read page %d\n", ns->regs.row);
1618 else if (ns->regs.off < ns->geom.pgsz)
1619 NS_LOG("read page %d (second half)\n", ns->regs.row);
1620 else
1621 NS_LOG("read OOB of page %d\n", ns->regs.row);
1622
1623 NS_UDELAY(access_delay);
1624 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1625
1626 break;
1627
1628 case ACTION_SECERASE:
1629 /*
1630 * Erase sector.
1631 */
1632
1633 if (ns->lines.wp) {
1634 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1635 return -1;
1636 }
1637
1638 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1639 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1640 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1641 return -1;
1642 }
1643
1644 ns->regs.row = (ns->regs.row <<
1645 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1646 ns->regs.column = 0;
1647
1648 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1649
1650 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1651 ns->regs.row, NS_RAW_OFFSET(ns));
1652 NS_LOG("erase sector %u\n", erase_block_no);
1653
1654 erase_sector(ns);
1655
1656 NS_MDELAY(erase_delay);
1657
1658 if (erase_block_wear)
1659 update_wear(erase_block_no);
1660
1661 if (erase_error(erase_block_no)) {
1662 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1663 return -1;
1664 }
1665
1666 break;
1667
1668 case ACTION_PRGPAGE:
1669 /*
1670 * Program page - move internal buffer data to the page.
1671 */
1672
1673 if (ns->lines.wp) {
1674 NS_WARN("do_state_action: device is write-protected, programm\n");
1675 return -1;
1676 }
1677
1678 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1679 if (num != ns->regs.count) {
1680 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1681 ns->regs.count, num);
1682 return -1;
1683 }
1684
1685 if (prog_page(ns, num) == -1)
1686 return -1;
1687
1688 page_no = ns->regs.row;
1689
1690 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1691 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1692 NS_LOG("programm page %d\n", ns->regs.row);
1693
1694 NS_UDELAY(programm_delay);
1695 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1696
1697 if (write_error(page_no)) {
1698 NS_WARN("simulating write failure in page %u\n", page_no);
1699 return -1;
1700 }
1701
1702 break;
1703
1704 case ACTION_ZEROOFF:
1705 NS_DBG("do_state_action: set internal offset to 0\n");
1706 ns->regs.off = 0;
1707 break;
1708
1709 case ACTION_HALFOFF:
1710 if (!(ns->options & OPT_PAGE512_8BIT)) {
1711 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1712 "byte page size 8x chips\n");
1713 return -1;
1714 }
1715 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1716 ns->regs.off = ns->geom.pgsz/2;
1717 break;
1718
1719 case ACTION_OOBOFF:
1720 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1721 ns->regs.off = ns->geom.pgsz;
1722 break;
1723
1724 default:
1725 NS_DBG("do_state_action: BUG! unknown action\n");
1726 }
1727
1728 return 0;
1729 }
1730
1731 /*
1732 * Switch simulator's state.
1733 */
1734 static void switch_state(struct nandsim *ns)
1735 {
1736 if (ns->op) {
1737 /*
1738 * The current operation have already been identified.
1739 * Just follow the states chain.
1740 */
1741
1742 ns->stateidx += 1;
1743 ns->state = ns->nxstate;
1744 ns->nxstate = ns->op[ns->stateidx + 1];
1745
1746 NS_DBG("switch_state: operation is known, switch to the next state, "
1747 "state: %s, nxstate: %s\n",
1748 get_state_name(ns->state), get_state_name(ns->nxstate));
1749
1750 /* See, whether we need to do some action */
1751 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1752 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1753 return;
1754 }
1755
1756 } else {
1757 /*
1758 * We don't yet know which operation we perform.
1759 * Try to identify it.
1760 */
1761
1762 /*
1763 * The only event causing the switch_state function to
1764 * be called with yet unknown operation is new command.
1765 */
1766 ns->state = get_state_by_command(ns->regs.command);
1767
1768 NS_DBG("switch_state: operation is unknown, try to find it\n");
1769
1770 if (find_operation(ns, 0) != 0)
1771 return;
1772
1773 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1774 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1775 return;
1776 }
1777 }
1778
1779 /* For 16x devices column means the page offset in words */
1780 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1781 NS_DBG("switch_state: double the column number for 16x device\n");
1782 ns->regs.column <<= 1;
1783 }
1784
1785 if (NS_STATE(ns->nxstate) == STATE_READY) {
1786 /*
1787 * The current state is the last. Return to STATE_READY
1788 */
1789
1790 u_char status = NS_STATUS_OK(ns);
1791
1792 /* In case of data states, see if all bytes were input/output */
1793 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1794 && ns->regs.count != ns->regs.num) {
1795 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1796 ns->regs.num - ns->regs.count);
1797 status = NS_STATUS_FAILED(ns);
1798 }
1799
1800 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1801
1802 switch_to_ready_state(ns, status);
1803
1804 return;
1805 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1806 /*
1807 * If the next state is data input/output, switch to it now
1808 */
1809
1810 ns->state = ns->nxstate;
1811 ns->nxstate = ns->op[++ns->stateidx + 1];
1812 ns->regs.num = ns->regs.count = 0;
1813
1814 NS_DBG("switch_state: the next state is data I/O, switch, "
1815 "state: %s, nxstate: %s\n",
1816 get_state_name(ns->state), get_state_name(ns->nxstate));
1817
1818 /*
1819 * Set the internal register to the count of bytes which
1820 * are expected to be input or output
1821 */
1822 switch (NS_STATE(ns->state)) {
1823 case STATE_DATAIN:
1824 case STATE_DATAOUT:
1825 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1826 break;
1827
1828 case STATE_DATAOUT_ID:
1829 ns->regs.num = ns->geom.idbytes;
1830 break;
1831
1832 case STATE_DATAOUT_STATUS:
1833 case STATE_DATAOUT_STATUS_M:
1834 ns->regs.count = ns->regs.num = 0;
1835 break;
1836
1837 default:
1838 NS_ERR("switch_state: BUG! unknown data state\n");
1839 }
1840
1841 } else if (ns->nxstate & STATE_ADDR_MASK) {
1842 /*
1843 * If the next state is address input, set the internal
1844 * register to the number of expected address bytes
1845 */
1846
1847 ns->regs.count = 0;
1848
1849 switch (NS_STATE(ns->nxstate)) {
1850 case STATE_ADDR_PAGE:
1851 ns->regs.num = ns->geom.pgaddrbytes;
1852
1853 break;
1854 case STATE_ADDR_SEC:
1855 ns->regs.num = ns->geom.secaddrbytes;
1856 break;
1857
1858 case STATE_ADDR_ZERO:
1859 ns->regs.num = 1;
1860 break;
1861
1862 case STATE_ADDR_COLUMN:
1863 /* Column address is always 2 bytes */
1864 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1865 break;
1866
1867 default:
1868 NS_ERR("switch_state: BUG! unknown address state\n");
1869 }
1870 } else {
1871 /*
1872 * Just reset internal counters.
1873 */
1874
1875 ns->regs.num = 0;
1876 ns->regs.count = 0;
1877 }
1878 }
1879
1880 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1881 {
1882 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1883 u_char outb = 0x00;
1884
1885 /* Sanity and correctness checks */
1886 if (!ns->lines.ce) {
1887 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1888 return outb;
1889 }
1890 if (ns->lines.ale || ns->lines.cle) {
1891 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1892 return outb;
1893 }
1894 if (!(ns->state & STATE_DATAOUT_MASK)) {
1895 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1896 "return %#x\n", get_state_name(ns->state), (uint)outb);
1897 return outb;
1898 }
1899
1900 /* Status register may be read as many times as it is wanted */
1901 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1902 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1903 return ns->regs.status;
1904 }
1905
1906 /* Check if there is any data in the internal buffer which may be read */
1907 if (ns->regs.count == ns->regs.num) {
1908 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1909 return outb;
1910 }
1911
1912 switch (NS_STATE(ns->state)) {
1913 case STATE_DATAOUT:
1914 if (ns->busw == 8) {
1915 outb = ns->buf.byte[ns->regs.count];
1916 ns->regs.count += 1;
1917 } else {
1918 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1919 ns->regs.count += 2;
1920 }
1921 break;
1922 case STATE_DATAOUT_ID:
1923 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1924 outb = ns->ids[ns->regs.count];
1925 ns->regs.count += 1;
1926 break;
1927 default:
1928 BUG();
1929 }
1930
1931 if (ns->regs.count == ns->regs.num) {
1932 NS_DBG("read_byte: all bytes were read\n");
1933
1934 /*
1935 * The OPT_AUTOINCR allows to read next consecutive pages without
1936 * new read operation cycle.
1937 */
1938 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
1939 ns->regs.count = 0;
1940 if (ns->regs.row + 1 < ns->geom.pgnum)
1941 ns->regs.row += 1;
1942 NS_DBG("read_byte: switch to the next page (%#x)\n", ns->regs.row);
1943 do_state_action(ns, ACTION_CPY);
1944 }
1945 else if (NS_STATE(ns->nxstate) == STATE_READY)
1946 switch_state(ns);
1947
1948 }
1949
1950 return outb;
1951 }
1952
1953 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1954 {
1955 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1956
1957 /* Sanity and correctness checks */
1958 if (!ns->lines.ce) {
1959 NS_ERR("write_byte: chip is disabled, ignore write\n");
1960 return;
1961 }
1962 if (ns->lines.ale && ns->lines.cle) {
1963 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1964 return;
1965 }
1966
1967 if (ns->lines.cle == 1) {
1968 /*
1969 * The byte written is a command.
1970 */
1971
1972 if (byte == NAND_CMD_RESET) {
1973 NS_LOG("reset chip\n");
1974 switch_to_ready_state(ns, NS_STATUS_OK(ns));
1975 return;
1976 }
1977
1978 /* Check that the command byte is correct */
1979 if (check_command(byte)) {
1980 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
1981 return;
1982 }
1983
1984 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
1985 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
1986 || NS_STATE(ns->state) == STATE_DATAOUT) {
1987 int row = ns->regs.row;
1988
1989 switch_state(ns);
1990 if (byte == NAND_CMD_RNDOUT)
1991 ns->regs.row = row;
1992 }
1993
1994 /* Check if chip is expecting command */
1995 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
1996 /* Do not warn if only 2 id bytes are read */
1997 if (!(ns->regs.command == NAND_CMD_READID &&
1998 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
1999 /*
2000 * We are in situation when something else (not command)
2001 * was expected but command was input. In this case ignore
2002 * previous command(s)/state(s) and accept the last one.
2003 */
2004 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2005 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2006 }
2007 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2008 }
2009
2010 NS_DBG("command byte corresponding to %s state accepted\n",
2011 get_state_name(get_state_by_command(byte)));
2012 ns->regs.command = byte;
2013 switch_state(ns);
2014
2015 } else if (ns->lines.ale == 1) {
2016 /*
2017 * The byte written is an address.
2018 */
2019
2020 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2021
2022 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2023
2024 if (find_operation(ns, 1) < 0)
2025 return;
2026
2027 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2028 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2029 return;
2030 }
2031
2032 ns->regs.count = 0;
2033 switch (NS_STATE(ns->nxstate)) {
2034 case STATE_ADDR_PAGE:
2035 ns->regs.num = ns->geom.pgaddrbytes;
2036 break;
2037 case STATE_ADDR_SEC:
2038 ns->regs.num = ns->geom.secaddrbytes;
2039 break;
2040 case STATE_ADDR_ZERO:
2041 ns->regs.num = 1;
2042 break;
2043 default:
2044 BUG();
2045 }
2046 }
2047
2048 /* Check that chip is expecting address */
2049 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2050 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2051 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2052 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2053 return;
2054 }
2055
2056 /* Check if this is expected byte */
2057 if (ns->regs.count == ns->regs.num) {
2058 NS_ERR("write_byte: no more address bytes expected\n");
2059 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2060 return;
2061 }
2062
2063 accept_addr_byte(ns, byte);
2064
2065 ns->regs.count += 1;
2066
2067 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2068 (uint)byte, ns->regs.count, ns->regs.num);
2069
2070 if (ns->regs.count == ns->regs.num) {
2071 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2072 switch_state(ns);
2073 }
2074
2075 } else {
2076 /*
2077 * The byte written is an input data.
2078 */
2079
2080 /* Check that chip is expecting data input */
2081 if (!(ns->state & STATE_DATAIN_MASK)) {
2082 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2083 "switch to %s\n", (uint)byte,
2084 get_state_name(ns->state), get_state_name(STATE_READY));
2085 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2086 return;
2087 }
2088
2089 /* Check if this is expected byte */
2090 if (ns->regs.count == ns->regs.num) {
2091 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2092 ns->regs.num);
2093 return;
2094 }
2095
2096 if (ns->busw == 8) {
2097 ns->buf.byte[ns->regs.count] = byte;
2098 ns->regs.count += 1;
2099 } else {
2100 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2101 ns->regs.count += 2;
2102 }
2103 }
2104
2105 return;
2106 }
2107
2108 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2109 {
2110 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2111
2112 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2113 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2114 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2115
2116 if (cmd != NAND_CMD_NONE)
2117 ns_nand_write_byte(mtd, cmd);
2118 }
2119
2120 static int ns_device_ready(struct mtd_info *mtd)
2121 {
2122 NS_DBG("device_ready\n");
2123 return 1;
2124 }
2125
2126 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2127 {
2128 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2129
2130 NS_DBG("read_word\n");
2131
2132 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2133 }
2134
2135 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2136 {
2137 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2138
2139 /* Check that chip is expecting data input */
2140 if (!(ns->state & STATE_DATAIN_MASK)) {
2141 NS_ERR("write_buf: data input isn't expected, state is %s, "
2142 "switch to STATE_READY\n", get_state_name(ns->state));
2143 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2144 return;
2145 }
2146
2147 /* Check if these are expected bytes */
2148 if (ns->regs.count + len > ns->regs.num) {
2149 NS_ERR("write_buf: too many input bytes\n");
2150 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2151 return;
2152 }
2153
2154 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2155 ns->regs.count += len;
2156
2157 if (ns->regs.count == ns->regs.num) {
2158 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2159 }
2160 }
2161
2162 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2163 {
2164 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2165
2166 /* Sanity and correctness checks */
2167 if (!ns->lines.ce) {
2168 NS_ERR("read_buf: chip is disabled\n");
2169 return;
2170 }
2171 if (ns->lines.ale || ns->lines.cle) {
2172 NS_ERR("read_buf: ALE or CLE pin is high\n");
2173 return;
2174 }
2175 if (!(ns->state & STATE_DATAOUT_MASK)) {
2176 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2177 get_state_name(ns->state));
2178 return;
2179 }
2180
2181 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2182 int i;
2183
2184 for (i = 0; i < len; i++)
2185 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2186
2187 return;
2188 }
2189
2190 /* Check if these are expected bytes */
2191 if (ns->regs.count + len > ns->regs.num) {
2192 NS_ERR("read_buf: too many bytes to read\n");
2193 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2194 return;
2195 }
2196
2197 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2198 ns->regs.count += len;
2199
2200 if (ns->regs.count == ns->regs.num) {
2201 if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) {
2202 ns->regs.count = 0;
2203 if (ns->regs.row + 1 < ns->geom.pgnum)
2204 ns->regs.row += 1;
2205 NS_DBG("read_buf: switch to the next page (%#x)\n", ns->regs.row);
2206 do_state_action(ns, ACTION_CPY);
2207 }
2208 else if (NS_STATE(ns->nxstate) == STATE_READY)
2209 switch_state(ns);
2210 }
2211
2212 return;
2213 }
2214
2215 static int ns_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
2216 {
2217 ns_nand_read_buf(mtd, (u_char *)&ns_verify_buf[0], len);
2218
2219 if (!memcmp(buf, &ns_verify_buf[0], len)) {
2220 NS_DBG("verify_buf: the buffer is OK\n");
2221 return 0;
2222 } else {
2223 NS_DBG("verify_buf: the buffer is wrong\n");
2224 return -EFAULT;
2225 }
2226 }
2227
2228 /*
2229 * Module initialization function
2230 */
2231 static int __init ns_init_module(void)
2232 {
2233 struct nand_chip *chip;
2234 struct nandsim *nand;
2235 int retval = -ENOMEM, i;
2236
2237 if (bus_width != 8 && bus_width != 16) {
2238 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2239 return -EINVAL;
2240 }
2241
2242 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2243 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2244 + sizeof(struct nandsim), GFP_KERNEL);
2245 if (!nsmtd) {
2246 NS_ERR("unable to allocate core structures.\n");
2247 return -ENOMEM;
2248 }
2249 chip = (struct nand_chip *)(nsmtd + 1);
2250 nsmtd->priv = (void *)chip;
2251 nand = (struct nandsim *)(chip + 1);
2252 chip->priv = (void *)nand;
2253
2254 /*
2255 * Register simulator's callbacks.
2256 */
2257 chip->cmd_ctrl = ns_hwcontrol;
2258 chip->read_byte = ns_nand_read_byte;
2259 chip->dev_ready = ns_device_ready;
2260 chip->write_buf = ns_nand_write_buf;
2261 chip->read_buf = ns_nand_read_buf;
2262 chip->verify_buf = ns_nand_verify_buf;
2263 chip->read_word = ns_nand_read_word;
2264 chip->ecc.mode = NAND_ECC_SOFT;
2265 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2266 /* and 'badblocks' parameters to work */
2267 chip->options |= NAND_SKIP_BBTSCAN;
2268
2269 switch (bbt) {
2270 case 2:
2271 chip->options |= NAND_USE_FLASH_BBT_NO_OOB;
2272 case 1:
2273 chip->options |= NAND_USE_FLASH_BBT;
2274 case 0:
2275 break;
2276 default:
2277 NS_ERR("bbt has to be 0..2\n");
2278 retval = -EINVAL;
2279 goto error;
2280 }
2281 /*
2282 * Perform minimum nandsim structure initialization to handle
2283 * the initial ID read command correctly
2284 */
2285 if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2286 nand->geom.idbytes = 4;
2287 else
2288 nand->geom.idbytes = 2;
2289 nand->regs.status = NS_STATUS_OK(nand);
2290 nand->nxstate = STATE_UNKNOWN;
2291 nand->options |= OPT_PAGE256; /* temporary value */
2292 nand->ids[0] = first_id_byte;
2293 nand->ids[1] = second_id_byte;
2294 nand->ids[2] = third_id_byte;
2295 nand->ids[3] = fourth_id_byte;
2296 if (bus_width == 16) {
2297 nand->busw = 16;
2298 chip->options |= NAND_BUSWIDTH_16;
2299 }
2300
2301 nsmtd->owner = THIS_MODULE;
2302
2303 if ((retval = parse_weakblocks()) != 0)
2304 goto error;
2305
2306 if ((retval = parse_weakpages()) != 0)
2307 goto error;
2308
2309 if ((retval = parse_gravepages()) != 0)
2310 goto error;
2311
2312 if ((retval = nand_scan(nsmtd, 1)) != 0) {
2313 NS_ERR("can't register NAND Simulator\n");
2314 if (retval > 0)
2315 retval = -ENXIO;
2316 goto error;
2317 }
2318
2319 if (overridesize) {
2320 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2321 if (new_size >> overridesize != nsmtd->erasesize) {
2322 NS_ERR("overridesize is too big\n");
2323 goto err_exit;
2324 }
2325 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2326 nsmtd->size = new_size;
2327 chip->chipsize = new_size;
2328 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2329 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2330 }
2331
2332 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2333 goto err_exit;
2334
2335 if ((retval = init_nandsim(nsmtd)) != 0)
2336 goto err_exit;
2337
2338 if ((retval = nand_default_bbt(nsmtd)) != 0)
2339 goto err_exit;
2340
2341 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2342 goto err_exit;
2343
2344 /* Register NAND partitions */
2345 if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0)
2346 goto err_exit;
2347
2348 return 0;
2349
2350 err_exit:
2351 free_nandsim(nand);
2352 nand_release(nsmtd);
2353 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2354 kfree(nand->partitions[i].name);
2355 error:
2356 kfree(nsmtd);
2357 free_lists();
2358
2359 return retval;
2360 }
2361
2362 module_init(ns_init_module);
2363
2364 /*
2365 * Module clean-up function
2366 */
2367 static void __exit ns_cleanup_module(void)
2368 {
2369 struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2370 int i;
2371
2372 free_nandsim(ns); /* Free nandsim private resources */
2373 nand_release(nsmtd); /* Unregister driver */
2374 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2375 kfree(ns->partitions[i].name);
2376 kfree(nsmtd); /* Free other structures */
2377 free_lists();
2378 }
2379
2380 module_exit(ns_cleanup_module);
2381
2382 MODULE_LICENSE ("GPL");
2383 MODULE_AUTHOR ("Artem B. Bityuckiy");
2384 MODULE_DESCRIPTION ("The NAND flash simulator");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree