1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/vmalloc.h>
31 #include <linux/netdevice.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/if_ether.h>
36 #include <linux/ethtool.h>
41 char stat_string
[ETH_GSTRING_LEN
];
46 #define IGB_STAT(m) FIELD_SIZEOF(struct igb_adapter, m), \
47 offsetof(struct igb_adapter, m)
48 static const struct igb_stats igb_gstrings_stats
[] = {
49 { "rx_packets", IGB_STAT(stats
.gprc
) },
50 { "tx_packets", IGB_STAT(stats
.gptc
) },
51 { "rx_bytes", IGB_STAT(stats
.gorc
) },
52 { "tx_bytes", IGB_STAT(stats
.gotc
) },
53 { "rx_broadcast", IGB_STAT(stats
.bprc
) },
54 { "tx_broadcast", IGB_STAT(stats
.bptc
) },
55 { "rx_multicast", IGB_STAT(stats
.mprc
) },
56 { "tx_multicast", IGB_STAT(stats
.mptc
) },
57 { "rx_errors", IGB_STAT(net_stats
.rx_errors
) },
58 { "tx_errors", IGB_STAT(net_stats
.tx_errors
) },
59 { "tx_dropped", IGB_STAT(net_stats
.tx_dropped
) },
60 { "multicast", IGB_STAT(stats
.mprc
) },
61 { "collisions", IGB_STAT(stats
.colc
) },
62 { "rx_length_errors", IGB_STAT(net_stats
.rx_length_errors
) },
63 { "rx_over_errors", IGB_STAT(net_stats
.rx_over_errors
) },
64 { "rx_crc_errors", IGB_STAT(stats
.crcerrs
) },
65 { "rx_frame_errors", IGB_STAT(net_stats
.rx_frame_errors
) },
66 { "rx_no_buffer_count", IGB_STAT(stats
.rnbc
) },
67 { "rx_missed_errors", IGB_STAT(stats
.mpc
) },
68 { "tx_aborted_errors", IGB_STAT(stats
.ecol
) },
69 { "tx_carrier_errors", IGB_STAT(stats
.tncrs
) },
70 { "tx_fifo_errors", IGB_STAT(net_stats
.tx_fifo_errors
) },
71 { "tx_heartbeat_errors", IGB_STAT(net_stats
.tx_heartbeat_errors
) },
72 { "tx_window_errors", IGB_STAT(stats
.latecol
) },
73 { "tx_abort_late_coll", IGB_STAT(stats
.latecol
) },
74 { "tx_deferred_ok", IGB_STAT(stats
.dc
) },
75 { "tx_single_coll_ok", IGB_STAT(stats
.scc
) },
76 { "tx_multi_coll_ok", IGB_STAT(stats
.mcc
) },
77 { "tx_timeout_count", IGB_STAT(tx_timeout_count
) },
78 { "tx_restart_queue", IGB_STAT(restart_queue
) },
79 { "rx_long_length_errors", IGB_STAT(stats
.roc
) },
80 { "rx_short_length_errors", IGB_STAT(stats
.ruc
) },
81 { "rx_align_errors", IGB_STAT(stats
.algnerrc
) },
82 { "tx_tcp_seg_good", IGB_STAT(stats
.tsctc
) },
83 { "tx_tcp_seg_failed", IGB_STAT(stats
.tsctfc
) },
84 { "rx_flow_control_xon", IGB_STAT(stats
.xonrxc
) },
85 { "rx_flow_control_xoff", IGB_STAT(stats
.xoffrxc
) },
86 { "tx_flow_control_xon", IGB_STAT(stats
.xontxc
) },
87 { "tx_flow_control_xoff", IGB_STAT(stats
.xofftxc
) },
88 { "rx_long_byte_count", IGB_STAT(stats
.gorc
) },
89 { "rx_csum_offload_good", IGB_STAT(hw_csum_good
) },
90 { "rx_csum_offload_errors", IGB_STAT(hw_csum_err
) },
91 { "tx_dma_out_of_sync", IGB_STAT(stats
.doosync
) },
92 { "alloc_rx_buff_failed", IGB_STAT(alloc_rx_buff_failed
) },
93 { "tx_smbus", IGB_STAT(stats
.mgptc
) },
94 { "rx_smbus", IGB_STAT(stats
.mgprc
) },
95 { "dropped_smbus", IGB_STAT(stats
.mgpdc
) },
98 #define IGB_QUEUE_STATS_LEN \
99 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues + \
100 ((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
101 (sizeof(struct igb_queue_stats) / sizeof(u64)))
102 #define IGB_GLOBAL_STATS_LEN \
103 sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
104 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
105 static const char igb_gstrings_test
[][ETH_GSTRING_LEN
] = {
106 "Register test (offline)", "Eeprom test (offline)",
107 "Interrupt test (offline)", "Loopback test (offline)",
108 "Link test (on/offline)"
110 #define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
112 static int igb_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
114 struct igb_adapter
*adapter
= netdev_priv(netdev
);
115 struct e1000_hw
*hw
= &adapter
->hw
;
117 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
119 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
120 SUPPORTED_10baseT_Full
|
121 SUPPORTED_100baseT_Half
|
122 SUPPORTED_100baseT_Full
|
123 SUPPORTED_1000baseT_Full
|
126 ecmd
->advertising
= ADVERTISED_TP
;
128 if (hw
->mac
.autoneg
== 1) {
129 ecmd
->advertising
|= ADVERTISED_Autoneg
;
130 /* the e1000 autoneg seems to match ethtool nicely */
131 ecmd
->advertising
|= hw
->phy
.autoneg_advertised
;
134 ecmd
->port
= PORT_TP
;
135 ecmd
->phy_address
= hw
->phy
.addr
;
137 ecmd
->supported
= (SUPPORTED_1000baseT_Full
|
141 ecmd
->advertising
= (ADVERTISED_1000baseT_Full
|
145 ecmd
->port
= PORT_FIBRE
;
148 ecmd
->transceiver
= XCVR_INTERNAL
;
150 if (rd32(E1000_STATUS
) & E1000_STATUS_LU
) {
152 adapter
->hw
.mac
.ops
.get_speed_and_duplex(hw
,
153 &adapter
->link_speed
,
154 &adapter
->link_duplex
);
155 ecmd
->speed
= adapter
->link_speed
;
157 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
158 * and HALF_DUPLEX != DUPLEX_HALF */
160 if (adapter
->link_duplex
== FULL_DUPLEX
)
161 ecmd
->duplex
= DUPLEX_FULL
;
163 ecmd
->duplex
= DUPLEX_HALF
;
169 ecmd
->autoneg
= ((hw
->phy
.media_type
== e1000_media_type_fiber
) ||
170 hw
->mac
.autoneg
) ? AUTONEG_ENABLE
: AUTONEG_DISABLE
;
174 static int igb_set_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
176 struct igb_adapter
*adapter
= netdev_priv(netdev
);
177 struct e1000_hw
*hw
= &adapter
->hw
;
179 /* When SoL/IDER sessions are active, autoneg/speed/duplex
180 * cannot be changed */
181 if (igb_check_reset_block(hw
)) {
182 dev_err(&adapter
->pdev
->dev
, "Cannot change link "
183 "characteristics when SoL/IDER is active.\n");
187 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
190 if (ecmd
->autoneg
== AUTONEG_ENABLE
) {
192 if (hw
->phy
.media_type
== e1000_media_type_fiber
)
193 hw
->phy
.autoneg_advertised
= ADVERTISED_1000baseT_Full
|
197 hw
->phy
.autoneg_advertised
= ecmd
->advertising
|
200 ecmd
->advertising
= hw
->phy
.autoneg_advertised
;
202 if (igb_set_spd_dplx(adapter
, ecmd
->speed
+ ecmd
->duplex
)) {
203 clear_bit(__IGB_RESETTING
, &adapter
->state
);
209 if (netif_running(adapter
->netdev
)) {
215 clear_bit(__IGB_RESETTING
, &adapter
->state
);
219 static void igb_get_pauseparam(struct net_device
*netdev
,
220 struct ethtool_pauseparam
*pause
)
222 struct igb_adapter
*adapter
= netdev_priv(netdev
);
223 struct e1000_hw
*hw
= &adapter
->hw
;
226 (adapter
->fc_autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
);
228 if (hw
->fc
.type
== e1000_fc_rx_pause
)
230 else if (hw
->fc
.type
== e1000_fc_tx_pause
)
232 else if (hw
->fc
.type
== e1000_fc_full
) {
238 static int igb_set_pauseparam(struct net_device
*netdev
,
239 struct ethtool_pauseparam
*pause
)
241 struct igb_adapter
*adapter
= netdev_priv(netdev
);
242 struct e1000_hw
*hw
= &adapter
->hw
;
245 adapter
->fc_autoneg
= pause
->autoneg
;
247 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
250 if (pause
->rx_pause
&& pause
->tx_pause
)
251 hw
->fc
.type
= e1000_fc_full
;
252 else if (pause
->rx_pause
&& !pause
->tx_pause
)
253 hw
->fc
.type
= e1000_fc_rx_pause
;
254 else if (!pause
->rx_pause
&& pause
->tx_pause
)
255 hw
->fc
.type
= e1000_fc_tx_pause
;
256 else if (!pause
->rx_pause
&& !pause
->tx_pause
)
257 hw
->fc
.type
= e1000_fc_none
;
259 hw
->fc
.original_type
= hw
->fc
.type
;
261 if (adapter
->fc_autoneg
== AUTONEG_ENABLE
) {
262 if (netif_running(adapter
->netdev
)) {
268 retval
= ((hw
->phy
.media_type
== e1000_media_type_fiber
) ?
269 igb_setup_link(hw
) : igb_force_mac_fc(hw
));
271 clear_bit(__IGB_RESETTING
, &adapter
->state
);
275 static u32
igb_get_rx_csum(struct net_device
*netdev
)
277 struct igb_adapter
*adapter
= netdev_priv(netdev
);
278 return adapter
->rx_csum
;
281 static int igb_set_rx_csum(struct net_device
*netdev
, u32 data
)
283 struct igb_adapter
*adapter
= netdev_priv(netdev
);
284 adapter
->rx_csum
= data
;
289 static u32
igb_get_tx_csum(struct net_device
*netdev
)
291 return (netdev
->features
& NETIF_F_IP_CSUM
) != 0;
294 static int igb_set_tx_csum(struct net_device
*netdev
, u32 data
)
296 struct igb_adapter
*adapter
= netdev_priv(netdev
);
299 netdev
->features
|= (NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
);
300 if (adapter
->hw
.mac
.type
== e1000_82576
)
301 netdev
->features
|= NETIF_F_SCTP_CSUM
;
303 netdev
->features
&= ~(NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
310 static int igb_set_tso(struct net_device
*netdev
, u32 data
)
312 struct igb_adapter
*adapter
= netdev_priv(netdev
);
315 netdev
->features
|= NETIF_F_TSO
;
316 netdev
->features
|= NETIF_F_TSO6
;
318 netdev
->features
&= ~NETIF_F_TSO
;
319 netdev
->features
&= ~NETIF_F_TSO6
;
322 dev_info(&adapter
->pdev
->dev
, "TSO is %s\n",
323 data
? "Enabled" : "Disabled");
327 static u32
igb_get_msglevel(struct net_device
*netdev
)
329 struct igb_adapter
*adapter
= netdev_priv(netdev
);
330 return adapter
->msg_enable
;
333 static void igb_set_msglevel(struct net_device
*netdev
, u32 data
)
335 struct igb_adapter
*adapter
= netdev_priv(netdev
);
336 adapter
->msg_enable
= data
;
339 static int igb_get_regs_len(struct net_device
*netdev
)
341 #define IGB_REGS_LEN 551
342 return IGB_REGS_LEN
* sizeof(u32
);
345 static void igb_get_regs(struct net_device
*netdev
,
346 struct ethtool_regs
*regs
, void *p
)
348 struct igb_adapter
*adapter
= netdev_priv(netdev
);
349 struct e1000_hw
*hw
= &adapter
->hw
;
353 memset(p
, 0, IGB_REGS_LEN
* sizeof(u32
));
355 regs
->version
= (1 << 24) | (hw
->revision_id
<< 16) | hw
->device_id
;
357 /* General Registers */
358 regs_buff
[0] = rd32(E1000_CTRL
);
359 regs_buff
[1] = rd32(E1000_STATUS
);
360 regs_buff
[2] = rd32(E1000_CTRL_EXT
);
361 regs_buff
[3] = rd32(E1000_MDIC
);
362 regs_buff
[4] = rd32(E1000_SCTL
);
363 regs_buff
[5] = rd32(E1000_CONNSW
);
364 regs_buff
[6] = rd32(E1000_VET
);
365 regs_buff
[7] = rd32(E1000_LEDCTL
);
366 regs_buff
[8] = rd32(E1000_PBA
);
367 regs_buff
[9] = rd32(E1000_PBS
);
368 regs_buff
[10] = rd32(E1000_FRTIMER
);
369 regs_buff
[11] = rd32(E1000_TCPTIMER
);
372 regs_buff
[12] = rd32(E1000_EECD
);
375 /* Reading EICS for EICR because they read the
376 * same but EICS does not clear on read */
377 regs_buff
[13] = rd32(E1000_EICS
);
378 regs_buff
[14] = rd32(E1000_EICS
);
379 regs_buff
[15] = rd32(E1000_EIMS
);
380 regs_buff
[16] = rd32(E1000_EIMC
);
381 regs_buff
[17] = rd32(E1000_EIAC
);
382 regs_buff
[18] = rd32(E1000_EIAM
);
383 /* Reading ICS for ICR because they read the
384 * same but ICS does not clear on read */
385 regs_buff
[19] = rd32(E1000_ICS
);
386 regs_buff
[20] = rd32(E1000_ICS
);
387 regs_buff
[21] = rd32(E1000_IMS
);
388 regs_buff
[22] = rd32(E1000_IMC
);
389 regs_buff
[23] = rd32(E1000_IAC
);
390 regs_buff
[24] = rd32(E1000_IAM
);
391 regs_buff
[25] = rd32(E1000_IMIRVP
);
394 regs_buff
[26] = rd32(E1000_FCAL
);
395 regs_buff
[27] = rd32(E1000_FCAH
);
396 regs_buff
[28] = rd32(E1000_FCTTV
);
397 regs_buff
[29] = rd32(E1000_FCRTL
);
398 regs_buff
[30] = rd32(E1000_FCRTH
);
399 regs_buff
[31] = rd32(E1000_FCRTV
);
402 regs_buff
[32] = rd32(E1000_RCTL
);
403 regs_buff
[33] = rd32(E1000_RXCSUM
);
404 regs_buff
[34] = rd32(E1000_RLPML
);
405 regs_buff
[35] = rd32(E1000_RFCTL
);
406 regs_buff
[36] = rd32(E1000_MRQC
);
407 regs_buff
[37] = rd32(E1000_VT_CTL
);
410 regs_buff
[38] = rd32(E1000_TCTL
);
411 regs_buff
[39] = rd32(E1000_TCTL_EXT
);
412 regs_buff
[40] = rd32(E1000_TIPG
);
413 regs_buff
[41] = rd32(E1000_DTXCTL
);
416 regs_buff
[42] = rd32(E1000_WUC
);
417 regs_buff
[43] = rd32(E1000_WUFC
);
418 regs_buff
[44] = rd32(E1000_WUS
);
419 regs_buff
[45] = rd32(E1000_IPAV
);
420 regs_buff
[46] = rd32(E1000_WUPL
);
423 regs_buff
[47] = rd32(E1000_PCS_CFG0
);
424 regs_buff
[48] = rd32(E1000_PCS_LCTL
);
425 regs_buff
[49] = rd32(E1000_PCS_LSTAT
);
426 regs_buff
[50] = rd32(E1000_PCS_ANADV
);
427 regs_buff
[51] = rd32(E1000_PCS_LPAB
);
428 regs_buff
[52] = rd32(E1000_PCS_NPTX
);
429 regs_buff
[53] = rd32(E1000_PCS_LPABNP
);
432 regs_buff
[54] = adapter
->stats
.crcerrs
;
433 regs_buff
[55] = adapter
->stats
.algnerrc
;
434 regs_buff
[56] = adapter
->stats
.symerrs
;
435 regs_buff
[57] = adapter
->stats
.rxerrc
;
436 regs_buff
[58] = adapter
->stats
.mpc
;
437 regs_buff
[59] = adapter
->stats
.scc
;
438 regs_buff
[60] = adapter
->stats
.ecol
;
439 regs_buff
[61] = adapter
->stats
.mcc
;
440 regs_buff
[62] = adapter
->stats
.latecol
;
441 regs_buff
[63] = adapter
->stats
.colc
;
442 regs_buff
[64] = adapter
->stats
.dc
;
443 regs_buff
[65] = adapter
->stats
.tncrs
;
444 regs_buff
[66] = adapter
->stats
.sec
;
445 regs_buff
[67] = adapter
->stats
.htdpmc
;
446 regs_buff
[68] = adapter
->stats
.rlec
;
447 regs_buff
[69] = adapter
->stats
.xonrxc
;
448 regs_buff
[70] = adapter
->stats
.xontxc
;
449 regs_buff
[71] = adapter
->stats
.xoffrxc
;
450 regs_buff
[72] = adapter
->stats
.xofftxc
;
451 regs_buff
[73] = adapter
->stats
.fcruc
;
452 regs_buff
[74] = adapter
->stats
.prc64
;
453 regs_buff
[75] = adapter
->stats
.prc127
;
454 regs_buff
[76] = adapter
->stats
.prc255
;
455 regs_buff
[77] = adapter
->stats
.prc511
;
456 regs_buff
[78] = adapter
->stats
.prc1023
;
457 regs_buff
[79] = adapter
->stats
.prc1522
;
458 regs_buff
[80] = adapter
->stats
.gprc
;
459 regs_buff
[81] = adapter
->stats
.bprc
;
460 regs_buff
[82] = adapter
->stats
.mprc
;
461 regs_buff
[83] = adapter
->stats
.gptc
;
462 regs_buff
[84] = adapter
->stats
.gorc
;
463 regs_buff
[86] = adapter
->stats
.gotc
;
464 regs_buff
[88] = adapter
->stats
.rnbc
;
465 regs_buff
[89] = adapter
->stats
.ruc
;
466 regs_buff
[90] = adapter
->stats
.rfc
;
467 regs_buff
[91] = adapter
->stats
.roc
;
468 regs_buff
[92] = adapter
->stats
.rjc
;
469 regs_buff
[93] = adapter
->stats
.mgprc
;
470 regs_buff
[94] = adapter
->stats
.mgpdc
;
471 regs_buff
[95] = adapter
->stats
.mgptc
;
472 regs_buff
[96] = adapter
->stats
.tor
;
473 regs_buff
[98] = adapter
->stats
.tot
;
474 regs_buff
[100] = adapter
->stats
.tpr
;
475 regs_buff
[101] = adapter
->stats
.tpt
;
476 regs_buff
[102] = adapter
->stats
.ptc64
;
477 regs_buff
[103] = adapter
->stats
.ptc127
;
478 regs_buff
[104] = adapter
->stats
.ptc255
;
479 regs_buff
[105] = adapter
->stats
.ptc511
;
480 regs_buff
[106] = adapter
->stats
.ptc1023
;
481 regs_buff
[107] = adapter
->stats
.ptc1522
;
482 regs_buff
[108] = adapter
->stats
.mptc
;
483 regs_buff
[109] = adapter
->stats
.bptc
;
484 regs_buff
[110] = adapter
->stats
.tsctc
;
485 regs_buff
[111] = adapter
->stats
.iac
;
486 regs_buff
[112] = adapter
->stats
.rpthc
;
487 regs_buff
[113] = adapter
->stats
.hgptc
;
488 regs_buff
[114] = adapter
->stats
.hgorc
;
489 regs_buff
[116] = adapter
->stats
.hgotc
;
490 regs_buff
[118] = adapter
->stats
.lenerrs
;
491 regs_buff
[119] = adapter
->stats
.scvpc
;
492 regs_buff
[120] = adapter
->stats
.hrmpc
;
494 /* These should probably be added to e1000_regs.h instead */
495 #define E1000_PSRTYPE_REG(_i) (0x05480 + ((_i) * 4))
496 #define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8))
497 #define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4))
498 #define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4))
499 #define E1000_FFMT_REG(_i) (0x09000 + ((_i) * 8))
500 #define E1000_FFVT_REG(_i) (0x09800 + ((_i) * 8))
501 #define E1000_FFLT_REG(_i) (0x05F00 + ((_i) * 8))
503 for (i
= 0; i
< 4; i
++)
504 regs_buff
[121 + i
] = rd32(E1000_SRRCTL(i
));
505 for (i
= 0; i
< 4; i
++)
506 regs_buff
[125 + i
] = rd32(E1000_PSRTYPE_REG(i
));
507 for (i
= 0; i
< 4; i
++)
508 regs_buff
[129 + i
] = rd32(E1000_RDBAL(i
));
509 for (i
= 0; i
< 4; i
++)
510 regs_buff
[133 + i
] = rd32(E1000_RDBAH(i
));
511 for (i
= 0; i
< 4; i
++)
512 regs_buff
[137 + i
] = rd32(E1000_RDLEN(i
));
513 for (i
= 0; i
< 4; i
++)
514 regs_buff
[141 + i
] = rd32(E1000_RDH(i
));
515 for (i
= 0; i
< 4; i
++)
516 regs_buff
[145 + i
] = rd32(E1000_RDT(i
));
517 for (i
= 0; i
< 4; i
++)
518 regs_buff
[149 + i
] = rd32(E1000_RXDCTL(i
));
520 for (i
= 0; i
< 10; i
++)
521 regs_buff
[153 + i
] = rd32(E1000_EITR(i
));
522 for (i
= 0; i
< 8; i
++)
523 regs_buff
[163 + i
] = rd32(E1000_IMIR(i
));
524 for (i
= 0; i
< 8; i
++)
525 regs_buff
[171 + i
] = rd32(E1000_IMIREXT(i
));
526 for (i
= 0; i
< 16; i
++)
527 regs_buff
[179 + i
] = rd32(E1000_RAL(i
));
528 for (i
= 0; i
< 16; i
++)
529 regs_buff
[195 + i
] = rd32(E1000_RAH(i
));
531 for (i
= 0; i
< 4; i
++)
532 regs_buff
[211 + i
] = rd32(E1000_TDBAL(i
));
533 for (i
= 0; i
< 4; i
++)
534 regs_buff
[215 + i
] = rd32(E1000_TDBAH(i
));
535 for (i
= 0; i
< 4; i
++)
536 regs_buff
[219 + i
] = rd32(E1000_TDLEN(i
));
537 for (i
= 0; i
< 4; i
++)
538 regs_buff
[223 + i
] = rd32(E1000_TDH(i
));
539 for (i
= 0; i
< 4; i
++)
540 regs_buff
[227 + i
] = rd32(E1000_TDT(i
));
541 for (i
= 0; i
< 4; i
++)
542 regs_buff
[231 + i
] = rd32(E1000_TXDCTL(i
));
543 for (i
= 0; i
< 4; i
++)
544 regs_buff
[235 + i
] = rd32(E1000_TDWBAL(i
));
545 for (i
= 0; i
< 4; i
++)
546 regs_buff
[239 + i
] = rd32(E1000_TDWBAH(i
));
547 for (i
= 0; i
< 4; i
++)
548 regs_buff
[243 + i
] = rd32(E1000_DCA_TXCTRL(i
));
550 for (i
= 0; i
< 4; i
++)
551 regs_buff
[247 + i
] = rd32(E1000_IP4AT_REG(i
));
552 for (i
= 0; i
< 4; i
++)
553 regs_buff
[251 + i
] = rd32(E1000_IP6AT_REG(i
));
554 for (i
= 0; i
< 32; i
++)
555 regs_buff
[255 + i
] = rd32(E1000_WUPM_REG(i
));
556 for (i
= 0; i
< 128; i
++)
557 regs_buff
[287 + i
] = rd32(E1000_FFMT_REG(i
));
558 for (i
= 0; i
< 128; i
++)
559 regs_buff
[415 + i
] = rd32(E1000_FFVT_REG(i
));
560 for (i
= 0; i
< 4; i
++)
561 regs_buff
[543 + i
] = rd32(E1000_FFLT_REG(i
));
563 regs_buff
[547] = rd32(E1000_TDFH
);
564 regs_buff
[548] = rd32(E1000_TDFT
);
565 regs_buff
[549] = rd32(E1000_TDFHS
);
566 regs_buff
[550] = rd32(E1000_TDFPC
);
570 static int igb_get_eeprom_len(struct net_device
*netdev
)
572 struct igb_adapter
*adapter
= netdev_priv(netdev
);
573 return adapter
->hw
.nvm
.word_size
* 2;
576 static int igb_get_eeprom(struct net_device
*netdev
,
577 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
579 struct igb_adapter
*adapter
= netdev_priv(netdev
);
580 struct e1000_hw
*hw
= &adapter
->hw
;
582 int first_word
, last_word
;
586 if (eeprom
->len
== 0)
589 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
591 first_word
= eeprom
->offset
>> 1;
592 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
594 eeprom_buff
= kmalloc(sizeof(u16
) *
595 (last_word
- first_word
+ 1), GFP_KERNEL
);
599 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
)
600 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
,
601 last_word
- first_word
+ 1,
604 for (i
= 0; i
< last_word
- first_word
+ 1; i
++) {
605 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
+ i
, 1,
612 /* Device's eeprom is always little-endian, word addressable */
613 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
614 le16_to_cpus(&eeprom_buff
[i
]);
616 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1),
623 static int igb_set_eeprom(struct net_device
*netdev
,
624 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
626 struct igb_adapter
*adapter
= netdev_priv(netdev
);
627 struct e1000_hw
*hw
= &adapter
->hw
;
630 int max_len
, first_word
, last_word
, ret_val
= 0;
633 if (eeprom
->len
== 0)
636 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
639 max_len
= hw
->nvm
.word_size
* 2;
641 first_word
= eeprom
->offset
>> 1;
642 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
643 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
647 ptr
= (void *)eeprom_buff
;
649 if (eeprom
->offset
& 1) {
650 /* need read/modify/write of first changed EEPROM word */
651 /* only the second byte of the word is being modified */
652 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
, 1,
656 if (((eeprom
->offset
+ eeprom
->len
) & 1) && (ret_val
== 0)) {
657 /* need read/modify/write of last changed EEPROM word */
658 /* only the first byte of the word is being modified */
659 ret_val
= hw
->nvm
.ops
.read(hw
, last_word
, 1,
660 &eeprom_buff
[last_word
- first_word
]);
663 /* Device's eeprom is always little-endian, word addressable */
664 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
665 le16_to_cpus(&eeprom_buff
[i
]);
667 memcpy(ptr
, bytes
, eeprom
->len
);
669 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
670 eeprom_buff
[i
] = cpu_to_le16(eeprom_buff
[i
]);
672 ret_val
= hw
->nvm
.ops
.write(hw
, first_word
,
673 last_word
- first_word
+ 1, eeprom_buff
);
675 /* Update the checksum over the first part of the EEPROM if needed
676 * and flush shadow RAM for 82573 controllers */
677 if ((ret_val
== 0) && ((first_word
<= NVM_CHECKSUM_REG
)))
678 igb_update_nvm_checksum(hw
);
684 static void igb_get_drvinfo(struct net_device
*netdev
,
685 struct ethtool_drvinfo
*drvinfo
)
687 struct igb_adapter
*adapter
= netdev_priv(netdev
);
688 char firmware_version
[32];
691 strncpy(drvinfo
->driver
, igb_driver_name
, 32);
692 strncpy(drvinfo
->version
, igb_driver_version
, 32);
694 /* EEPROM image version # is reported as firmware version # for
695 * 82575 controllers */
696 adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, 5, 1, &eeprom_data
);
697 sprintf(firmware_version
, "%d.%d-%d",
698 (eeprom_data
& 0xF000) >> 12,
699 (eeprom_data
& 0x0FF0) >> 4,
700 eeprom_data
& 0x000F);
702 strncpy(drvinfo
->fw_version
, firmware_version
, 32);
703 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
), 32);
704 drvinfo
->n_stats
= IGB_STATS_LEN
;
705 drvinfo
->testinfo_len
= IGB_TEST_LEN
;
706 drvinfo
->regdump_len
= igb_get_regs_len(netdev
);
707 drvinfo
->eedump_len
= igb_get_eeprom_len(netdev
);
710 static void igb_get_ringparam(struct net_device
*netdev
,
711 struct ethtool_ringparam
*ring
)
713 struct igb_adapter
*adapter
= netdev_priv(netdev
);
715 ring
->rx_max_pending
= IGB_MAX_RXD
;
716 ring
->tx_max_pending
= IGB_MAX_TXD
;
717 ring
->rx_mini_max_pending
= 0;
718 ring
->rx_jumbo_max_pending
= 0;
719 ring
->rx_pending
= adapter
->rx_ring_count
;
720 ring
->tx_pending
= adapter
->tx_ring_count
;
721 ring
->rx_mini_pending
= 0;
722 ring
->rx_jumbo_pending
= 0;
725 static int igb_set_ringparam(struct net_device
*netdev
,
726 struct ethtool_ringparam
*ring
)
728 struct igb_adapter
*adapter
= netdev_priv(netdev
);
729 struct igb_ring
*temp_ring
;
731 u32 new_rx_count
, new_tx_count
;
733 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
736 new_rx_count
= max(ring
->rx_pending
, (u32
)IGB_MIN_RXD
);
737 new_rx_count
= min(new_rx_count
, (u32
)IGB_MAX_RXD
);
738 new_rx_count
= ALIGN(new_rx_count
, REQ_RX_DESCRIPTOR_MULTIPLE
);
740 new_tx_count
= max(ring
->tx_pending
, (u32
)IGB_MIN_TXD
);
741 new_tx_count
= min(new_tx_count
, (u32
)IGB_MAX_TXD
);
742 new_tx_count
= ALIGN(new_tx_count
, REQ_TX_DESCRIPTOR_MULTIPLE
);
744 if ((new_tx_count
== adapter
->tx_ring_count
) &&
745 (new_rx_count
== adapter
->rx_ring_count
)) {
750 if (adapter
->num_tx_queues
> adapter
->num_rx_queues
)
751 temp_ring
= vmalloc(adapter
->num_tx_queues
* sizeof(struct igb_ring
));
753 temp_ring
= vmalloc(adapter
->num_rx_queues
* sizeof(struct igb_ring
));
757 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
760 if (netif_running(adapter
->netdev
))
764 * We can't just free everything and then setup again,
765 * because the ISRs in MSI-X mode get passed pointers
766 * to the tx and rx ring structs.
768 if (new_tx_count
!= adapter
->tx_ring_count
) {
769 memcpy(temp_ring
, adapter
->tx_ring
,
770 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
772 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
773 temp_ring
[i
].count
= new_tx_count
;
774 err
= igb_setup_tx_resources(adapter
, &temp_ring
[i
]);
778 igb_free_tx_resources(&temp_ring
[i
]);
784 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
785 igb_free_tx_resources(&adapter
->tx_ring
[i
]);
787 memcpy(adapter
->tx_ring
, temp_ring
,
788 adapter
->num_tx_queues
* sizeof(struct igb_ring
));
790 adapter
->tx_ring_count
= new_tx_count
;
793 if (new_rx_count
!= adapter
->rx_ring
->count
) {
794 memcpy(temp_ring
, adapter
->rx_ring
,
795 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
797 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
798 temp_ring
[i
].count
= new_rx_count
;
799 err
= igb_setup_rx_resources(adapter
, &temp_ring
[i
]);
803 igb_free_rx_resources(&temp_ring
[i
]);
810 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
811 igb_free_rx_resources(&adapter
->rx_ring
[i
]);
813 memcpy(adapter
->rx_ring
, temp_ring
,
814 adapter
->num_rx_queues
* sizeof(struct igb_ring
));
816 adapter
->rx_ring_count
= new_rx_count
;
821 if (netif_running(adapter
->netdev
))
824 clear_bit(__IGB_RESETTING
, &adapter
->state
);
829 /* ethtool register test data */
830 struct igb_reg_test
{
839 /* In the hardware, registers are laid out either singly, in arrays
840 * spaced 0x100 bytes apart, or in contiguous tables. We assume
841 * most tests take place on arrays or single registers (handled
842 * as a single-element array) and special-case the tables.
843 * Table tests are always pattern tests.
845 * We also make provision for some required setup steps by specifying
846 * registers to be written without any read-back testing.
849 #define PATTERN_TEST 1
850 #define SET_READ_TEST 2
851 #define WRITE_NO_TEST 3
852 #define TABLE32_TEST 4
853 #define TABLE64_TEST_LO 5
854 #define TABLE64_TEST_HI 6
857 static struct igb_reg_test reg_test_82576
[] = {
858 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
859 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
860 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
861 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
862 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
863 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
864 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
865 { E1000_RDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
866 { E1000_RDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
867 { E1000_RDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
868 /* Enable all RX queues before testing. */
869 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
870 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
871 /* RDH is read-only for 82576, only test RDT. */
872 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
873 { E1000_RDT(4), 0x40, 12, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
874 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
875 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, 0 },
876 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
877 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
878 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
879 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
880 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
881 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
882 { E1000_TDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
883 { E1000_TDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
884 { E1000_TDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
885 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
886 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
887 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
888 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
889 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
890 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
891 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
892 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
893 { E1000_MTA
, 0, 128,TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
897 /* 82575 register test */
898 static struct igb_reg_test reg_test_82575
[] = {
899 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
900 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
901 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
902 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
903 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
904 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
905 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
906 /* Enable all four RX queues before testing. */
907 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
908 /* RDH is read-only for 82575, only test RDT. */
909 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
910 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
911 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
912 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
913 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
914 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
915 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
916 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
917 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
918 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0x003FFFFB },
919 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0xFFFFFFFF },
920 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
921 { E1000_TXCW
, 0x100, 1, PATTERN_TEST
, 0xC000FFFF, 0x0000FFFF },
922 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
923 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x800FFFFF, 0xFFFFFFFF },
924 { E1000_MTA
, 0, 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
928 static bool reg_pattern_test(struct igb_adapter
*adapter
, u64
*data
,
929 int reg
, u32 mask
, u32 write
)
931 struct e1000_hw
*hw
= &adapter
->hw
;
934 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
935 for (pat
= 0; pat
< ARRAY_SIZE(_test
); pat
++) {
936 wr32(reg
, (_test
[pat
] & write
));
938 if (val
!= (_test
[pat
] & write
& mask
)) {
939 dev_err(&adapter
->pdev
->dev
, "pattern test reg %04X "
940 "failed: got 0x%08X expected 0x%08X\n",
941 reg
, val
, (_test
[pat
] & write
& mask
));
949 static bool reg_set_and_check(struct igb_adapter
*adapter
, u64
*data
,
950 int reg
, u32 mask
, u32 write
)
952 struct e1000_hw
*hw
= &adapter
->hw
;
954 wr32(reg
, write
& mask
);
956 if ((write
& mask
) != (val
& mask
)) {
957 dev_err(&adapter
->pdev
->dev
, "set/check reg %04X test failed:"
958 " got 0x%08X expected 0x%08X\n", reg
,
959 (val
& mask
), (write
& mask
));
966 #define REG_PATTERN_TEST(reg, mask, write) \
968 if (reg_pattern_test(adapter, data, reg, mask, write)) \
972 #define REG_SET_AND_CHECK(reg, mask, write) \
974 if (reg_set_and_check(adapter, data, reg, mask, write)) \
978 static int igb_reg_test(struct igb_adapter
*adapter
, u64
*data
)
980 struct e1000_hw
*hw
= &adapter
->hw
;
981 struct igb_reg_test
*test
;
982 u32 value
, before
, after
;
987 switch (adapter
->hw
.mac
.type
) {
989 test
= reg_test_82576
;
992 test
= reg_test_82575
;
996 /* Because the status register is such a special case,
997 * we handle it separately from the rest of the register
998 * tests. Some bits are read-only, some toggle, and some
999 * are writable on newer MACs.
1001 before
= rd32(E1000_STATUS
);
1002 value
= (rd32(E1000_STATUS
) & toggle
);
1003 wr32(E1000_STATUS
, toggle
);
1004 after
= rd32(E1000_STATUS
) & toggle
;
1005 if (value
!= after
) {
1006 dev_err(&adapter
->pdev
->dev
, "failed STATUS register test "
1007 "got: 0x%08X expected: 0x%08X\n", after
, value
);
1011 /* restore previous status */
1012 wr32(E1000_STATUS
, before
);
1014 /* Perform the remainder of the register test, looping through
1015 * the test table until we either fail or reach the null entry.
1018 for (i
= 0; i
< test
->array_len
; i
++) {
1019 switch (test
->test_type
) {
1021 REG_PATTERN_TEST(test
->reg
+
1022 (i
* test
->reg_offset
),
1027 REG_SET_AND_CHECK(test
->reg
+
1028 (i
* test
->reg_offset
),
1034 (adapter
->hw
.hw_addr
+ test
->reg
)
1035 + (i
* test
->reg_offset
));
1038 REG_PATTERN_TEST(test
->reg
+ (i
* 4),
1042 case TABLE64_TEST_LO
:
1043 REG_PATTERN_TEST(test
->reg
+ (i
* 8),
1047 case TABLE64_TEST_HI
:
1048 REG_PATTERN_TEST((test
->reg
+ 4) + (i
* 8),
1061 static int igb_eeprom_test(struct igb_adapter
*adapter
, u64
*data
)
1068 /* Read and add up the contents of the EEPROM */
1069 for (i
= 0; i
< (NVM_CHECKSUM_REG
+ 1); i
++) {
1070 if ((adapter
->hw
.nvm
.ops
.read(&adapter
->hw
, i
, 1, &temp
))
1078 /* If Checksum is not Correct return error else test passed */
1079 if ((checksum
!= (u16
) NVM_SUM
) && !(*data
))
1085 static irqreturn_t
igb_test_intr(int irq
, void *data
)
1087 struct net_device
*netdev
= (struct net_device
*) data
;
1088 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1089 struct e1000_hw
*hw
= &adapter
->hw
;
1091 adapter
->test_icr
|= rd32(E1000_ICR
);
1096 static int igb_intr_test(struct igb_adapter
*adapter
, u64
*data
)
1098 struct e1000_hw
*hw
= &adapter
->hw
;
1099 struct net_device
*netdev
= adapter
->netdev
;
1100 u32 mask
, ics_mask
, i
= 0, shared_int
= true;
1101 u32 irq
= adapter
->pdev
->irq
;
1105 /* Hook up test interrupt handler just for this test */
1106 if (adapter
->msix_entries
)
1107 /* NOTE: we don't test MSI-X interrupts here, yet */
1110 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1112 if (request_irq(irq
, &igb_test_intr
, 0, netdev
->name
, netdev
)) {
1116 } else if (!request_irq(irq
, &igb_test_intr
, IRQF_PROBE_SHARED
,
1117 netdev
->name
, netdev
)) {
1119 } else if (request_irq(irq
, &igb_test_intr
, IRQF_SHARED
,
1120 netdev
->name
, netdev
)) {
1124 dev_info(&adapter
->pdev
->dev
, "testing %s interrupt\n",
1125 (shared_int
? "shared" : "unshared"));
1126 /* Disable all the interrupts */
1127 wr32(E1000_IMC
, 0xFFFFFFFF);
1130 /* Define all writable bits for ICS */
1131 switch(hw
->mac
.type
) {
1133 ics_mask
= 0x37F47EDD;
1136 ics_mask
= 0x77D4FBFD;
1139 ics_mask
= 0x7FFFFFFF;
1143 /* Test each interrupt */
1144 for (; i
< 31; i
++) {
1145 /* Interrupt to test */
1148 if (!(mask
& ics_mask
))
1152 /* Disable the interrupt to be reported in
1153 * the cause register and then force the same
1154 * interrupt and see if one gets posted. If
1155 * an interrupt was posted to the bus, the
1158 adapter
->test_icr
= 0;
1160 /* Flush any pending interrupts */
1161 wr32(E1000_ICR
, ~0);
1163 wr32(E1000_IMC
, mask
);
1164 wr32(E1000_ICS
, mask
);
1167 if (adapter
->test_icr
& mask
) {
1173 /* Enable the interrupt to be reported in
1174 * the cause register and then force the same
1175 * interrupt and see if one gets posted. If
1176 * an interrupt was not posted to the bus, the
1179 adapter
->test_icr
= 0;
1181 /* Flush any pending interrupts */
1182 wr32(E1000_ICR
, ~0);
1184 wr32(E1000_IMS
, mask
);
1185 wr32(E1000_ICS
, mask
);
1188 if (!(adapter
->test_icr
& mask
)) {
1194 /* Disable the other interrupts to be reported in
1195 * the cause register and then force the other
1196 * interrupts and see if any get posted. If
1197 * an interrupt was posted to the bus, the
1200 adapter
->test_icr
= 0;
1202 /* Flush any pending interrupts */
1203 wr32(E1000_ICR
, ~0);
1205 wr32(E1000_IMC
, ~mask
);
1206 wr32(E1000_ICS
, ~mask
);
1209 if (adapter
->test_icr
& mask
) {
1216 /* Disable all the interrupts */
1217 wr32(E1000_IMC
, ~0);
1220 /* Unhook test interrupt handler */
1221 free_irq(irq
, netdev
);
1226 static void igb_free_desc_rings(struct igb_adapter
*adapter
)
1228 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1229 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1230 struct pci_dev
*pdev
= adapter
->pdev
;
1233 if (tx_ring
->desc
&& tx_ring
->buffer_info
) {
1234 for (i
= 0; i
< tx_ring
->count
; i
++) {
1235 struct igb_buffer
*buf
= &(tx_ring
->buffer_info
[i
]);
1237 pci_unmap_single(pdev
, buf
->dma
, buf
->length
,
1240 dev_kfree_skb(buf
->skb
);
1244 if (rx_ring
->desc
&& rx_ring
->buffer_info
) {
1245 for (i
= 0; i
< rx_ring
->count
; i
++) {
1246 struct igb_buffer
*buf
= &(rx_ring
->buffer_info
[i
]);
1248 pci_unmap_single(pdev
, buf
->dma
,
1250 PCI_DMA_FROMDEVICE
);
1252 dev_kfree_skb(buf
->skb
);
1256 if (tx_ring
->desc
) {
1257 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
,
1259 tx_ring
->desc
= NULL
;
1261 if (rx_ring
->desc
) {
1262 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
,
1264 rx_ring
->desc
= NULL
;
1267 kfree(tx_ring
->buffer_info
);
1268 tx_ring
->buffer_info
= NULL
;
1269 kfree(rx_ring
->buffer_info
);
1270 rx_ring
->buffer_info
= NULL
;
1275 static int igb_setup_desc_rings(struct igb_adapter
*adapter
)
1277 struct e1000_hw
*hw
= &adapter
->hw
;
1278 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1279 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1280 struct pci_dev
*pdev
= adapter
->pdev
;
1281 struct igb_buffer
*buffer_info
;
1285 /* Setup Tx descriptor ring and Tx buffers */
1287 if (!tx_ring
->count
)
1288 tx_ring
->count
= IGB_DEFAULT_TXD
;
1290 tx_ring
->buffer_info
= kcalloc(tx_ring
->count
,
1291 sizeof(struct igb_buffer
),
1293 if (!tx_ring
->buffer_info
) {
1298 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
1299 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
1300 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
1302 if (!tx_ring
->desc
) {
1306 tx_ring
->next_to_use
= tx_ring
->next_to_clean
= 0;
1308 wr32(E1000_TDBAL(0),
1309 ((u64
) tx_ring
->dma
& 0x00000000FFFFFFFF));
1310 wr32(E1000_TDBAH(0), ((u64
) tx_ring
->dma
>> 32));
1311 wr32(E1000_TDLEN(0),
1312 tx_ring
->count
* sizeof(union e1000_adv_tx_desc
));
1313 wr32(E1000_TDH(0), 0);
1314 wr32(E1000_TDT(0), 0);
1316 E1000_TCTL_PSP
| E1000_TCTL_EN
|
1317 E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
|
1318 E1000_COLLISION_DISTANCE
<< E1000_COLD_SHIFT
);
1320 for (i
= 0; i
< tx_ring
->count
; i
++) {
1321 union e1000_adv_tx_desc
*tx_desc
;
1322 struct sk_buff
*skb
;
1323 unsigned int size
= 1024;
1325 tx_desc
= E1000_TX_DESC_ADV(*tx_ring
, i
);
1326 skb
= alloc_skb(size
, GFP_KERNEL
);
1332 buffer_info
= &tx_ring
->buffer_info
[i
];
1333 buffer_info
->skb
= skb
;
1334 buffer_info
->length
= skb
->len
;
1335 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
, skb
->len
,
1337 tx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
1338 tx_desc
->read
.olinfo_status
= cpu_to_le32(skb
->len
) <<
1339 E1000_ADVTXD_PAYLEN_SHIFT
;
1340 tx_desc
->read
.cmd_type_len
= cpu_to_le32(skb
->len
);
1341 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(E1000_TXD_CMD_EOP
|
1342 E1000_TXD_CMD_IFCS
|
1344 E1000_ADVTXD_DTYP_DATA
|
1345 E1000_ADVTXD_DCMD_DEXT
);
1348 /* Setup Rx descriptor ring and Rx buffers */
1350 if (!rx_ring
->count
)
1351 rx_ring
->count
= IGB_DEFAULT_RXD
;
1353 rx_ring
->buffer_info
= kcalloc(rx_ring
->count
,
1354 sizeof(struct igb_buffer
),
1356 if (!rx_ring
->buffer_info
) {
1361 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
1362 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
,
1364 if (!rx_ring
->desc
) {
1368 rx_ring
->next_to_use
= rx_ring
->next_to_clean
= 0;
1370 rctl
= rd32(E1000_RCTL
);
1371 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1372 wr32(E1000_RDBAL(0),
1373 ((u64
) rx_ring
->dma
& 0xFFFFFFFF));
1374 wr32(E1000_RDBAH(0),
1375 ((u64
) rx_ring
->dma
>> 32));
1376 wr32(E1000_RDLEN(0), rx_ring
->size
);
1377 wr32(E1000_RDH(0), 0);
1378 wr32(E1000_RDT(0), 0);
1379 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1380 rctl
= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
1381 (adapter
->hw
.mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
1382 wr32(E1000_RCTL
, rctl
);
1383 wr32(E1000_SRRCTL(0), E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
);
1385 for (i
= 0; i
< rx_ring
->count
; i
++) {
1386 union e1000_adv_rx_desc
*rx_desc
;
1387 struct sk_buff
*skb
;
1389 buffer_info
= &rx_ring
->buffer_info
[i
];
1390 rx_desc
= E1000_RX_DESC_ADV(*rx_ring
, i
);
1391 skb
= alloc_skb(IGB_RXBUFFER_2048
+ NET_IP_ALIGN
,
1397 skb_reserve(skb
, NET_IP_ALIGN
);
1398 buffer_info
->skb
= skb
;
1399 buffer_info
->dma
= pci_map_single(pdev
, skb
->data
,
1401 PCI_DMA_FROMDEVICE
);
1402 rx_desc
->read
.pkt_addr
= cpu_to_le64(buffer_info
->dma
);
1403 memset(skb
->data
, 0x00, skb
->len
);
1409 igb_free_desc_rings(adapter
);
1413 static void igb_phy_disable_receiver(struct igb_adapter
*adapter
)
1415 struct e1000_hw
*hw
= &adapter
->hw
;
1417 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1418 igb_write_phy_reg(hw
, 29, 0x001F);
1419 igb_write_phy_reg(hw
, 30, 0x8FFC);
1420 igb_write_phy_reg(hw
, 29, 0x001A);
1421 igb_write_phy_reg(hw
, 30, 0x8FF0);
1424 static int igb_integrated_phy_loopback(struct igb_adapter
*adapter
)
1426 struct e1000_hw
*hw
= &adapter
->hw
;
1429 hw
->mac
.autoneg
= false;
1431 if (hw
->phy
.type
== e1000_phy_m88
) {
1432 /* Auto-MDI/MDIX Off */
1433 igb_write_phy_reg(hw
, M88E1000_PHY_SPEC_CTRL
, 0x0808);
1434 /* reset to update Auto-MDI/MDIX */
1435 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x9140);
1437 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x8140);
1440 ctrl_reg
= rd32(E1000_CTRL
);
1442 /* force 1000, set loopback */
1443 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x4140);
1445 /* Now set up the MAC to the same speed/duplex as the PHY. */
1446 ctrl_reg
= rd32(E1000_CTRL
);
1447 ctrl_reg
&= ~E1000_CTRL_SPD_SEL
; /* Clear the speed sel bits */
1448 ctrl_reg
|= (E1000_CTRL_FRCSPD
| /* Set the Force Speed Bit */
1449 E1000_CTRL_FRCDPX
| /* Set the Force Duplex Bit */
1450 E1000_CTRL_SPD_1000
|/* Force Speed to 1000 */
1451 E1000_CTRL_FD
| /* Force Duplex to FULL */
1452 E1000_CTRL_SLU
); /* Set link up enable bit */
1454 if (hw
->phy
.type
== e1000_phy_m88
)
1455 ctrl_reg
|= E1000_CTRL_ILOS
; /* Invert Loss of Signal */
1457 wr32(E1000_CTRL
, ctrl_reg
);
1459 /* Disable the receiver on the PHY so when a cable is plugged in, the
1460 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1462 if (hw
->phy
.type
== e1000_phy_m88
)
1463 igb_phy_disable_receiver(adapter
);
1470 static int igb_set_phy_loopback(struct igb_adapter
*adapter
)
1472 return igb_integrated_phy_loopback(adapter
);
1475 static int igb_setup_loopback_test(struct igb_adapter
*adapter
)
1477 struct e1000_hw
*hw
= &adapter
->hw
;
1480 if (hw
->phy
.media_type
== e1000_media_type_fiber
||
1481 hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1482 reg
= rd32(E1000_RCTL
);
1483 reg
|= E1000_RCTL_LBM_TCVR
;
1484 wr32(E1000_RCTL
, reg
);
1486 wr32(E1000_SCTL
, E1000_ENABLE_SERDES_LOOPBACK
);
1488 reg
= rd32(E1000_CTRL
);
1489 reg
&= ~(E1000_CTRL_RFCE
|
1492 reg
|= E1000_CTRL_SLU
|
1494 wr32(E1000_CTRL
, reg
);
1496 /* Unset switch control to serdes energy detect */
1497 reg
= rd32(E1000_CONNSW
);
1498 reg
&= ~E1000_CONNSW_ENRGSRC
;
1499 wr32(E1000_CONNSW
, reg
);
1501 /* Set PCS register for forced speed */
1502 reg
= rd32(E1000_PCS_LCTL
);
1503 reg
&= ~E1000_PCS_LCTL_AN_ENABLE
; /* Disable Autoneg*/
1504 reg
|= E1000_PCS_LCTL_FLV_LINK_UP
| /* Force link up */
1505 E1000_PCS_LCTL_FSV_1000
| /* Force 1000 */
1506 E1000_PCS_LCTL_FDV_FULL
| /* SerDes Full duplex */
1507 E1000_PCS_LCTL_FSD
| /* Force Speed */
1508 E1000_PCS_LCTL_FORCE_LINK
; /* Force Link */
1509 wr32(E1000_PCS_LCTL
, reg
);
1512 } else if (hw
->phy
.media_type
== e1000_media_type_copper
) {
1513 return igb_set_phy_loopback(adapter
);
1519 static void igb_loopback_cleanup(struct igb_adapter
*adapter
)
1521 struct e1000_hw
*hw
= &adapter
->hw
;
1525 rctl
= rd32(E1000_RCTL
);
1526 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1527 wr32(E1000_RCTL
, rctl
);
1529 hw
->mac
.autoneg
= true;
1530 igb_read_phy_reg(hw
, PHY_CONTROL
, &phy_reg
);
1531 if (phy_reg
& MII_CR_LOOPBACK
) {
1532 phy_reg
&= ~MII_CR_LOOPBACK
;
1533 igb_write_phy_reg(hw
, PHY_CONTROL
, phy_reg
);
1534 igb_phy_sw_reset(hw
);
1538 static void igb_create_lbtest_frame(struct sk_buff
*skb
,
1539 unsigned int frame_size
)
1541 memset(skb
->data
, 0xFF, frame_size
);
1543 memset(&skb
->data
[frame_size
/ 2], 0xAA, frame_size
/ 2 - 1);
1544 memset(&skb
->data
[frame_size
/ 2 + 10], 0xBE, 1);
1545 memset(&skb
->data
[frame_size
/ 2 + 12], 0xAF, 1);
1548 static int igb_check_lbtest_frame(struct sk_buff
*skb
, unsigned int frame_size
)
1551 if (*(skb
->data
+ 3) == 0xFF)
1552 if ((*(skb
->data
+ frame_size
/ 2 + 10) == 0xBE) &&
1553 (*(skb
->data
+ frame_size
/ 2 + 12) == 0xAF))
1558 static int igb_run_loopback_test(struct igb_adapter
*adapter
)
1560 struct e1000_hw
*hw
= &adapter
->hw
;
1561 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1562 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1563 struct pci_dev
*pdev
= adapter
->pdev
;
1564 int i
, j
, k
, l
, lc
, good_cnt
;
1568 wr32(E1000_RDT(0), rx_ring
->count
- 1);
1570 /* Calculate the loop count based on the largest descriptor ring
1571 * The idea is to wrap the largest ring a number of times using 64
1572 * send/receive pairs during each loop
1575 if (rx_ring
->count
<= tx_ring
->count
)
1576 lc
= ((tx_ring
->count
/ 64) * 2) + 1;
1578 lc
= ((rx_ring
->count
/ 64) * 2) + 1;
1581 for (j
= 0; j
<= lc
; j
++) { /* loop count loop */
1582 for (i
= 0; i
< 64; i
++) { /* send the packets */
1583 igb_create_lbtest_frame(tx_ring
->buffer_info
[k
].skb
,
1585 pci_dma_sync_single_for_device(pdev
,
1586 tx_ring
->buffer_info
[k
].dma
,
1587 tx_ring
->buffer_info
[k
].length
,
1590 if (k
== tx_ring
->count
)
1593 wr32(E1000_TDT(0), k
);
1595 time
= jiffies
; /* set the start time for the receive */
1597 do { /* receive the sent packets */
1598 pci_dma_sync_single_for_cpu(pdev
,
1599 rx_ring
->buffer_info
[l
].dma
,
1601 PCI_DMA_FROMDEVICE
);
1603 ret_val
= igb_check_lbtest_frame(
1604 rx_ring
->buffer_info
[l
].skb
, 1024);
1608 if (l
== rx_ring
->count
)
1610 /* time + 20 msecs (200 msecs on 2.4) is more than
1611 * enough time to complete the receives, if it's
1612 * exceeded, break and error off
1614 } while (good_cnt
< 64 && jiffies
< (time
+ 20));
1615 if (good_cnt
!= 64) {
1616 ret_val
= 13; /* ret_val is the same as mis-compare */
1619 if (jiffies
>= (time
+ 20)) {
1620 ret_val
= 14; /* error code for time out error */
1623 } /* end loop count loop */
1627 static int igb_loopback_test(struct igb_adapter
*adapter
, u64
*data
)
1629 /* PHY loopback cannot be performed if SoL/IDER
1630 * sessions are active */
1631 if (igb_check_reset_block(&adapter
->hw
)) {
1632 dev_err(&adapter
->pdev
->dev
,
1633 "Cannot do PHY loopback test "
1634 "when SoL/IDER is active.\n");
1638 *data
= igb_setup_desc_rings(adapter
);
1641 *data
= igb_setup_loopback_test(adapter
);
1644 *data
= igb_run_loopback_test(adapter
);
1645 igb_loopback_cleanup(adapter
);
1648 igb_free_desc_rings(adapter
);
1653 static int igb_link_test(struct igb_adapter
*adapter
, u64
*data
)
1655 struct e1000_hw
*hw
= &adapter
->hw
;
1657 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1659 hw
->mac
.serdes_has_link
= false;
1661 /* On some blade server designs, link establishment
1662 * could take as long as 2-3 minutes */
1664 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1665 if (hw
->mac
.serdes_has_link
)
1668 } while (i
++ < 3750);
1672 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1673 if (hw
->mac
.autoneg
)
1676 if (!(rd32(E1000_STATUS
) &
1683 static void igb_diag_test(struct net_device
*netdev
,
1684 struct ethtool_test
*eth_test
, u64
*data
)
1686 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1687 u16 autoneg_advertised
;
1688 u8 forced_speed_duplex
, autoneg
;
1689 bool if_running
= netif_running(netdev
);
1691 set_bit(__IGB_TESTING
, &adapter
->state
);
1692 if (eth_test
->flags
== ETH_TEST_FL_OFFLINE
) {
1695 /* save speed, duplex, autoneg settings */
1696 autoneg_advertised
= adapter
->hw
.phy
.autoneg_advertised
;
1697 forced_speed_duplex
= adapter
->hw
.mac
.forced_speed_duplex
;
1698 autoneg
= adapter
->hw
.mac
.autoneg
;
1700 dev_info(&adapter
->pdev
->dev
, "offline testing starting\n");
1702 /* Link test performed before hardware reset so autoneg doesn't
1703 * interfere with test result */
1704 if (igb_link_test(adapter
, &data
[4]))
1705 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1708 /* indicate we're in test mode */
1713 if (igb_reg_test(adapter
, &data
[0]))
1714 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1717 if (igb_eeprom_test(adapter
, &data
[1]))
1718 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1721 if (igb_intr_test(adapter
, &data
[2]))
1722 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1725 if (igb_loopback_test(adapter
, &data
[3]))
1726 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1728 /* restore speed, duplex, autoneg settings */
1729 adapter
->hw
.phy
.autoneg_advertised
= autoneg_advertised
;
1730 adapter
->hw
.mac
.forced_speed_duplex
= forced_speed_duplex
;
1731 adapter
->hw
.mac
.autoneg
= autoneg
;
1733 /* force this routine to wait until autoneg complete/timeout */
1734 adapter
->hw
.phy
.autoneg_wait_to_complete
= true;
1736 adapter
->hw
.phy
.autoneg_wait_to_complete
= false;
1738 clear_bit(__IGB_TESTING
, &adapter
->state
);
1742 dev_info(&adapter
->pdev
->dev
, "online testing starting\n");
1744 if (igb_link_test(adapter
, &data
[4]))
1745 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1747 /* Online tests aren't run; pass by default */
1753 clear_bit(__IGB_TESTING
, &adapter
->state
);
1755 msleep_interruptible(4 * 1000);
1758 static int igb_wol_exclusion(struct igb_adapter
*adapter
,
1759 struct ethtool_wolinfo
*wol
)
1761 struct e1000_hw
*hw
= &adapter
->hw
;
1762 int retval
= 1; /* fail by default */
1764 switch (hw
->device_id
) {
1765 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
1766 /* WoL not supported */
1769 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
1770 case E1000_DEV_ID_82576_FIBER
:
1771 case E1000_DEV_ID_82576_SERDES
:
1772 /* Wake events not supported on port B */
1773 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
) {
1777 /* return success for non excluded adapter ports */
1780 case E1000_DEV_ID_82576_QUAD_COPPER
:
1781 /* quad port adapters only support WoL on port A */
1782 if (!(adapter
->flags
& IGB_FLAG_QUAD_PORT_A
)) {
1786 /* return success for non excluded adapter ports */
1790 /* dual port cards only support WoL on port A from now on
1791 * unless it was enabled in the eeprom for port B
1792 * so exclude FUNC_1 ports from having WoL enabled */
1793 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
&&
1794 !adapter
->eeprom_wol
) {
1805 static void igb_get_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1807 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1809 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
|
1810 WAKE_BCAST
| WAKE_MAGIC
;
1813 /* this function will set ->supported = 0 and return 1 if wol is not
1814 * supported by this hardware */
1815 if (igb_wol_exclusion(adapter
, wol
) ||
1816 !device_can_wakeup(&adapter
->pdev
->dev
))
1819 /* apply any specific unsupported masks here */
1820 switch (adapter
->hw
.device_id
) {
1825 if (adapter
->wol
& E1000_WUFC_EX
)
1826 wol
->wolopts
|= WAKE_UCAST
;
1827 if (adapter
->wol
& E1000_WUFC_MC
)
1828 wol
->wolopts
|= WAKE_MCAST
;
1829 if (adapter
->wol
& E1000_WUFC_BC
)
1830 wol
->wolopts
|= WAKE_BCAST
;
1831 if (adapter
->wol
& E1000_WUFC_MAG
)
1832 wol
->wolopts
|= WAKE_MAGIC
;
1837 static int igb_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1839 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1840 struct e1000_hw
*hw
= &adapter
->hw
;
1842 if (wol
->wolopts
& (WAKE_PHY
| WAKE_ARP
| WAKE_MAGICSECURE
))
1845 if (igb_wol_exclusion(adapter
, wol
) ||
1846 !device_can_wakeup(&adapter
->pdev
->dev
))
1847 return wol
->wolopts
? -EOPNOTSUPP
: 0;
1849 switch (hw
->device_id
) {
1854 /* these settings will always override what we currently have */
1857 if (wol
->wolopts
& WAKE_UCAST
)
1858 adapter
->wol
|= E1000_WUFC_EX
;
1859 if (wol
->wolopts
& WAKE_MCAST
)
1860 adapter
->wol
|= E1000_WUFC_MC
;
1861 if (wol
->wolopts
& WAKE_BCAST
)
1862 adapter
->wol
|= E1000_WUFC_BC
;
1863 if (wol
->wolopts
& WAKE_MAGIC
)
1864 adapter
->wol
|= E1000_WUFC_MAG
;
1866 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
1871 /* bit defines for adapter->led_status */
1872 #define IGB_LED_ON 0
1874 static int igb_phys_id(struct net_device
*netdev
, u32 data
)
1876 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1877 struct e1000_hw
*hw
= &adapter
->hw
;
1879 if (!data
|| data
> (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
))
1880 data
= (u32
)(MAX_SCHEDULE_TIMEOUT
/ HZ
);
1883 msleep_interruptible(data
* 1000);
1886 clear_bit(IGB_LED_ON
, &adapter
->led_status
);
1887 igb_cleanup_led(hw
);
1892 static int igb_set_coalesce(struct net_device
*netdev
,
1893 struct ethtool_coalesce
*ec
)
1895 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1896 struct e1000_hw
*hw
= &adapter
->hw
;
1899 if ((ec
->rx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
1900 ((ec
->rx_coalesce_usecs
> 3) &&
1901 (ec
->rx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
1902 (ec
->rx_coalesce_usecs
== 2))
1905 /* convert to rate of irq's per second */
1906 if (ec
->rx_coalesce_usecs
&& ec
->rx_coalesce_usecs
<= 3) {
1907 adapter
->itr_setting
= ec
->rx_coalesce_usecs
;
1908 adapter
->itr
= IGB_START_ITR
;
1910 adapter
->itr_setting
= ec
->rx_coalesce_usecs
<< 2;
1911 adapter
->itr
= adapter
->itr_setting
;
1914 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1915 wr32(adapter
->rx_ring
[i
].itr_register
, adapter
->itr
);
1920 static int igb_get_coalesce(struct net_device
*netdev
,
1921 struct ethtool_coalesce
*ec
)
1923 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1925 if (adapter
->itr_setting
<= 3)
1926 ec
->rx_coalesce_usecs
= adapter
->itr_setting
;
1928 ec
->rx_coalesce_usecs
= adapter
->itr_setting
>> 2;
1934 static int igb_nway_reset(struct net_device
*netdev
)
1936 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1937 if (netif_running(netdev
))
1938 igb_reinit_locked(adapter
);
1942 static int igb_get_sset_count(struct net_device
*netdev
, int sset
)
1946 return IGB_STATS_LEN
;
1948 return IGB_TEST_LEN
;
1954 static void igb_get_ethtool_stats(struct net_device
*netdev
,
1955 struct ethtool_stats
*stats
, u64
*data
)
1957 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1959 int stat_count
= sizeof(struct igb_queue_stats
) / sizeof(u64
);
1963 igb_update_stats(adapter
);
1964 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
1965 char *p
= (char *)adapter
+igb_gstrings_stats
[i
].stat_offset
;
1966 data
[i
] = (igb_gstrings_stats
[i
].sizeof_stat
==
1967 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
1969 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
1971 queue_stat
= (u64
*)&adapter
->tx_ring
[j
].tx_stats
;
1972 for (k
= 0; k
< stat_count
; k
++)
1973 data
[i
+ k
] = queue_stat
[k
];
1976 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
1978 queue_stat
= (u64
*)&adapter
->rx_ring
[j
].rx_stats
;
1979 for (k
= 0; k
< stat_count
; k
++)
1980 data
[i
+ k
] = queue_stat
[k
];
1985 static void igb_get_strings(struct net_device
*netdev
, u32 stringset
, u8
*data
)
1987 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1991 switch (stringset
) {
1993 memcpy(data
, *igb_gstrings_test
,
1994 IGB_TEST_LEN
*ETH_GSTRING_LEN
);
1997 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
1998 memcpy(p
, igb_gstrings_stats
[i
].stat_string
,
2000 p
+= ETH_GSTRING_LEN
;
2002 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2003 sprintf(p
, "tx_queue_%u_packets", i
);
2004 p
+= ETH_GSTRING_LEN
;
2005 sprintf(p
, "tx_queue_%u_bytes", i
);
2006 p
+= ETH_GSTRING_LEN
;
2008 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2009 sprintf(p
, "rx_queue_%u_packets", i
);
2010 p
+= ETH_GSTRING_LEN
;
2011 sprintf(p
, "rx_queue_%u_bytes", i
);
2012 p
+= ETH_GSTRING_LEN
;
2014 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2019 static struct ethtool_ops igb_ethtool_ops
= {
2020 .get_settings
= igb_get_settings
,
2021 .set_settings
= igb_set_settings
,
2022 .get_drvinfo
= igb_get_drvinfo
,
2023 .get_regs_len
= igb_get_regs_len
,
2024 .get_regs
= igb_get_regs
,
2025 .get_wol
= igb_get_wol
,
2026 .set_wol
= igb_set_wol
,
2027 .get_msglevel
= igb_get_msglevel
,
2028 .set_msglevel
= igb_set_msglevel
,
2029 .nway_reset
= igb_nway_reset
,
2030 .get_link
= ethtool_op_get_link
,
2031 .get_eeprom_len
= igb_get_eeprom_len
,
2032 .get_eeprom
= igb_get_eeprom
,
2033 .set_eeprom
= igb_set_eeprom
,
2034 .get_ringparam
= igb_get_ringparam
,
2035 .set_ringparam
= igb_set_ringparam
,
2036 .get_pauseparam
= igb_get_pauseparam
,
2037 .set_pauseparam
= igb_set_pauseparam
,
2038 .get_rx_csum
= igb_get_rx_csum
,
2039 .set_rx_csum
= igb_set_rx_csum
,
2040 .get_tx_csum
= igb_get_tx_csum
,
2041 .set_tx_csum
= igb_set_tx_csum
,
2042 .get_sg
= ethtool_op_get_sg
,
2043 .set_sg
= ethtool_op_set_sg
,
2044 .get_tso
= ethtool_op_get_tso
,
2045 .set_tso
= igb_set_tso
,
2046 .self_test
= igb_diag_test
,
2047 .get_strings
= igb_get_strings
,
2048 .phys_id
= igb_phys_id
,
2049 .get_sset_count
= igb_get_sset_count
,
2050 .get_ethtool_stats
= igb_get_ethtool_stats
,
2051 .get_coalesce
= igb_get_coalesce
,
2052 .set_coalesce
= igb_set_coalesce
,
2055 void igb_set_ethtool_ops(struct net_device
*netdev
)
2057 SET_ETHTOOL_OPS(netdev
, &igb_ethtool_ops
);