arch/x86/include/asm/uv/uv_bau.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * SGI UV Broadcast Assist Unit definitions
   7  *
   8  * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
   9  */
  10
  11 #ifndef _ASM_X86_UV_UV_BAU_H
  12 #define _ASM_X86_UV_UV_BAU_H
  13
  14 #include <linux/bitmap.h>
  15 #define BITSPERBYTE 8
  16
  17 /*
  18  * Broadcast Assist Unit messaging structures
  19  *
  20  * Selective Broadcast activations are induced by software action
  21  * specifying a particular 8-descriptor "set" via a 6-bit index written
  22  * to an MMR.
  23  * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
  24  * each 6-bit index value. These descriptor sets are mapped in sequence
  25  * starting with set 0 located at the address specified in the
  26  * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
  27  * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
  28  *
  29  * We will use 31 sets, one for sending BAU messages from each of the 32
  30  * cpu's on the uvhub.
  31  *
  32  * TLB shootdown will use the first of the 8 descriptors of each set.
  33  * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
  34  */
  35
  36 #define UV_ITEMS_PER_DESCRIPTOR         8
  37 /* the 'throttle' to prevent the hardware stay-busy bug */
  38 #define MAX_BAU_CONCURRENT              3
  39 #define UV_CPUS_PER_ACT_STATUS          32
  40 #define UV_ACT_STATUS_MASK              0x3
  41 #define UV_ACT_STATUS_SIZE              2
  42 #define UV_ADP_SIZE                     32
  43 #define UV_DISTRIBUTION_SIZE            256
  44 #define UV_SW_ACK_NPENDING              8
  45 #define UV_NET_ENDPOINT_INTD            0x38
  46 #define UV_DESC_BASE_PNODE_SHIFT        49
  47 #define UV_PAYLOADQ_PNODE_SHIFT         49
  48 #define UV_PTC_BASENAME                 "sgi_uv/ptc_statistics"
  49 #define UV_BAU_BASENAME                 "sgi_uv/bau_tunables"
  50 #define UV_BAU_TUNABLES_DIR             "sgi_uv"
  51 #define UV_BAU_TUNABLES_FILE            "bau_tunables"
  52 #define WHITESPACE                      " \t\n"
  53 #define uv_physnodeaddr(x)              ((__pa((unsigned long)(x)) & uv_mmask))
  54 #define UV_ENABLE_INTD_SOFT_ACK_MODE_SHIFT 15
  55 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHIFT 16
  56 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD 0x0000000009UL
  57 /* [19:16] SOFT_ACK timeout period  19: 1 is urgency 7  17:16 1 is multiplier */
  58 #define BAU_MISC_CONTROL_MULT_MASK 3
  59
  60 #define UVH_AGING_PRESCALE_SEL 0x000000b000UL
  61 /* [30:28] URGENCY_7  an index into a table of times */
  62 #define BAU_URGENCY_7_SHIFT 28
  63 #define BAU_URGENCY_7_MASK 7
  64
  65 #define UVH_TRANSACTION_TIMEOUT 0x000000b200UL
  66 /* [45:40] BAU - BAU transaction timeout select - a multiplier */
  67 #define BAU_TRANS_SHIFT 40
  68 #define BAU_TRANS_MASK 0x3f
  69
  70 /*
  71  * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
  72  */
  73 #define DESC_STATUS_IDLE                0
  74 #define DESC_STATUS_ACTIVE              1
  75 #define DESC_STATUS_DESTINATION_TIMEOUT 2
  76 #define DESC_STATUS_SOURCE_TIMEOUT      3
  77
  78 #define TIMEOUT_DELAY                   10
  79 /*
  80  * delay for 'plugged' timeout retries, in microseconds
  81  */
  82 #define PLUGGED_DELAY                   10
  83
  84 /*
  85  * threshholds at which to use IPI to free resources
  86  */
  87 /* after this # consecutive 'plugged' timeouts, use IPI to release resources */
  88 #define PLUGSB4RESET 100
  89 /* after this many consecutive timeouts, use IPI to release resources */
  90 #define TIMEOUTSB4RESET 1
  91 /* at this number uses of IPI to release resources, giveup the request */
  92 #define IPI_RESET_LIMIT 1
  93 /* after this # consecutive successes, bump up the throttle if it was lowered */
  94 #define COMPLETE_THRESHOLD 5
  95
  96 /*
  97  * number of entries in the destination side payload queue
  98  */
  99 #define DEST_Q_SIZE                     20
 100 /*
 101  * number of destination side software ack resources
 102  */
 103 #define DEST_NUM_RESOURCES              8
 104 #define MAX_CPUS_PER_NODE               32
 105 /*
 106  * completion statuses for sending a TLB flush message
 107  */
 108 #define FLUSH_RETRY_PLUGGED             1
 109 #define FLUSH_RETRY_TIMEOUT             2
 110 #define FLUSH_GIVEUP                    3
 111 #define FLUSH_COMPLETE                  4
 112
 113 /*
 114  * tuning the action when the numalink network is extremely delayed
 115  */
 116 #define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in microseconds */
 117 #define CONGESTED_REPS 10 /* long delays averaged over this many broadcasts */
 118 #define CONGESTED_PERIOD 30 /* time for the bau to be disabled, in seconds */
 119
 120 /*
 121  * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
 122  * If the 'multilevel' flag in the header portion of the descriptor
 123  * has been set to 0, then endpoint multi-unicast mode is selected.
 124  * The distribution specification (32 bytes) is interpreted as a 256-bit
 125  * distribution vector. Adjacent bits correspond to consecutive even numbered
 126  * nodeIDs. The result of adding the index of a given bit to the 15-bit
 127  * 'base_dest_nodeid' field of the header corresponds to the
 128  * destination nodeID associated with that specified bit.
 129  */
 130 struct bau_target_uvhubmask {
 131         unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
 132 };
 133
 134 /*
 135  * mask of cpu's on a uvhub
 136  * (during initialization we need to check that unsigned long has
 137  *  enough bits for max. cpu's per uvhub)
 138  */
 139 struct bau_local_cpumask {
 140         unsigned long bits;
 141 };
 142
 143 /*
 144  * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor)
 145  * only 12 bytes (96 bits) of the payload area are usable.
 146  * An additional 3 bytes (bits 27:4) of the header address are carried
 147  * to the next bytes of the destination payload queue.
 148  * And an additional 2 bytes of the header Suppl_A field are also
 149  * carried to the destination payload queue.
 150  * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte)
 151  * of the destination payload queue, which is written by the hardware
 152  * with the s/w ack resource bit vector.
 153  * [ effective message contents (16 bytes (128 bits) maximum), not counting
 154  *   the s/w ack bit vector  ]
 155  */
 156
 157 /*
 158  * The payload is software-defined for INTD transactions
 159  */
 160 struct bau_msg_payload {
 161         unsigned long address;          /* signifies a page or all TLB's
 162                                                 of the cpu */
 163         /* 64 bits */
 164         unsigned short sending_cpu;     /* filled in by sender */
 165         /* 16 bits */
 166         unsigned short acknowledge_count;/* filled in by destination */
 167         /* 16 bits */
 168         unsigned int reserved1:32;      /* not usable */
 169 };
 170
 171
 172 /*
 173  * Message header:  16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
 174  * see table 4.2.3.0.1 in broacast_assist spec.
 175  */
 176 struct bau_msg_header {
 177         unsigned int dest_subnodeid:6;  /* must be 0x10, for the LB */
 178         /* bits 5:0 */
 179         unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */
 180         /* bits 20:6 */                   /* first bit in uvhub map */
 181         unsigned int command:8; /* message type */
 182         /* bits 28:21 */
 183                                 /* 0x38: SN3net EndPoint Message */
 184         unsigned int rsvd_1:3;  /* must be zero */
 185         /* bits 31:29 */
 186                                 /* int will align on 32 bits */
 187         unsigned int rsvd_2:9;  /* must be zero */
 188         /* bits 40:32 */
 189                                 /* Suppl_A is 56-41 */
 190         unsigned int sequence:16;/* message sequence number */
 191         /* bits 56:41 */        /* becomes bytes 16-17 of msg */
 192                                 /* Address field (96:57) is never used as an
 193                                    address (these are address bits 42:3) */
 194
 195         unsigned int rsvd_3:1;  /* must be zero */
 196         /* bit 57 */
 197                                 /* address bits 27:4 are payload */
 198         /* these next 24  (58-81) bits become bytes 12-14 of msg */
 199
 200         /* bits 65:58 land in byte 12 */
 201         unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */
 202         /* bit 58 */
 203         unsigned int msg_type:3; /* software type of the message*/
 204         /* bits 61:59 */
 205         unsigned int canceled:1; /* message canceled, resource to be freed*/
 206         /* bit 62 */
 207         unsigned int payload_1a:1;/* not currently used */
 208         /* bit 63 */
 209         unsigned int payload_1b:2;/* not currently used */
 210         /* bits 65:64 */
 211
 212         /* bits 73:66 land in byte 13 */
 213         unsigned int payload_1ca:6;/* not currently used */
 214         /* bits 71:66 */
 215         unsigned int payload_1c:2;/* not currently used */
 216         /* bits 73:72 */
 217
 218         /* bits 81:74 land in byte 14 */
 219         unsigned int payload_1d:6;/* not currently used */
 220         /* bits 79:74 */
 221         unsigned int payload_1e:2;/* not currently used */
 222         /* bits 81:80 */
 223
 224         unsigned int rsvd_4:7;  /* must be zero */
 225         /* bits 88:82 */
 226         unsigned int sw_ack_flag:1;/* software acknowledge flag */
 227         /* bit 89 */
 228                                 /* INTD trasactions at destination are to
 229                                    wait for software acknowledge */
 230         unsigned int rsvd_5:6;  /* must be zero */
 231         /* bits 95:90 */
 232         unsigned int rsvd_6:5;  /* must be zero */
 233         /* bits 100:96 */
 234         unsigned int int_both:1;/* if 1, interrupt both sockets on the uvhub */
 235         /* bit 101*/
 236         unsigned int fairness:3;/* usually zero */
 237         /* bits 104:102 */
 238         unsigned int multilevel:1;      /* multi-level multicast format */
 239         /* bit 105 */
 240                                 /* 0 for TLB: endpoint multi-unicast messages */
 241         unsigned int chaining:1;/* next descriptor is part of this activation*/
 242         /* bit 106 */
 243         unsigned int rsvd_7:21; /* must be zero */
 244         /* bits 127:107 */
 245 };
 246
 247 /* see msg_type: */
 248 #define MSG_NOOP 0
 249 #define MSG_REGULAR 1
 250 #define MSG_RETRY 2
 251
 252 /*
 253  * The activation descriptor:
 254  * The format of the message to send, plus all accompanying control
 255  * Should be 64 bytes
 256  */
 257 struct bau_desc {
 258         struct bau_target_uvhubmask distribution;
 259         /*
 260          * message template, consisting of header and payload:
 261          */
 262         struct bau_msg_header header;
 263         struct bau_msg_payload payload;
 264 };
 265 /*
 266  *   -payload--    ---------header------
 267  *   bytes 0-11    bits 41-56  bits 58-81
 268  *       A           B  (2)      C (3)
 269  *
 270  *            A/B/C are moved to:
 271  *       A            C          B
 272  *   bytes 0-11  bytes 12-14  bytes 16-17  (byte 15 filled in by hw as vector)
 273  *   ------------payload queue-----------
 274  */
 275
 276 /*
 277  * The payload queue on the destination side is an array of these.
 278  * With BAU_MISC_CONTROL set for software acknowledge mode, the messages
 279  * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
 280  * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
 281  * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
 282  *  sw_ack_vector and payload_2)
 283  * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
 284  *  Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
 285  *  operation."
 286  */
 287 struct bau_payload_queue_entry {
 288         unsigned long address;          /* signifies a page or all TLB's
 289                                                 of the cpu */
 290         /* 64 bits, bytes 0-7 */
 291
 292         unsigned short sending_cpu;     /* cpu that sent the message */
 293         /* 16 bits, bytes 8-9 */
 294
 295         unsigned short acknowledge_count; /* filled in by destination */
 296         /* 16 bits, bytes 10-11 */
 297
 298         /* these next 3 bytes come from bits 58-81 of the message header */
 299         unsigned short replied_to:1;    /* sent as 0 by the source */
 300         unsigned short msg_type:3;      /* software message type */
 301         unsigned short canceled:1;      /* sent as 0 by the source */
 302         unsigned short unused1:3;       /* not currently using */
 303         /* byte 12 */
 304
 305         unsigned char unused2a;         /* not currently using */
 306         /* byte 13 */
 307         unsigned char unused2;          /* not currently using */
 308         /* byte 14 */
 309
 310         unsigned char sw_ack_vector;    /* filled in by the hardware */
 311         /* byte 15 (bits 127:120) */
 312
 313         unsigned short sequence;        /* message sequence number */
 314         /* bytes 16-17 */
 315         unsigned char unused4[2];       /* not currently using bytes 18-19 */
 316         /* bytes 18-19 */
 317
 318         int number_of_cpus;             /* filled in at destination */
 319         /* 32 bits, bytes 20-23 (aligned) */
 320
 321         unsigned char unused5[8];       /* not using */
 322         /* bytes 24-31 */
 323 };
 324
 325 struct msg_desc {
 326         struct bau_payload_queue_entry *msg;
 327         int msg_slot;
 328         int sw_ack_slot;
 329         struct bau_payload_queue_entry *va_queue_first;
 330         struct bau_payload_queue_entry *va_queue_last;
 331 };
 332
 333 struct reset_args {
 334         int sender;
 335 };
 336
 337 /*
 338  * This structure is allocated per_cpu for UV TLB shootdown statistics.
 339  */
 340 struct ptc_stats {
 341         /* sender statistics */
 342         unsigned long s_giveup; /* number of fall backs to IPI-style flushes */
 343         unsigned long s_requestor; /* number of shootdown requests */
 344         unsigned long s_stimeout; /* source side timeouts */
 345         unsigned long s_dtimeout; /* destination side timeouts */
 346         unsigned long s_time; /* time spent in sending side */
 347         unsigned long s_retriesok; /* successful retries */
 348         unsigned long s_ntargcpu; /* total number of cpu's targeted */
 349         unsigned long s_ntarguvhub; /* total number of uvhubs targeted */
 350         unsigned long s_ntarguvhub16; /* number of times target hubs >= 16*/
 351         unsigned long s_ntarguvhub8; /* number of times target hubs >= 8 */
 352         unsigned long s_ntarguvhub4; /* number of times target hubs >= 4 */
 353         unsigned long s_ntarguvhub2; /* number of times target hubs >= 2 */
 354         unsigned long s_ntarguvhub1; /* number of times target hubs == 1 */
 355         unsigned long s_resets_plug; /* ipi-style resets from plug state */
 356         unsigned long s_resets_timeout; /* ipi-style resets from timeouts */
 357         unsigned long s_busy; /* status stayed busy past s/w timer */
 358         unsigned long s_throttles; /* waits in throttle */
 359         unsigned long s_retry_messages; /* retry broadcasts */
 360         unsigned long s_bau_reenabled; /* for bau enable/disable */
 361         unsigned long s_bau_disabled; /* for bau enable/disable */
 362         /* destination statistics */
 363         unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */
 364         unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */
 365         unsigned long d_multmsg; /* interrupts with multiple messages */
 366         unsigned long d_nomsg; /* interrupts with no message */
 367         unsigned long d_time; /* time spent on destination side */
 368         unsigned long d_requestee; /* number of messages processed */
 369         unsigned long d_retries; /* number of retry messages processed */
 370         unsigned long d_canceled; /* number of messages canceled by retries */
 371         unsigned long d_nocanceled; /* retries that found nothing to cancel */
 372         unsigned long d_resets; /* number of ipi-style requests processed */
 373         unsigned long d_rcanceled; /* number of messages canceled by resets */
 374 };
 375
 376 /*
 377  * one per-cpu; to locate the software tables
 378  */
 379 struct bau_control {
 380         struct bau_desc *descriptor_base;
 381         struct bau_payload_queue_entry *va_queue_first;
 382         struct bau_payload_queue_entry *va_queue_last;
 383         struct bau_payload_queue_entry *bau_msg_head;
 384         struct bau_control *uvhub_master;
 385         struct bau_control *socket_master;
 386         struct ptc_stats *statp;
 387         unsigned long timeout_interval;
 388         unsigned long set_bau_on_time;
 389         atomic_t active_descriptor_count;
 390         int plugged_tries;
 391         int timeout_tries;
 392         int ipi_attempts;
 393         int conseccompletes;
 394         int baudisabled;
 395         int set_bau_off;
 396         short cpu;
 397         short uvhub_cpu;
 398         short uvhub;
 399         short cpus_in_socket;
 400         short cpus_in_uvhub;
 401         unsigned short message_number;
 402         unsigned short uvhub_quiesce;
 403         short socket_acknowledge_count[DEST_Q_SIZE];
 404         cycles_t send_message;
 405         spinlock_t uvhub_lock;
 406         spinlock_t queue_lock;
 407         /* tunables */
 408         int max_bau_concurrent;
 409         int max_bau_concurrent_constant;
 410         int plugged_delay;
 411         int plugsb4reset;
 412         int timeoutsb4reset;
 413         int ipi_reset_limit;
 414         int complete_threshold;
 415         int congested_response_us;
 416         int congested_reps;
 417         int congested_period;
 418         cycles_t period_time;
 419         long period_requests;
 420 };
 421
 422 static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp)
 423 {
 424         return constant_test_bit(uvhub, &dstp->bits[0]);
 425 }
 426 static inline void bau_uvhub_set(int uvhub, struct bau_target_uvhubmask *dstp)
 427 {
 428         __set_bit(uvhub, &dstp->bits[0]);
 429 }
 430 static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp,
 431                                     int nbits)
 432 {
 433         bitmap_zero(&dstp->bits[0], nbits);
 434 }
 435 static inline int bau_uvhub_weight(struct bau_target_uvhubmask *dstp)
 436 {
 437         return bitmap_weight((unsigned long *)&dstp->bits[0],
 438                                 UV_DISTRIBUTION_SIZE);
 439 }
 440
 441 static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
 442 {
 443         bitmap_zero(&dstp->bits, nbits);
 444 }
 445
 446 #define cpubit_isset(cpu, bau_local_cpumask) \
 447         test_bit((cpu), (bau_local_cpumask).bits)
 448
 449 extern void uv_bau_message_intr1(void);
 450 extern void uv_bau_timeout_intr1(void);
 451
 452 struct atomic_short {
 453         short counter;
 454 };
 455
 456 /**
 457  * atomic_read_short - read a short atomic variable
 458  * @v: pointer of type atomic_short
 459  *
 460  * Atomically reads the value of @v.
 461  */
 462 static inline int atomic_read_short(const struct atomic_short *v)
 463 {
 464         return v->counter;
 465 }
 466
 467 /**
 468  * atomic_add_short_return - add and return a short int
 469  * @i: short value to add
 470  * @v: pointer of type atomic_short
 471  *
 472  * Atomically adds @i to @v and returns @i + @v
 473  */
 474 static inline int atomic_add_short_return(short i, struct atomic_short *v)
 475 {
 476         short __i = i;
 477         asm volatile(LOCK_PREFIX "xaddw %0, %1"
 478                         : "+r" (i), "+m" (v->counter)
 479                         : : "memory");
 480         return i + __i;
 481 }
 482
 483 #endif /* _ASM_X86_UV_UV_BAU_H */