sfc: Update version, copyright dates, authors
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / sfc / tx.c
blobe669f94e821bde87e23d842fe25005e9568a93a8
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
11 #include <linux/pci.h>
12 #include <linux/tcp.h>
13 #include <linux/ip.h>
14 #include <linux/in.h>
15 #include <linux/ipv6.h>
16 #include <net/ipv6.h>
17 #include <linux/if_ether.h>
18 #include <linux/highmem.h>
19 #include "net_driver.h"
20 #include "efx.h"
21 #include "nic.h"
22 #include "workarounds.h"
25 * TX descriptor ring full threshold
27 * The tx_queue descriptor ring fill-level must fall below this value
28 * before we restart the netif queue
30 #define EFX_TXQ_THRESHOLD (EFX_TXQ_MASK / 2u)
32 /* We want to be able to nest calls to netif_stop_queue(), since each
33 * channel can have an individual stop on the queue.
35 void efx_stop_queue(struct efx_nic *efx)
37 spin_lock_bh(&efx->netif_stop_lock);
38 EFX_TRACE(efx, "stop TX queue\n");
40 atomic_inc(&efx->netif_stop_count);
41 netif_stop_queue(efx->net_dev);
43 spin_unlock_bh(&efx->netif_stop_lock);
46 /* Wake netif's TX queue
47 * We want to be able to nest calls to netif_stop_queue(), since each
48 * channel can have an individual stop on the queue.
50 void efx_wake_queue(struct efx_nic *efx)
52 local_bh_disable();
53 if (atomic_dec_and_lock(&efx->netif_stop_count,
54 &efx->netif_stop_lock)) {
55 EFX_TRACE(efx, "waking TX queue\n");
56 netif_wake_queue(efx->net_dev);
57 spin_unlock(&efx->netif_stop_lock);
59 local_bh_enable();
62 static void efx_dequeue_buffer(struct efx_tx_queue *tx_queue,
63 struct efx_tx_buffer *buffer)
65 if (buffer->unmap_len) {
66 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
67 dma_addr_t unmap_addr = (buffer->dma_addr + buffer->len -
68 buffer->unmap_len);
69 if (buffer->unmap_single)
70 pci_unmap_single(pci_dev, unmap_addr, buffer->unmap_len,
71 PCI_DMA_TODEVICE);
72 else
73 pci_unmap_page(pci_dev, unmap_addr, buffer->unmap_len,
74 PCI_DMA_TODEVICE);
75 buffer->unmap_len = 0;
76 buffer->unmap_single = false;
79 if (buffer->skb) {
80 dev_kfree_skb_any((struct sk_buff *) buffer->skb);
81 buffer->skb = NULL;
82 EFX_TRACE(tx_queue->efx, "TX queue %d transmission id %x "
83 "complete\n", tx_queue->queue, read_ptr);
87 /**
88 * struct efx_tso_header - a DMA mapped buffer for packet headers
89 * @next: Linked list of free ones.
90 * The list is protected by the TX queue lock.
91 * @dma_unmap_len: Length to unmap for an oversize buffer, or 0.
92 * @dma_addr: The DMA address of the header below.
94 * This controls the memory used for a TSO header. Use TSOH_DATA()
95 * to find the packet header data. Use TSOH_SIZE() to calculate the
96 * total size required for a given packet header length. TSO headers
97 * in the free list are exactly %TSOH_STD_SIZE bytes in size.
99 struct efx_tso_header {
100 union {
101 struct efx_tso_header *next;
102 size_t unmap_len;
104 dma_addr_t dma_addr;
107 static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
108 struct sk_buff *skb);
109 static void efx_fini_tso(struct efx_tx_queue *tx_queue);
110 static void efx_tsoh_heap_free(struct efx_tx_queue *tx_queue,
111 struct efx_tso_header *tsoh);
113 static void efx_tsoh_free(struct efx_tx_queue *tx_queue,
114 struct efx_tx_buffer *buffer)
116 if (buffer->tsoh) {
117 if (likely(!buffer->tsoh->unmap_len)) {
118 buffer->tsoh->next = tx_queue->tso_headers_free;
119 tx_queue->tso_headers_free = buffer->tsoh;
120 } else {
121 efx_tsoh_heap_free(tx_queue, buffer->tsoh);
123 buffer->tsoh = NULL;
128 static inline unsigned
129 efx_max_tx_len(struct efx_nic *efx, dma_addr_t dma_addr)
131 /* Depending on the NIC revision, we can use descriptor
132 * lengths up to 8K or 8K-1. However, since PCI Express
133 * devices must split read requests at 4K boundaries, there is
134 * little benefit from using descriptors that cross those
135 * boundaries and we keep things simple by not doing so.
137 unsigned len = (~dma_addr & 0xfff) + 1;
139 /* Work around hardware bug for unaligned buffers. */
140 if (EFX_WORKAROUND_5391(efx) && (dma_addr & 0xf))
141 len = min_t(unsigned, len, 512 - (dma_addr & 0xf));
143 return len;
147 * Add a socket buffer to a TX queue
149 * This maps all fragments of a socket buffer for DMA and adds them to
150 * the TX queue. The queue's insert pointer will be incremented by
151 * the number of fragments in the socket buffer.
153 * If any DMA mapping fails, any mapped fragments will be unmapped,
154 * the queue's insert pointer will be restored to its original value.
156 * This function is split out from efx_hard_start_xmit to allow the
157 * loopback test to direct packets via specific TX queues.
159 * Returns NETDEV_TX_OK or NETDEV_TX_BUSY
160 * You must hold netif_tx_lock() to call this function.
162 netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
164 struct efx_nic *efx = tx_queue->efx;
165 struct pci_dev *pci_dev = efx->pci_dev;
166 struct efx_tx_buffer *buffer;
167 skb_frag_t *fragment;
168 struct page *page;
169 int page_offset;
170 unsigned int len, unmap_len = 0, fill_level, insert_ptr;
171 dma_addr_t dma_addr, unmap_addr = 0;
172 unsigned int dma_len;
173 bool unmap_single;
174 int q_space, i = 0;
175 netdev_tx_t rc = NETDEV_TX_OK;
177 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
179 if (skb_shinfo(skb)->gso_size)
180 return efx_enqueue_skb_tso(tx_queue, skb);
182 /* Get size of the initial fragment */
183 len = skb_headlen(skb);
185 /* Pad if necessary */
186 if (EFX_WORKAROUND_15592(efx) && skb->len <= 32) {
187 EFX_BUG_ON_PARANOID(skb->data_len);
188 len = 32 + 1;
189 if (skb_pad(skb, len - skb->len))
190 return NETDEV_TX_OK;
193 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
194 q_space = EFX_TXQ_MASK - 1 - fill_level;
196 /* Map for DMA. Use pci_map_single rather than pci_map_page
197 * since this is more efficient on machines with sparse
198 * memory.
200 unmap_single = true;
201 dma_addr = pci_map_single(pci_dev, skb->data, len, PCI_DMA_TODEVICE);
203 /* Process all fragments */
204 while (1) {
205 if (unlikely(pci_dma_mapping_error(pci_dev, dma_addr)))
206 goto pci_err;
208 /* Store fields for marking in the per-fragment final
209 * descriptor */
210 unmap_len = len;
211 unmap_addr = dma_addr;
213 /* Add to TX queue, splitting across DMA boundaries */
214 do {
215 if (unlikely(q_space-- <= 0)) {
216 /* It might be that completions have
217 * happened since the xmit path last
218 * checked. Update the xmit path's
219 * copy of read_count.
221 ++tx_queue->stopped;
222 /* This memory barrier protects the
223 * change of stopped from the access
224 * of read_count. */
225 smp_mb();
226 tx_queue->old_read_count =
227 *(volatile unsigned *)
228 &tx_queue->read_count;
229 fill_level = (tx_queue->insert_count
230 - tx_queue->old_read_count);
231 q_space = EFX_TXQ_MASK - 1 - fill_level;
232 if (unlikely(q_space-- <= 0))
233 goto stop;
234 smp_mb();
235 --tx_queue->stopped;
238 insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
239 buffer = &tx_queue->buffer[insert_ptr];
240 efx_tsoh_free(tx_queue, buffer);
241 EFX_BUG_ON_PARANOID(buffer->tsoh);
242 EFX_BUG_ON_PARANOID(buffer->skb);
243 EFX_BUG_ON_PARANOID(buffer->len);
244 EFX_BUG_ON_PARANOID(!buffer->continuation);
245 EFX_BUG_ON_PARANOID(buffer->unmap_len);
247 dma_len = efx_max_tx_len(efx, dma_addr);
248 if (likely(dma_len >= len))
249 dma_len = len;
251 /* Fill out per descriptor fields */
252 buffer->len = dma_len;
253 buffer->dma_addr = dma_addr;
254 len -= dma_len;
255 dma_addr += dma_len;
256 ++tx_queue->insert_count;
257 } while (len);
259 /* Transfer ownership of the unmapping to the final buffer */
260 buffer->unmap_single = unmap_single;
261 buffer->unmap_len = unmap_len;
262 unmap_len = 0;
264 /* Get address and size of next fragment */
265 if (i >= skb_shinfo(skb)->nr_frags)
266 break;
267 fragment = &skb_shinfo(skb)->frags[i];
268 len = fragment->size;
269 page = fragment->page;
270 page_offset = fragment->page_offset;
271 i++;
272 /* Map for DMA */
273 unmap_single = false;
274 dma_addr = pci_map_page(pci_dev, page, page_offset, len,
275 PCI_DMA_TODEVICE);
278 /* Transfer ownership of the skb to the final buffer */
279 buffer->skb = skb;
280 buffer->continuation = false;
282 /* Pass off to hardware */
283 efx_nic_push_buffers(tx_queue);
285 return NETDEV_TX_OK;
287 pci_err:
288 EFX_ERR_RL(efx, " TX queue %d could not map skb with %d bytes %d "
289 "fragments for DMA\n", tx_queue->queue, skb->len,
290 skb_shinfo(skb)->nr_frags + 1);
292 /* Mark the packet as transmitted, and free the SKB ourselves */
293 dev_kfree_skb_any(skb);
294 goto unwind;
296 stop:
297 rc = NETDEV_TX_BUSY;
299 if (tx_queue->stopped == 1)
300 efx_stop_queue(efx);
302 unwind:
303 /* Work backwards until we hit the original insert pointer value */
304 while (tx_queue->insert_count != tx_queue->write_count) {
305 --tx_queue->insert_count;
306 insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
307 buffer = &tx_queue->buffer[insert_ptr];
308 efx_dequeue_buffer(tx_queue, buffer);
309 buffer->len = 0;
312 /* Free the fragment we were mid-way through pushing */
313 if (unmap_len) {
314 if (unmap_single)
315 pci_unmap_single(pci_dev, unmap_addr, unmap_len,
316 PCI_DMA_TODEVICE);
317 else
318 pci_unmap_page(pci_dev, unmap_addr, unmap_len,
319 PCI_DMA_TODEVICE);
322 return rc;
325 /* Remove packets from the TX queue
327 * This removes packets from the TX queue, up to and including the
328 * specified index.
330 static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
331 unsigned int index)
333 struct efx_nic *efx = tx_queue->efx;
334 unsigned int stop_index, read_ptr;
336 stop_index = (index + 1) & EFX_TXQ_MASK;
337 read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
339 while (read_ptr != stop_index) {
340 struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
341 if (unlikely(buffer->len == 0)) {
342 EFX_ERR(tx_queue->efx, "TX queue %d spurious TX "
343 "completion id %x\n", tx_queue->queue,
344 read_ptr);
345 efx_schedule_reset(efx, RESET_TYPE_TX_SKIP);
346 return;
349 efx_dequeue_buffer(tx_queue, buffer);
350 buffer->continuation = true;
351 buffer->len = 0;
353 ++tx_queue->read_count;
354 read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
358 /* Initiate a packet transmission. We use one channel per CPU
359 * (sharing when we have more CPUs than channels). On Falcon, the TX
360 * completion events will be directed back to the CPU that transmitted
361 * the packet, which should be cache-efficient.
363 * Context: non-blocking.
364 * Note that returning anything other than NETDEV_TX_OK will cause the
365 * OS to free the skb.
367 netdev_tx_t efx_hard_start_xmit(struct sk_buff *skb,
368 struct net_device *net_dev)
370 struct efx_nic *efx = netdev_priv(net_dev);
371 struct efx_tx_queue *tx_queue;
373 if (unlikely(efx->port_inhibited))
374 return NETDEV_TX_BUSY;
376 if (likely(skb->ip_summed == CHECKSUM_PARTIAL))
377 tx_queue = &efx->tx_queue[EFX_TX_QUEUE_OFFLOAD_CSUM];
378 else
379 tx_queue = &efx->tx_queue[EFX_TX_QUEUE_NO_CSUM];
381 return efx_enqueue_skb(tx_queue, skb);
384 void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
386 unsigned fill_level;
387 struct efx_nic *efx = tx_queue->efx;
389 EFX_BUG_ON_PARANOID(index > EFX_TXQ_MASK);
391 efx_dequeue_buffers(tx_queue, index);
393 /* See if we need to restart the netif queue. This barrier
394 * separates the update of read_count from the test of
395 * stopped. */
396 smp_mb();
397 if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) {
398 fill_level = tx_queue->insert_count - tx_queue->read_count;
399 if (fill_level < EFX_TXQ_THRESHOLD) {
400 EFX_BUG_ON_PARANOID(!efx_dev_registered(efx));
402 /* Do this under netif_tx_lock(), to avoid racing
403 * with efx_xmit(). */
404 netif_tx_lock(efx->net_dev);
405 if (tx_queue->stopped) {
406 tx_queue->stopped = 0;
407 efx_wake_queue(efx);
409 netif_tx_unlock(efx->net_dev);
414 int efx_probe_tx_queue(struct efx_tx_queue *tx_queue)
416 struct efx_nic *efx = tx_queue->efx;
417 unsigned int txq_size;
418 int i, rc;
420 EFX_LOG(efx, "creating TX queue %d\n", tx_queue->queue);
422 /* Allocate software ring */
423 txq_size = EFX_TXQ_SIZE * sizeof(*tx_queue->buffer);
424 tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
425 if (!tx_queue->buffer)
426 return -ENOMEM;
427 for (i = 0; i <= EFX_TXQ_MASK; ++i)
428 tx_queue->buffer[i].continuation = true;
430 /* Allocate hardware ring */
431 rc = efx_nic_probe_tx(tx_queue);
432 if (rc)
433 goto fail;
435 return 0;
437 fail:
438 kfree(tx_queue->buffer);
439 tx_queue->buffer = NULL;
440 return rc;
443 void efx_init_tx_queue(struct efx_tx_queue *tx_queue)
445 EFX_LOG(tx_queue->efx, "initialising TX queue %d\n", tx_queue->queue);
447 tx_queue->insert_count = 0;
448 tx_queue->write_count = 0;
449 tx_queue->read_count = 0;
450 tx_queue->old_read_count = 0;
451 BUG_ON(tx_queue->stopped);
453 /* Set up TX descriptor ring */
454 efx_nic_init_tx(tx_queue);
457 void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
459 struct efx_tx_buffer *buffer;
461 if (!tx_queue->buffer)
462 return;
464 /* Free any buffers left in the ring */
465 while (tx_queue->read_count != tx_queue->write_count) {
466 buffer = &tx_queue->buffer[tx_queue->read_count & EFX_TXQ_MASK];
467 efx_dequeue_buffer(tx_queue, buffer);
468 buffer->continuation = true;
469 buffer->len = 0;
471 ++tx_queue->read_count;
475 void efx_fini_tx_queue(struct efx_tx_queue *tx_queue)
477 EFX_LOG(tx_queue->efx, "shutting down TX queue %d\n", tx_queue->queue);
479 /* Flush TX queue, remove descriptor ring */
480 efx_nic_fini_tx(tx_queue);
482 efx_release_tx_buffers(tx_queue);
484 /* Free up TSO header cache */
485 efx_fini_tso(tx_queue);
487 /* Release queue's stop on port, if any */
488 if (tx_queue->stopped) {
489 tx_queue->stopped = 0;
490 efx_wake_queue(tx_queue->efx);
494 void efx_remove_tx_queue(struct efx_tx_queue *tx_queue)
496 EFX_LOG(tx_queue->efx, "destroying TX queue %d\n", tx_queue->queue);
497 efx_nic_remove_tx(tx_queue);
499 kfree(tx_queue->buffer);
500 tx_queue->buffer = NULL;
504 /* Efx TCP segmentation acceleration.
506 * Why? Because by doing it here in the driver we can go significantly
507 * faster than the GSO.
509 * Requires TX checksum offload support.
512 /* Number of bytes inserted at the start of a TSO header buffer,
513 * similar to NET_IP_ALIGN.
515 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
516 #define TSOH_OFFSET 0
517 #else
518 #define TSOH_OFFSET NET_IP_ALIGN
519 #endif
521 #define TSOH_BUFFER(tsoh) ((u8 *)(tsoh + 1) + TSOH_OFFSET)
523 /* Total size of struct efx_tso_header, buffer and padding */
524 #define TSOH_SIZE(hdr_len) \
525 (sizeof(struct efx_tso_header) + TSOH_OFFSET + hdr_len)
527 /* Size of blocks on free list. Larger blocks must be allocated from
528 * the heap.
530 #define TSOH_STD_SIZE 128
532 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
533 #define ETH_HDR_LEN(skb) (skb_network_header(skb) - (skb)->data)
534 #define SKB_TCP_OFF(skb) PTR_DIFF(tcp_hdr(skb), (skb)->data)
535 #define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
536 #define SKB_IPV6_OFF(skb) PTR_DIFF(ipv6_hdr(skb), (skb)->data)
539 * struct tso_state - TSO state for an SKB
540 * @out_len: Remaining length in current segment
541 * @seqnum: Current sequence number
542 * @ipv4_id: Current IPv4 ID, host endian
543 * @packet_space: Remaining space in current packet
544 * @dma_addr: DMA address of current position
545 * @in_len: Remaining length in current SKB fragment
546 * @unmap_len: Length of SKB fragment
547 * @unmap_addr: DMA address of SKB fragment
548 * @unmap_single: DMA single vs page mapping flag
549 * @protocol: Network protocol (after any VLAN header)
550 * @header_len: Number of bytes of header
551 * @full_packet_size: Number of bytes to put in each outgoing segment
553 * The state used during segmentation. It is put into this data structure
554 * just to make it easy to pass into inline functions.
556 struct tso_state {
557 /* Output position */
558 unsigned out_len;
559 unsigned seqnum;
560 unsigned ipv4_id;
561 unsigned packet_space;
563 /* Input position */
564 dma_addr_t dma_addr;
565 unsigned in_len;
566 unsigned unmap_len;
567 dma_addr_t unmap_addr;
568 bool unmap_single;
570 __be16 protocol;
571 unsigned header_len;
572 int full_packet_size;
577 * Verify that our various assumptions about sk_buffs and the conditions
578 * under which TSO will be attempted hold true. Return the protocol number.
580 static __be16 efx_tso_check_protocol(struct sk_buff *skb)
582 __be16 protocol = skb->protocol;
584 EFX_BUG_ON_PARANOID(((struct ethhdr *)skb->data)->h_proto !=
585 protocol);
586 if (protocol == htons(ETH_P_8021Q)) {
587 /* Find the encapsulated protocol; reset network header
588 * and transport header based on that. */
589 struct vlan_ethhdr *veh = (struct vlan_ethhdr *)skb->data;
590 protocol = veh->h_vlan_encapsulated_proto;
591 skb_set_network_header(skb, sizeof(*veh));
592 if (protocol == htons(ETH_P_IP))
593 skb_set_transport_header(skb, sizeof(*veh) +
594 4 * ip_hdr(skb)->ihl);
595 else if (protocol == htons(ETH_P_IPV6))
596 skb_set_transport_header(skb, sizeof(*veh) +
597 sizeof(struct ipv6hdr));
600 if (protocol == htons(ETH_P_IP)) {
601 EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP);
602 } else {
603 EFX_BUG_ON_PARANOID(protocol != htons(ETH_P_IPV6));
604 EFX_BUG_ON_PARANOID(ipv6_hdr(skb)->nexthdr != NEXTHDR_TCP);
606 EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data)
607 + (tcp_hdr(skb)->doff << 2u)) >
608 skb_headlen(skb));
610 return protocol;
615 * Allocate a page worth of efx_tso_header structures, and string them
616 * into the tx_queue->tso_headers_free linked list. Return 0 or -ENOMEM.
618 static int efx_tsoh_block_alloc(struct efx_tx_queue *tx_queue)
621 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
622 struct efx_tso_header *tsoh;
623 dma_addr_t dma_addr;
624 u8 *base_kva, *kva;
626 base_kva = pci_alloc_consistent(pci_dev, PAGE_SIZE, &dma_addr);
627 if (base_kva == NULL) {
628 EFX_ERR(tx_queue->efx, "Unable to allocate page for TSO"
629 " headers\n");
630 return -ENOMEM;
633 /* pci_alloc_consistent() allocates pages. */
634 EFX_BUG_ON_PARANOID(dma_addr & (PAGE_SIZE - 1u));
636 for (kva = base_kva; kva < base_kva + PAGE_SIZE; kva += TSOH_STD_SIZE) {
637 tsoh = (struct efx_tso_header *)kva;
638 tsoh->dma_addr = dma_addr + (TSOH_BUFFER(tsoh) - base_kva);
639 tsoh->next = tx_queue->tso_headers_free;
640 tx_queue->tso_headers_free = tsoh;
643 return 0;
647 /* Free up a TSO header, and all others in the same page. */
648 static void efx_tsoh_block_free(struct efx_tx_queue *tx_queue,
649 struct efx_tso_header *tsoh,
650 struct pci_dev *pci_dev)
652 struct efx_tso_header **p;
653 unsigned long base_kva;
654 dma_addr_t base_dma;
656 base_kva = (unsigned long)tsoh & PAGE_MASK;
657 base_dma = tsoh->dma_addr & PAGE_MASK;
659 p = &tx_queue->tso_headers_free;
660 while (*p != NULL) {
661 if (((unsigned long)*p & PAGE_MASK) == base_kva)
662 *p = (*p)->next;
663 else
664 p = &(*p)->next;
667 pci_free_consistent(pci_dev, PAGE_SIZE, (void *)base_kva, base_dma);
670 static struct efx_tso_header *
671 efx_tsoh_heap_alloc(struct efx_tx_queue *tx_queue, size_t header_len)
673 struct efx_tso_header *tsoh;
675 tsoh = kmalloc(TSOH_SIZE(header_len), GFP_ATOMIC | GFP_DMA);
676 if (unlikely(!tsoh))
677 return NULL;
679 tsoh->dma_addr = pci_map_single(tx_queue->efx->pci_dev,
680 TSOH_BUFFER(tsoh), header_len,
681 PCI_DMA_TODEVICE);
682 if (unlikely(pci_dma_mapping_error(tx_queue->efx->pci_dev,
683 tsoh->dma_addr))) {
684 kfree(tsoh);
685 return NULL;
688 tsoh->unmap_len = header_len;
689 return tsoh;
692 static void
693 efx_tsoh_heap_free(struct efx_tx_queue *tx_queue, struct efx_tso_header *tsoh)
695 pci_unmap_single(tx_queue->efx->pci_dev,
696 tsoh->dma_addr, tsoh->unmap_len,
697 PCI_DMA_TODEVICE);
698 kfree(tsoh);
702 * efx_tx_queue_insert - push descriptors onto the TX queue
703 * @tx_queue: Efx TX queue
704 * @dma_addr: DMA address of fragment
705 * @len: Length of fragment
706 * @final_buffer: The final buffer inserted into the queue
708 * Push descriptors onto the TX queue. Return 0 on success or 1 if
709 * @tx_queue full.
711 static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
712 dma_addr_t dma_addr, unsigned len,
713 struct efx_tx_buffer **final_buffer)
715 struct efx_tx_buffer *buffer;
716 struct efx_nic *efx = tx_queue->efx;
717 unsigned dma_len, fill_level, insert_ptr;
718 int q_space;
720 EFX_BUG_ON_PARANOID(len <= 0);
722 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
723 /* -1 as there is no way to represent all descriptors used */
724 q_space = EFX_TXQ_MASK - 1 - fill_level;
726 while (1) {
727 if (unlikely(q_space-- <= 0)) {
728 /* It might be that completions have happened
729 * since the xmit path last checked. Update
730 * the xmit path's copy of read_count.
732 ++tx_queue->stopped;
733 /* This memory barrier protects the change of
734 * stopped from the access of read_count. */
735 smp_mb();
736 tx_queue->old_read_count =
737 *(volatile unsigned *)&tx_queue->read_count;
738 fill_level = (tx_queue->insert_count
739 - tx_queue->old_read_count);
740 q_space = EFX_TXQ_MASK - 1 - fill_level;
741 if (unlikely(q_space-- <= 0)) {
742 *final_buffer = NULL;
743 return 1;
745 smp_mb();
746 --tx_queue->stopped;
749 insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
750 buffer = &tx_queue->buffer[insert_ptr];
751 ++tx_queue->insert_count;
753 EFX_BUG_ON_PARANOID(tx_queue->insert_count -
754 tx_queue->read_count >
755 EFX_TXQ_MASK);
757 efx_tsoh_free(tx_queue, buffer);
758 EFX_BUG_ON_PARANOID(buffer->len);
759 EFX_BUG_ON_PARANOID(buffer->unmap_len);
760 EFX_BUG_ON_PARANOID(buffer->skb);
761 EFX_BUG_ON_PARANOID(!buffer->continuation);
762 EFX_BUG_ON_PARANOID(buffer->tsoh);
764 buffer->dma_addr = dma_addr;
766 dma_len = efx_max_tx_len(efx, dma_addr);
768 /* If there is enough space to send then do so */
769 if (dma_len >= len)
770 break;
772 buffer->len = dma_len; /* Don't set the other members */
773 dma_addr += dma_len;
774 len -= dma_len;
777 EFX_BUG_ON_PARANOID(!len);
778 buffer->len = len;
779 *final_buffer = buffer;
780 return 0;
785 * Put a TSO header into the TX queue.
787 * This is special-cased because we know that it is small enough to fit in
788 * a single fragment, and we know it doesn't cross a page boundary. It
789 * also allows us to not worry about end-of-packet etc.
791 static void efx_tso_put_header(struct efx_tx_queue *tx_queue,
792 struct efx_tso_header *tsoh, unsigned len)
794 struct efx_tx_buffer *buffer;
796 buffer = &tx_queue->buffer[tx_queue->insert_count & EFX_TXQ_MASK];
797 efx_tsoh_free(tx_queue, buffer);
798 EFX_BUG_ON_PARANOID(buffer->len);
799 EFX_BUG_ON_PARANOID(buffer->unmap_len);
800 EFX_BUG_ON_PARANOID(buffer->skb);
801 EFX_BUG_ON_PARANOID(!buffer->continuation);
802 EFX_BUG_ON_PARANOID(buffer->tsoh);
803 buffer->len = len;
804 buffer->dma_addr = tsoh->dma_addr;
805 buffer->tsoh = tsoh;
807 ++tx_queue->insert_count;
811 /* Remove descriptors put into a tx_queue. */
812 static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
814 struct efx_tx_buffer *buffer;
815 dma_addr_t unmap_addr;
817 /* Work backwards until we hit the original insert pointer value */
818 while (tx_queue->insert_count != tx_queue->write_count) {
819 --tx_queue->insert_count;
820 buffer = &tx_queue->buffer[tx_queue->insert_count &
821 EFX_TXQ_MASK];
822 efx_tsoh_free(tx_queue, buffer);
823 EFX_BUG_ON_PARANOID(buffer->skb);
824 buffer->len = 0;
825 buffer->continuation = true;
826 if (buffer->unmap_len) {
827 unmap_addr = (buffer->dma_addr + buffer->len -
828 buffer->unmap_len);
829 if (buffer->unmap_single)
830 pci_unmap_single(tx_queue->efx->pci_dev,
831 unmap_addr, buffer->unmap_len,
832 PCI_DMA_TODEVICE);
833 else
834 pci_unmap_page(tx_queue->efx->pci_dev,
835 unmap_addr, buffer->unmap_len,
836 PCI_DMA_TODEVICE);
837 buffer->unmap_len = 0;
843 /* Parse the SKB header and initialise state. */
844 static void tso_start(struct tso_state *st, const struct sk_buff *skb)
846 /* All ethernet/IP/TCP headers combined size is TCP header size
847 * plus offset of TCP header relative to start of packet.
849 st->header_len = ((tcp_hdr(skb)->doff << 2u)
850 + PTR_DIFF(tcp_hdr(skb), skb->data));
851 st->full_packet_size = st->header_len + skb_shinfo(skb)->gso_size;
853 if (st->protocol == htons(ETH_P_IP))
854 st->ipv4_id = ntohs(ip_hdr(skb)->id);
855 else
856 st->ipv4_id = 0;
857 st->seqnum = ntohl(tcp_hdr(skb)->seq);
859 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg);
860 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->syn);
861 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->rst);
863 st->packet_space = st->full_packet_size;
864 st->out_len = skb->len - st->header_len;
865 st->unmap_len = 0;
866 st->unmap_single = false;
869 static int tso_get_fragment(struct tso_state *st, struct efx_nic *efx,
870 skb_frag_t *frag)
872 st->unmap_addr = pci_map_page(efx->pci_dev, frag->page,
873 frag->page_offset, frag->size,
874 PCI_DMA_TODEVICE);
875 if (likely(!pci_dma_mapping_error(efx->pci_dev, st->unmap_addr))) {
876 st->unmap_single = false;
877 st->unmap_len = frag->size;
878 st->in_len = frag->size;
879 st->dma_addr = st->unmap_addr;
880 return 0;
882 return -ENOMEM;
885 static int tso_get_head_fragment(struct tso_state *st, struct efx_nic *efx,
886 const struct sk_buff *skb)
888 int hl = st->header_len;
889 int len = skb_headlen(skb) - hl;
891 st->unmap_addr = pci_map_single(efx->pci_dev, skb->data + hl,
892 len, PCI_DMA_TODEVICE);
893 if (likely(!pci_dma_mapping_error(efx->pci_dev, st->unmap_addr))) {
894 st->unmap_single = true;
895 st->unmap_len = len;
896 st->in_len = len;
897 st->dma_addr = st->unmap_addr;
898 return 0;
900 return -ENOMEM;
905 * tso_fill_packet_with_fragment - form descriptors for the current fragment
906 * @tx_queue: Efx TX queue
907 * @skb: Socket buffer
908 * @st: TSO state
910 * Form descriptors for the current fragment, until we reach the end
911 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
912 * space in @tx_queue.
914 static int tso_fill_packet_with_fragment(struct efx_tx_queue *tx_queue,
915 const struct sk_buff *skb,
916 struct tso_state *st)
918 struct efx_tx_buffer *buffer;
919 int n, end_of_packet, rc;
921 if (st->in_len == 0)
922 return 0;
923 if (st->packet_space == 0)
924 return 0;
926 EFX_BUG_ON_PARANOID(st->in_len <= 0);
927 EFX_BUG_ON_PARANOID(st->packet_space <= 0);
929 n = min(st->in_len, st->packet_space);
931 st->packet_space -= n;
932 st->out_len -= n;
933 st->in_len -= n;
935 rc = efx_tx_queue_insert(tx_queue, st->dma_addr, n, &buffer);
936 if (likely(rc == 0)) {
937 if (st->out_len == 0)
938 /* Transfer ownership of the skb */
939 buffer->skb = skb;
941 end_of_packet = st->out_len == 0 || st->packet_space == 0;
942 buffer->continuation = !end_of_packet;
944 if (st->in_len == 0) {
945 /* Transfer ownership of the pci mapping */
946 buffer->unmap_len = st->unmap_len;
947 buffer->unmap_single = st->unmap_single;
948 st->unmap_len = 0;
952 st->dma_addr += n;
953 return rc;
958 * tso_start_new_packet - generate a new header and prepare for the new packet
959 * @tx_queue: Efx TX queue
960 * @skb: Socket buffer
961 * @st: TSO state
963 * Generate a new header and prepare for the new packet. Return 0 on
964 * success, or -1 if failed to alloc header.
966 static int tso_start_new_packet(struct efx_tx_queue *tx_queue,
967 const struct sk_buff *skb,
968 struct tso_state *st)
970 struct efx_tso_header *tsoh;
971 struct tcphdr *tsoh_th;
972 unsigned ip_length;
973 u8 *header;
975 /* Allocate a DMA-mapped header buffer. */
976 if (likely(TSOH_SIZE(st->header_len) <= TSOH_STD_SIZE)) {
977 if (tx_queue->tso_headers_free == NULL) {
978 if (efx_tsoh_block_alloc(tx_queue))
979 return -1;
981 EFX_BUG_ON_PARANOID(!tx_queue->tso_headers_free);
982 tsoh = tx_queue->tso_headers_free;
983 tx_queue->tso_headers_free = tsoh->next;
984 tsoh->unmap_len = 0;
985 } else {
986 tx_queue->tso_long_headers++;
987 tsoh = efx_tsoh_heap_alloc(tx_queue, st->header_len);
988 if (unlikely(!tsoh))
989 return -1;
992 header = TSOH_BUFFER(tsoh);
993 tsoh_th = (struct tcphdr *)(header + SKB_TCP_OFF(skb));
995 /* Copy and update the headers. */
996 memcpy(header, skb->data, st->header_len);
998 tsoh_th->seq = htonl(st->seqnum);
999 st->seqnum += skb_shinfo(skb)->gso_size;
1000 if (st->out_len > skb_shinfo(skb)->gso_size) {
1001 /* This packet will not finish the TSO burst. */
1002 ip_length = st->full_packet_size - ETH_HDR_LEN(skb);
1003 tsoh_th->fin = 0;
1004 tsoh_th->psh = 0;
1005 } else {
1006 /* This packet will be the last in the TSO burst. */
1007 ip_length = st->header_len - ETH_HDR_LEN(skb) + st->out_len;
1008 tsoh_th->fin = tcp_hdr(skb)->fin;
1009 tsoh_th->psh = tcp_hdr(skb)->psh;
1012 if (st->protocol == htons(ETH_P_IP)) {
1013 struct iphdr *tsoh_iph =
1014 (struct iphdr *)(header + SKB_IPV4_OFF(skb));
1016 tsoh_iph->tot_len = htons(ip_length);
1018 /* Linux leaves suitable gaps in the IP ID space for us to fill. */
1019 tsoh_iph->id = htons(st->ipv4_id);
1020 st->ipv4_id++;
1021 } else {
1022 struct ipv6hdr *tsoh_iph =
1023 (struct ipv6hdr *)(header + SKB_IPV6_OFF(skb));
1025 tsoh_iph->payload_len = htons(ip_length - sizeof(*tsoh_iph));
1028 st->packet_space = skb_shinfo(skb)->gso_size;
1029 ++tx_queue->tso_packets;
1031 /* Form a descriptor for this header. */
1032 efx_tso_put_header(tx_queue, tsoh, st->header_len);
1034 return 0;
1039 * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer
1040 * @tx_queue: Efx TX queue
1041 * @skb: Socket buffer
1043 * Context: You must hold netif_tx_lock() to call this function.
1045 * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if
1046 * @skb was not enqueued. In all cases @skb is consumed. Return
1047 * %NETDEV_TX_OK or %NETDEV_TX_BUSY.
1049 static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
1050 struct sk_buff *skb)
1052 struct efx_nic *efx = tx_queue->efx;
1053 int frag_i, rc, rc2 = NETDEV_TX_OK;
1054 struct tso_state state;
1056 /* Find the packet protocol and sanity-check it */
1057 state.protocol = efx_tso_check_protocol(skb);
1059 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
1061 tso_start(&state, skb);
1063 /* Assume that skb header area contains exactly the headers, and
1064 * all payload is in the frag list.
1066 if (skb_headlen(skb) == state.header_len) {
1067 /* Grab the first payload fragment. */
1068 EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags < 1);
1069 frag_i = 0;
1070 rc = tso_get_fragment(&state, efx,
1071 skb_shinfo(skb)->frags + frag_i);
1072 if (rc)
1073 goto mem_err;
1074 } else {
1075 rc = tso_get_head_fragment(&state, efx, skb);
1076 if (rc)
1077 goto mem_err;
1078 frag_i = -1;
1081 if (tso_start_new_packet(tx_queue, skb, &state) < 0)
1082 goto mem_err;
1084 while (1) {
1085 rc = tso_fill_packet_with_fragment(tx_queue, skb, &state);
1086 if (unlikely(rc))
1087 goto stop;
1089 /* Move onto the next fragment? */
1090 if (state.in_len == 0) {
1091 if (++frag_i >= skb_shinfo(skb)->nr_frags)
1092 /* End of payload reached. */
1093 break;
1094 rc = tso_get_fragment(&state, efx,
1095 skb_shinfo(skb)->frags + frag_i);
1096 if (rc)
1097 goto mem_err;
1100 /* Start at new packet? */
1101 if (state.packet_space == 0 &&
1102 tso_start_new_packet(tx_queue, skb, &state) < 0)
1103 goto mem_err;
1106 /* Pass off to hardware */
1107 efx_nic_push_buffers(tx_queue);
1109 tx_queue->tso_bursts++;
1110 return NETDEV_TX_OK;
1112 mem_err:
1113 EFX_ERR(efx, "Out of memory for TSO headers, or PCI mapping error\n");
1114 dev_kfree_skb_any(skb);
1115 goto unwind;
1117 stop:
1118 rc2 = NETDEV_TX_BUSY;
1120 /* Stop the queue if it wasn't stopped before. */
1121 if (tx_queue->stopped == 1)
1122 efx_stop_queue(efx);
1124 unwind:
1125 /* Free the DMA mapping we were in the process of writing out */
1126 if (state.unmap_len) {
1127 if (state.unmap_single)
1128 pci_unmap_single(efx->pci_dev, state.unmap_addr,
1129 state.unmap_len, PCI_DMA_TODEVICE);
1130 else
1131 pci_unmap_page(efx->pci_dev, state.unmap_addr,
1132 state.unmap_len, PCI_DMA_TODEVICE);
1135 efx_enqueue_unwind(tx_queue);
1136 return rc2;
1141 * Free up all TSO datastructures associated with tx_queue. This
1142 * routine should be called only once the tx_queue is both empty and
1143 * will no longer be used.
1145 static void efx_fini_tso(struct efx_tx_queue *tx_queue)
1147 unsigned i;
1149 if (tx_queue->buffer) {
1150 for (i = 0; i <= EFX_TXQ_MASK; ++i)
1151 efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
1154 while (tx_queue->tso_headers_free != NULL)
1155 efx_tsoh_block_free(tx_queue, tx_queue->tso_headers_free,
1156 tx_queue->efx->pci_dev);