2 * Handles the Intel 27x USB Device Controller (UDC)
4 * Inspired by original driver by Frank Becker, David Brownell, and others.
5 * Copyright (C) 2008 Robert Jarzmik
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27 #include <linux/delay.h>
28 #include <linux/list.h>
29 #include <linux/interrupt.h>
30 #include <linux/proc_fs.h>
31 #include <linux/clk.h>
32 #include <linux/irq.h>
33 #include <linux/gpio.h>
34 #include <linux/slab.h>
36 #include <asm/byteorder.h>
37 #include <mach/hardware.h>
39 #include <linux/usb.h>
40 #include <linux/usb/ch9.h>
41 #include <linux/usb/gadget.h>
44 #include "pxa27x_udc.h"
47 * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x
50 * Such controller drivers work with a gadget driver. The gadget driver
51 * returns descriptors, implements configuration and data protocols used
52 * by the host to interact with this device, and allocates endpoints to
53 * the different protocol interfaces. The controller driver virtualizes
54 * usb hardware so that the gadget drivers will be more portable.
56 * This UDC hardware wants to implement a bit too much USB protocol. The
57 * biggest issues are: that the endpoints have to be set up before the
58 * controller can be enabled (minor, and not uncommon); and each endpoint
59 * can only have one configuration, interface and alternative interface
60 * number (major, and very unusual). Once set up, these cannot be changed
61 * without a controller reset.
63 * The workaround is to setup all combinations necessary for the gadgets which
64 * will work with this driver. This is done in pxa_udc structure, statically.
65 * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep.
66 * (You could modify this if needed. Some drivers have a "fifo_mode" module
67 * parameter to facilitate such changes.)
69 * The combinations have been tested with these gadgets :
71 * - file storage gadget
74 * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is
75 * made of UDC's double buffering either. USB "On-The-Go" is not implemented.
77 * All the requests are handled the same way :
78 * - the drivers tries to handle the request directly to the IO
79 * - if the IO fifo is not big enough, the remaining is send/received in
83 #define DRIVER_VERSION "2008-04-18"
84 #define DRIVER_DESC "PXA 27x USB Device Controller driver"
86 static const char driver_name
[] = "pxa27x_udc";
87 static struct pxa_udc
*the_controller
;
89 static void handle_ep(struct pxa_ep
*ep
);
94 #ifdef CONFIG_USB_GADGET_DEBUG_FS
96 #include <linux/debugfs.h>
97 #include <linux/uaccess.h>
98 #include <linux/seq_file.h>
100 static int state_dbg_show(struct seq_file
*s
, void *p
)
102 struct pxa_udc
*udc
= s
->private;
110 /* basic device status */
111 pos
+= seq_printf(s
, DRIVER_DESC
"\n"
112 "%s version: %s\nGadget driver: %s\n",
113 driver_name
, DRIVER_VERSION
,
114 udc
->driver
? udc
->driver
->driver
.name
: "(none)");
116 tmp
= udc_readl(udc
, UDCCR
);
118 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
119 "con=%d,inter=%d,altinter=%d\n", tmp
,
120 (tmp
& UDCCR_OEN
) ? " oen":"",
121 (tmp
& UDCCR_AALTHNP
) ? " aalthnp":"",
122 (tmp
& UDCCR_AHNP
) ? " rem" : "",
123 (tmp
& UDCCR_BHNP
) ? " rstir" : "",
124 (tmp
& UDCCR_DWRE
) ? " dwre" : "",
125 (tmp
& UDCCR_SMAC
) ? " smac" : "",
126 (tmp
& UDCCR_EMCE
) ? " emce" : "",
127 (tmp
& UDCCR_UDR
) ? " udr" : "",
128 (tmp
& UDCCR_UDA
) ? " uda" : "",
129 (tmp
& UDCCR_UDE
) ? " ude" : "",
130 (tmp
& UDCCR_ACN
) >> UDCCR_ACN_S
,
131 (tmp
& UDCCR_AIN
) >> UDCCR_AIN_S
,
132 (tmp
& UDCCR_AAISN
) >> UDCCR_AAISN_S
);
133 /* registers for device and ep0 */
134 pos
+= seq_printf(s
, "udcicr0=0x%08x udcicr1=0x%08x\n",
135 udc_readl(udc
, UDCICR0
), udc_readl(udc
, UDCICR1
));
136 pos
+= seq_printf(s
, "udcisr0=0x%08x udcisr1=0x%08x\n",
137 udc_readl(udc
, UDCISR0
), udc_readl(udc
, UDCISR1
));
138 pos
+= seq_printf(s
, "udcfnr=%d\n", udc_readl(udc
, UDCFNR
));
139 pos
+= seq_printf(s
, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
141 udc
->stats
.irqs_reset
, udc
->stats
.irqs_suspend
,
142 udc
->stats
.irqs_resume
, udc
->stats
.irqs_reconfig
);
149 static int queues_dbg_show(struct seq_file
*s
, void *p
)
151 struct pxa_udc
*udc
= s
->private;
153 struct pxa27x_request
*req
;
154 int pos
= 0, i
, maxpkt
, ret
;
160 /* dump endpoint queues */
161 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
162 ep
= &udc
->pxa_ep
[i
];
163 maxpkt
= ep
->fifo_size
;
164 pos
+= seq_printf(s
, "%-12s max_pkt=%d %s\n",
165 EPNAME(ep
), maxpkt
, "pio");
167 if (list_empty(&ep
->queue
)) {
168 pos
+= seq_printf(s
, "\t(nothing queued)\n");
172 list_for_each_entry(req
, &ep
->queue
, queue
) {
173 pos
+= seq_printf(s
, "\treq %p len %d/%d buf %p\n",
174 &req
->req
, req
->req
.actual
,
175 req
->req
.length
, req
->req
.buf
);
184 static int eps_dbg_show(struct seq_file
*s
, void *p
)
186 struct pxa_udc
*udc
= s
->private;
195 ep
= &udc
->pxa_ep
[0];
196 tmp
= udc_ep_readl(ep
, UDCCSR
);
197 pos
+= seq_printf(s
, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp
,
198 (tmp
& UDCCSR0_SA
) ? " sa" : "",
199 (tmp
& UDCCSR0_RNE
) ? " rne" : "",
200 (tmp
& UDCCSR0_FST
) ? " fst" : "",
201 (tmp
& UDCCSR0_SST
) ? " sst" : "",
202 (tmp
& UDCCSR0_DME
) ? " dme" : "",
203 (tmp
& UDCCSR0_IPR
) ? " ipr" : "",
204 (tmp
& UDCCSR0_OPC
) ? " opc" : "");
205 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
206 ep
= &udc
->pxa_ep
[i
];
207 tmp
= i
? udc_ep_readl(ep
, UDCCR
) : udc_readl(udc
, UDCCR
);
208 pos
+= seq_printf(s
, "%-12s: "
209 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
210 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
213 ep
->stats
.in_bytes
, ep
->stats
.in_ops
,
214 ep
->stats
.out_bytes
, ep
->stats
.out_ops
,
216 tmp
, udc_ep_readl(ep
, UDCCSR
),
217 udc_ep_readl(ep
, UDCBCR
));
225 static int eps_dbg_open(struct inode
*inode
, struct file
*file
)
227 return single_open(file
, eps_dbg_show
, inode
->i_private
);
230 static int queues_dbg_open(struct inode
*inode
, struct file
*file
)
232 return single_open(file
, queues_dbg_show
, inode
->i_private
);
235 static int state_dbg_open(struct inode
*inode
, struct file
*file
)
237 return single_open(file
, state_dbg_show
, inode
->i_private
);
240 static const struct file_operations state_dbg_fops
= {
241 .owner
= THIS_MODULE
,
242 .open
= state_dbg_open
,
245 .release
= single_release
,
248 static const struct file_operations queues_dbg_fops
= {
249 .owner
= THIS_MODULE
,
250 .open
= queues_dbg_open
,
253 .release
= single_release
,
256 static const struct file_operations eps_dbg_fops
= {
257 .owner
= THIS_MODULE
,
258 .open
= eps_dbg_open
,
261 .release
= single_release
,
264 static void pxa_init_debugfs(struct pxa_udc
*udc
)
266 struct dentry
*root
, *state
, *queues
, *eps
;
268 root
= debugfs_create_dir(udc
->gadget
.name
, NULL
);
269 if (IS_ERR(root
) || !root
)
272 state
= debugfs_create_file("udcstate", 0400, root
, udc
,
276 queues
= debugfs_create_file("queues", 0400, root
, udc
,
280 eps
= debugfs_create_file("epstate", 0400, root
, udc
,
285 udc
->debugfs_root
= root
;
286 udc
->debugfs_state
= state
;
287 udc
->debugfs_queues
= queues
;
288 udc
->debugfs_eps
= eps
;
293 debugfs_remove(queues
);
295 debugfs_remove(root
);
297 dev_err(udc
->dev
, "debugfs is not available\n");
300 static void pxa_cleanup_debugfs(struct pxa_udc
*udc
)
302 debugfs_remove(udc
->debugfs_eps
);
303 debugfs_remove(udc
->debugfs_queues
);
304 debugfs_remove(udc
->debugfs_state
);
305 debugfs_remove(udc
->debugfs_root
);
306 udc
->debugfs_eps
= NULL
;
307 udc
->debugfs_queues
= NULL
;
308 udc
->debugfs_state
= NULL
;
309 udc
->debugfs_root
= NULL
;
313 static inline void pxa_init_debugfs(struct pxa_udc
*udc
)
317 static inline void pxa_cleanup_debugfs(struct pxa_udc
*udc
)
323 * is_match_usb_pxa - check if usb_ep and pxa_ep match
324 * @udc_usb_ep: usb endpoint
326 * @config: configuration required in pxa_ep
327 * @interface: interface required in pxa_ep
328 * @altsetting: altsetting required in pxa_ep
330 * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise
332 static int is_match_usb_pxa(struct udc_usb_ep
*udc_usb_ep
, struct pxa_ep
*ep
,
333 int config
, int interface
, int altsetting
)
335 if (usb_endpoint_num(&udc_usb_ep
->desc
) != ep
->addr
)
337 if (usb_endpoint_dir_in(&udc_usb_ep
->desc
) != ep
->dir_in
)
339 if (usb_endpoint_type(&udc_usb_ep
->desc
) != ep
->type
)
341 if ((ep
->config
!= config
) || (ep
->interface
!= interface
)
342 || (ep
->alternate
!= altsetting
))
348 * find_pxa_ep - find pxa_ep structure matching udc_usb_ep
350 * @udc_usb_ep: udc_usb_ep structure
352 * Match udc_usb_ep and all pxa_ep available, to see if one matches.
353 * This is necessary because of the strong pxa hardware restriction requiring
354 * that once pxa endpoints are initialized, their configuration is freezed, and
355 * no change can be made to their address, direction, or in which configuration,
356 * interface or altsetting they are active ... which differs from more usual
357 * models which have endpoints be roughly just addressable fifos, and leave
358 * configuration events up to gadget drivers (like all control messages).
360 * Note that there is still a blurred point here :
361 * - we rely on UDCCR register "active interface" and "active altsetting".
362 * This is a nonsense in regard of USB spec, where multiple interfaces are
363 * active at the same time.
364 * - if we knew for sure that the pxa can handle multiple interface at the
365 * same time, assuming Intel's Developer Guide is wrong, this function
366 * should be reviewed, and a cache of couples (iface, altsetting) should
367 * be kept in the pxa_udc structure. In this case this function would match
368 * against the cache of couples instead of the "last altsetting" set up.
370 * Returns the matched pxa_ep structure or NULL if none found
372 static struct pxa_ep
*find_pxa_ep(struct pxa_udc
*udc
,
373 struct udc_usb_ep
*udc_usb_ep
)
377 int cfg
= udc
->config
;
378 int iface
= udc
->last_interface
;
379 int alt
= udc
->last_alternate
;
381 if (udc_usb_ep
== &udc
->udc_usb_ep
[0])
382 return &udc
->pxa_ep
[0];
384 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
385 ep
= &udc
->pxa_ep
[i
];
386 if (is_match_usb_pxa(udc_usb_ep
, ep
, cfg
, iface
, alt
))
393 * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep
396 * Context: in_interrupt()
398 * Updates all pxa_ep fields in udc_usb_ep structures, if this field was
399 * previously set up (and is not NULL). The update is necessary is a
400 * configuration change or altsetting change was issued by the USB host.
402 static void update_pxa_ep_matches(struct pxa_udc
*udc
)
405 struct udc_usb_ep
*udc_usb_ep
;
407 for (i
= 1; i
< NR_USB_ENDPOINTS
; i
++) {
408 udc_usb_ep
= &udc
->udc_usb_ep
[i
];
409 if (udc_usb_ep
->pxa_ep
)
410 udc_usb_ep
->pxa_ep
= find_pxa_ep(udc
, udc_usb_ep
);
415 * pio_irq_enable - Enables irq generation for one endpoint
418 static void pio_irq_enable(struct pxa_ep
*ep
)
420 struct pxa_udc
*udc
= ep
->dev
;
421 int index
= EPIDX(ep
);
422 u32 udcicr0
= udc_readl(udc
, UDCICR0
);
423 u32 udcicr1
= udc_readl(udc
, UDCICR1
);
426 udc_writel(udc
, UDCICR0
, udcicr0
| (3 << (index
* 2)));
428 udc_writel(udc
, UDCICR1
, udcicr1
| (3 << ((index
- 16) * 2)));
432 * pio_irq_disable - Disables irq generation for one endpoint
435 static void pio_irq_disable(struct pxa_ep
*ep
)
437 struct pxa_udc
*udc
= ep
->dev
;
438 int index
= EPIDX(ep
);
439 u32 udcicr0
= udc_readl(udc
, UDCICR0
);
440 u32 udcicr1
= udc_readl(udc
, UDCICR1
);
443 udc_writel(udc
, UDCICR0
, udcicr0
& ~(3 << (index
* 2)));
445 udc_writel(udc
, UDCICR1
, udcicr1
& ~(3 << ((index
- 16) * 2)));
449 * udc_set_mask_UDCCR - set bits in UDCCR
451 * @mask: bits to set in UDCCR
453 * Sets bits in UDCCR, leaving DME and FST bits as they were.
455 static inline void udc_set_mask_UDCCR(struct pxa_udc
*udc
, int mask
)
457 u32 udccr
= udc_readl(udc
, UDCCR
);
458 udc_writel(udc
, UDCCR
,
459 (udccr
& UDCCR_MASK_BITS
) | (mask
& UDCCR_MASK_BITS
));
463 * udc_clear_mask_UDCCR - clears bits in UDCCR
465 * @mask: bit to clear in UDCCR
467 * Clears bits in UDCCR, leaving DME and FST bits as they were.
469 static inline void udc_clear_mask_UDCCR(struct pxa_udc
*udc
, int mask
)
471 u32 udccr
= udc_readl(udc
, UDCCR
);
472 udc_writel(udc
, UDCCR
,
473 (udccr
& UDCCR_MASK_BITS
) & ~(mask
& UDCCR_MASK_BITS
));
477 * ep_write_UDCCSR - set bits in UDCCSR
479 * @mask: bits to set in UDCCR
481 * Sets bits in UDCCSR (UDCCSR0 and UDCCSR*).
483 * A specific case is applied to ep0 : the ACM bit is always set to 1, for
484 * SET_INTERFACE and SET_CONFIGURATION.
486 static inline void ep_write_UDCCSR(struct pxa_ep
*ep
, int mask
)
490 udc_ep_writel(ep
, UDCCSR
, mask
);
494 * ep_count_bytes_remain - get how many bytes in udc endpoint
497 * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP)
499 static int ep_count_bytes_remain(struct pxa_ep
*ep
)
503 return udc_ep_readl(ep
, UDCBCR
) & 0x3ff;
507 * ep_is_empty - checks if ep has byte ready for reading
510 * If endpoint is the control endpoint, checks if there are bytes in the
511 * control endpoint fifo. If endpoint is a data endpoint, checks if bytes
512 * are ready for reading on OUT endpoint.
514 * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint
516 static int ep_is_empty(struct pxa_ep
*ep
)
520 if (!is_ep0(ep
) && ep
->dir_in
)
523 ret
= !(udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_RNE
);
525 ret
= !(udc_ep_readl(ep
, UDCCSR
) & UDCCSR_BNE
);
530 * ep_is_full - checks if ep has place to write bytes
533 * If endpoint is not the control endpoint and is an IN endpoint, checks if
534 * there is place to write bytes into the endpoint.
536 * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint
538 static int ep_is_full(struct pxa_ep
*ep
)
541 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_IPR
);
544 return (!(udc_ep_readl(ep
, UDCCSR
) & UDCCSR_BNF
));
548 * epout_has_pkt - checks if OUT endpoint fifo has a packet available
551 * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep.
553 static int epout_has_pkt(struct pxa_ep
*ep
)
555 if (!is_ep0(ep
) && ep
->dir_in
)
558 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR0_OPC
);
559 return (udc_ep_readl(ep
, UDCCSR
) & UDCCSR_PC
);
563 * set_ep0state - Set ep0 automata state
567 static void set_ep0state(struct pxa_udc
*udc
, int state
)
569 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
570 char *old_stname
= EP0_STNAME(udc
);
572 udc
->ep0state
= state
;
573 ep_dbg(ep
, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname
,
574 EP0_STNAME(udc
), udc_ep_readl(ep
, UDCCSR
),
575 udc_ep_readl(ep
, UDCBCR
));
579 * ep0_idle - Put control endpoint into idle state
582 static void ep0_idle(struct pxa_udc
*dev
)
584 set_ep0state(dev
, WAIT_FOR_SETUP
);
588 * inc_ep_stats_reqs - Update ep stats counts
589 * @ep: physical endpoint
591 * @is_in: ep direction (USB_DIR_IN or 0)
594 static void inc_ep_stats_reqs(struct pxa_ep
*ep
, int is_in
)
603 * inc_ep_stats_bytes - Update ep stats counts
604 * @ep: physical endpoint
605 * @count: bytes transfered on endpoint
606 * @is_in: ep direction (USB_DIR_IN or 0)
608 static void inc_ep_stats_bytes(struct pxa_ep
*ep
, int count
, int is_in
)
611 ep
->stats
.in_bytes
+= count
;
613 ep
->stats
.out_bytes
+= count
;
617 * pxa_ep_setup - Sets up an usb physical endpoint
618 * @ep: pxa27x physical endpoint
620 * Find the physical pxa27x ep, and setup its UDCCR
622 static __init
void pxa_ep_setup(struct pxa_ep
*ep
)
626 new_udccr
= ((ep
->config
<< UDCCONR_CN_S
) & UDCCONR_CN
)
627 | ((ep
->interface
<< UDCCONR_IN_S
) & UDCCONR_IN
)
628 | ((ep
->alternate
<< UDCCONR_AISN_S
) & UDCCONR_AISN
)
629 | ((EPADDR(ep
) << UDCCONR_EN_S
) & UDCCONR_EN
)
630 | ((EPXFERTYPE(ep
) << UDCCONR_ET_S
) & UDCCONR_ET
)
631 | ((ep
->dir_in
) ? UDCCONR_ED
: 0)
632 | ((ep
->fifo_size
<< UDCCONR_MPS_S
) & UDCCONR_MPS
)
635 udc_ep_writel(ep
, UDCCR
, new_udccr
);
639 * pxa_eps_setup - Sets up all usb physical endpoints
642 * Setup all pxa physical endpoints, except ep0
644 static __init
void pxa_eps_setup(struct pxa_udc
*dev
)
648 dev_dbg(dev
->dev
, "%s: dev=%p\n", __func__
, dev
);
650 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++)
651 pxa_ep_setup(&dev
->pxa_ep
[i
]);
655 * pxa_ep_alloc_request - Allocate usb request
659 * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers
660 * must still pass correctly initialized endpoints, since other controller
661 * drivers may care about how it's currently set up (dma issues etc).
663 static struct usb_request
*
664 pxa_ep_alloc_request(struct usb_ep
*_ep
, gfp_t gfp_flags
)
666 struct pxa27x_request
*req
;
668 req
= kzalloc(sizeof *req
, gfp_flags
);
672 INIT_LIST_HEAD(&req
->queue
);
674 req
->udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
680 * pxa_ep_free_request - Free usb request
684 * Wrapper around kfree to free _req
686 static void pxa_ep_free_request(struct usb_ep
*_ep
, struct usb_request
*_req
)
688 struct pxa27x_request
*req
;
690 req
= container_of(_req
, struct pxa27x_request
, req
);
691 WARN_ON(!list_empty(&req
->queue
));
696 * ep_add_request - add a request to the endpoint's queue
700 * Context: ep->lock held
702 * Queues the request in the endpoint's queue, and enables the interrupts
705 static void ep_add_request(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
709 ep_vdbg(ep
, "req:%p, lg=%d, udccsr=0x%03x\n", req
,
710 req
->req
.length
, udc_ep_readl(ep
, UDCCSR
));
713 list_add_tail(&req
->queue
, &ep
->queue
);
718 * ep_del_request - removes a request from the endpoint's queue
722 * Context: ep->lock held
724 * Unqueue the request from the endpoint's queue. If there are no more requests
725 * on the endpoint, and if it's not the control endpoint, interrupts are
726 * disabled on the endpoint.
728 static void ep_del_request(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
732 ep_vdbg(ep
, "req:%p, lg=%d, udccsr=0x%03x\n", req
,
733 req
->req
.length
, udc_ep_readl(ep
, UDCCSR
));
735 list_del_init(&req
->queue
);
737 if (!is_ep0(ep
) && list_empty(&ep
->queue
))
742 * req_done - Complete an usb request
743 * @ep: pxa physical endpoint
745 * @status: usb request status sent to gadget API
746 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
748 * Context: ep->lock held if flags not NULL, else ep->lock released
750 * Retire a pxa27x usb request. Endpoint must be locked.
752 static void req_done(struct pxa_ep
*ep
, struct pxa27x_request
*req
, int status
,
753 unsigned long *pflags
)
757 ep_del_request(ep
, req
);
758 if (likely(req
->req
.status
== -EINPROGRESS
))
759 req
->req
.status
= status
;
761 status
= req
->req
.status
;
763 if (status
&& status
!= -ESHUTDOWN
)
764 ep_dbg(ep
, "complete req %p stat %d len %u/%u\n",
766 req
->req
.actual
, req
->req
.length
);
769 spin_unlock_irqrestore(&ep
->lock
, *pflags
);
770 local_irq_save(flags
);
771 req
->req
.complete(&req
->udc_usb_ep
->usb_ep
, &req
->req
);
772 local_irq_restore(flags
);
774 spin_lock_irqsave(&ep
->lock
, *pflags
);
778 * ep_end_out_req - Ends endpoint OUT request
779 * @ep: physical endpoint
781 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
783 * Context: ep->lock held or released (see req_done())
785 * Ends endpoint OUT request (completes usb request).
787 static void ep_end_out_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
788 unsigned long *pflags
)
790 inc_ep_stats_reqs(ep
, !USB_DIR_IN
);
791 req_done(ep
, req
, 0, pflags
);
795 * ep0_end_out_req - Ends control endpoint OUT request (ends data stage)
796 * @ep: physical endpoint
798 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
800 * Context: ep->lock held or released (see req_done())
802 * Ends control endpoint OUT request (completes usb request), and puts
803 * control endpoint into idle state
805 static void ep0_end_out_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
806 unsigned long *pflags
)
808 set_ep0state(ep
->dev
, OUT_STATUS_STAGE
);
809 ep_end_out_req(ep
, req
, pflags
);
814 * ep_end_in_req - Ends endpoint IN request
815 * @ep: physical endpoint
817 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
819 * Context: ep->lock held or released (see req_done())
821 * Ends endpoint IN request (completes usb request).
823 static void ep_end_in_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
824 unsigned long *pflags
)
826 inc_ep_stats_reqs(ep
, USB_DIR_IN
);
827 req_done(ep
, req
, 0, pflags
);
831 * ep0_end_in_req - Ends control endpoint IN request (ends data stage)
832 * @ep: physical endpoint
834 * @pflags: flags of previous spinlock_irq_save() or NULL if no lock held
836 * Context: ep->lock held or released (see req_done())
838 * Ends control endpoint IN request (completes usb request), and puts
839 * control endpoint into status state
841 static void ep0_end_in_req(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
842 unsigned long *pflags
)
844 set_ep0state(ep
->dev
, IN_STATUS_STAGE
);
845 ep_end_in_req(ep
, req
, pflags
);
849 * nuke - Dequeue all requests
851 * @status: usb request status
853 * Context: ep->lock released
855 * Dequeues all requests on an endpoint. As a side effect, interrupts will be
856 * disabled on that endpoint (because no more requests).
858 static void nuke(struct pxa_ep
*ep
, int status
)
860 struct pxa27x_request
*req
;
863 spin_lock_irqsave(&ep
->lock
, flags
);
864 while (!list_empty(&ep
->queue
)) {
865 req
= list_entry(ep
->queue
.next
, struct pxa27x_request
, queue
);
866 req_done(ep
, req
, status
, &flags
);
868 spin_unlock_irqrestore(&ep
->lock
, flags
);
872 * read_packet - transfer 1 packet from an OUT endpoint into request
873 * @ep: pxa physical endpoint
876 * Takes bytes from OUT endpoint and transfers them info the usb request.
877 * If there is less space in request than bytes received in OUT endpoint,
878 * bytes are left in the OUT endpoint.
880 * Returns how many bytes were actually transfered
882 static int read_packet(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
885 int bytes_ep
, bufferspace
, count
, i
;
887 bytes_ep
= ep_count_bytes_remain(ep
);
888 bufferspace
= req
->req
.length
- req
->req
.actual
;
890 buf
= (u32
*)(req
->req
.buf
+ req
->req
.actual
);
893 if (likely(!ep_is_empty(ep
)))
894 count
= min(bytes_ep
, bufferspace
);
898 for (i
= count
; i
> 0; i
-= 4)
899 *buf
++ = udc_ep_readl(ep
, UDCDR
);
900 req
->req
.actual
+= count
;
902 ep_write_UDCCSR(ep
, UDCCSR_PC
);
908 * write_packet - transfer 1 packet from request into an IN endpoint
909 * @ep: pxa physical endpoint
911 * @max: max bytes that fit into endpoint
913 * Takes bytes from usb request, and transfers them into the physical
914 * endpoint. If there are no bytes to transfer, doesn't write anything
915 * to physical endpoint.
917 * Returns how many bytes were actually transfered.
919 static int write_packet(struct pxa_ep
*ep
, struct pxa27x_request
*req
,
922 int length
, count
, remain
, i
;
926 buf
= (u32
*)(req
->req
.buf
+ req
->req
.actual
);
929 length
= min(req
->req
.length
- req
->req
.actual
, max
);
930 req
->req
.actual
+= length
;
932 remain
= length
& 0x3;
933 count
= length
& ~(0x3);
934 for (i
= count
; i
> 0 ; i
-= 4)
935 udc_ep_writel(ep
, UDCDR
, *buf
++);
938 for (i
= remain
; i
> 0; i
--)
939 udc_ep_writeb(ep
, UDCDR
, *buf_8
++);
941 ep_vdbg(ep
, "length=%d+%d, udccsr=0x%03x\n", count
, remain
,
942 udc_ep_readl(ep
, UDCCSR
));
948 * read_fifo - Transfer packets from OUT endpoint into usb request
949 * @ep: pxa physical endpoint
952 * Context: callable when in_interrupt()
954 * Unload as many packets as possible from the fifo we use for usb OUT
955 * transfers and put them into the request. Caller should have made sure
956 * there's at least one packet ready.
957 * Doesn't complete the request, that's the caller's job
959 * Returns 1 if the request completed, 0 otherwise
961 static int read_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
963 int count
, is_short
, completed
= 0;
965 while (epout_has_pkt(ep
)) {
966 count
= read_packet(ep
, req
);
967 inc_ep_stats_bytes(ep
, count
, !USB_DIR_IN
);
969 is_short
= (count
< ep
->fifo_size
);
970 ep_dbg(ep
, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
971 udc_ep_readl(ep
, UDCCSR
), count
, is_short
? "/S" : "",
972 &req
->req
, req
->req
.actual
, req
->req
.length
);
975 if (is_short
|| req
->req
.actual
== req
->req
.length
) {
979 /* finished that packet. the next one may be waiting... */
985 * write_fifo - transfer packets from usb request into an IN endpoint
986 * @ep: pxa physical endpoint
987 * @req: pxa usb request
989 * Write to an IN endpoint fifo, as many packets as possible.
990 * irqs will use this to write the rest later.
991 * caller guarantees at least one packet buffer is ready (or a zlp).
992 * Doesn't complete the request, that's the caller's job
994 * Returns 1 if request fully transfered, 0 if partial transfer
996 static int write_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
999 int count
, is_short
, is_last
= 0, completed
= 0, totcount
= 0;
1002 max
= ep
->fifo_size
;
1006 udccsr
= udc_ep_readl(ep
, UDCCSR
);
1007 if (udccsr
& UDCCSR_PC
) {
1008 ep_vdbg(ep
, "Clearing Transmit Complete, udccsr=%x\n",
1010 ep_write_UDCCSR(ep
, UDCCSR_PC
);
1012 if (udccsr
& UDCCSR_TRN
) {
1013 ep_vdbg(ep
, "Clearing Underrun on, udccsr=%x\n",
1015 ep_write_UDCCSR(ep
, UDCCSR_TRN
);
1018 count
= write_packet(ep
, req
, max
);
1019 inc_ep_stats_bytes(ep
, count
, USB_DIR_IN
);
1022 /* last packet is usually short (or a zlp) */
1023 if (unlikely(count
< max
)) {
1027 if (likely(req
->req
.length
> req
->req
.actual
)
1032 /* interrupt/iso maxpacket may not fill the fifo */
1033 is_short
= unlikely(max
< ep
->fifo_size
);
1037 ep_write_UDCCSR(ep
, UDCCSR_SP
);
1039 /* requests complete when all IN data is in the FIFO */
1044 } while (!ep_is_full(ep
));
1046 ep_dbg(ep
, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1047 totcount
, is_last
? "/L" : "", is_short
? "/S" : "",
1048 req
->req
.length
- req
->req
.actual
, &req
->req
);
1054 * read_ep0_fifo - Transfer packets from control endpoint into usb request
1055 * @ep: control endpoint
1056 * @req: pxa usb request
1058 * Special ep0 version of the above read_fifo. Reads as many bytes from control
1059 * endpoint as can be read, and stores them into usb request (limited by request
1062 * Returns 0 if usb request only partially filled, 1 if fully filled
1064 static int read_ep0_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1066 int count
, is_short
, completed
= 0;
1068 while (epout_has_pkt(ep
)) {
1069 count
= read_packet(ep
, req
);
1070 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
1071 inc_ep_stats_bytes(ep
, count
, !USB_DIR_IN
);
1073 is_short
= (count
< ep
->fifo_size
);
1074 ep_dbg(ep
, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1075 udc_ep_readl(ep
, UDCCSR
), count
, is_short
? "/S" : "",
1076 &req
->req
, req
->req
.actual
, req
->req
.length
);
1078 if (is_short
|| req
->req
.actual
>= req
->req
.length
) {
1088 * write_ep0_fifo - Send a request to control endpoint (ep0 in)
1089 * @ep: control endpoint
1092 * Context: callable when in_interrupt()
1094 * Sends a request (or a part of the request) to the control endpoint (ep0 in).
1095 * If the request doesn't fit, the remaining part will be sent from irq.
1096 * The request is considered fully written only if either :
1097 * - last write transfered all remaining bytes, but fifo was not fully filled
1098 * - last write was a 0 length write
1100 * Returns 1 if request fully written, 0 if request only partially sent
1102 static int write_ep0_fifo(struct pxa_ep
*ep
, struct pxa27x_request
*req
)
1105 int is_last
, is_short
;
1107 count
= write_packet(ep
, req
, EP0_FIFO_SIZE
);
1108 inc_ep_stats_bytes(ep
, count
, USB_DIR_IN
);
1110 is_short
= (count
< EP0_FIFO_SIZE
);
1111 is_last
= ((count
== 0) || (count
< EP0_FIFO_SIZE
));
1113 /* Sends either a short packet or a 0 length packet */
1114 if (unlikely(is_short
))
1115 ep_write_UDCCSR(ep
, UDCCSR0_IPR
);
1117 ep_dbg(ep
, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1118 count
, is_short
? "/S" : "", is_last
? "/L" : "",
1119 req
->req
.length
- req
->req
.actual
,
1120 &req
->req
, udc_ep_readl(ep
, UDCCSR
));
1126 * pxa_ep_queue - Queue a request into an IN endpoint
1127 * @_ep: usb endpoint
1128 * @_req: usb request
1131 * Context: normally called when !in_interrupt, but callable when in_interrupt()
1132 * in the special case of ep0 setup :
1133 * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue)
1135 * Returns 0 if succedeed, error otherwise
1137 static int pxa_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
,
1140 struct udc_usb_ep
*udc_usb_ep
;
1142 struct pxa27x_request
*req
;
1143 struct pxa_udc
*dev
;
1144 unsigned long flags
;
1148 int recursion_detected
;
1150 req
= container_of(_req
, struct pxa27x_request
, req
);
1151 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1153 if (unlikely(!_req
|| !_req
->complete
|| !_req
->buf
))
1159 dev
= udc_usb_ep
->dev
;
1160 ep
= udc_usb_ep
->pxa_ep
;
1165 if (unlikely(!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)) {
1166 ep_dbg(ep
, "bogus device state\n");
1170 /* iso is always one packet per request, that's the only way
1171 * we can report per-packet status. that also helps with dma.
1173 if (unlikely(EPXFERTYPE_is_ISO(ep
)
1174 && req
->req
.length
> ep
->fifo_size
))
1177 spin_lock_irqsave(&ep
->lock
, flags
);
1178 recursion_detected
= ep
->in_handle_ep
;
1180 is_first_req
= list_empty(&ep
->queue
);
1181 ep_dbg(ep
, "queue req %p(first=%s), len %d buf %p\n",
1182 _req
, is_first_req
? "yes" : "no",
1183 _req
->length
, _req
->buf
);
1186 _req
->status
= -ESHUTDOWN
;
1192 ep_err(ep
, "refusing to queue req %p (already queued)\n", req
);
1196 length
= _req
->length
;
1197 _req
->status
= -EINPROGRESS
;
1200 ep_add_request(ep
, req
);
1201 spin_unlock_irqrestore(&ep
->lock
, flags
);
1204 switch (dev
->ep0state
) {
1205 case WAIT_ACK_SET_CONF_INTERF
:
1207 ep_end_in_req(ep
, req
, NULL
);
1209 ep_err(ep
, "got a request of %d bytes while"
1210 "in state WAIT_ACK_SET_CONF_INTERF\n",
1212 ep_del_request(ep
, req
);
1218 if (!ep_is_full(ep
))
1219 if (write_ep0_fifo(ep
, req
))
1220 ep0_end_in_req(ep
, req
, NULL
);
1222 case OUT_DATA_STAGE
:
1223 if ((length
== 0) || !epout_has_pkt(ep
))
1224 if (read_ep0_fifo(ep
, req
))
1225 ep0_end_out_req(ep
, req
, NULL
);
1228 ep_err(ep
, "odd state %s to send me a request\n",
1229 EP0_STNAME(ep
->dev
));
1230 ep_del_request(ep
, req
);
1235 if (!recursion_detected
)
1242 spin_unlock_irqrestore(&ep
->lock
, flags
);
1247 * pxa_ep_dequeue - Dequeue one request
1248 * @_ep: usb endpoint
1249 * @_req: usb request
1251 * Return 0 if no error, -EINVAL or -ECONNRESET otherwise
1253 static int pxa_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
1256 struct udc_usb_ep
*udc_usb_ep
;
1257 struct pxa27x_request
*req
;
1258 unsigned long flags
;
1263 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1264 ep
= udc_usb_ep
->pxa_ep
;
1265 if (!ep
|| is_ep0(ep
))
1268 spin_lock_irqsave(&ep
->lock
, flags
);
1270 /* make sure it's actually queued on this endpoint */
1271 list_for_each_entry(req
, &ep
->queue
, queue
) {
1272 if (&req
->req
== _req
) {
1278 spin_unlock_irqrestore(&ep
->lock
, flags
);
1280 req_done(ep
, req
, -ECONNRESET
, NULL
);
1285 * pxa_ep_set_halt - Halts operations on one endpoint
1286 * @_ep: usb endpoint
1289 * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise
1291 static int pxa_ep_set_halt(struct usb_ep
*_ep
, int value
)
1294 struct udc_usb_ep
*udc_usb_ep
;
1295 unsigned long flags
;
1301 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1302 ep
= udc_usb_ep
->pxa_ep
;
1303 if (!ep
|| is_ep0(ep
))
1308 * This path (reset toggle+halt) is needed to implement
1309 * SET_INTERFACE on normal hardware. but it can't be
1310 * done from software on the PXA UDC, and the hardware
1311 * forgets to do it as part of SET_INTERFACE automagic.
1313 ep_dbg(ep
, "only host can clear halt\n");
1317 spin_lock_irqsave(&ep
->lock
, flags
);
1320 if (ep
->dir_in
&& (ep_is_full(ep
) || !list_empty(&ep
->queue
)))
1323 /* FST, FEF bits are the same for control and non control endpoints */
1325 ep_write_UDCCSR(ep
, UDCCSR_FST
| UDCCSR_FEF
);
1327 set_ep0state(ep
->dev
, STALL
);
1330 spin_unlock_irqrestore(&ep
->lock
, flags
);
1335 * pxa_ep_fifo_status - Get how many bytes in physical endpoint
1336 * @_ep: usb endpoint
1338 * Returns number of bytes in OUT fifos. Broken for IN fifos.
1340 static int pxa_ep_fifo_status(struct usb_ep
*_ep
)
1343 struct udc_usb_ep
*udc_usb_ep
;
1347 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1348 ep
= udc_usb_ep
->pxa_ep
;
1349 if (!ep
|| is_ep0(ep
))
1354 if (ep
->dev
->gadget
.speed
== USB_SPEED_UNKNOWN
|| ep_is_empty(ep
))
1357 return ep_count_bytes_remain(ep
) + 1;
1361 * pxa_ep_fifo_flush - Flushes one endpoint
1362 * @_ep: usb endpoint
1364 * Discards all data in one endpoint(IN or OUT), except control endpoint.
1366 static void pxa_ep_fifo_flush(struct usb_ep
*_ep
)
1369 struct udc_usb_ep
*udc_usb_ep
;
1370 unsigned long flags
;
1374 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1375 ep
= udc_usb_ep
->pxa_ep
;
1376 if (!ep
|| is_ep0(ep
))
1379 spin_lock_irqsave(&ep
->lock
, flags
);
1381 if (unlikely(!list_empty(&ep
->queue
)))
1382 ep_dbg(ep
, "called while queue list not empty\n");
1383 ep_dbg(ep
, "called\n");
1385 /* for OUT, just read and discard the FIFO contents. */
1387 while (!ep_is_empty(ep
))
1388 udc_ep_readl(ep
, UDCDR
);
1390 /* most IN status is the same, but ISO can't stall */
1392 UDCCSR_PC
| UDCCSR_FEF
| UDCCSR_TRN
1393 | (EPXFERTYPE_is_ISO(ep
) ? 0 : UDCCSR_SST
));
1396 spin_unlock_irqrestore(&ep
->lock
, flags
);
1402 * pxa_ep_enable - Enables usb endpoint
1403 * @_ep: usb endpoint
1404 * @desc: usb endpoint descriptor
1406 * Nothing much to do here, as ep configuration is done once and for all
1407 * before udc is enabled. After udc enable, no physical endpoint configuration
1409 * Function makes sanity checks and flushes the endpoint.
1411 static int pxa_ep_enable(struct usb_ep
*_ep
,
1412 const struct usb_endpoint_descriptor
*desc
)
1415 struct udc_usb_ep
*udc_usb_ep
;
1416 struct pxa_udc
*udc
;
1421 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1422 if (udc_usb_ep
->pxa_ep
) {
1423 ep
= udc_usb_ep
->pxa_ep
;
1424 ep_warn(ep
, "usb_ep %s already enabled, doing nothing\n",
1427 ep
= find_pxa_ep(udc_usb_ep
->dev
, udc_usb_ep
);
1430 if (!ep
|| is_ep0(ep
)) {
1431 dev_err(udc_usb_ep
->dev
->dev
,
1432 "unable to match pxa_ep for ep %s\n",
1437 if ((desc
->bDescriptorType
!= USB_DT_ENDPOINT
)
1438 || (ep
->type
!= usb_endpoint_type(desc
))) {
1439 ep_err(ep
, "type mismatch\n");
1443 if (ep
->fifo_size
< le16_to_cpu(desc
->wMaxPacketSize
)) {
1444 ep_err(ep
, "bad maxpacket\n");
1448 udc_usb_ep
->pxa_ep
= ep
;
1451 if (!udc
->driver
|| udc
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
1452 ep_err(ep
, "bogus device state\n");
1458 /* flush fifo (mostly for OUT buffers) */
1459 pxa_ep_fifo_flush(_ep
);
1461 ep_dbg(ep
, "enabled\n");
1466 * pxa_ep_disable - Disable usb endpoint
1467 * @_ep: usb endpoint
1469 * Same as for pxa_ep_enable, no physical endpoint configuration can be
1471 * Function flushes the endpoint and related requests.
1473 static int pxa_ep_disable(struct usb_ep
*_ep
)
1476 struct udc_usb_ep
*udc_usb_ep
;
1481 udc_usb_ep
= container_of(_ep
, struct udc_usb_ep
, usb_ep
);
1482 ep
= udc_usb_ep
->pxa_ep
;
1483 if (!ep
|| is_ep0(ep
) || !list_empty(&ep
->queue
))
1487 nuke(ep
, -ESHUTDOWN
);
1489 pxa_ep_fifo_flush(_ep
);
1490 udc_usb_ep
->pxa_ep
= NULL
;
1492 ep_dbg(ep
, "disabled\n");
1496 static struct usb_ep_ops pxa_ep_ops
= {
1497 .enable
= pxa_ep_enable
,
1498 .disable
= pxa_ep_disable
,
1500 .alloc_request
= pxa_ep_alloc_request
,
1501 .free_request
= pxa_ep_free_request
,
1503 .queue
= pxa_ep_queue
,
1504 .dequeue
= pxa_ep_dequeue
,
1506 .set_halt
= pxa_ep_set_halt
,
1507 .fifo_status
= pxa_ep_fifo_status
,
1508 .fifo_flush
= pxa_ep_fifo_flush
,
1512 * dplus_pullup - Connect or disconnect pullup resistor to D+ pin
1514 * @on: 0 if disconnect pullup resistor, 1 otherwise
1517 * Handle D+ pullup resistor, make the device visible to the usb bus, and
1518 * declare it as a full speed usb device
1520 static void dplus_pullup(struct pxa_udc
*udc
, int on
)
1523 if (gpio_is_valid(udc
->mach
->gpio_pullup
))
1524 gpio_set_value(udc
->mach
->gpio_pullup
,
1525 !udc
->mach
->gpio_pullup_inverted
);
1526 if (udc
->mach
->udc_command
)
1527 udc
->mach
->udc_command(PXA2XX_UDC_CMD_CONNECT
);
1529 if (gpio_is_valid(udc
->mach
->gpio_pullup
))
1530 gpio_set_value(udc
->mach
->gpio_pullup
,
1531 udc
->mach
->gpio_pullup_inverted
);
1532 if (udc
->mach
->udc_command
)
1533 udc
->mach
->udc_command(PXA2XX_UDC_CMD_DISCONNECT
);
1535 udc
->pullup_on
= on
;
1539 * pxa_udc_get_frame - Returns usb frame number
1540 * @_gadget: usb gadget
1542 static int pxa_udc_get_frame(struct usb_gadget
*_gadget
)
1544 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1546 return (udc_readl(udc
, UDCFNR
) & 0x7ff);
1550 * pxa_udc_wakeup - Force udc device out of suspend
1551 * @_gadget: usb gadget
1553 * Returns 0 if successfull, error code otherwise
1555 static int pxa_udc_wakeup(struct usb_gadget
*_gadget
)
1557 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1559 /* host may not have enabled remote wakeup */
1560 if ((udc_readl(udc
, UDCCR
) & UDCCR_DWRE
) == 0)
1561 return -EHOSTUNREACH
;
1562 udc_set_mask_UDCCR(udc
, UDCCR_UDR
);
1566 static void udc_enable(struct pxa_udc
*udc
);
1567 static void udc_disable(struct pxa_udc
*udc
);
1570 * should_enable_udc - Tells if UDC should be enabled
1574 * The UDC should be enabled if :
1576 * - the pullup resistor is connected
1577 * - and a gadget driver is bound
1578 * - and vbus is sensed (or no vbus sense is available)
1580 * Returns 1 if UDC should be enabled, 0 otherwise
1582 static int should_enable_udc(struct pxa_udc
*udc
)
1586 put_on
= ((udc
->pullup_on
) && (udc
->driver
));
1587 put_on
&= ((udc
->vbus_sensed
) || (!udc
->transceiver
));
1592 * should_disable_udc - Tells if UDC should be disabled
1596 * The UDC should be disabled if :
1597 * - the pullup resistor is not connected
1598 * - or no gadget driver is bound
1599 * - or no vbus is sensed (when vbus sesing is available)
1601 * Returns 1 if UDC should be disabled
1603 static int should_disable_udc(struct pxa_udc
*udc
)
1607 put_off
= ((!udc
->pullup_on
) || (!udc
->driver
));
1608 put_off
|= ((!udc
->vbus_sensed
) && (udc
->transceiver
));
1613 * pxa_udc_pullup - Offer manual D+ pullup control
1614 * @_gadget: usb gadget using the control
1615 * @is_active: 0 if disconnect, else connect D+ pullup resistor
1616 * Context: !in_interrupt()
1618 * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
1620 static int pxa_udc_pullup(struct usb_gadget
*_gadget
, int is_active
)
1622 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1624 if (!gpio_is_valid(udc
->mach
->gpio_pullup
) && !udc
->mach
->udc_command
)
1627 dplus_pullup(udc
, is_active
);
1629 if (should_enable_udc(udc
))
1631 if (should_disable_udc(udc
))
1636 static void udc_enable(struct pxa_udc
*udc
);
1637 static void udc_disable(struct pxa_udc
*udc
);
1640 * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
1641 * @_gadget: usb gadget
1642 * @is_active: 0 if should disable the udc, 1 if should enable
1644 * Enables the udc, and optionnaly activates D+ pullup resistor. Or disables the
1645 * udc, and deactivates D+ pullup resistor.
1649 static int pxa_udc_vbus_session(struct usb_gadget
*_gadget
, int is_active
)
1651 struct pxa_udc
*udc
= to_gadget_udc(_gadget
);
1653 udc
->vbus_sensed
= is_active
;
1654 if (should_enable_udc(udc
))
1656 if (should_disable_udc(udc
))
1663 * pxa_udc_vbus_draw - Called by gadget driver after SET_CONFIGURATION completed
1664 * @_gadget: usb gadget
1665 * @mA: current drawn
1667 * Context: !in_interrupt()
1669 * Called after a configuration was chosen by a USB host, to inform how much
1670 * current can be drawn by the device from VBus line.
1672 * Returns 0 or -EOPNOTSUPP if no transceiver is handling the udc
1674 static int pxa_udc_vbus_draw(struct usb_gadget
*_gadget
, unsigned mA
)
1676 struct pxa_udc
*udc
;
1678 udc
= to_gadget_udc(_gadget
);
1679 if (udc
->transceiver
)
1680 return otg_set_power(udc
->transceiver
, mA
);
1684 static const struct usb_gadget_ops pxa_udc_ops
= {
1685 .get_frame
= pxa_udc_get_frame
,
1686 .wakeup
= pxa_udc_wakeup
,
1687 .pullup
= pxa_udc_pullup
,
1688 .vbus_session
= pxa_udc_vbus_session
,
1689 .vbus_draw
= pxa_udc_vbus_draw
,
1693 * udc_disable - disable udc device controller
1697 * Disables the udc device : disables clocks, udc interrupts, control endpoint
1700 static void udc_disable(struct pxa_udc
*udc
)
1705 udc_writel(udc
, UDCICR0
, 0);
1706 udc_writel(udc
, UDCICR1
, 0);
1708 udc_clear_mask_UDCCR(udc
, UDCCR_UDE
);
1709 clk_disable(udc
->clk
);
1712 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1718 * udc_init_data - Initialize udc device data structures
1721 * Initializes gadget endpoint list, endpoints locks. No action is taken
1724 static __init
void udc_init_data(struct pxa_udc
*dev
)
1729 /* device/ep0 records init */
1730 INIT_LIST_HEAD(&dev
->gadget
.ep_list
);
1731 INIT_LIST_HEAD(&dev
->gadget
.ep0
->ep_list
);
1732 dev
->udc_usb_ep
[0].pxa_ep
= &dev
->pxa_ep
[0];
1735 /* PXA endpoints init */
1736 for (i
= 0; i
< NR_PXA_ENDPOINTS
; i
++) {
1737 ep
= &dev
->pxa_ep
[i
];
1739 ep
->enabled
= is_ep0(ep
);
1740 INIT_LIST_HEAD(&ep
->queue
);
1741 spin_lock_init(&ep
->lock
);
1744 /* USB endpoints init */
1745 for (i
= 1; i
< NR_USB_ENDPOINTS
; i
++)
1746 list_add_tail(&dev
->udc_usb_ep
[i
].usb_ep
.ep_list
,
1747 &dev
->gadget
.ep_list
);
1751 * udc_enable - Enables the udc device
1754 * Enables the udc device : enables clocks, udc interrupts, control endpoint
1755 * interrupts, sets usb as UDC client and setups endpoints.
1757 static void udc_enable(struct pxa_udc
*udc
)
1762 udc_writel(udc
, UDCICR0
, 0);
1763 udc_writel(udc
, UDCICR1
, 0);
1764 udc_clear_mask_UDCCR(udc
, UDCCR_UDE
);
1766 clk_enable(udc
->clk
);
1769 udc
->gadget
.speed
= USB_SPEED_FULL
;
1770 memset(&udc
->stats
, 0, sizeof(udc
->stats
));
1772 udc_set_mask_UDCCR(udc
, UDCCR_UDE
);
1773 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_ACM
);
1775 if (udc_readl(udc
, UDCCR
) & UDCCR_EMCE
)
1776 dev_err(udc
->dev
, "Configuration errors, udc disabled\n");
1779 * Caller must be able to sleep in order to cope with startup transients
1783 /* enable suspend/resume and reset irqs */
1784 udc_writel(udc
, UDCICR1
,
1785 UDCICR1_IECC
| UDCICR1_IERU
1786 | UDCICR1_IESU
| UDCICR1_IERS
);
1788 /* enable ep0 irqs */
1789 pio_irq_enable(&udc
->pxa_ep
[0]);
1795 * usb_gadget_register_driver - Register gadget driver
1796 * @driver: gadget driver
1798 * When a driver is successfully registered, it will receive control requests
1799 * including set_configuration(), which enables non-control requests. Then
1800 * usb traffic follows until a disconnect is reported. Then a host may connect
1801 * again, or the driver might get unbound.
1803 * Note that the udc is not automatically enabled. Check function
1804 * should_enable_udc().
1806 * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise
1808 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
1810 struct pxa_udc
*udc
= the_controller
;
1813 if (!driver
|| driver
->speed
< USB_SPEED_FULL
|| !driver
->bind
1814 || !driver
->disconnect
|| !driver
->setup
)
1821 /* first hook up the driver ... */
1822 udc
->driver
= driver
;
1823 udc
->gadget
.dev
.driver
= &driver
->driver
;
1824 dplus_pullup(udc
, 1);
1826 retval
= device_add(&udc
->gadget
.dev
);
1828 dev_err(udc
->dev
, "device_add error %d\n", retval
);
1831 retval
= driver
->bind(&udc
->gadget
);
1833 dev_err(udc
->dev
, "bind to driver %s --> error %d\n",
1834 driver
->driver
.name
, retval
);
1837 dev_dbg(udc
->dev
, "registered gadget driver '%s'\n",
1838 driver
->driver
.name
);
1840 if (udc
->transceiver
) {
1841 retval
= otg_set_peripheral(udc
->transceiver
, &udc
->gadget
);
1843 dev_err(udc
->dev
, "can't bind to transceiver\n");
1844 goto transceiver_fail
;
1848 if (should_enable_udc(udc
))
1854 driver
->unbind(&udc
->gadget
);
1856 device_del(&udc
->gadget
.dev
);
1859 udc
->gadget
.dev
.driver
= NULL
;
1862 EXPORT_SYMBOL(usb_gadget_register_driver
);
1866 * stop_activity - Stops udc endpoints
1868 * @driver: gadget driver
1870 * Disables all udc endpoints (even control endpoint), report disconnect to
1873 static void stop_activity(struct pxa_udc
*udc
, struct usb_gadget_driver
*driver
)
1877 /* don't disconnect drivers more than once */
1878 if (udc
->gadget
.speed
== USB_SPEED_UNKNOWN
)
1880 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1882 for (i
= 0; i
< NR_USB_ENDPOINTS
; i
++)
1883 pxa_ep_disable(&udc
->udc_usb_ep
[i
].usb_ep
);
1886 driver
->disconnect(&udc
->gadget
);
1890 * usb_gadget_unregister_driver - Unregister the gadget driver
1891 * @driver: gadget driver
1893 * Returns 0 if no error, -ENODEV, -EINVAL otherwise
1895 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
1897 struct pxa_udc
*udc
= the_controller
;
1901 if (!driver
|| driver
!= udc
->driver
|| !driver
->unbind
)
1904 stop_activity(udc
, driver
);
1906 dplus_pullup(udc
, 0);
1908 driver
->unbind(&udc
->gadget
);
1911 device_del(&udc
->gadget
.dev
);
1912 dev_info(udc
->dev
, "unregistered gadget driver '%s'\n",
1913 driver
->driver
.name
);
1915 if (udc
->transceiver
)
1916 return otg_set_peripheral(udc
->transceiver
, NULL
);
1919 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
1922 * handle_ep0_ctrl_req - handle control endpoint control request
1924 * @req: control request
1926 static void handle_ep0_ctrl_req(struct pxa_udc
*udc
,
1927 struct pxa27x_request
*req
)
1929 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
1931 struct usb_ctrlrequest r
;
1935 int have_extrabytes
= 0;
1936 unsigned long flags
;
1939 spin_lock_irqsave(&ep
->lock
, flags
);
1942 * In the PXA320 manual, in the section about Back-to-Back setup
1943 * packets, it describes this situation. The solution is to set OPC to
1944 * get rid of the status packet, and then continue with the setup
1945 * packet. Generalize to pxa27x CPUs.
1947 if (epout_has_pkt(ep
) && (ep_count_bytes_remain(ep
) == 0))
1948 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
1950 /* read SETUP packet */
1951 for (i
= 0; i
< 2; i
++) {
1952 if (unlikely(ep_is_empty(ep
)))
1954 u
.word
[i
] = udc_ep_readl(ep
, UDCDR
);
1957 have_extrabytes
= !ep_is_empty(ep
);
1958 while (!ep_is_empty(ep
)) {
1959 i
= udc_ep_readl(ep
, UDCDR
);
1960 ep_err(ep
, "wrong to have extra bytes for setup : 0x%08x\n", i
);
1963 ep_dbg(ep
, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1964 u
.r
.bRequestType
, u
.r
.bRequest
,
1965 le16_to_cpu(u
.r
.wValue
), le16_to_cpu(u
.r
.wIndex
),
1966 le16_to_cpu(u
.r
.wLength
));
1967 if (unlikely(have_extrabytes
))
1970 if (u
.r
.bRequestType
& USB_DIR_IN
)
1971 set_ep0state(udc
, IN_DATA_STAGE
);
1973 set_ep0state(udc
, OUT_DATA_STAGE
);
1975 /* Tell UDC to enter Data Stage */
1976 ep_write_UDCCSR(ep
, UDCCSR0_SA
| UDCCSR0_OPC
);
1978 spin_unlock_irqrestore(&ep
->lock
, flags
);
1979 i
= udc
->driver
->setup(&udc
->gadget
, &u
.r
);
1980 spin_lock_irqsave(&ep
->lock
, flags
);
1984 spin_unlock_irqrestore(&ep
->lock
, flags
);
1987 ep_dbg(ep
, "protocol STALL, udccsr0=%03x err %d\n",
1988 udc_ep_readl(ep
, UDCCSR
), i
);
1989 ep_write_UDCCSR(ep
, UDCCSR0_FST
| UDCCSR0_FTF
);
1990 set_ep0state(udc
, STALL
);
1995 * handle_ep0 - Handle control endpoint data transfers
1997 * @fifo_irq: 1 if triggered by fifo service type irq
1998 * @opc_irq: 1 if triggered by output packet complete type irq
2000 * Context : when in_interrupt() or with ep->lock held
2002 * Tries to transfer all pending request data into the endpoint and/or
2003 * transfer all pending data in the endpoint into usb requests.
2004 * Handles states of ep0 automata.
2006 * PXA27x hardware handles several standard usb control requests without
2007 * driver notification. The requests fully handled by hardware are :
2008 * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE,
2010 * The requests handled by hardware, but with irq notification are :
2011 * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE
2012 * The remaining standard requests really handled by handle_ep0 are :
2013 * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests.
2014 * Requests standardized outside of USB 2.0 chapter 9 are handled more
2015 * uniformly, by gadget drivers.
2017 * The control endpoint state machine is _not_ USB spec compliant, it's even
2018 * hardly compliant with Intel PXA270 developers guide.
2019 * The key points which inferred this state machine are :
2020 * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by
2022 * - on every OUT packet received, UDCCSR0_OPC is raised and held until
2023 * cleared by software.
2024 * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it
2025 * before reading ep0.
2026 * This is true only for PXA27x. This is not true anymore for PXA3xx family
2027 * (check Back-to-Back setup packet in developers guide).
2028 * - irq can be called on a "packet complete" event (opc_irq=1), while
2029 * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms
2030 * from experimentation).
2031 * - as UDCCSR0_SA can be activated while in irq handling, and clearing
2032 * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC
2033 * => we never actually read the "status stage" packet of an IN data stage
2034 * => this is not documented in Intel documentation
2035 * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA
2036 * STAGE. The driver add STATUS STAGE to send last zero length packet in
2038 * - special attention was needed for IN_STATUS_STAGE. If a packet complete
2039 * event is detected, we terminate the status stage without ackowledging the
2040 * packet (not to risk to loose a potential SETUP packet)
2042 static void handle_ep0(struct pxa_udc
*udc
, int fifo_irq
, int opc_irq
)
2045 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
2046 struct pxa27x_request
*req
= NULL
;
2049 if (!list_empty(&ep
->queue
))
2050 req
= list_entry(ep
->queue
.next
, struct pxa27x_request
, queue
);
2052 udccsr0
= udc_ep_readl(ep
, UDCCSR
);
2053 ep_dbg(ep
, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2054 EP0_STNAME(udc
), req
, udccsr0
, udc_ep_readl(ep
, UDCBCR
),
2055 (fifo_irq
<< 1 | opc_irq
));
2057 if (udccsr0
& UDCCSR0_SST
) {
2058 ep_dbg(ep
, "clearing stall status\n");
2060 ep_write_UDCCSR(ep
, UDCCSR0_SST
);
2064 if (udccsr0
& UDCCSR0_SA
) {
2066 set_ep0state(udc
, SETUP_STAGE
);
2069 switch (udc
->ep0state
) {
2070 case WAIT_FOR_SETUP
:
2072 * Hardware bug : beware, we cannot clear OPC, since we would
2073 * miss a potential OPC irq for a setup packet.
2074 * So, we only do ... nothing, and hope for a next irq with
2079 udccsr0
&= UDCCSR0_CTRL_REQ_MASK
;
2080 if (likely(udccsr0
== UDCCSR0_CTRL_REQ_MASK
))
2081 handle_ep0_ctrl_req(udc
, req
);
2083 case IN_DATA_STAGE
: /* GET_DESCRIPTOR */
2084 if (epout_has_pkt(ep
))
2085 ep_write_UDCCSR(ep
, UDCCSR0_OPC
);
2086 if (req
&& !ep_is_full(ep
))
2087 completed
= write_ep0_fifo(ep
, req
);
2089 ep0_end_in_req(ep
, req
, NULL
);
2091 case OUT_DATA_STAGE
: /* SET_DESCRIPTOR */
2092 if (epout_has_pkt(ep
) && req
)
2093 completed
= read_ep0_fifo(ep
, req
);
2095 ep0_end_out_req(ep
, req
, NULL
);
2098 ep_write_UDCCSR(ep
, UDCCSR0_FST
);
2100 case IN_STATUS_STAGE
:
2102 * Hardware bug : beware, we cannot clear OPC, since we would
2103 * miss a potential PC irq for a setup packet.
2104 * So, we only put the ep0 into WAIT_FOR_SETUP state.
2109 case OUT_STATUS_STAGE
:
2110 case WAIT_ACK_SET_CONF_INTERF
:
2111 ep_warn(ep
, "should never get in %s state here!!!\n",
2112 EP0_STNAME(ep
->dev
));
2119 * handle_ep - Handle endpoint data tranfers
2120 * @ep: pxa physical endpoint
2122 * Tries to transfer all pending request data into the endpoint and/or
2123 * transfer all pending data in the endpoint into usb requests.
2125 * Is always called when in_interrupt() and with ep->lock released.
2127 static void handle_ep(struct pxa_ep
*ep
)
2129 struct pxa27x_request
*req
;
2132 int is_in
= ep
->dir_in
;
2134 unsigned long flags
;
2136 spin_lock_irqsave(&ep
->lock
, flags
);
2137 if (ep
->in_handle_ep
)
2138 goto recursion_detected
;
2139 ep
->in_handle_ep
= 1;
2143 udccsr
= udc_ep_readl(ep
, UDCCSR
);
2145 if (likely(!list_empty(&ep
->queue
)))
2146 req
= list_entry(ep
->queue
.next
,
2147 struct pxa27x_request
, queue
);
2151 ep_dbg(ep
, "req:%p, udccsr 0x%03x loop=%d\n",
2152 req
, udccsr
, loop
++);
2154 if (unlikely(udccsr
& (UDCCSR_SST
| UDCCSR_TRN
)))
2155 udc_ep_writel(ep
, UDCCSR
,
2156 udccsr
& (UDCCSR_SST
| UDCCSR_TRN
));
2160 if (unlikely(is_in
)) {
2161 if (likely(!ep_is_full(ep
)))
2162 completed
= write_fifo(ep
, req
);
2164 if (likely(epout_has_pkt(ep
)))
2165 completed
= read_fifo(ep
, req
);
2170 ep_end_in_req(ep
, req
, &flags
);
2172 ep_end_out_req(ep
, req
, &flags
);
2174 } while (completed
);
2176 ep
->in_handle_ep
= 0;
2178 spin_unlock_irqrestore(&ep
->lock
, flags
);
2182 * pxa27x_change_configuration - Handle SET_CONF usb request notification
2184 * @config: usb configuration
2186 * Post the request to upper level.
2187 * Don't use any pxa specific harware configuration capabilities
2189 static void pxa27x_change_configuration(struct pxa_udc
*udc
, int config
)
2191 struct usb_ctrlrequest req
;
2193 dev_dbg(udc
->dev
, "config=%d\n", config
);
2195 udc
->config
= config
;
2196 udc
->last_interface
= 0;
2197 udc
->last_alternate
= 0;
2199 req
.bRequestType
= 0;
2200 req
.bRequest
= USB_REQ_SET_CONFIGURATION
;
2201 req
.wValue
= config
;
2205 set_ep0state(udc
, WAIT_ACK_SET_CONF_INTERF
);
2206 udc
->driver
->setup(&udc
->gadget
, &req
);
2207 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_AREN
);
2211 * pxa27x_change_interface - Handle SET_INTERF usb request notification
2213 * @iface: interface number
2214 * @alt: alternate setting number
2216 * Post the request to upper level.
2217 * Don't use any pxa specific harware configuration capabilities
2219 static void pxa27x_change_interface(struct pxa_udc
*udc
, int iface
, int alt
)
2221 struct usb_ctrlrequest req
;
2223 dev_dbg(udc
->dev
, "interface=%d, alternate setting=%d\n", iface
, alt
);
2225 udc
->last_interface
= iface
;
2226 udc
->last_alternate
= alt
;
2228 req
.bRequestType
= USB_RECIP_INTERFACE
;
2229 req
.bRequest
= USB_REQ_SET_INTERFACE
;
2234 set_ep0state(udc
, WAIT_ACK_SET_CONF_INTERF
);
2235 udc
->driver
->setup(&udc
->gadget
, &req
);
2236 ep_write_UDCCSR(&udc
->pxa_ep
[0], UDCCSR0_AREN
);
2240 * irq_handle_data - Handle data transfer
2241 * @irq: irq IRQ number
2242 * @udc: dev pxa_udc device structure
2244 * Called from irq handler, transferts data to or from endpoint to queue
2246 static void irq_handle_data(int irq
, struct pxa_udc
*udc
)
2250 u32 udcisr0
= udc_readl(udc
, UDCISR0
) & UDCCISR0_EP_MASK
;
2251 u32 udcisr1
= udc_readl(udc
, UDCISR1
) & UDCCISR1_EP_MASK
;
2253 if (udcisr0
& UDCISR_INT_MASK
) {
2254 udc
->pxa_ep
[0].stats
.irqs
++;
2255 udc_writel(udc
, UDCISR0
, UDCISR_INT(0, UDCISR_INT_MASK
));
2256 handle_ep0(udc
, !!(udcisr0
& UDCICR_FIFOERR
),
2257 !!(udcisr0
& UDCICR_PKTCOMPL
));
2261 for (i
= 1; udcisr0
!= 0 && i
< 16; udcisr0
>>= 2, i
++) {
2262 if (!(udcisr0
& UDCISR_INT_MASK
))
2265 udc_writel(udc
, UDCISR0
, UDCISR_INT(i
, UDCISR_INT_MASK
));
2267 WARN_ON(i
>= ARRAY_SIZE(udc
->pxa_ep
));
2268 if (i
< ARRAY_SIZE(udc
->pxa_ep
)) {
2269 ep
= &udc
->pxa_ep
[i
];
2275 for (i
= 16; udcisr1
!= 0 && i
< 24; udcisr1
>>= 2, i
++) {
2276 udc_writel(udc
, UDCISR1
, UDCISR_INT(i
- 16, UDCISR_INT_MASK
));
2277 if (!(udcisr1
& UDCISR_INT_MASK
))
2280 WARN_ON(i
>= ARRAY_SIZE(udc
->pxa_ep
));
2281 if (i
< ARRAY_SIZE(udc
->pxa_ep
)) {
2282 ep
= &udc
->pxa_ep
[i
];
2291 * irq_udc_suspend - Handle IRQ "UDC Suspend"
2294 static void irq_udc_suspend(struct pxa_udc
*udc
)
2296 udc_writel(udc
, UDCISR1
, UDCISR1_IRSU
);
2297 udc
->stats
.irqs_suspend
++;
2299 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
2300 && udc
->driver
&& udc
->driver
->suspend
)
2301 udc
->driver
->suspend(&udc
->gadget
);
2306 * irq_udc_resume - Handle IRQ "UDC Resume"
2309 static void irq_udc_resume(struct pxa_udc
*udc
)
2311 udc_writel(udc
, UDCISR1
, UDCISR1_IRRU
);
2312 udc
->stats
.irqs_resume
++;
2314 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
2315 && udc
->driver
&& udc
->driver
->resume
)
2316 udc
->driver
->resume(&udc
->gadget
);
2320 * irq_udc_reconfig - Handle IRQ "UDC Change Configuration"
2323 static void irq_udc_reconfig(struct pxa_udc
*udc
)
2325 unsigned config
, interface
, alternate
, config_change
;
2326 u32 udccr
= udc_readl(udc
, UDCCR
);
2328 udc_writel(udc
, UDCISR1
, UDCISR1_IRCC
);
2329 udc
->stats
.irqs_reconfig
++;
2331 config
= (udccr
& UDCCR_ACN
) >> UDCCR_ACN_S
;
2332 config_change
= (config
!= udc
->config
);
2333 pxa27x_change_configuration(udc
, config
);
2335 interface
= (udccr
& UDCCR_AIN
) >> UDCCR_AIN_S
;
2336 alternate
= (udccr
& UDCCR_AAISN
) >> UDCCR_AAISN_S
;
2337 pxa27x_change_interface(udc
, interface
, alternate
);
2340 update_pxa_ep_matches(udc
);
2341 udc_set_mask_UDCCR(udc
, UDCCR_SMAC
);
2345 * irq_udc_reset - Handle IRQ "UDC Reset"
2348 static void irq_udc_reset(struct pxa_udc
*udc
)
2350 u32 udccr
= udc_readl(udc
, UDCCR
);
2351 struct pxa_ep
*ep
= &udc
->pxa_ep
[0];
2353 dev_info(udc
->dev
, "USB reset\n");
2354 udc_writel(udc
, UDCISR1
, UDCISR1_IRRS
);
2355 udc
->stats
.irqs_reset
++;
2357 if ((udccr
& UDCCR_UDA
) == 0) {
2358 dev_dbg(udc
->dev
, "USB reset start\n");
2359 stop_activity(udc
, udc
->driver
);
2361 udc
->gadget
.speed
= USB_SPEED_FULL
;
2362 memset(&udc
->stats
, 0, sizeof udc
->stats
);
2365 ep_write_UDCCSR(ep
, UDCCSR0_FTF
| UDCCSR0_OPC
);
2370 * pxa_udc_irq - Main irq handler
2374 * Handles all udc interrupts
2376 static irqreturn_t
pxa_udc_irq(int irq
, void *_dev
)
2378 struct pxa_udc
*udc
= _dev
;
2379 u32 udcisr0
= udc_readl(udc
, UDCISR0
);
2380 u32 udcisr1
= udc_readl(udc
, UDCISR1
);
2381 u32 udccr
= udc_readl(udc
, UDCCR
);
2384 dev_vdbg(udc
->dev
, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2385 "UDCCR:0x%08x\n", udcisr0
, udcisr1
, udccr
);
2387 udcisr1_spec
= udcisr1
& 0xf8000000;
2388 if (unlikely(udcisr1_spec
& UDCISR1_IRSU
))
2389 irq_udc_suspend(udc
);
2390 if (unlikely(udcisr1_spec
& UDCISR1_IRRU
))
2391 irq_udc_resume(udc
);
2392 if (unlikely(udcisr1_spec
& UDCISR1_IRCC
))
2393 irq_udc_reconfig(udc
);
2394 if (unlikely(udcisr1_spec
& UDCISR1_IRRS
))
2397 if ((udcisr0
& UDCCISR0_EP_MASK
) | (udcisr1
& UDCCISR1_EP_MASK
))
2398 irq_handle_data(irq
, udc
);
2403 static struct pxa_udc memory
= {
2405 .ops
= &pxa_udc_ops
,
2406 .ep0
= &memory
.udc_usb_ep
[0].usb_ep
,
2407 .name
= driver_name
,
2409 .init_name
= "gadget",
2424 /* Endpoints for gadget zero */
2425 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2426 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2427 /* Endpoints for ether gadget, file storage gadget */
2428 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2429 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2430 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2431 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2432 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2433 /* Endpoints for RNDIS, serial */
2434 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2435 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2436 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2438 * All the following endpoints are only for completion. They
2439 * won't never work, as multiple interfaces are really broken on
2442 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2443 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2444 /* Endpoint for CDC Ether */
2445 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2446 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2451 * pxa_udc_probe - probes the udc device
2452 * @_dev: platform device
2454 * Perform basic init : allocates udc clock, creates sysfs files, requests
2457 static int __init
pxa_udc_probe(struct platform_device
*pdev
)
2459 struct resource
*regs
;
2460 struct pxa_udc
*udc
= &memory
;
2461 int retval
= 0, gpio
;
2463 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2466 udc
->irq
= platform_get_irq(pdev
, 0);
2470 udc
->dev
= &pdev
->dev
;
2471 udc
->mach
= pdev
->dev
.platform_data
;
2472 udc
->transceiver
= otg_get_transceiver();
2474 gpio
= udc
->mach
->gpio_pullup
;
2475 if (gpio_is_valid(gpio
)) {
2476 retval
= gpio_request(gpio
, "USB D+ pullup");
2478 gpio_direction_output(gpio
,
2479 udc
->mach
->gpio_pullup_inverted
);
2482 dev_err(&pdev
->dev
, "Couldn't request gpio %d : %d\n",
2487 udc
->clk
= clk_get(&pdev
->dev
, NULL
);
2488 if (IS_ERR(udc
->clk
)) {
2489 retval
= PTR_ERR(udc
->clk
);
2494 udc
->regs
= ioremap(regs
->start
, resource_size(regs
));
2496 dev_err(&pdev
->dev
, "Unable to map UDC I/O memory\n");
2500 device_initialize(&udc
->gadget
.dev
);
2501 udc
->gadget
.dev
.parent
= &pdev
->dev
;
2502 udc
->gadget
.dev
.dma_mask
= NULL
;
2503 udc
->vbus_sensed
= 0;
2505 the_controller
= udc
;
2506 platform_set_drvdata(pdev
, udc
);
2510 /* irq setup after old hardware state is cleaned up */
2511 retval
= request_irq(udc
->irq
, pxa_udc_irq
,
2512 IRQF_SHARED
, driver_name
, udc
);
2514 dev_err(udc
->dev
, "%s: can't get irq %i, err %d\n",
2515 driver_name
, IRQ_USB
, retval
);
2519 pxa_init_debugfs(udc
);
2531 * pxa_udc_remove - removes the udc device driver
2532 * @_dev: platform device
2534 static int __exit
pxa_udc_remove(struct platform_device
*_dev
)
2536 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2537 int gpio
= udc
->mach
->gpio_pullup
;
2539 usb_gadget_unregister_driver(udc
->driver
);
2540 free_irq(udc
->irq
, udc
);
2541 pxa_cleanup_debugfs(udc
);
2542 if (gpio_is_valid(gpio
))
2545 otg_put_transceiver(udc
->transceiver
);
2547 udc
->transceiver
= NULL
;
2548 platform_set_drvdata(_dev
, NULL
);
2549 the_controller
= NULL
;
2556 static void pxa_udc_shutdown(struct platform_device
*_dev
)
2558 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2560 if (udc_readl(udc
, UDCCR
) & UDCCR_UDE
)
2564 #ifdef CONFIG_CPU_PXA27x
2565 extern void pxa27x_clear_otgph(void);
2567 #define pxa27x_clear_otgph() do {} while (0)
2572 * pxa_udc_suspend - Suspend udc device
2573 * @_dev: platform device
2574 * @state: suspend state
2576 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2579 static int pxa_udc_suspend(struct platform_device
*_dev
, pm_message_t state
)
2582 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2585 ep
= &udc
->pxa_ep
[0];
2586 udc
->udccsr0
= udc_ep_readl(ep
, UDCCSR
);
2587 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
2588 ep
= &udc
->pxa_ep
[i
];
2589 ep
->udccsr_value
= udc_ep_readl(ep
, UDCCSR
);
2590 ep
->udccr_value
= udc_ep_readl(ep
, UDCCR
);
2591 ep_dbg(ep
, "udccsr:0x%03x, udccr:0x%x\n",
2592 ep
->udccsr_value
, ep
->udccr_value
);
2596 udc
->pullup_resume
= udc
->pullup_on
;
2597 dplus_pullup(udc
, 0);
2603 * pxa_udc_resume - Resume udc device
2604 * @_dev: platform device
2606 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2609 static int pxa_udc_resume(struct platform_device
*_dev
)
2612 struct pxa_udc
*udc
= platform_get_drvdata(_dev
);
2615 ep
= &udc
->pxa_ep
[0];
2616 udc_ep_writel(ep
, UDCCSR
, udc
->udccsr0
& (UDCCSR0_FST
| UDCCSR0_DME
));
2617 for (i
= 1; i
< NR_PXA_ENDPOINTS
; i
++) {
2618 ep
= &udc
->pxa_ep
[i
];
2619 udc_ep_writel(ep
, UDCCSR
, ep
->udccsr_value
);
2620 udc_ep_writel(ep
, UDCCR
, ep
->udccr_value
);
2621 ep_dbg(ep
, "udccsr:0x%03x, udccr:0x%x\n",
2622 ep
->udccsr_value
, ep
->udccr_value
);
2625 dplus_pullup(udc
, udc
->pullup_resume
);
2626 if (should_enable_udc(udc
))
2629 * We do not handle OTG yet.
2631 * OTGPH bit is set when sleep mode is entered.
2632 * it indicates that OTG pad is retaining its state.
2633 * Upon exit from sleep mode and before clearing OTGPH,
2634 * Software must configure the USB OTG pad, UDC, and UHC
2635 * to the state they were in before entering sleep mode.
2637 pxa27x_clear_otgph();
2643 /* work with hotplug and coldplug */
2644 MODULE_ALIAS("platform:pxa27x-udc");
2646 static struct platform_driver udc_driver
= {
2648 .name
= "pxa27x-udc",
2649 .owner
= THIS_MODULE
,
2651 .remove
= __exit_p(pxa_udc_remove
),
2652 .shutdown
= pxa_udc_shutdown
,
2654 .suspend
= pxa_udc_suspend
,
2655 .resume
= pxa_udc_resume
2659 static int __init
udc_init(void)
2661 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2664 printk(KERN_INFO
"%s: version %s\n", driver_name
, DRIVER_VERSION
);
2665 return platform_driver_probe(&udc_driver
, pxa_udc_probe
);
2667 module_init(udc_init
);
2670 static void __exit
udc_exit(void)
2672 platform_driver_unregister(&udc_driver
);
2674 module_exit(udc_exit
);
2676 MODULE_DESCRIPTION(DRIVER_DESC
);
2677 MODULE_AUTHOR("Robert Jarzmik");
2678 MODULE_LICENSE("GPL");