5 * Nothing too fancy for now.
7 * On ARM we already have well known fixed virtual addresses imposed by
8 * the architecture such as the vector page which is located at 0xffff0000,
9 * therefore a second level page table is already allocated covering
12 * The cache flushing code in proc-xscale.S uses the virtual area between
13 * 0xfffe0000 and 0xfffeffff.
16 #define FIXADDR_START 0xfff00000UL
17 #define FIXADDR_TOP 0xfffe0000UL
18 #define FIXADDR_SIZE (FIXADDR_TOP - FIXADDR_START)
20 #define FIX_KMAP_BEGIN 0
21 #define FIX_KMAP_END (FIXADDR_SIZE >> PAGE_SHIFT)
23 #define __fix_to_virt(x) (FIXADDR_START + ((x) << PAGE_SHIFT))
24 #define __virt_to_fix(x) (((x) - FIXADDR_START) >> PAGE_SHIFT)
26 extern void __this_fixmap_does_not_exist(void);
28 static inline unsigned long fix_to_virt(const unsigned int idx
)
30 if (idx
>= FIX_KMAP_END
)
31 __this_fixmap_does_not_exist();
32 return __fix_to_virt(idx
);
35 static inline unsigned int virt_to_fix(const unsigned long vaddr
)
37 BUG_ON(vaddr
>= FIXADDR_TOP
|| vaddr
< FIXADDR_START
);
38 return __virt_to_fix(vaddr
);