arch/arm/mach-omap2/powerdomain.h

   1 /*
   2  * OMAP2/3/4 powerdomain control
   3  *
   4  * Copyright (C) 2007-2008, 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2007-2011 Nokia Corporation
   6  *
   7  * Paul Walmsley
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * XXX This should be moved to the mach-omap2/ directory at the earliest
  14  * opportunity.
  15  */
  16
  17 #ifndef __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
  18 #define __ARCH_ARM_MACH_OMAP2_POWERDOMAIN_H
  19
  20 #include <linux/types.h>
  21 #include <linux/list.h>
  22
  23 #include <linux/atomic.h>
  24
  25 #include <plat/cpu.h>
  26
  27 #include "voltage.h"
  28
  29 /* Powerdomain basic power states */
  30 #define PWRDM_POWER_OFF         0x0
  31 #define PWRDM_POWER_RET         0x1
  32 #define PWRDM_POWER_INACTIVE    0x2
  33 #define PWRDM_POWER_ON          0x3
  34
  35 #define PWRDM_MAX_PWRSTS        4
  36
  37 /* Powerdomain allowable state bitfields */
  38 #define PWRSTS_ON               (1 << PWRDM_POWER_ON)
  39 #define PWRSTS_INACTIVE         (1 << PWRDM_POWER_INACTIVE)
  40 #define PWRSTS_RET              (1 << PWRDM_POWER_RET)
  41 #define PWRSTS_OFF              (1 << PWRDM_POWER_OFF)
  42
  43 #define PWRSTS_OFF_ON           (PWRSTS_OFF | PWRSTS_ON)
  44 #define PWRSTS_OFF_RET          (PWRSTS_OFF | PWRSTS_RET)
  45 #define PWRSTS_RET_ON           (PWRSTS_RET | PWRSTS_ON)
  46 #define PWRSTS_OFF_RET_ON       (PWRSTS_OFF_RET | PWRSTS_ON)
  47
  48
  49 /* Powerdomain flags */
  50 #define PWRDM_HAS_HDWR_SAR      (1 << 0) /* hardware save-and-restore support */
  51 #define PWRDM_HAS_MPU_QUIRK     (1 << 1) /* MPU pwr domain has MEM bank 0 bits
  52                                           * in MEM bank 1 position. This is
  53                                           * true for OMAP3430
  54                                           */
  55 #define PWRDM_HAS_LOWPOWERSTATECHANGE   (1 << 2) /*
  56                                                   * support to transition from a
  57                                                   * sleep state to a lower sleep
  58                                                   * state without waking up the
  59                                                   * powerdomain
  60                                                   */
  61
  62 /*
  63  * Number of memory banks that are power-controllable.  On OMAP4430, the
  64  * maximum is 5.
  65  */
  66 #define PWRDM_MAX_MEM_BANKS     5
  67
  68 /*
  69  * Maximum number of clockdomains that can be associated with a powerdomain.
  70  * CORE powerdomain on OMAP4 is the worst case
  71  */
  72 #define PWRDM_MAX_CLKDMS        9
  73
  74 /* XXX A completely arbitrary number. What is reasonable here? */
  75 #define PWRDM_TRANSITION_BAILOUT 100000
  76
  77 struct clockdomain;
  78 struct powerdomain;
  79
  80 /**
  81  * struct powerdomain - OMAP powerdomain
  82  * @name: Powerdomain name
  83  * @voltdm: voltagedomain containing this powerdomain
  84  * @prcm_offs: the address offset from CM_BASE/PRM_BASE
  85  * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
  86  * @pwrsts: Possible powerdomain power states
  87  * @pwrsts_logic_ret: Possible logic power states when pwrdm in RETENTION
  88  * @flags: Powerdomain flags
  89  * @banks: Number of software-controllable memory banks in this powerdomain
  90  * @pwrsts_mem_ret: Possible memory bank pwrstates when pwrdm in RETENTION
  91  * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
  92  * @pwrdm_clkdms: Clockdomains in this powerdomain
  93  * @node: list_head linking all powerdomains
  94  * @state:
  95  * @state_counter:
  96  * @timer:
  97  * @state_timer:
  98  *
  99  * @prcm_partition possible values are defined in mach-omap2/prcm44xx.h.
 100  */
 101 struct powerdomain {
 102         const char *name;
 103         union {
 104                 const char *name;
 105                 struct voltagedomain *ptr;
 106         } voltdm;
 107         const s16 prcm_offs;
 108         const u8 pwrsts;
 109         const u8 pwrsts_logic_ret;
 110         const u8 flags;
 111         const u8 banks;
 112         const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
 113         const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
 114         const u8 prcm_partition;
 115         struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
 116         struct list_head node;
 117         int state;
 118         unsigned state_counter[PWRDM_MAX_PWRSTS];
 119         unsigned ret_logic_off_counter;
 120         unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS];
 121
 122 #ifdef CONFIG_PM_DEBUG
 123         s64 timer;
 124         s64 state_timer[PWRDM_MAX_PWRSTS];
 125 #endif
 126 };
 127
 128 /**
 129  * struct pwrdm_ops - Arch specific function implementations
 130  * @pwrdm_set_next_pwrst: Set the target power state for a pd
 131  * @pwrdm_read_next_pwrst: Read the target power state set for a pd
 132  * @pwrdm_read_pwrst: Read the current power state of a pd
 133  * @pwrdm_read_prev_pwrst: Read the prev power state entered by the pd
 134  * @pwrdm_set_logic_retst: Set the logic state in RET for a pd
 135  * @pwrdm_set_mem_onst: Set the Memory state in ON for a pd
 136  * @pwrdm_set_mem_retst: Set the Memory state in RET for a pd
 137  * @pwrdm_read_logic_pwrst: Read the current logic state of a pd
 138  * @pwrdm_read_prev_logic_pwrst: Read the previous logic state entered by a pd
 139  * @pwrdm_read_logic_retst: Read the logic state in RET for a pd
 140  * @pwrdm_read_mem_pwrst: Read the current memory state of a pd
 141  * @pwrdm_read_prev_mem_pwrst: Read the previous memory state entered by a pd
 142  * @pwrdm_read_mem_retst: Read the memory state in RET for a pd
 143  * @pwrdm_clear_all_prev_pwrst: Clear all previous power states logged for a pd
 144  * @pwrdm_enable_hdwr_sar: Enable Hardware Save-Restore feature for the pd
 145  * @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
 146  * @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
 147  * @pwrdm_wait_transition: Wait for a pd state transition to complete
 148  */
 149 struct pwrdm_ops {
 150         int     (*pwrdm_set_next_pwrst)(struct powerdomain *pwrdm, u8 pwrst);
 151         int     (*pwrdm_read_next_pwrst)(struct powerdomain *pwrdm);
 152         int     (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
 153         int     (*pwrdm_read_prev_pwrst)(struct powerdomain *pwrdm);
 154         int     (*pwrdm_set_logic_retst)(struct powerdomain *pwrdm, u8 pwrst);
 155         int     (*pwrdm_set_mem_onst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 156         int     (*pwrdm_set_mem_retst)(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 157         int     (*pwrdm_read_logic_pwrst)(struct powerdomain *pwrdm);
 158         int     (*pwrdm_read_prev_logic_pwrst)(struct powerdomain *pwrdm);
 159         int     (*pwrdm_read_logic_retst)(struct powerdomain *pwrdm);
 160         int     (*pwrdm_read_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
 161         int     (*pwrdm_read_prev_mem_pwrst)(struct powerdomain *pwrdm, u8 bank);
 162         int     (*pwrdm_read_mem_retst)(struct powerdomain *pwrdm, u8 bank);
 163         int     (*pwrdm_clear_all_prev_pwrst)(struct powerdomain *pwrdm);
 164         int     (*pwrdm_enable_hdwr_sar)(struct powerdomain *pwrdm);
 165         int     (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
 166         int     (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
 167         int     (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
 168 };
 169
 170 int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
 171 int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
 172 int pwrdm_complete_init(void);
 173
 174 struct powerdomain *pwrdm_lookup(const char *name);
 175
 176 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
 177                         void *user);
 178 int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
 179                         void *user);
 180
 181 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 182 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 183 int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
 184                          int (*fn)(struct powerdomain *pwrdm,
 185                                    struct clockdomain *clkdm));
 186
 187 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
 188
 189 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
 190 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
 191 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
 192 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
 193 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
 194
 195 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
 196 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 197 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
 198
 199 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
 200 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
 201 int pwrdm_read_logic_retst(struct powerdomain *pwrdm);
 202 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 203 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
 204 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
 205
 206 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
 207 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
 208 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 209
 210 int pwrdm_wait_transition(struct powerdomain *pwrdm);
 211
 212 int pwrdm_state_switch(struct powerdomain *pwrdm);
 213 int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
 214 int pwrdm_pre_transition(void);
 215 int pwrdm_post_transition(void);
 216 int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 217 u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 218 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
 219
 220 extern void omap242x_powerdomains_init(void);
 221 extern void omap243x_powerdomains_init(void);
 222 extern void omap3xxx_powerdomains_init(void);
 223 extern void omap44xx_powerdomains_init(void);
 224
 225 extern struct pwrdm_ops omap2_pwrdm_operations;
 226 extern struct pwrdm_ops omap3_pwrdm_operations;
 227 extern struct pwrdm_ops omap4_pwrdm_operations;
 228
 229 /* Common Internal functions used across OMAP rev's */
 230 extern u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank);
 231 extern u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank);
 232 extern u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank);
 233
 234 extern struct powerdomain wkup_omap2_pwrdm;
 235 extern struct powerdomain gfx_omap2_pwrdm;
 236
 237
 238 #endif