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[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / serial / bfin_sport_uart.c
blob34b4ae0fe76041f4eda4132e1a81a54784652557
1 /*
2 * File: linux/drivers/serial/bfin_sport_uart.c
3 *
4 * Based on: drivers/serial/bfin_5xx.c by Aubrey Li.
5 * Author: Roy Huang <roy.huang@analog.com>
6 *
7 * Created: Nov 22, 2006
8 * Copyright: (c) 2006-2007 Analog Devices Inc.
9 * Description: this driver enable SPORTs on Blackfin emulate UART.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, see the file COPYING, or write
23 * to the Free Software Foundation, Inc.,
24 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 */
26
27 /*
28 * This driver and the hardware supported are in term of EE-191 of ADI.
29 * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
30 * This application note describe how to implement a UART on a Sharc DSP,
31 * but this driver is implemented on Blackfin Processor.
32 */
33
34 /* After reset, there is a prelude of low level pulse when transmit data first
35 * time. No addtional pulse in following transmit.
36 * According to document:
37 * The SPORTs are ready to start transmitting or receiving data no later than
38 * three serial clock cycles after they are enabled in the SPORTx_TCR1 or
39 * SPORTx_RCR1 register. No serial clock cycles are lost from this point on.
40 * The first internal frame sync will occur one frame sync delay after the
41 * SPORTs are ready. External frame syncs can occur as soon as the SPORT is
42 * ready.
43 */
44
45 /* Thanks to Axel Alatalo <axel@rubico.se> for fixing sport rx bug. Sometimes
46 * sport receives data incorrectly. The following is Axel's words.
47 * As EE-191, sport rx samples 3 times of the UART baudrate and takes the
48 * middle smaple of every 3 samples as the data bit. For a 8-N-1 UART setting,
49 * 30 samples will be required for a byte. If transmitter sends a 1/3 bit short
50 * byte due to buadrate drift, then the 30th sample of a byte, this sample is
51 * also the third sample of the stop bit, will happens on the immediately
52 * following start bit which will be thrown away and missed. Thus since parts
53 * of the startbit will be missed and the receiver will begin to drift, the
54 * effect accumulates over time until synchronization is lost.
55 * If only require 2 samples of the stopbit (by sampling in total 29 samples),
56 * then a to short byte as in the case above will be tolerated. Then the 1/3
57 * early startbit will trigger a framesync since the last read is complete
58 * after only 2/3 stopbit and framesync is active during the last 1/3 looking
59 * for a possible early startbit. */
60
61 //#define DEBUG
62
63 #include <linux/module.h>
64 #include <linux/ioport.h>
65 #include <linux/init.h>
66 #include <linux/console.h>
67 #include <linux/sysrq.h>
68 #include <linux/platform_device.h>
69 #include <linux/tty.h>
70 #include <linux/tty_flip.h>
71 #include <linux/serial_core.h>
72
73 #include <asm/delay.h>
74 #include <asm/portmux.h>
75
76 #include "bfin_sport_uart.h"
77
78 unsigned short bfin_uart_pin_req_sport0[] =
79 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
80 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0};
81
82 unsigned short bfin_uart_pin_req_sport1[] =
83 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
84 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0};
85
86 #define DRV_NAME "bfin-sport-uart"
87
88 struct sport_uart_port {
89 struct uart_port port;
90 char *name;
91
92 int tx_irq;
93 int rx_irq;
94 int err_irq;
95 };
96
97 static void sport_uart_tx_chars(struct sport_uart_port *up);
98 static void sport_stop_tx(struct uart_port *port);
99
100 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
101 {
102 pr_debug("%s value:%x\n", __func__, value);
103 /* Place a Start and Stop bit */
104 __asm__ __volatile__ (
105 "R2 = b#01111111100;"
106 "R3 = b#10000000001;"
107 "%0 <<= 2;"
108 "%0 = %0 & R2;"
109 "%0 = %0 | R3;"
110 : "=d"(value)
111 : "d"(value)
112 : "ASTAT", "R2", "R3"
113 );
114 pr_debug("%s value:%x\n", __func__, value);
115
116 SPORT_PUT_TX(up, value);
117 }
118
119 static inline unsigned int rx_one_byte(struct sport_uart_port *up)
120 {
121 unsigned int value, extract;
122 u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
123
124 value = SPORT_GET_RX32(up);
125 pr_debug("%s value:%x\n", __func__, value);
126
127 /* Extract 8 bits data */
128 __asm__ __volatile__ (
129 "%[extr] = 0;"
130 "%[mask1] = 0x1801(Z);"
131 "%[mask2] = 0x0300(Z);"
132 "%[shift] = 0;"
133 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
134 ".Lloop_s:"
135 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
136 "%[tmp] <<= %[shift];"
137 "%[extr] = %[extr] | %[tmp];"
138 "%[mask1] = %[mask1] - %[mask2];"
139 ".Lloop_e:"
140 "%[shift] += 1;"
141 : [val]"=d"(value), [extr]"=d"(extract), [shift]"=d"(tmp_shift), [tmp]"=d"(tmp),
142 [mask1]"=d"(tmp_mask1), [mask2]"=d"(tmp_mask2)
143 : "d"(value), [lc]"a"(8)
144 : "ASTAT", "LB0", "LC0", "LT0"
145 );
146
147 pr_debug(" extract:%x\n", extract);
148 return extract;
149 }
150
151 static int sport_uart_setup(struct sport_uart_port *up, int sclk, int baud_rate)
152 {
153 int tclkdiv, tfsdiv, rclkdiv;
154
155 /* Set TCR1 and TCR2 */
156 SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
157 SPORT_PUT_TCR2(up, 10);
158 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
159
160 /* Set RCR1 and RCR2 */
161 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
162 SPORT_PUT_RCR2(up, 28);
163 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
164
165 tclkdiv = sclk/(2 * baud_rate) - 1;
166 tfsdiv = 12;
167 rclkdiv = sclk/(2 * baud_rate * 3) - 1;
168 SPORT_PUT_TCLKDIV(up, tclkdiv);
169 SPORT_PUT_TFSDIV(up, tfsdiv);
170 SPORT_PUT_RCLKDIV(up, rclkdiv);
171 SSYNC();
172 pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, tfsdiv:%d, rclkdiv:%d\n",
173 __func__, sclk, baud_rate, tclkdiv, tfsdiv, rclkdiv);
174
175 return 0;
176 }
177
178 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
179 {
180 struct sport_uart_port *up = dev_id;
181 struct tty_struct *tty = up->port.info->port.tty;
182 unsigned int ch;
183
184 do {
185 ch = rx_one_byte(up);
186 up->port.icount.rx++;
187
188 if (uart_handle_sysrq_char(&up->port, ch))
189 ;
190 else
191 tty_insert_flip_char(tty, ch, TTY_NORMAL);
192 } while (SPORT_GET_STAT(up) & RXNE);
193 tty_flip_buffer_push(tty);
194
195 return IRQ_HANDLED;
196 }
197
198 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
199 {
200 sport_uart_tx_chars(dev_id);
201
202 return IRQ_HANDLED;
203 }
204
205 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
206 {
207 struct sport_uart_port *up = dev_id;
208 struct tty_struct *tty = up->port.info->port.tty;
209 unsigned int stat = SPORT_GET_STAT(up);
210
211 /* Overflow in RX FIFO */
212 if (stat & ROVF) {
213 up->port.icount.overrun++;
214 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
215 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
216 }
217 /* These should not happen */
218 if (stat & (TOVF | TUVF | RUVF)) {
219 printk(KERN_ERR "SPORT Error:%s %s %s\n",
220 (stat & TOVF)?"TX overflow":"",
221 (stat & TUVF)?"TX underflow":"",
222 (stat & RUVF)?"RX underflow":"");
223 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
224 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
225 }
226 SSYNC();
227
228 return IRQ_HANDLED;
229 }
230
231 /* Reqeust IRQ, Setup clock */
232 static int sport_startup(struct uart_port *port)
233 {
234 struct sport_uart_port *up = (struct sport_uart_port *)port;
235 char buffer[20];
236 int retval;
237
238 pr_debug("%s enter\n", __func__);
239 memset(buffer, 20, '\0');
240 snprintf(buffer, 20, "%s rx", up->name);
241 retval = request_irq(up->rx_irq, sport_uart_rx_irq, IRQF_SAMPLE_RANDOM, buffer, up);
242 if (retval) {
243 printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
244 return retval;
245 }
246
247 snprintf(buffer, 20, "%s tx", up->name);
248 retval = request_irq(up->tx_irq, sport_uart_tx_irq, IRQF_SAMPLE_RANDOM, buffer, up);
249 if (retval) {
250 printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
251 goto fail1;
252 }
253
254 snprintf(buffer, 20, "%s err", up->name);
255 retval = request_irq(up->err_irq, sport_uart_err_irq, IRQF_SAMPLE_RANDOM, buffer, up);
256 if (retval) {
257 printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
258 goto fail2;
259 }
260
261 if (port->line) {
262 if (peripheral_request_list(bfin_uart_pin_req_sport1, DRV_NAME))
263 goto fail3;
264 } else {
265 if (peripheral_request_list(bfin_uart_pin_req_sport0, DRV_NAME))
266 goto fail3;
267 }
268
269 sport_uart_setup(up, get_sclk(), port->uartclk);
270
271 /* Enable receive interrupt */
272 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) | RSPEN));
273 SSYNC();
274
275 return 0;
276
277
278 fail3:
279 printk(KERN_ERR DRV_NAME
280 ": Requesting Peripherals failed\n");
281
282 free_irq(up->err_irq, up);
283 fail2:
284 free_irq(up->tx_irq, up);
285 fail1:
286 free_irq(up->rx_irq, up);
287
288 return retval;
289
290 }
291
292 static void sport_uart_tx_chars(struct sport_uart_port *up)
293 {
294 struct circ_buf *xmit = &up->port.info->xmit;
295
296 if (SPORT_GET_STAT(up) & TXF)
297 return;
298
299 if (up->port.x_char) {
300 tx_one_byte(up, up->port.x_char);
301 up->port.icount.tx++;
302 up->port.x_char = 0;
303 return;
304 }
305
306 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
307 sport_stop_tx(&up->port);
308 return;
309 }
310
311 while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
312 tx_one_byte(up, xmit->buf[xmit->tail]);
313 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
314 up->port.icount.tx++;
315 }
316
317 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
318 uart_write_wakeup(&up->port);
319 }
320
321 static unsigned int sport_tx_empty(struct uart_port *port)
322 {
323 struct sport_uart_port *up = (struct sport_uart_port *)port;
324 unsigned int stat;
325
326 stat = SPORT_GET_STAT(up);
327 pr_debug("%s stat:%04x\n", __func__, stat);
328 if (stat & TXHRE) {
329 return TIOCSER_TEMT;
330 } else
331 return 0;
332 }
333
334 static unsigned int sport_get_mctrl(struct uart_port *port)
335 {
336 pr_debug("%s enter\n", __func__);
337 return (TIOCM_CTS | TIOCM_CD | TIOCM_DSR);
338 }
339
340 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
341 {
342 pr_debug("%s enter\n", __func__);
343 }
344
345 static void sport_stop_tx(struct uart_port *port)
346 {
347 struct sport_uart_port *up = (struct sport_uart_port *)port;
348 unsigned int stat;
349
350 pr_debug("%s enter\n", __func__);
351
352 stat = SPORT_GET_STAT(up);
353 while(!(stat & TXHRE)) {
354 udelay(1);
355 stat = SPORT_GET_STAT(up);
356 }
357 /* Although the hold register is empty, last byte is still in shift
358 * register and not sent out yet. If baud rate is lower than default,
359 * delay should be longer. For example, if the baud rate is 9600,
360 * the delay must be at least 2ms by experience */
361 udelay(500);
362
363 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
364 SSYNC();
365
366 return;
367 }
368
369 static void sport_start_tx(struct uart_port *port)
370 {
371 struct sport_uart_port *up = (struct sport_uart_port *)port;
372
373 pr_debug("%s enter\n", __func__);
374 /* Write data into SPORT FIFO before enable SPROT to transmit */
375 sport_uart_tx_chars(up);
376
377 /* Enable transmit, then an interrupt will generated */
378 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
379 SSYNC();
380 pr_debug("%s exit\n", __func__);
381 }
382
383 static void sport_stop_rx(struct uart_port *port)
384 {
385 struct sport_uart_port *up = (struct sport_uart_port *)port;
386
387 pr_debug("%s enter\n", __func__);
388 /* Disable sport to stop rx */
389 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
390 SSYNC();
391 }
392
393 static void sport_enable_ms(struct uart_port *port)
394 {
395 pr_debug("%s enter\n", __func__);
396 }
397
398 static void sport_break_ctl(struct uart_port *port, int break_state)
399 {
400 pr_debug("%s enter\n", __func__);
401 }
402
403 static void sport_shutdown(struct uart_port *port)
404 {
405 struct sport_uart_port *up = (struct sport_uart_port *)port;
406
407 pr_debug("%s enter\n", __func__);
408
409 /* Disable sport */
410 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
411 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
412 SSYNC();
413
414 if (port->line) {
415 peripheral_free_list(bfin_uart_pin_req_sport1);
416 } else {
417 peripheral_free_list(bfin_uart_pin_req_sport0);
418 }
419
420 free_irq(up->rx_irq, up);
421 free_irq(up->tx_irq, up);
422 free_irq(up->err_irq, up);
423 }
424
425 static void sport_set_termios(struct uart_port *port,
426 struct ktermios *termios, struct ktermios *old)
427 {
428 pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
429 uart_update_timeout(port, CS8 ,port->uartclk);
430 }
431
432 static const char *sport_type(struct uart_port *port)
433 {
434 struct sport_uart_port *up = (struct sport_uart_port *)port;
435
436 pr_debug("%s enter\n", __func__);
437 return up->name;
438 }
439
440 static void sport_release_port(struct uart_port *port)
441 {
442 pr_debug("%s enter\n", __func__);
443 }
444
445 static int sport_request_port(struct uart_port *port)
446 {
447 pr_debug("%s enter\n", __func__);
448 return 0;
449 }
450
451 static void sport_config_port(struct uart_port *port, int flags)
452 {
453 struct sport_uart_port *up = (struct sport_uart_port *)port;
454
455 pr_debug("%s enter\n", __func__);
456 up->port.type = PORT_BFIN_SPORT;
457 }
458
459 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
460 {
461 pr_debug("%s enter\n", __func__);
462 return 0;
463 }
464
465 struct uart_ops sport_uart_ops = {
466 .tx_empty = sport_tx_empty,
467 .set_mctrl = sport_set_mctrl,
468 .get_mctrl = sport_get_mctrl,
469 .stop_tx = sport_stop_tx,
470 .start_tx = sport_start_tx,
471 .stop_rx = sport_stop_rx,
472 .enable_ms = sport_enable_ms,
473 .break_ctl = sport_break_ctl,
474 .startup = sport_startup,
475 .shutdown = sport_shutdown,
476 .set_termios = sport_set_termios,
477 .type = sport_type,
478 .release_port = sport_release_port,
479 .request_port = sport_request_port,
480 .config_port = sport_config_port,
481 .verify_port = sport_verify_port,
482 };
483
484 static struct sport_uart_port sport_uart_ports[] = {
485 { /* SPORT 0 */
486 .name = "SPORT0",
487 .tx_irq = IRQ_SPORT0_TX,
488 .rx_irq = IRQ_SPORT0_RX,
489 .err_irq= IRQ_SPORT0_ERROR,
490 .port = {
491 .type = PORT_BFIN_SPORT,
492 .iotype = UPIO_MEM,
493 .membase = (void __iomem *)SPORT0_TCR1,
494 .mapbase = SPORT0_TCR1,
495 .irq = IRQ_SPORT0_RX,
496 .uartclk = CONFIG_SPORT_BAUD_RATE,
497 .fifosize = 8,
498 .ops = &sport_uart_ops,
499 .line = 0,
500 },
501 }, { /* SPORT 1 */
502 .name = "SPORT1",
503 .tx_irq = IRQ_SPORT1_TX,
504 .rx_irq = IRQ_SPORT1_RX,
505 .err_irq= IRQ_SPORT1_ERROR,
506 .port = {
507 .type = PORT_BFIN_SPORT,
508 .iotype = UPIO_MEM,
509 .membase = (void __iomem *)SPORT1_TCR1,
510 .mapbase = SPORT1_TCR1,
511 .irq = IRQ_SPORT1_RX,
512 .uartclk = CONFIG_SPORT_BAUD_RATE,
513 .fifosize = 8,
514 .ops = &sport_uart_ops,
515 .line = 1,
516 },
517 }
518 };
519
520 static struct uart_driver sport_uart_reg = {
521 .owner = THIS_MODULE,
522 .driver_name = "SPORT-UART",
523 .dev_name = "ttySS",
524 .major = 204,
525 .minor = 84,
526 .nr = ARRAY_SIZE(sport_uart_ports),
527 .cons = NULL,
528 };
529
530 static int sport_uart_suspend(struct platform_device *dev, pm_message_t state)
531 {
532 struct sport_uart_port *sport = platform_get_drvdata(dev);
533
534 pr_debug("%s enter\n", __func__);
535 if (sport)
536 uart_suspend_port(&sport_uart_reg, &sport->port);
537
538 return 0;
539 }
540
541 static int sport_uart_resume(struct platform_device *dev)
542 {
543 struct sport_uart_port *sport = platform_get_drvdata(dev);
544
545 pr_debug("%s enter\n", __func__);
546 if (sport)
547 uart_resume_port(&sport_uart_reg, &sport->port);
548
549 return 0;
550 }
551
552 static int sport_uart_probe(struct platform_device *dev)
553 {
554 pr_debug("%s enter\n", __func__);
555 sport_uart_ports[dev->id].port.dev = &dev->dev;
556 uart_add_one_port(&sport_uart_reg, &sport_uart_ports[dev->id].port);
557 platform_set_drvdata(dev, &sport_uart_ports[dev->id]);
558
559 return 0;
560 }
561
562 static int sport_uart_remove(struct platform_device *dev)
563 {
564 struct sport_uart_port *sport = platform_get_drvdata(dev);
565
566 pr_debug("%s enter\n", __func__);
567 platform_set_drvdata(dev, NULL);
568
569 if (sport)
570 uart_remove_one_port(&sport_uart_reg, &sport->port);
571
572 return 0;
573 }
574
575 static struct platform_driver sport_uart_driver = {
576 .probe = sport_uart_probe,
577 .remove = sport_uart_remove,
578 .suspend = sport_uart_suspend,
579 .resume = sport_uart_resume,
580 .driver = {
581 .name = DRV_NAME,
582 },
583 };
584
585 static int __init sport_uart_init(void)
586 {
587 int ret;
588
589 pr_debug("%s enter\n", __func__);
590 ret = uart_register_driver(&sport_uart_reg);
591 if (ret != 0) {
592 printk(KERN_ERR "Failed to register %s:%d\n",
593 sport_uart_reg.driver_name, ret);
594 return ret;
595 }
596
597 ret = platform_driver_register(&sport_uart_driver);
598 if (ret != 0) {
599 printk(KERN_ERR "Failed to register sport uart driver:%d\n", ret);
600 uart_unregister_driver(&sport_uart_reg);
601 }
602
603
604 pr_debug("%s exit\n", __func__);
605 return ret;
606 }
607
608 static void __exit sport_uart_exit(void)
609 {
610 pr_debug("%s enter\n", __func__);
611 platform_driver_unregister(&sport_uart_driver);
612 uart_unregister_driver(&sport_uart_reg);
613 }
614
615 module_init(sport_uart_init);
616 module_exit(sport_uart_exit);
617
618 MODULE_LICENSE("GPL");
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