drivers/net/ixgbe/ixgbe_82598.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/pci.h>
  30 #include <linux/delay.h>
  31 #include <linux/sched.h>
  32
  33 #include "ixgbe.h"
  34 #include "ixgbe_phy.h"
  35
  36 #define IXGBE_82598_MAX_TX_QUEUES 32
  37 #define IXGBE_82598_MAX_RX_QUEUES 64
  38 #define IXGBE_82598_RAR_ENTRIES   16
  39
  40 static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw);
  41 static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
  42                                          bool *autoneg);
  43 static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
  44                                                 u32 *speed, bool *autoneg);
  45 static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);
  46 static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw);
  47 static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
  48                                       bool *link_up);
  49 static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
  50                                             bool autoneg,
  51                                             bool autoneg_wait_to_complete);
  52 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
  53 static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
  54                                                bool autoneg,
  55                                                bool autoneg_wait_to_complete);
  56 static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);
  57
  58
  59 static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
  60 {
  61         hw->mac.num_rx_queues = IXGBE_82598_MAX_RX_QUEUES;
  62         hw->mac.num_tx_queues = IXGBE_82598_MAX_TX_QUEUES;
  63         hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
  64
  65         /* PHY ops are filled in by default properly for Fiber only */
  66         if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
  67                 hw->mac.ops.setup_link = &ixgbe_setup_copper_link_82598;
  68                 hw->mac.ops.setup_link_speed = &ixgbe_setup_copper_link_speed_82598;
  69                 hw->mac.ops.get_link_settings =
  70                                 &ixgbe_get_copper_link_settings_82598;
  71
  72                 /* Call PHY identify routine to get the phy type */
  73                 ixgbe_identify_phy(hw);
  74
  75                 switch (hw->phy.type) {
  76                 case ixgbe_phy_tn:
  77                         hw->phy.ops.setup_link = &ixgbe_setup_tnx_phy_link;
  78                         hw->phy.ops.check_link = &ixgbe_check_tnx_phy_link;
  79                         hw->phy.ops.setup_link_speed =
  80                                         &ixgbe_setup_tnx_phy_link_speed;
  81                         break;
  82                 default:
  83                         break;
  84                 }
  85         }
  86
  87         return 0;
  88 }
  89
  90 /**
  91  *  ixgbe_get_link_settings_82598 - Determines default link settings
  92  *  @hw: pointer to hardware structure
  93  *  @speed: pointer to link speed
  94  *  @autoneg: boolean auto-negotiation value
  95  *
  96  *  Determines the default link settings by reading the AUTOC register.
  97  **/
  98 static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed,
  99                                          bool *autoneg)
 100 {
 101         s32 status = 0;
 102         s32 autoc_reg;
 103
 104         autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 105
 106         if (hw->mac.link_settings_loaded) {
 107                 autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
 108                 autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
 109                 autoc_reg |= hw->mac.link_attach_type;
 110                 autoc_reg |= hw->mac.link_mode_select;
 111         }
 112
 113         switch (autoc_reg & IXGBE_AUTOC_LMS_MASK) {
 114         case IXGBE_AUTOC_LMS_1G_LINK_NO_AN:
 115                 *speed = IXGBE_LINK_SPEED_1GB_FULL;
 116                 *autoneg = false;
 117                 break;
 118
 119         case IXGBE_AUTOC_LMS_10G_LINK_NO_AN:
 120                 *speed = IXGBE_LINK_SPEED_10GB_FULL;
 121                 *autoneg = false;
 122                 break;
 123
 124         case IXGBE_AUTOC_LMS_1G_AN:
 125                 *speed = IXGBE_LINK_SPEED_1GB_FULL;
 126                 *autoneg = true;
 127                 break;
 128
 129         case IXGBE_AUTOC_LMS_KX4_AN:
 130         case IXGBE_AUTOC_LMS_KX4_AN_1G_AN:
 131                 *speed = IXGBE_LINK_SPEED_UNKNOWN;
 132                 if (autoc_reg & IXGBE_AUTOC_KX4_SUPP)
 133                         *speed |= IXGBE_LINK_SPEED_10GB_FULL;
 134                 if (autoc_reg & IXGBE_AUTOC_KX_SUPP)
 135                         *speed |= IXGBE_LINK_SPEED_1GB_FULL;
 136                 *autoneg = true;
 137                 break;
 138
 139         default:
 140                 status = IXGBE_ERR_LINK_SETUP;
 141                 break;
 142         }
 143
 144         return status;
 145 }
 146
 147 /**
 148  *  ixgbe_get_copper_link_settings_82598 - Determines default link settings
 149  *  @hw: pointer to hardware structure
 150  *  @speed: pointer to link speed
 151  *  @autoneg: boolean auto-negotiation value
 152  *
 153  *  Determines the default link settings by reading the AUTOC register.
 154  **/
 155 static s32 ixgbe_get_copper_link_settings_82598(struct ixgbe_hw *hw,
 156                                                 u32 *speed, bool *autoneg)
 157 {
 158         s32 status = IXGBE_ERR_LINK_SETUP;
 159         u16 speed_ability;
 160
 161         *speed = 0;
 162         *autoneg = true;
 163
 164         status = ixgbe_read_phy_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,
 165                                     IXGBE_MDIO_PMA_PMD_DEV_TYPE,
 166                                     &speed_ability);
 167
 168         if (status == 0) {
 169                 if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G)
 170                     *speed |= IXGBE_LINK_SPEED_10GB_FULL;
 171                 if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G)
 172                     *speed |= IXGBE_LINK_SPEED_1GB_FULL;
 173         }
 174
 175         return status;
 176 }
 177
 178 /**
 179  *  ixgbe_get_media_type_82598 - Determines media type
 180  *  @hw: pointer to hardware structure
 181  *
 182  *  Returns the media type (fiber, copper, backplane)
 183  **/
 184 static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)
 185 {
 186         enum ixgbe_media_type media_type;
 187
 188         /* Media type for I82598 is based on device ID */
 189         switch (hw->device_id) {
 190         case IXGBE_DEV_ID_82598AF_DUAL_PORT:
 191         case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
 192         case IXGBE_DEV_ID_82598EB_CX4:
 193         case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
 194                 media_type = ixgbe_media_type_fiber;
 195                 break;
 196         case IXGBE_DEV_ID_82598AT_DUAL_PORT:
 197                 media_type = ixgbe_media_type_copper;
 198                 break;
 199         default:
 200                 media_type = ixgbe_media_type_unknown;
 201                 break;
 202         }
 203
 204         return media_type;
 205 }
 206
 207 /**
 208  *  ixgbe_setup_mac_link_82598 - Configures MAC link settings
 209  *  @hw: pointer to hardware structure
 210  *
 211  *  Configures link settings based on values in the ixgbe_hw struct.
 212  *  Restarts the link.  Performs autonegotiation if needed.
 213  **/
 214 static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
 215 {
 216         u32 autoc_reg;
 217         u32 links_reg;
 218         u32 i;
 219         s32 status = 0;
 220
 221         autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 222
 223         if (hw->mac.link_settings_loaded) {
 224                 autoc_reg &= ~IXGBE_AUTOC_LMS_ATTACH_TYPE;
 225                 autoc_reg &= ~IXGBE_AUTOC_LMS_MASK;
 226                 autoc_reg |= hw->mac.link_attach_type;
 227                 autoc_reg |= hw->mac.link_mode_select;
 228
 229                 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
 230                 IXGBE_WRITE_FLUSH(hw);
 231                 msleep(50);
 232         }
 233
 234         /* Restart link */
 235         autoc_reg |= IXGBE_AUTOC_AN_RESTART;
 236         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
 237
 238         /* Only poll for autoneg to complete if specified to do so */
 239         if (hw->phy.autoneg_wait_to_complete) {
 240                 if (hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN ||
 241                     hw->mac.link_mode_select == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) {
 242                         links_reg = 0; /* Just in case Autoneg time = 0 */
 243                         for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) {
 244                                 links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
 245                                 if (links_reg & IXGBE_LINKS_KX_AN_COMP)
 246                                         break;
 247                                 msleep(100);
 248                         }
 249                         if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) {
 250                                 status = IXGBE_ERR_AUTONEG_NOT_COMPLETE;
 251                                 hw_dbg(hw,
 252                                        "Autonegotiation did not complete.\n");
 253                         }
 254                 }
 255         }
 256
 257         /*
 258          * We want to save off the original Flow Control configuration just in
 259          * case we get disconnected and then reconnected into a different hub
 260          * or switch with different Flow Control capabilities.
 261          */
 262         hw->fc.type = hw->fc.original_type;
 263         ixgbe_setup_fc(hw, 0);
 264
 265         /* Add delay to filter out noises during initial link setup */
 266         msleep(50);
 267
 268         return status;
 269 }
 270
 271 /**
 272  *  ixgbe_check_mac_link_82598 - Get link/speed status
 273  *  @hw: pointer to hardware structure
 274  *  @speed: pointer to link speed
 275  *  @link_up: true is link is up, false otherwise
 276  *
 277  *  Reads the links register to determine if link is up and the current speed
 278  **/
 279 static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, u32 *speed,
 280                                       bool *link_up)
 281 {
 282         u32 links_reg;
 283
 284         links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);
 285
 286         if (links_reg & IXGBE_LINKS_UP)
 287                 *link_up = true;
 288         else
 289                 *link_up = false;
 290
 291         if (links_reg & IXGBE_LINKS_SPEED)
 292                 *speed = IXGBE_LINK_SPEED_10GB_FULL;
 293         else
 294                 *speed = IXGBE_LINK_SPEED_1GB_FULL;
 295
 296         return 0;
 297 }
 298
 299 /**
 300  *  ixgbe_setup_mac_link_speed_82598 - Set MAC link speed
 301  *  @hw: pointer to hardware structure
 302  *  @speed: new link speed
 303  *  @autoneg: true if auto-negotiation enabled
 304  *  @autoneg_wait_to_complete: true if waiting is needed to complete
 305  *
 306  *  Set the link speed in the AUTOC register and restarts link.
 307  **/
 308 static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
 309                                             u32 speed, bool autoneg,
 310                                             bool autoneg_wait_to_complete)
 311 {
 312         s32 status = 0;
 313
 314         /* If speed is 10G, then check for CX4 or XAUI. */
 315         if ((speed == IXGBE_LINK_SPEED_10GB_FULL) &&
 316             (!(hw->mac.link_attach_type & IXGBE_AUTOC_10G_KX4)))
 317                 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
 318         else if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && (!autoneg))
 319                 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_LINK_NO_AN;
 320         else if (autoneg) {
 321                 /* BX mode - Autonegotiate 1G */
 322                 if (!(hw->mac.link_attach_type & IXGBE_AUTOC_1G_PMA_PMD))
 323                         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_1G_AN;
 324                 else /* KX/KX4 mode */
 325                         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN_1G_AN;
 326         } else {
 327                 status = IXGBE_ERR_LINK_SETUP;
 328         }
 329
 330         if (status == 0) {
 331                 hw->phy.autoneg_wait_to_complete = autoneg_wait_to_complete;
 332
 333                 hw->mac.link_settings_loaded = true;
 334                 /*
 335                  * Setup and restart the link based on the new values in
 336                  * ixgbe_hw This will write the AUTOC register based on the new
 337                  * stored values
 338                  */
 339                 hw->mac.ops.setup_link(hw);
 340         }
 341
 342         return status;
 343 }
 344
 345
 346 /**
 347  *  ixgbe_setup_copper_link_82598 - Setup copper link settings
 348  *  @hw: pointer to hardware structure
 349  *
 350  *  Configures link settings based on values in the ixgbe_hw struct.
 351  *  Restarts the link.  Performs autonegotiation if needed.  Restart
 352  *  phy and wait for autonegotiate to finish.  Then synchronize the
 353  *  MAC and PHY.
 354  **/
 355 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
 356 {
 357         s32 status = 0;
 358
 359         /* Restart autonegotiation on PHY */
 360         if (hw->phy.ops.setup_link)
 361                 status = hw->phy.ops.setup_link(hw);
 362
 363         /* Set MAC to KX/KX4 autoneg, which defaultis to Parallel detection */
 364         hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
 365         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
 366
 367         /* Set up MAC */
 368         hw->mac.ops.setup_link(hw);
 369
 370         return status;
 371 }
 372
 373 /**
 374  *  ixgbe_setup_copper_link_speed_82598 - Set the PHY autoneg advertised field
 375  *  @hw: pointer to hardware structure
 376  *  @speed: new link speed
 377  *  @autoneg: true if autonegotiation enabled
 378  *  @autoneg_wait_to_complete: true if waiting is needed to complete
 379  *
 380  *  Sets the link speed in the AUTOC register in the MAC and restarts link.
 381  **/
 382 static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
 383                                                bool autoneg,
 384                                                bool autoneg_wait_to_complete)
 385 {
 386         s32 status = 0;
 387
 388         /* Setup the PHY according to input speed */
 389         if (hw->phy.ops.setup_link_speed)
 390                 status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
 391                                                 autoneg_wait_to_complete);
 392
 393         /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
 394         hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
 395         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
 396
 397         /* Set up MAC */
 398         hw->mac.ops.setup_link(hw);
 399
 400         return status;
 401 }
 402
 403 /**
 404  *  ixgbe_reset_hw_82598 - Performs hardware reset
 405  *  @hw: pointer to hardware structure
 406  *
 407  *  Resets the hardware by reseting the transmit and receive units, masks and
 408  *  clears all interrupts, performing a PHY reset, and performing a link (MAC)
 409  *  reset.
 410  **/
 411 static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
 412 {
 413         s32 status = 0;
 414         u32 ctrl;
 415         u32 gheccr;
 416         u32 i;
 417         u32 autoc;
 418         u8  analog_val;
 419
 420         /* Call adapter stop to disable tx/rx and clear interrupts */
 421         ixgbe_stop_adapter(hw);
 422
 423         /*
 424          * Power up the Atlas TX lanes if they are currently powered down.
 425          * Atlas TX lanes are powered down for MAC loopback tests, but
 426          * they are not automatically restored on reset.
 427          */
 428         ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
 429         if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) {
 430                 /* Enable TX Atlas so packets can be transmitted again */
 431                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);
 432                 analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN;
 433                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, analog_val);
 434
 435                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &analog_val);
 436                 analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
 437                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, analog_val);
 438
 439                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &analog_val);
 440                 analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
 441                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, analog_val);
 442
 443                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &analog_val);
 444                 analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
 445                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, analog_val);
 446         }
 447
 448         /* Reset PHY */
 449         ixgbe_reset_phy(hw);
 450
 451         /*
 452          * Prevent the PCI-E bus from from hanging by disabling PCI-E master
 453          * access and verify no pending requests before reset
 454          */
 455         if (ixgbe_disable_pcie_master(hw) != 0) {
 456                 status = IXGBE_ERR_MASTER_REQUESTS_PENDING;
 457                 hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
 458         }
 459
 460         /*
 461          * Issue global reset to the MAC.  This needs to be a SW reset.
 462          * If link reset is used, it might reset the MAC when mng is using it
 463          */
 464         ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
 465         IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST));
 466         IXGBE_WRITE_FLUSH(hw);
 467
 468         /* Poll for reset bit to self-clear indicating reset is complete */
 469         for (i = 0; i < 10; i++) {
 470                 udelay(1);
 471                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
 472                 if (!(ctrl & IXGBE_CTRL_RST))
 473                         break;
 474         }
 475         if (ctrl & IXGBE_CTRL_RST) {
 476                 status = IXGBE_ERR_RESET_FAILED;
 477                 hw_dbg(hw, "Reset polling failed to complete.\n");
 478         }
 479
 480         msleep(50);
 481
 482         gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);
 483         gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6));
 484         IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);
 485
 486         /*
 487          * AUTOC register which stores link settings gets cleared
 488          * and reloaded from EEPROM after reset. We need to restore
 489          * our stored value from init in case SW changed the attach
 490          * type or speed.  If this is the first time and link settings
 491          * have not been stored, store default settings from AUTOC.
 492          */
 493         autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 494         if (hw->mac.link_settings_loaded) {
 495                 autoc &= ~(IXGBE_AUTOC_LMS_ATTACH_TYPE);
 496                 autoc &= ~(IXGBE_AUTOC_LMS_MASK);
 497                 autoc |= hw->mac.link_attach_type;
 498                 autoc |= hw->mac.link_mode_select;
 499                 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);
 500         } else {
 501                 hw->mac.link_attach_type =
 502                                          (autoc & IXGBE_AUTOC_LMS_ATTACH_TYPE);
 503                 hw->mac.link_mode_select = (autoc & IXGBE_AUTOC_LMS_MASK);
 504                 hw->mac.link_settings_loaded = true;
 505         }
 506
 507         /* Store the permanent mac address */
 508         ixgbe_get_mac_addr(hw, hw->mac.perm_addr);
 509
 510         return status;
 511 }
 512
 513 static struct ixgbe_mac_operations mac_ops_82598 = {
 514         .reset                  = &ixgbe_reset_hw_82598,
 515         .get_media_type         = &ixgbe_get_media_type_82598,
 516         .setup_link             = &ixgbe_setup_mac_link_82598,
 517         .check_link             = &ixgbe_check_mac_link_82598,
 518         .setup_link_speed       = &ixgbe_setup_mac_link_speed_82598,
 519         .get_link_settings      = &ixgbe_get_link_settings_82598,
 520 };
 521
 522 struct ixgbe_info ixgbe_82598_info = {
 523         .mac                    = ixgbe_mac_82598EB,
 524         .get_invariants         = &ixgbe_get_invariants_82598,
 525         .mac_ops                = &mac_ops_82598,
 526 };
 527