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powerpc/8xx: Fix regression introduced by cache coherency rewrite
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / x86 / kvm / x86.c
blobec56c78bead7ff82b76bb0d9b8ae4a1112114df6
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
61 */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
114 { NULL }
115 };
116
117 unsigned long segment_base(u16 selector)
118 {
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
122 unsigned long v;
123
124 if (selector == 0)
125 return 0;
126
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
129
130 if (selector & 4) { /* from ldt */
131 u16 ldt_selector;
132
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
135 }
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
139 #ifdef CONFIG_X86_64
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
142 #endif
143 return v;
144 }
145 EXPORT_SYMBOL_GPL(segment_base);
146
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
148 {
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
151 else
152 return vcpu->arch.apic_base;
153 }
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
155
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
157 {
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
161 else
162 vcpu->arch.apic_base = data;
163 }
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
165
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
167 {
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
172 }
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
174
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
176 u32 error_code)
177 {
178 ++vcpu->stat.pf_guest;
179
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
189 }
190 return;
191 }
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
194 }
195
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
197 {
198 vcpu->arch.nmi_pending = 1;
199 }
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
201
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
203 {
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
209 }
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
211
212 static void __queue_exception(struct kvm_vcpu *vcpu)
213 {
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
217 }
218
219 /*
220 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
221 * a #GP and return false.
222 */
223 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
224 {
225 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
226 return true;
227 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
228 return false;
229 }
230 EXPORT_SYMBOL_GPL(kvm_require_cpl);
231
232 /*
233 * Load the pae pdptrs. Return true is they are all valid.
234 */
235 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
236 {
237 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
238 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
239 int i;
240 int ret;
241 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
242
243 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
244 offset * sizeof(u64), sizeof(pdpte));
245 if (ret < 0) {
246 ret = 0;
247 goto out;
248 }
249 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
250 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
251 ret = 0;
252 goto out;
253 }
254 }
255 ret = 1;
256
257 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
258 out:
259
260 return ret;
261 }
262 EXPORT_SYMBOL_GPL(load_pdptrs);
263
264 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
265 {
266 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
267 bool changed = true;
268 int r;
269
270 if (is_long_mode(vcpu) || !is_pae(vcpu))
271 return false;
272
273 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
274 if (r < 0)
275 goto out;
276 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
277 out:
278
279 return changed;
280 }
281
282 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
283 {
284 if (cr0 & CR0_RESERVED_BITS) {
285 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
286 cr0, vcpu->arch.cr0);
287 kvm_inject_gp(vcpu, 0);
288 return;
289 }
290
291 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
292 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
293 kvm_inject_gp(vcpu, 0);
294 return;
295 }
296
297 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
298 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
299 "and a clear PE flag\n");
300 kvm_inject_gp(vcpu, 0);
301 return;
302 }
303
304 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
305 #ifdef CONFIG_X86_64
306 if ((vcpu->arch.shadow_efer & EFER_LME)) {
307 int cs_db, cs_l;
308
309 if (!is_pae(vcpu)) {
310 printk(KERN_DEBUG "set_cr0: #GP, start paging "
311 "in long mode while PAE is disabled\n");
312 kvm_inject_gp(vcpu, 0);
313 return;
314 }
315 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
316 if (cs_l) {
317 printk(KERN_DEBUG "set_cr0: #GP, start paging "
318 "in long mode while CS.L == 1\n");
319 kvm_inject_gp(vcpu, 0);
320 return;
321
322 }
323 } else
324 #endif
325 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
326 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
327 "reserved bits\n");
328 kvm_inject_gp(vcpu, 0);
329 return;
330 }
331
332 }
333
334 kvm_x86_ops->set_cr0(vcpu, cr0);
335 vcpu->arch.cr0 = cr0;
336
337 kvm_mmu_sync_global(vcpu);
338 kvm_mmu_reset_context(vcpu);
339 return;
340 }
341 EXPORT_SYMBOL_GPL(kvm_set_cr0);
342
343 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
344 {
345 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
346 KVMTRACE_1D(LMSW, vcpu,
347 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
348 handler);
349 }
350 EXPORT_SYMBOL_GPL(kvm_lmsw);
351
352 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
353 {
354 unsigned long old_cr4 = vcpu->arch.cr4;
355 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
356
357 if (cr4 & CR4_RESERVED_BITS) {
358 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
359 kvm_inject_gp(vcpu, 0);
360 return;
361 }
362
363 if (is_long_mode(vcpu)) {
364 if (!(cr4 & X86_CR4_PAE)) {
365 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
366 "in long mode\n");
367 kvm_inject_gp(vcpu, 0);
368 return;
369 }
370 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
371 && ((cr4 ^ old_cr4) & pdptr_bits)
372 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
373 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
374 kvm_inject_gp(vcpu, 0);
375 return;
376 }
377
378 if (cr4 & X86_CR4_VMXE) {
379 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
380 kvm_inject_gp(vcpu, 0);
381 return;
382 }
383 kvm_x86_ops->set_cr4(vcpu, cr4);
384 vcpu->arch.cr4 = cr4;
385 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
386 kvm_mmu_sync_global(vcpu);
387 kvm_mmu_reset_context(vcpu);
388 }
389 EXPORT_SYMBOL_GPL(kvm_set_cr4);
390
391 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
392 {
393 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
394 kvm_mmu_sync_roots(vcpu);
395 kvm_mmu_flush_tlb(vcpu);
396 return;
397 }
398
399 if (is_long_mode(vcpu)) {
400 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
401 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
402 kvm_inject_gp(vcpu, 0);
403 return;
404 }
405 } else {
406 if (is_pae(vcpu)) {
407 if (cr3 & CR3_PAE_RESERVED_BITS) {
408 printk(KERN_DEBUG
409 "set_cr3: #GP, reserved bits\n");
410 kvm_inject_gp(vcpu, 0);
411 return;
412 }
413 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
414 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
415 "reserved bits\n");
416 kvm_inject_gp(vcpu, 0);
417 return;
418 }
419 }
420 /*
421 * We don't check reserved bits in nonpae mode, because
422 * this isn't enforced, and VMware depends on this.
423 */
424 }
425
426 /*
427 * Does the new cr3 value map to physical memory? (Note, we
428 * catch an invalid cr3 even in real-mode, because it would
429 * cause trouble later on when we turn on paging anyway.)
430 *
431 * A real CPU would silently accept an invalid cr3 and would
432 * attempt to use it - with largely undefined (and often hard
433 * to debug) behavior on the guest side.
434 */
435 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
436 kvm_inject_gp(vcpu, 0);
437 else {
438 vcpu->arch.cr3 = cr3;
439 vcpu->arch.mmu.new_cr3(vcpu);
440 }
441 }
442 EXPORT_SYMBOL_GPL(kvm_set_cr3);
443
444 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
445 {
446 if (cr8 & CR8_RESERVED_BITS) {
447 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
448 kvm_inject_gp(vcpu, 0);
449 return;
450 }
451 if (irqchip_in_kernel(vcpu->kvm))
452 kvm_lapic_set_tpr(vcpu, cr8);
453 else
454 vcpu->arch.cr8 = cr8;
455 }
456 EXPORT_SYMBOL_GPL(kvm_set_cr8);
457
458 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
459 {
460 if (irqchip_in_kernel(vcpu->kvm))
461 return kvm_lapic_get_cr8(vcpu);
462 else
463 return vcpu->arch.cr8;
464 }
465 EXPORT_SYMBOL_GPL(kvm_get_cr8);
466
467 static inline u32 bit(int bitno)
468 {
469 return 1 << (bitno & 31);
470 }
471
472 /*
473 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
474 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
475 *
476 * This list is modified at module load time to reflect the
477 * capabilities of the host cpu.
478 */
479 static u32 msrs_to_save[] = {
480 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
481 MSR_K6_STAR,
482 #ifdef CONFIG_X86_64
483 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
484 #endif
485 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
486 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
487 };
488
489 static unsigned num_msrs_to_save;
490
491 static u32 emulated_msrs[] = {
492 MSR_IA32_MISC_ENABLE,
493 };
494
495 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
496 {
497 if (efer & efer_reserved_bits) {
498 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
499 efer);
500 kvm_inject_gp(vcpu, 0);
501 return;
502 }
503
504 if (is_paging(vcpu)
505 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
506 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
507 kvm_inject_gp(vcpu, 0);
508 return;
509 }
510
511 if (efer & EFER_FFXSR) {
512 struct kvm_cpuid_entry2 *feat;
513
514 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
515 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
516 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
517 kvm_inject_gp(vcpu, 0);
518 return;
519 }
520 }
521
522 if (efer & EFER_SVME) {
523 struct kvm_cpuid_entry2 *feat;
524
525 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
526 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
527 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
528 kvm_inject_gp(vcpu, 0);
529 return;
530 }
531 }
532
533 kvm_x86_ops->set_efer(vcpu, efer);
534
535 efer &= ~EFER_LMA;
536 efer |= vcpu->arch.shadow_efer & EFER_LMA;
537
538 vcpu->arch.shadow_efer = efer;
539
540 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
541 kvm_mmu_reset_context(vcpu);
542 }
543
544 void kvm_enable_efer_bits(u64 mask)
545 {
546 efer_reserved_bits &= ~mask;
547 }
548 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
549
550
551 /*
552 * Writes msr value into into the appropriate "register".
553 * Returns 0 on success, non-0 otherwise.
554 * Assumes vcpu_load() was already called.
555 */
556 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
557 {
558 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
559 }
560
561 /*
562 * Adapt set_msr() to msr_io()'s calling convention
563 */
564 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
565 {
566 return kvm_set_msr(vcpu, index, *data);
567 }
568
569 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
570 {
571 static int version;
572 struct pvclock_wall_clock wc;
573 struct timespec now, sys, boot;
574
575 if (!wall_clock)
576 return;
577
578 version++;
579
580 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
581
582 /*
583 * The guest calculates current wall clock time by adding
584 * system time (updated by kvm_write_guest_time below) to the
585 * wall clock specified here. guest system time equals host
586 * system time for us, thus we must fill in host boot time here.
587 */
588 now = current_kernel_time();
589 ktime_get_ts(&sys);
590 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
591
592 wc.sec = boot.tv_sec;
593 wc.nsec = boot.tv_nsec;
594 wc.version = version;
595
596 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
597
598 version++;
599 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
600 }
601
602 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
603 {
604 uint32_t quotient, remainder;
605
606 /* Don't try to replace with do_div(), this one calculates
607 * "(dividend << 32) / divisor" */
608 __asm__ ( "divl %4"
609 : "=a" (quotient), "=d" (remainder)
610 : "0" (0), "1" (dividend), "r" (divisor) );
611 return quotient;
612 }
613
614 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
615 {
616 uint64_t nsecs = 1000000000LL;
617 int32_t shift = 0;
618 uint64_t tps64;
619 uint32_t tps32;
620
621 tps64 = tsc_khz * 1000LL;
622 while (tps64 > nsecs*2) {
623 tps64 >>= 1;
624 shift--;
625 }
626
627 tps32 = (uint32_t)tps64;
628 while (tps32 <= (uint32_t)nsecs) {
629 tps32 <<= 1;
630 shift++;
631 }
632
633 hv_clock->tsc_shift = shift;
634 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
635
636 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
637 __func__, tsc_khz, hv_clock->tsc_shift,
638 hv_clock->tsc_to_system_mul);
639 }
640
641 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
642
643 static void kvm_write_guest_time(struct kvm_vcpu *v)
644 {
645 struct timespec ts;
646 unsigned long flags;
647 struct kvm_vcpu_arch *vcpu = &v->arch;
648 void *shared_kaddr;
649
650 if ((!vcpu->time_page))
651 return;
652
653 preempt_disable();
654 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
655 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
656 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
657 }
658 preempt_enable();
659
660 /* Keep irq disabled to prevent changes to the clock */
661 local_irq_save(flags);
662 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
663 &vcpu->hv_clock.tsc_timestamp);
664 ktime_get_ts(&ts);
665 local_irq_restore(flags);
666
667 /* With all the info we got, fill in the values */
668
669 vcpu->hv_clock.system_time = ts.tv_nsec +
670 (NSEC_PER_SEC * (u64)ts.tv_sec);
671 /*
672 * The interface expects us to write an even number signaling that the
673 * update is finished. Since the guest won't see the intermediate
674 * state, we just increase by 2 at the end.
675 */
676 vcpu->hv_clock.version += 2;
677
678 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
679
680 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
681 sizeof(vcpu->hv_clock));
682
683 kunmap_atomic(shared_kaddr, KM_USER0);
684
685 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
686 }
687
688 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
689 {
690 struct kvm_vcpu_arch *vcpu = &v->arch;
691
692 if (!vcpu->time_page)
693 return 0;
694 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
695 return 1;
696 }
697
698 static bool msr_mtrr_valid(unsigned msr)
699 {
700 switch (msr) {
701 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
702 case MSR_MTRRfix64K_00000:
703 case MSR_MTRRfix16K_80000:
704 case MSR_MTRRfix16K_A0000:
705 case MSR_MTRRfix4K_C0000:
706 case MSR_MTRRfix4K_C8000:
707 case MSR_MTRRfix4K_D0000:
708 case MSR_MTRRfix4K_D8000:
709 case MSR_MTRRfix4K_E0000:
710 case MSR_MTRRfix4K_E8000:
711 case MSR_MTRRfix4K_F0000:
712 case MSR_MTRRfix4K_F8000:
713 case MSR_MTRRdefType:
714 case MSR_IA32_CR_PAT:
715 return true;
716 case 0x2f8:
717 return true;
718 }
719 return false;
720 }
721
722 static bool valid_pat_type(unsigned t)
723 {
724 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
725 }
726
727 static bool valid_mtrr_type(unsigned t)
728 {
729 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
730 }
731
732 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
733 {
734 int i;
735
736 if (!msr_mtrr_valid(msr))
737 return false;
738
739 if (msr == MSR_IA32_CR_PAT) {
740 for (i = 0; i < 8; i++)
741 if (!valid_pat_type((data >> (i * 8)) & 0xff))
742 return false;
743 return true;
744 } else if (msr == MSR_MTRRdefType) {
745 if (data & ~0xcff)
746 return false;
747 return valid_mtrr_type(data & 0xff);
748 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
749 for (i = 0; i < 8 ; i++)
750 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
751 return false;
752 return true;
753 }
754
755 /* variable MTRRs */
756 return valid_mtrr_type(data & 0xff);
757 }
758
759 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
760 {
761 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
762
763 if (!mtrr_valid(vcpu, msr, data))
764 return 1;
765
766 if (msr == MSR_MTRRdefType) {
767 vcpu->arch.mtrr_state.def_type = data;
768 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
769 } else if (msr == MSR_MTRRfix64K_00000)
770 p[0] = data;
771 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
772 p[1 + msr - MSR_MTRRfix16K_80000] = data;
773 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
774 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
775 else if (msr == MSR_IA32_CR_PAT)
776 vcpu->arch.pat = data;
777 else { /* Variable MTRRs */
778 int idx, is_mtrr_mask;
779 u64 *pt;
780
781 idx = (msr - 0x200) / 2;
782 is_mtrr_mask = msr - 0x200 - 2 * idx;
783 if (!is_mtrr_mask)
784 pt =
785 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
786 else
787 pt =
788 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
789 *pt = data;
790 }
791
792 kvm_mmu_reset_context(vcpu);
793 return 0;
794 }
795
796 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
797 {
798 switch (msr) {
799 case MSR_EFER:
800 set_efer(vcpu, data);
801 break;
802 case MSR_IA32_MC0_STATUS:
803 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
804 __func__, data);
805 break;
806 case MSR_IA32_MCG_STATUS:
807 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
808 __func__, data);
809 break;
810 case MSR_IA32_MCG_CTL:
811 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
812 __func__, data);
813 break;
814 case MSR_IA32_DEBUGCTLMSR:
815 if (!data) {
816 /* We support the non-activated case already */
817 break;
818 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
819 /* Values other than LBR and BTF are vendor-specific,
820 thus reserved and should throw a #GP */
821 return 1;
822 }
823 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
824 __func__, data);
825 break;
826 case MSR_IA32_UCODE_REV:
827 case MSR_IA32_UCODE_WRITE:
828 case MSR_VM_HSAVE_PA:
829 break;
830 case 0x200 ... 0x2ff:
831 return set_msr_mtrr(vcpu, msr, data);
832 case MSR_IA32_APICBASE:
833 kvm_set_apic_base(vcpu, data);
834 break;
835 case MSR_IA32_MISC_ENABLE:
836 vcpu->arch.ia32_misc_enable_msr = data;
837 break;
838 case MSR_KVM_WALL_CLOCK:
839 vcpu->kvm->arch.wall_clock = data;
840 kvm_write_wall_clock(vcpu->kvm, data);
841 break;
842 case MSR_KVM_SYSTEM_TIME: {
843 if (vcpu->arch.time_page) {
844 kvm_release_page_dirty(vcpu->arch.time_page);
845 vcpu->arch.time_page = NULL;
846 }
847
848 vcpu->arch.time = data;
849
850 /* we verify if the enable bit is set... */
851 if (!(data & 1))
852 break;
853
854 /* ...but clean it before doing the actual write */
855 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
856
857 vcpu->arch.time_page =
858 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
859
860 if (is_error_page(vcpu->arch.time_page)) {
861 kvm_release_page_clean(vcpu->arch.time_page);
862 vcpu->arch.time_page = NULL;
863 }
864
865 kvm_request_guest_time_update(vcpu);
866 break;
867 }
868 default:
869 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
870 return 1;
871 }
872 return 0;
873 }
874 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
875
876
877 /*
878 * Reads an msr value (of 'msr_index') into 'pdata'.
879 * Returns 0 on success, non-0 otherwise.
880 * Assumes vcpu_load() was already called.
881 */
882 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
883 {
884 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
885 }
886
887 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
888 {
889 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
890
891 if (!msr_mtrr_valid(msr))
892 return 1;
893
894 if (msr == MSR_MTRRdefType)
895 *pdata = vcpu->arch.mtrr_state.def_type +
896 (vcpu->arch.mtrr_state.enabled << 10);
897 else if (msr == MSR_MTRRfix64K_00000)
898 *pdata = p[0];
899 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
900 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
901 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
902 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
903 else if (msr == MSR_IA32_CR_PAT)
904 *pdata = vcpu->arch.pat;
905 else { /* Variable MTRRs */
906 int idx, is_mtrr_mask;
907 u64 *pt;
908
909 idx = (msr - 0x200) / 2;
910 is_mtrr_mask = msr - 0x200 - 2 * idx;
911 if (!is_mtrr_mask)
912 pt =
913 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
914 else
915 pt =
916 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
917 *pdata = *pt;
918 }
919
920 return 0;
921 }
922
923 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
924 {
925 u64 data;
926
927 switch (msr) {
928 case 0xc0010010: /* SYSCFG */
929 case 0xc0010015: /* HWCR */
930 case MSR_IA32_PLATFORM_ID:
931 case MSR_IA32_P5_MC_ADDR:
932 case MSR_IA32_P5_MC_TYPE:
933 case MSR_IA32_MC0_CTL:
934 case MSR_IA32_MCG_STATUS:
935 case MSR_IA32_MCG_CAP:
936 case MSR_IA32_MCG_CTL:
937 case MSR_IA32_MC0_MISC:
938 case MSR_IA32_MC0_MISC+4:
939 case MSR_IA32_MC0_MISC+8:
940 case MSR_IA32_MC0_MISC+12:
941 case MSR_IA32_MC0_MISC+16:
942 case MSR_IA32_MC0_MISC+20:
943 case MSR_IA32_UCODE_REV:
944 case MSR_IA32_EBL_CR_POWERON:
945 case MSR_IA32_DEBUGCTLMSR:
946 case MSR_IA32_LASTBRANCHFROMIP:
947 case MSR_IA32_LASTBRANCHTOIP:
948 case MSR_IA32_LASTINTFROMIP:
949 case MSR_IA32_LASTINTTOIP:
950 case MSR_VM_HSAVE_PA:
951 case MSR_P6_EVNTSEL0:
952 case MSR_P6_EVNTSEL1:
953 case MSR_K7_EVNTSEL0:
954 data = 0;
955 break;
956 case MSR_MTRRcap:
957 data = 0x500 | KVM_NR_VAR_MTRR;
958 break;
959 case 0x200 ... 0x2ff:
960 return get_msr_mtrr(vcpu, msr, pdata);
961 case 0xcd: /* fsb frequency */
962 data = 3;
963 break;
964 case MSR_IA32_APICBASE:
965 data = kvm_get_apic_base(vcpu);
966 break;
967 case MSR_IA32_MISC_ENABLE:
968 data = vcpu->arch.ia32_misc_enable_msr;
969 break;
970 case MSR_IA32_PERF_STATUS:
971 /* TSC increment by tick */
972 data = 1000ULL;
973 /* CPU multiplier */
974 data |= (((uint64_t)4ULL) << 40);
975 break;
976 case MSR_EFER:
977 data = vcpu->arch.shadow_efer;
978 break;
979 case MSR_KVM_WALL_CLOCK:
980 data = vcpu->kvm->arch.wall_clock;
981 break;
982 case MSR_KVM_SYSTEM_TIME:
983 data = vcpu->arch.time;
984 break;
985 default:
986 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
987 return 1;
988 }
989 *pdata = data;
990 return 0;
991 }
992 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
993
994 /*
995 * Read or write a bunch of msrs. All parameters are kernel addresses.
996 *
997 * @return number of msrs set successfully.
998 */
999 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1000 struct kvm_msr_entry *entries,
1001 int (*do_msr)(struct kvm_vcpu *vcpu,
1002 unsigned index, u64 *data))
1003 {
1004 int i;
1005
1006 vcpu_load(vcpu);
1007
1008 down_read(&vcpu->kvm->slots_lock);
1009 for (i = 0; i < msrs->nmsrs; ++i)
1010 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1011 break;
1012 up_read(&vcpu->kvm->slots_lock);
1013
1014 vcpu_put(vcpu);
1015
1016 return i;
1017 }
1018
1019 /*
1020 * Read or write a bunch of msrs. Parameters are user addresses.
1021 *
1022 * @return number of msrs set successfully.
1023 */
1024 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1025 int (*do_msr)(struct kvm_vcpu *vcpu,
1026 unsigned index, u64 *data),
1027 int writeback)
1028 {
1029 struct kvm_msrs msrs;
1030 struct kvm_msr_entry *entries;
1031 int r, n;
1032 unsigned size;
1033
1034 r = -EFAULT;
1035 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1036 goto out;
1037
1038 r = -E2BIG;
1039 if (msrs.nmsrs >= MAX_IO_MSRS)
1040 goto out;
1041
1042 r = -ENOMEM;
1043 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1044 entries = vmalloc(size);
1045 if (!entries)
1046 goto out;
1047
1048 r = -EFAULT;
1049 if (copy_from_user(entries, user_msrs->entries, size))
1050 goto out_free;
1051
1052 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1053 if (r < 0)
1054 goto out_free;
1055
1056 r = -EFAULT;
1057 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1058 goto out_free;
1059
1060 r = n;
1061
1062 out_free:
1063 vfree(entries);
1064 out:
1065 return r;
1066 }
1067
1068 int kvm_dev_ioctl_check_extension(long ext)
1069 {
1070 int r;
1071
1072 switch (ext) {
1073 case KVM_CAP_IRQCHIP:
1074 case KVM_CAP_HLT:
1075 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1076 case KVM_CAP_SET_TSS_ADDR:
1077 case KVM_CAP_EXT_CPUID:
1078 case KVM_CAP_CLOCKSOURCE:
1079 case KVM_CAP_PIT:
1080 case KVM_CAP_NOP_IO_DELAY:
1081 case KVM_CAP_MP_STATE:
1082 case KVM_CAP_SYNC_MMU:
1083 case KVM_CAP_REINJECT_CONTROL:
1084 case KVM_CAP_IRQ_INJECT_STATUS:
1085 r = 1;
1086 break;
1087 case KVM_CAP_COALESCED_MMIO:
1088 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1089 break;
1090 case KVM_CAP_VAPIC:
1091 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1092 break;
1093 case KVM_CAP_NR_VCPUS:
1094 r = KVM_MAX_VCPUS;
1095 break;
1096 case KVM_CAP_NR_MEMSLOTS:
1097 r = KVM_MEMORY_SLOTS;
1098 break;
1099 case KVM_CAP_PV_MMU:
1100 r = !tdp_enabled;
1101 break;
1102 case KVM_CAP_IOMMU:
1103 r = iommu_found();
1104 break;
1105 default:
1106 r = 0;
1107 break;
1108 }
1109 return r;
1110
1111 }
1112
1113 long kvm_arch_dev_ioctl(struct file *filp,
1114 unsigned int ioctl, unsigned long arg)
1115 {
1116 void __user *argp = (void __user *)arg;
1117 long r;
1118
1119 switch (ioctl) {
1120 case KVM_GET_MSR_INDEX_LIST: {
1121 struct kvm_msr_list __user *user_msr_list = argp;
1122 struct kvm_msr_list msr_list;
1123 unsigned n;
1124
1125 r = -EFAULT;
1126 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1127 goto out;
1128 n = msr_list.nmsrs;
1129 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1130 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1131 goto out;
1132 r = -E2BIG;
1133 if (n < msr_list.nmsrs)
1134 goto out;
1135 r = -EFAULT;
1136 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1137 num_msrs_to_save * sizeof(u32)))
1138 goto out;
1139 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1140 &emulated_msrs,
1141 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1142 goto out;
1143 r = 0;
1144 break;
1145 }
1146 case KVM_GET_SUPPORTED_CPUID: {
1147 struct kvm_cpuid2 __user *cpuid_arg = argp;
1148 struct kvm_cpuid2 cpuid;
1149
1150 r = -EFAULT;
1151 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1152 goto out;
1153 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1154 cpuid_arg->entries);
1155 if (r)
1156 goto out;
1157
1158 r = -EFAULT;
1159 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1160 goto out;
1161 r = 0;
1162 break;
1163 }
1164 default:
1165 r = -EINVAL;
1166 }
1167 out:
1168 return r;
1169 }
1170
1171 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1172 {
1173 kvm_x86_ops->vcpu_load(vcpu, cpu);
1174 kvm_request_guest_time_update(vcpu);
1175 }
1176
1177 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1178 {
1179 kvm_x86_ops->vcpu_put(vcpu);
1180 kvm_put_guest_fpu(vcpu);
1181 }
1182
1183 static int is_efer_nx(void)
1184 {
1185 unsigned long long efer = 0;
1186
1187 rdmsrl_safe(MSR_EFER, &efer);
1188 return efer & EFER_NX;
1189 }
1190
1191 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1192 {
1193 int i;
1194 struct kvm_cpuid_entry2 *e, *entry;
1195
1196 entry = NULL;
1197 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1198 e = &vcpu->arch.cpuid_entries[i];
1199 if (e->function == 0x80000001) {
1200 entry = e;
1201 break;
1202 }
1203 }
1204 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1205 entry->edx &= ~(1 << 20);
1206 printk(KERN_INFO "kvm: guest NX capability removed\n");
1207 }
1208 }
1209
1210 /* when an old userspace process fills a new kernel module */
1211 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1212 struct kvm_cpuid *cpuid,
1213 struct kvm_cpuid_entry __user *entries)
1214 {
1215 int r, i;
1216 struct kvm_cpuid_entry *cpuid_entries;
1217
1218 r = -E2BIG;
1219 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1220 goto out;
1221 r = -ENOMEM;
1222 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1223 if (!cpuid_entries)
1224 goto out;
1225 r = -EFAULT;
1226 if (copy_from_user(cpuid_entries, entries,
1227 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1228 goto out_free;
1229 for (i = 0; i < cpuid->nent; i++) {
1230 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1231 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1232 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1233 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1234 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1235 vcpu->arch.cpuid_entries[i].index = 0;
1236 vcpu->arch.cpuid_entries[i].flags = 0;
1237 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1238 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1239 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1240 }
1241 vcpu->arch.cpuid_nent = cpuid->nent;
1242 cpuid_fix_nx_cap(vcpu);
1243 r = 0;
1244
1245 out_free:
1246 vfree(cpuid_entries);
1247 out:
1248 return r;
1249 }
1250
1251 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1252 struct kvm_cpuid2 *cpuid,
1253 struct kvm_cpuid_entry2 __user *entries)
1254 {
1255 int r;
1256
1257 r = -E2BIG;
1258 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1259 goto out;
1260 r = -EFAULT;
1261 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1262 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1263 goto out;
1264 vcpu->arch.cpuid_nent = cpuid->nent;
1265 return 0;
1266
1267 out:
1268 return r;
1269 }
1270
1271 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1272 struct kvm_cpuid2 *cpuid,
1273 struct kvm_cpuid_entry2 __user *entries)
1274 {
1275 int r;
1276
1277 r = -E2BIG;
1278 if (cpuid->nent < vcpu->arch.cpuid_nent)
1279 goto out;
1280 r = -EFAULT;
1281 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1282 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1283 goto out;
1284 return 0;
1285
1286 out:
1287 cpuid->nent = vcpu->arch.cpuid_nent;
1288 return r;
1289 }
1290
1291 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1292 u32 index)
1293 {
1294 entry->function = function;
1295 entry->index = index;
1296 cpuid_count(entry->function, entry->index,
1297 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1298 entry->flags = 0;
1299 }
1300
1301 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1302 u32 index, int *nent, int maxnent)
1303 {
1304 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1305 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1306 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1307 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1308 bit(X86_FEATURE_MCE) |
1309 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1310 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_MTRR) |
1311 bit(X86_FEATURE_PGE) | bit(X86_FEATURE_MCA) |
1312 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PAT) |
1313 bit(X86_FEATURE_PSE36) |
1314 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1315 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1316 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1317 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1318 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1319 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1320 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1321 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1322 bit(X86_FEATURE_PGE) |
1323 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1324 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1325 bit(X86_FEATURE_SYSCALL) |
1326 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1327 #ifdef CONFIG_X86_64
1328 bit(X86_FEATURE_LM) |
1329 #endif
1330 bit(X86_FEATURE_FXSR_OPT) |
1331 bit(X86_FEATURE_MMXEXT) |
1332 bit(X86_FEATURE_3DNOWEXT) |
1333 bit(X86_FEATURE_3DNOW);
1334 const u32 kvm_supported_word3_x86_features =
1335 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1336 const u32 kvm_supported_word6_x86_features =
1337 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1338 bit(X86_FEATURE_SVM);
1339
1340 /* all calls to cpuid_count() should be made on the same cpu */
1341 get_cpu();
1342 do_cpuid_1_ent(entry, function, index);
1343 ++*nent;
1344
1345 switch (function) {
1346 case 0:
1347 entry->eax = min(entry->eax, (u32)0xb);
1348 break;
1349 case 1:
1350 entry->edx &= kvm_supported_word0_x86_features;
1351 entry->ecx &= kvm_supported_word3_x86_features;
1352 break;
1353 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1354 * may return different values. This forces us to get_cpu() before
1355 * issuing the first command, and also to emulate this annoying behavior
1356 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1357 case 2: {
1358 int t, times = entry->eax & 0xff;
1359
1360 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1361 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1362 for (t = 1; t < times && *nent < maxnent; ++t) {
1363 do_cpuid_1_ent(&entry[t], function, 0);
1364 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1365 ++*nent;
1366 }
1367 break;
1368 }
1369 /* function 4 and 0xb have additional index. */
1370 case 4: {
1371 int i, cache_type;
1372
1373 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1374 /* read more entries until cache_type is zero */
1375 for (i = 1; *nent < maxnent; ++i) {
1376 cache_type = entry[i - 1].eax & 0x1f;
1377 if (!cache_type)
1378 break;
1379 do_cpuid_1_ent(&entry[i], function, i);
1380 entry[i].flags |=
1381 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1382 ++*nent;
1383 }
1384 break;
1385 }
1386 case 0xb: {
1387 int i, level_type;
1388
1389 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1390 /* read more entries until level_type is zero */
1391 for (i = 1; *nent < maxnent; ++i) {
1392 level_type = entry[i - 1].ecx & 0xff00;
1393 if (!level_type)
1394 break;
1395 do_cpuid_1_ent(&entry[i], function, i);
1396 entry[i].flags |=
1397 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1398 ++*nent;
1399 }
1400 break;
1401 }
1402 case 0x80000000:
1403 entry->eax = min(entry->eax, 0x8000001a);
1404 break;
1405 case 0x80000001:
1406 entry->edx &= kvm_supported_word1_x86_features;
1407 entry->ecx &= kvm_supported_word6_x86_features;
1408 break;
1409 }
1410 put_cpu();
1411 }
1412
1413 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1414 struct kvm_cpuid_entry2 __user *entries)
1415 {
1416 struct kvm_cpuid_entry2 *cpuid_entries;
1417 int limit, nent = 0, r = -E2BIG;
1418 u32 func;
1419
1420 if (cpuid->nent < 1)
1421 goto out;
1422 r = -ENOMEM;
1423 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1424 if (!cpuid_entries)
1425 goto out;
1426
1427 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1428 limit = cpuid_entries[0].eax;
1429 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1430 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1431 &nent, cpuid->nent);
1432 r = -E2BIG;
1433 if (nent >= cpuid->nent)
1434 goto out_free;
1435
1436 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1437 limit = cpuid_entries[nent - 1].eax;
1438 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1439 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1440 &nent, cpuid->nent);
1441 r = -E2BIG;
1442 if (nent >= cpuid->nent)
1443 goto out_free;
1444
1445 r = -EFAULT;
1446 if (copy_to_user(entries, cpuid_entries,
1447 nent * sizeof(struct kvm_cpuid_entry2)))
1448 goto out_free;
1449 cpuid->nent = nent;
1450 r = 0;
1451
1452 out_free:
1453 vfree(cpuid_entries);
1454 out:
1455 return r;
1456 }
1457
1458 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1459 struct kvm_lapic_state *s)
1460 {
1461 vcpu_load(vcpu);
1462 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1463 vcpu_put(vcpu);
1464
1465 return 0;
1466 }
1467
1468 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1469 struct kvm_lapic_state *s)
1470 {
1471 vcpu_load(vcpu);
1472 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1473 kvm_apic_post_state_restore(vcpu);
1474 vcpu_put(vcpu);
1475
1476 return 0;
1477 }
1478
1479 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1480 struct kvm_interrupt *irq)
1481 {
1482 if (irq->irq < 0 || irq->irq >= 256)
1483 return -EINVAL;
1484 if (irqchip_in_kernel(vcpu->kvm))
1485 return -ENXIO;
1486 vcpu_load(vcpu);
1487
1488 set_bit(irq->irq, vcpu->arch.irq_pending);
1489 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1490
1491 vcpu_put(vcpu);
1492
1493 return 0;
1494 }
1495
1496 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1497 {
1498 vcpu_load(vcpu);
1499 kvm_inject_nmi(vcpu);
1500 vcpu_put(vcpu);
1501
1502 return 0;
1503 }
1504
1505 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1506 struct kvm_tpr_access_ctl *tac)
1507 {
1508 if (tac->flags)
1509 return -EINVAL;
1510 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1511 return 0;
1512 }
1513
1514 long kvm_arch_vcpu_ioctl(struct file *filp,
1515 unsigned int ioctl, unsigned long arg)
1516 {
1517 struct kvm_vcpu *vcpu = filp->private_data;
1518 void __user *argp = (void __user *)arg;
1519 int r;
1520 struct kvm_lapic_state *lapic = NULL;
1521
1522 switch (ioctl) {
1523 case KVM_GET_LAPIC: {
1524 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1525
1526 r = -ENOMEM;
1527 if (!lapic)
1528 goto out;
1529 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1530 if (r)
1531 goto out;
1532 r = -EFAULT;
1533 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1534 goto out;
1535 r = 0;
1536 break;
1537 }
1538 case KVM_SET_LAPIC: {
1539 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1540 r = -ENOMEM;
1541 if (!lapic)
1542 goto out;
1543 r = -EFAULT;
1544 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1545 goto out;
1546 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1547 if (r)
1548 goto out;
1549 r = 0;
1550 break;
1551 }
1552 case KVM_INTERRUPT: {
1553 struct kvm_interrupt irq;
1554
1555 r = -EFAULT;
1556 if (copy_from_user(&irq, argp, sizeof irq))
1557 goto out;
1558 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1559 if (r)
1560 goto out;
1561 r = 0;
1562 break;
1563 }
1564 case KVM_NMI: {
1565 r = kvm_vcpu_ioctl_nmi(vcpu);
1566 if (r)
1567 goto out;
1568 r = 0;
1569 break;
1570 }
1571 case KVM_SET_CPUID: {
1572 struct kvm_cpuid __user *cpuid_arg = argp;
1573 struct kvm_cpuid cpuid;
1574
1575 r = -EFAULT;
1576 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1577 goto out;
1578 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1579 if (r)
1580 goto out;
1581 break;
1582 }
1583 case KVM_SET_CPUID2: {
1584 struct kvm_cpuid2 __user *cpuid_arg = argp;
1585 struct kvm_cpuid2 cpuid;
1586
1587 r = -EFAULT;
1588 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1589 goto out;
1590 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1591 cpuid_arg->entries);
1592 if (r)
1593 goto out;
1594 break;
1595 }
1596 case KVM_GET_CPUID2: {
1597 struct kvm_cpuid2 __user *cpuid_arg = argp;
1598 struct kvm_cpuid2 cpuid;
1599
1600 r = -EFAULT;
1601 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1602 goto out;
1603 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1604 cpuid_arg->entries);
1605 if (r)
1606 goto out;
1607 r = -EFAULT;
1608 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1609 goto out;
1610 r = 0;
1611 break;
1612 }
1613 case KVM_GET_MSRS:
1614 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1615 break;
1616 case KVM_SET_MSRS:
1617 r = msr_io(vcpu, argp, do_set_msr, 0);
1618 break;
1619 case KVM_TPR_ACCESS_REPORTING: {
1620 struct kvm_tpr_access_ctl tac;
1621
1622 r = -EFAULT;
1623 if (copy_from_user(&tac, argp, sizeof tac))
1624 goto out;
1625 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1626 if (r)
1627 goto out;
1628 r = -EFAULT;
1629 if (copy_to_user(argp, &tac, sizeof tac))
1630 goto out;
1631 r = 0;
1632 break;
1633 };
1634 case KVM_SET_VAPIC_ADDR: {
1635 struct kvm_vapic_addr va;
1636
1637 r = -EINVAL;
1638 if (!irqchip_in_kernel(vcpu->kvm))
1639 goto out;
1640 r = -EFAULT;
1641 if (copy_from_user(&va, argp, sizeof va))
1642 goto out;
1643 r = 0;
1644 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1645 break;
1646 }
1647 default:
1648 r = -EINVAL;
1649 }
1650 out:
1651 if (lapic)
1652 kfree(lapic);
1653 return r;
1654 }
1655
1656 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1657 {
1658 int ret;
1659
1660 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1661 return -1;
1662 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1663 return ret;
1664 }
1665
1666 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1667 u32 kvm_nr_mmu_pages)
1668 {
1669 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1670 return -EINVAL;
1671
1672 down_write(&kvm->slots_lock);
1673 spin_lock(&kvm->mmu_lock);
1674
1675 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1676 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1677
1678 spin_unlock(&kvm->mmu_lock);
1679 up_write(&kvm->slots_lock);
1680 return 0;
1681 }
1682
1683 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1684 {
1685 return kvm->arch.n_alloc_mmu_pages;
1686 }
1687
1688 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1689 {
1690 int i;
1691 struct kvm_mem_alias *alias;
1692
1693 for (i = 0; i < kvm->arch.naliases; ++i) {
1694 alias = &kvm->arch.aliases[i];
1695 if (gfn >= alias->base_gfn
1696 && gfn < alias->base_gfn + alias->npages)
1697 return alias->target_gfn + gfn - alias->base_gfn;
1698 }
1699 return gfn;
1700 }
1701
1702 /*
1703 * Set a new alias region. Aliases map a portion of physical memory into
1704 * another portion. This is useful for memory windows, for example the PC
1705 * VGA region.
1706 */
1707 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1708 struct kvm_memory_alias *alias)
1709 {
1710 int r, n;
1711 struct kvm_mem_alias *p;
1712
1713 r = -EINVAL;
1714 /* General sanity checks */
1715 if (alias->memory_size & (PAGE_SIZE - 1))
1716 goto out;
1717 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1718 goto out;
1719 if (alias->slot >= KVM_ALIAS_SLOTS)
1720 goto out;
1721 if (alias->guest_phys_addr + alias->memory_size
1722 < alias->guest_phys_addr)
1723 goto out;
1724 if (alias->target_phys_addr + alias->memory_size
1725 < alias->target_phys_addr)
1726 goto out;
1727
1728 down_write(&kvm->slots_lock);
1729 spin_lock(&kvm->mmu_lock);
1730
1731 p = &kvm->arch.aliases[alias->slot];
1732 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1733 p->npages = alias->memory_size >> PAGE_SHIFT;
1734 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1735
1736 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1737 if (kvm->arch.aliases[n - 1].npages)
1738 break;
1739 kvm->arch.naliases = n;
1740
1741 spin_unlock(&kvm->mmu_lock);
1742 kvm_mmu_zap_all(kvm);
1743
1744 up_write(&kvm->slots_lock);
1745
1746 return 0;
1747
1748 out:
1749 return r;
1750 }
1751
1752 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1753 {
1754 int r;
1755
1756 r = 0;
1757 switch (chip->chip_id) {
1758 case KVM_IRQCHIP_PIC_MASTER:
1759 memcpy(&chip->chip.pic,
1760 &pic_irqchip(kvm)->pics[0],
1761 sizeof(struct kvm_pic_state));
1762 break;
1763 case KVM_IRQCHIP_PIC_SLAVE:
1764 memcpy(&chip->chip.pic,
1765 &pic_irqchip(kvm)->pics[1],
1766 sizeof(struct kvm_pic_state));
1767 break;
1768 case KVM_IRQCHIP_IOAPIC:
1769 memcpy(&chip->chip.ioapic,
1770 ioapic_irqchip(kvm),
1771 sizeof(struct kvm_ioapic_state));
1772 break;
1773 default:
1774 r = -EINVAL;
1775 break;
1776 }
1777 return r;
1778 }
1779
1780 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1781 {
1782 int r;
1783
1784 r = 0;
1785 switch (chip->chip_id) {
1786 case KVM_IRQCHIP_PIC_MASTER:
1787 memcpy(&pic_irqchip(kvm)->pics[0],
1788 &chip->chip.pic,
1789 sizeof(struct kvm_pic_state));
1790 break;
1791 case KVM_IRQCHIP_PIC_SLAVE:
1792 memcpy(&pic_irqchip(kvm)->pics[1],
1793 &chip->chip.pic,
1794 sizeof(struct kvm_pic_state));
1795 break;
1796 case KVM_IRQCHIP_IOAPIC:
1797 memcpy(ioapic_irqchip(kvm),
1798 &chip->chip.ioapic,
1799 sizeof(struct kvm_ioapic_state));
1800 break;
1801 default:
1802 r = -EINVAL;
1803 break;
1804 }
1805 kvm_pic_update_irq(pic_irqchip(kvm));
1806 return r;
1807 }
1808
1809 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1810 {
1811 int r = 0;
1812
1813 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1814 return r;
1815 }
1816
1817 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1818 {
1819 int r = 0;
1820
1821 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1822 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1823 return r;
1824 }
1825
1826 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1827 struct kvm_reinject_control *control)
1828 {
1829 if (!kvm->arch.vpit)
1830 return -ENXIO;
1831 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1832 return 0;
1833 }
1834
1835 /*
1836 * Get (and clear) the dirty memory log for a memory slot.
1837 */
1838 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1839 struct kvm_dirty_log *log)
1840 {
1841 int r;
1842 int n;
1843 struct kvm_memory_slot *memslot;
1844 int is_dirty = 0;
1845
1846 down_write(&kvm->slots_lock);
1847
1848 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1849 if (r)
1850 goto out;
1851
1852 /* If nothing is dirty, don't bother messing with page tables. */
1853 if (is_dirty) {
1854 spin_lock(&kvm->mmu_lock);
1855 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1856 spin_unlock(&kvm->mmu_lock);
1857 kvm_flush_remote_tlbs(kvm);
1858 memslot = &kvm->memslots[log->slot];
1859 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1860 memset(memslot->dirty_bitmap, 0, n);
1861 }
1862 r = 0;
1863 out:
1864 up_write(&kvm->slots_lock);
1865 return r;
1866 }
1867
1868 long kvm_arch_vm_ioctl(struct file *filp,
1869 unsigned int ioctl, unsigned long arg)
1870 {
1871 struct kvm *kvm = filp->private_data;
1872 void __user *argp = (void __user *)arg;
1873 int r = -EINVAL;
1874 /*
1875 * This union makes it completely explicit to gcc-3.x
1876 * that these two variables' stack usage should be
1877 * combined, not added together.
1878 */
1879 union {
1880 struct kvm_pit_state ps;
1881 struct kvm_memory_alias alias;
1882 } u;
1883
1884 switch (ioctl) {
1885 case KVM_SET_TSS_ADDR:
1886 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1887 if (r < 0)
1888 goto out;
1889 break;
1890 case KVM_SET_MEMORY_REGION: {
1891 struct kvm_memory_region kvm_mem;
1892 struct kvm_userspace_memory_region kvm_userspace_mem;
1893
1894 r = -EFAULT;
1895 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1896 goto out;
1897 kvm_userspace_mem.slot = kvm_mem.slot;
1898 kvm_userspace_mem.flags = kvm_mem.flags;
1899 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1900 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1901 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1902 if (r)
1903 goto out;
1904 break;
1905 }
1906 case KVM_SET_NR_MMU_PAGES:
1907 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1908 if (r)
1909 goto out;
1910 break;
1911 case KVM_GET_NR_MMU_PAGES:
1912 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1913 break;
1914 case KVM_SET_MEMORY_ALIAS:
1915 r = -EFAULT;
1916 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1917 goto out;
1918 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1919 if (r)
1920 goto out;
1921 break;
1922 case KVM_CREATE_IRQCHIP:
1923 r = -ENOMEM;
1924 kvm->arch.vpic = kvm_create_pic(kvm);
1925 if (kvm->arch.vpic) {
1926 r = kvm_ioapic_init(kvm);
1927 if (r) {
1928 kfree(kvm->arch.vpic);
1929 kvm->arch.vpic = NULL;
1930 goto out;
1931 }
1932 } else
1933 goto out;
1934 r = kvm_setup_default_irq_routing(kvm);
1935 if (r) {
1936 kfree(kvm->arch.vpic);
1937 kfree(kvm->arch.vioapic);
1938 goto out;
1939 }
1940 break;
1941 case KVM_CREATE_PIT:
1942 mutex_lock(&kvm->lock);
1943 r = -EEXIST;
1944 if (kvm->arch.vpit)
1945 goto create_pit_unlock;
1946 r = -ENOMEM;
1947 kvm->arch.vpit = kvm_create_pit(kvm);
1948 if (kvm->arch.vpit)
1949 r = 0;
1950 create_pit_unlock:
1951 mutex_unlock(&kvm->lock);
1952 break;
1953 case KVM_IRQ_LINE_STATUS:
1954 case KVM_IRQ_LINE: {
1955 struct kvm_irq_level irq_event;
1956
1957 r = -EFAULT;
1958 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1959 goto out;
1960 if (irqchip_in_kernel(kvm)) {
1961 __s32 status;
1962 mutex_lock(&kvm->lock);
1963 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1964 irq_event.irq, irq_event.level);
1965 mutex_unlock(&kvm->lock);
1966 if (ioctl == KVM_IRQ_LINE_STATUS) {
1967 irq_event.status = status;
1968 if (copy_to_user(argp, &irq_event,
1969 sizeof irq_event))
1970 goto out;
1971 }
1972 r = 0;
1973 }
1974 break;
1975 }
1976 case KVM_GET_IRQCHIP: {
1977 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1978 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1979
1980 r = -ENOMEM;
1981 if (!chip)
1982 goto out;
1983 r = -EFAULT;
1984 if (copy_from_user(chip, argp, sizeof *chip))
1985 goto get_irqchip_out;
1986 r = -ENXIO;
1987 if (!irqchip_in_kernel(kvm))
1988 goto get_irqchip_out;
1989 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1990 if (r)
1991 goto get_irqchip_out;
1992 r = -EFAULT;
1993 if (copy_to_user(argp, chip, sizeof *chip))
1994 goto get_irqchip_out;
1995 r = 0;
1996 get_irqchip_out:
1997 kfree(chip);
1998 if (r)
1999 goto out;
2000 break;
2001 }
2002 case KVM_SET_IRQCHIP: {
2003 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2004 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2005
2006 r = -ENOMEM;
2007 if (!chip)
2008 goto out;
2009 r = -EFAULT;
2010 if (copy_from_user(chip, argp, sizeof *chip))
2011 goto set_irqchip_out;
2012 r = -ENXIO;
2013 if (!irqchip_in_kernel(kvm))
2014 goto set_irqchip_out;
2015 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2016 if (r)
2017 goto set_irqchip_out;
2018 r = 0;
2019 set_irqchip_out:
2020 kfree(chip);
2021 if (r)
2022 goto out;
2023 break;
2024 }
2025 case KVM_GET_PIT: {
2026 r = -EFAULT;
2027 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2028 goto out;
2029 r = -ENXIO;
2030 if (!kvm->arch.vpit)
2031 goto out;
2032 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2033 if (r)
2034 goto out;
2035 r = -EFAULT;
2036 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2037 goto out;
2038 r = 0;
2039 break;
2040 }
2041 case KVM_SET_PIT: {
2042 r = -EFAULT;
2043 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2044 goto out;
2045 r = -ENXIO;
2046 if (!kvm->arch.vpit)
2047 goto out;
2048 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2049 if (r)
2050 goto out;
2051 r = 0;
2052 break;
2053 }
2054 case KVM_REINJECT_CONTROL: {
2055 struct kvm_reinject_control control;
2056 r = -EFAULT;
2057 if (copy_from_user(&control, argp, sizeof(control)))
2058 goto out;
2059 r = kvm_vm_ioctl_reinject(kvm, &control);
2060 if (r)
2061 goto out;
2062 r = 0;
2063 break;
2064 }
2065 default:
2066 ;
2067 }
2068 out:
2069 return r;
2070 }
2071
2072 static void kvm_init_msr_list(void)
2073 {
2074 u32 dummy[2];
2075 unsigned i, j;
2076
2077 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2078 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2079 continue;
2080 if (j < i)
2081 msrs_to_save[j] = msrs_to_save[i];
2082 j++;
2083 }
2084 num_msrs_to_save = j;
2085 }
2086
2087 /*
2088 * Only apic need an MMIO device hook, so shortcut now..
2089 */
2090 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2091 gpa_t addr, int len,
2092 int is_write)
2093 {
2094 struct kvm_io_device *dev;
2095
2096 if (vcpu->arch.apic) {
2097 dev = &vcpu->arch.apic->dev;
2098 if (dev->in_range(dev, addr, len, is_write))
2099 return dev;
2100 }
2101 return NULL;
2102 }
2103
2104
2105 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2106 gpa_t addr, int len,
2107 int is_write)
2108 {
2109 struct kvm_io_device *dev;
2110
2111 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2112 if (dev == NULL)
2113 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2114 is_write);
2115 return dev;
2116 }
2117
2118 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2119 struct kvm_vcpu *vcpu)
2120 {
2121 void *data = val;
2122 int r = X86EMUL_CONTINUE;
2123
2124 while (bytes) {
2125 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2126 unsigned offset = addr & (PAGE_SIZE-1);
2127 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2128 int ret;
2129
2130 if (gpa == UNMAPPED_GVA) {
2131 r = X86EMUL_PROPAGATE_FAULT;
2132 goto out;
2133 }
2134 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2135 if (ret < 0) {
2136 r = X86EMUL_UNHANDLEABLE;
2137 goto out;
2138 }
2139
2140 bytes -= toread;
2141 data += toread;
2142 addr += toread;
2143 }
2144 out:
2145 return r;
2146 }
2147
2148 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2149 struct kvm_vcpu *vcpu)
2150 {
2151 void *data = val;
2152 int r = X86EMUL_CONTINUE;
2153
2154 while (bytes) {
2155 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2156 unsigned offset = addr & (PAGE_SIZE-1);
2157 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2158 int ret;
2159
2160 if (gpa == UNMAPPED_GVA) {
2161 r = X86EMUL_PROPAGATE_FAULT;
2162 goto out;
2163 }
2164 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2165 if (ret < 0) {
2166 r = X86EMUL_UNHANDLEABLE;
2167 goto out;
2168 }
2169
2170 bytes -= towrite;
2171 data += towrite;
2172 addr += towrite;
2173 }
2174 out:
2175 return r;
2176 }
2177
2178
2179 static int emulator_read_emulated(unsigned long addr,
2180 void *val,
2181 unsigned int bytes,
2182 struct kvm_vcpu *vcpu)
2183 {
2184 struct kvm_io_device *mmio_dev;
2185 gpa_t gpa;
2186
2187 if (vcpu->mmio_read_completed) {
2188 memcpy(val, vcpu->mmio_data, bytes);
2189 vcpu->mmio_read_completed = 0;
2190 return X86EMUL_CONTINUE;
2191 }
2192
2193 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2194
2195 /* For APIC access vmexit */
2196 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2197 goto mmio;
2198
2199 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2200 == X86EMUL_CONTINUE)
2201 return X86EMUL_CONTINUE;
2202 if (gpa == UNMAPPED_GVA)
2203 return X86EMUL_PROPAGATE_FAULT;
2204
2205 mmio:
2206 /*
2207 * Is this MMIO handled locally?
2208 */
2209 mutex_lock(&vcpu->kvm->lock);
2210 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2211 if (mmio_dev) {
2212 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2213 mutex_unlock(&vcpu->kvm->lock);
2214 return X86EMUL_CONTINUE;
2215 }
2216 mutex_unlock(&vcpu->kvm->lock);
2217
2218 vcpu->mmio_needed = 1;
2219 vcpu->mmio_phys_addr = gpa;
2220 vcpu->mmio_size = bytes;
2221 vcpu->mmio_is_write = 0;
2222
2223 return X86EMUL_UNHANDLEABLE;
2224 }
2225
2226 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2227 const void *val, int bytes)
2228 {
2229 int ret;
2230
2231 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2232 if (ret < 0)
2233 return 0;
2234 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2235 return 1;
2236 }
2237
2238 static int emulator_write_emulated_onepage(unsigned long addr,
2239 const void *val,
2240 unsigned int bytes,
2241 struct kvm_vcpu *vcpu)
2242 {
2243 struct kvm_io_device *mmio_dev;
2244 gpa_t gpa;
2245
2246 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2247
2248 if (gpa == UNMAPPED_GVA) {
2249 kvm_inject_page_fault(vcpu, addr, 2);
2250 return X86EMUL_PROPAGATE_FAULT;
2251 }
2252
2253 /* For APIC access vmexit */
2254 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2255 goto mmio;
2256
2257 if (emulator_write_phys(vcpu, gpa, val, bytes))
2258 return X86EMUL_CONTINUE;
2259
2260 mmio:
2261 /*
2262 * Is this MMIO handled locally?
2263 */
2264 mutex_lock(&vcpu->kvm->lock);
2265 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2266 if (mmio_dev) {
2267 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2268 mutex_unlock(&vcpu->kvm->lock);
2269 return X86EMUL_CONTINUE;
2270 }
2271 mutex_unlock(&vcpu->kvm->lock);
2272
2273 vcpu->mmio_needed = 1;
2274 vcpu->mmio_phys_addr = gpa;
2275 vcpu->mmio_size = bytes;
2276 vcpu->mmio_is_write = 1;
2277 memcpy(vcpu->mmio_data, val, bytes);
2278
2279 return X86EMUL_CONTINUE;
2280 }
2281
2282 int emulator_write_emulated(unsigned long addr,
2283 const void *val,
2284 unsigned int bytes,
2285 struct kvm_vcpu *vcpu)
2286 {
2287 /* Crossing a page boundary? */
2288 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2289 int rc, now;
2290
2291 now = -addr & ~PAGE_MASK;
2292 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2293 if (rc != X86EMUL_CONTINUE)
2294 return rc;
2295 addr += now;
2296 val += now;
2297 bytes -= now;
2298 }
2299 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2300 }
2301 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2302
2303 static int emulator_cmpxchg_emulated(unsigned long addr,
2304 const void *old,
2305 const void *new,
2306 unsigned int bytes,
2307 struct kvm_vcpu *vcpu)
2308 {
2309 static int reported;
2310
2311 if (!reported) {
2312 reported = 1;
2313 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2314 }
2315 #ifndef CONFIG_X86_64
2316 /* guests cmpxchg8b have to be emulated atomically */
2317 if (bytes == 8) {
2318 gpa_t gpa;
2319 struct page *page;
2320 char *kaddr;
2321 u64 val;
2322
2323 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2324
2325 if (gpa == UNMAPPED_GVA ||
2326 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2327 goto emul_write;
2328
2329 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2330 goto emul_write;
2331
2332 val = *(u64 *)new;
2333
2334 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2335
2336 kaddr = kmap_atomic(page, KM_USER0);
2337 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2338 kunmap_atomic(kaddr, KM_USER0);
2339 kvm_release_page_dirty(page);
2340 }
2341 emul_write:
2342 #endif
2343
2344 return emulator_write_emulated(addr, new, bytes, vcpu);
2345 }
2346
2347 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2348 {
2349 return kvm_x86_ops->get_segment_base(vcpu, seg);
2350 }
2351
2352 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2353 {
2354 kvm_mmu_invlpg(vcpu, address);
2355 return X86EMUL_CONTINUE;
2356 }
2357
2358 int emulate_clts(struct kvm_vcpu *vcpu)
2359 {
2360 KVMTRACE_0D(CLTS, vcpu, handler);
2361 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2362 return X86EMUL_CONTINUE;
2363 }
2364
2365 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2366 {
2367 struct kvm_vcpu *vcpu = ctxt->vcpu;
2368
2369 switch (dr) {
2370 case 0 ... 3:
2371 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2372 return X86EMUL_CONTINUE;
2373 default:
2374 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2375 return X86EMUL_UNHANDLEABLE;
2376 }
2377 }
2378
2379 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2380 {
2381 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2382 int exception;
2383
2384 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2385 if (exception) {
2386 /* FIXME: better handling */
2387 return X86EMUL_UNHANDLEABLE;
2388 }
2389 return X86EMUL_CONTINUE;
2390 }
2391
2392 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2393 {
2394 u8 opcodes[4];
2395 unsigned long rip = kvm_rip_read(vcpu);
2396 unsigned long rip_linear;
2397
2398 if (!printk_ratelimit())
2399 return;
2400
2401 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2402
2403 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2404
2405 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2406 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2407 }
2408 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2409
2410 static struct x86_emulate_ops emulate_ops = {
2411 .read_std = kvm_read_guest_virt,
2412 .read_emulated = emulator_read_emulated,
2413 .write_emulated = emulator_write_emulated,
2414 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2415 };
2416
2417 static void cache_all_regs(struct kvm_vcpu *vcpu)
2418 {
2419 kvm_register_read(vcpu, VCPU_REGS_RAX);
2420 kvm_register_read(vcpu, VCPU_REGS_RSP);
2421 kvm_register_read(vcpu, VCPU_REGS_RIP);
2422 vcpu->arch.regs_dirty = ~0;
2423 }
2424
2425 int emulate_instruction(struct kvm_vcpu *vcpu,
2426 struct kvm_run *run,
2427 unsigned long cr2,
2428 u16 error_code,
2429 int emulation_type)
2430 {
2431 int r, shadow_mask;
2432 struct decode_cache *c;
2433
2434 kvm_clear_exception_queue(vcpu);
2435 vcpu->arch.mmio_fault_cr2 = cr2;
2436 /*
2437 * TODO: fix x86_emulate.c to use guest_read/write_register
2438 * instead of direct ->regs accesses, can save hundred cycles
2439 * on Intel for instructions that don't read/change RSP, for
2440 * for example.
2441 */
2442 cache_all_regs(vcpu);
2443
2444 vcpu->mmio_is_write = 0;
2445 vcpu->arch.pio.string = 0;
2446
2447 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2448 int cs_db, cs_l;
2449 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2450
2451 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2452 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2453 vcpu->arch.emulate_ctxt.mode =
2454 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2455 ? X86EMUL_MODE_REAL : cs_l
2456 ? X86EMUL_MODE_PROT64 : cs_db
2457 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2458
2459 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2460
2461 /* Reject the instructions other than VMCALL/VMMCALL when
2462 * try to emulate invalid opcode */
2463 c = &vcpu->arch.emulate_ctxt.decode;
2464 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2465 (!(c->twobyte && c->b == 0x01 &&
2466 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2467 c->modrm_mod == 3 && c->modrm_rm == 1)))
2468 return EMULATE_FAIL;
2469
2470 ++vcpu->stat.insn_emulation;
2471 if (r) {
2472 ++vcpu->stat.insn_emulation_fail;
2473 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2474 return EMULATE_DONE;
2475 return EMULATE_FAIL;
2476 }
2477 }
2478
2479 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2480 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2481
2482 if (r == 0)
2483 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2484
2485 if (vcpu->arch.pio.string)
2486 return EMULATE_DO_MMIO;
2487
2488 if ((r || vcpu->mmio_is_write) && run) {
2489 run->exit_reason = KVM_EXIT_MMIO;
2490 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2491 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2492 run->mmio.len = vcpu->mmio_size;
2493 run->mmio.is_write = vcpu->mmio_is_write;
2494 }
2495
2496 if (r) {
2497 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2498 return EMULATE_DONE;
2499 if (!vcpu->mmio_needed) {
2500 kvm_report_emulation_failure(vcpu, "mmio");
2501 return EMULATE_FAIL;
2502 }
2503 return EMULATE_DO_MMIO;
2504 }
2505
2506 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2507
2508 if (vcpu->mmio_is_write) {
2509 vcpu->mmio_needed = 0;
2510 return EMULATE_DO_MMIO;
2511 }
2512
2513 return EMULATE_DONE;
2514 }
2515 EXPORT_SYMBOL_GPL(emulate_instruction);
2516
2517 static int pio_copy_data(struct kvm_vcpu *vcpu)
2518 {
2519 void *p = vcpu->arch.pio_data;
2520 gva_t q = vcpu->arch.pio.guest_gva;
2521 unsigned bytes;
2522 int ret;
2523
2524 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2525 if (vcpu->arch.pio.in)
2526 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2527 else
2528 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2529 return ret;
2530 }
2531
2532 int complete_pio(struct kvm_vcpu *vcpu)
2533 {
2534 struct kvm_pio_request *io = &vcpu->arch.pio;
2535 long delta;
2536 int r;
2537 unsigned long val;
2538
2539 if (!io->string) {
2540 if (io->in) {
2541 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2542 memcpy(&val, vcpu->arch.pio_data, io->size);
2543 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2544 }
2545 } else {
2546 if (io->in) {
2547 r = pio_copy_data(vcpu);
2548 if (r)
2549 return r;
2550 }
2551
2552 delta = 1;
2553 if (io->rep) {
2554 delta *= io->cur_count;
2555 /*
2556 * The size of the register should really depend on
2557 * current address size.
2558 */
2559 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2560 val -= delta;
2561 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2562 }
2563 if (io->down)
2564 delta = -delta;
2565 delta *= io->size;
2566 if (io->in) {
2567 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2568 val += delta;
2569 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2570 } else {
2571 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2572 val += delta;
2573 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2574 }
2575 }
2576
2577 io->count -= io->cur_count;
2578 io->cur_count = 0;
2579
2580 return 0;
2581 }
2582
2583 static void kernel_pio(struct kvm_io_device *pio_dev,
2584 struct kvm_vcpu *vcpu,
2585 void *pd)
2586 {
2587 /* TODO: String I/O for in kernel device */
2588
2589 mutex_lock(&vcpu->kvm->lock);
2590 if (vcpu->arch.pio.in)
2591 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2592 vcpu->arch.pio.size,
2593 pd);
2594 else
2595 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2596 vcpu->arch.pio.size,
2597 pd);
2598 mutex_unlock(&vcpu->kvm->lock);
2599 }
2600
2601 static void pio_string_write(struct kvm_io_device *pio_dev,
2602 struct kvm_vcpu *vcpu)
2603 {
2604 struct kvm_pio_request *io = &vcpu->arch.pio;
2605 void *pd = vcpu->arch.pio_data;
2606 int i;
2607
2608 mutex_lock(&vcpu->kvm->lock);
2609 for (i = 0; i < io->cur_count; i++) {
2610 kvm_iodevice_write(pio_dev, io->port,
2611 io->size,
2612 pd);
2613 pd += io->size;
2614 }
2615 mutex_unlock(&vcpu->kvm->lock);
2616 }
2617
2618 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2619 gpa_t addr, int len,
2620 int is_write)
2621 {
2622 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2623 }
2624
2625 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2626 int size, unsigned port)
2627 {
2628 struct kvm_io_device *pio_dev;
2629 unsigned long val;
2630
2631 vcpu->run->exit_reason = KVM_EXIT_IO;
2632 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2633 vcpu->run->io.size = vcpu->arch.pio.size = size;
2634 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2635 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2636 vcpu->run->io.port = vcpu->arch.pio.port = port;
2637 vcpu->arch.pio.in = in;
2638 vcpu->arch.pio.string = 0;
2639 vcpu->arch.pio.down = 0;
2640 vcpu->arch.pio.rep = 0;
2641
2642 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2643 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2644 handler);
2645 else
2646 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2647 handler);
2648
2649 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2650 memcpy(vcpu->arch.pio_data, &val, 4);
2651
2652 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2653 if (pio_dev) {
2654 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2655 complete_pio(vcpu);
2656 return 1;
2657 }
2658 return 0;
2659 }
2660 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2661
2662 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2663 int size, unsigned long count, int down,
2664 gva_t address, int rep, unsigned port)
2665 {
2666 unsigned now, in_page;
2667 int ret = 0;
2668 struct kvm_io_device *pio_dev;
2669
2670 vcpu->run->exit_reason = KVM_EXIT_IO;
2671 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2672 vcpu->run->io.size = vcpu->arch.pio.size = size;
2673 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2674 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2675 vcpu->run->io.port = vcpu->arch.pio.port = port;
2676 vcpu->arch.pio.in = in;
2677 vcpu->arch.pio.string = 1;
2678 vcpu->arch.pio.down = down;
2679 vcpu->arch.pio.rep = rep;
2680
2681 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2682 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2683 handler);
2684 else
2685 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2686 handler);
2687
2688 if (!count) {
2689 kvm_x86_ops->skip_emulated_instruction(vcpu);
2690 return 1;
2691 }
2692
2693 if (!down)
2694 in_page = PAGE_SIZE - offset_in_page(address);
2695 else
2696 in_page = offset_in_page(address) + size;
2697 now = min(count, (unsigned long)in_page / size);
2698 if (!now)
2699 now = 1;
2700 if (down) {
2701 /*
2702 * String I/O in reverse. Yuck. Kill the guest, fix later.
2703 */
2704 pr_unimpl(vcpu, "guest string pio down\n");
2705 kvm_inject_gp(vcpu, 0);
2706 return 1;
2707 }
2708 vcpu->run->io.count = now;
2709 vcpu->arch.pio.cur_count = now;
2710
2711 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2712 kvm_x86_ops->skip_emulated_instruction(vcpu);
2713
2714 vcpu->arch.pio.guest_gva = address;
2715
2716 pio_dev = vcpu_find_pio_dev(vcpu, port,
2717 vcpu->arch.pio.cur_count,
2718 !vcpu->arch.pio.in);
2719 if (!vcpu->arch.pio.in) {
2720 /* string PIO write */
2721 ret = pio_copy_data(vcpu);
2722 if (ret == X86EMUL_PROPAGATE_FAULT) {
2723 kvm_inject_gp(vcpu, 0);
2724 return 1;
2725 }
2726 if (ret == 0 && pio_dev) {
2727 pio_string_write(pio_dev, vcpu);
2728 complete_pio(vcpu);
2729 if (vcpu->arch.pio.count == 0)
2730 ret = 1;
2731 }
2732 } else if (pio_dev)
2733 pr_unimpl(vcpu, "no string pio read support yet, "
2734 "port %x size %d count %ld\n",
2735 port, size, count);
2736
2737 return ret;
2738 }
2739 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2740
2741 static void bounce_off(void *info)
2742 {
2743 /* nothing */
2744 }
2745
2746 static unsigned int ref_freq;
2747 static unsigned long tsc_khz_ref;
2748
2749 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2750 void *data)
2751 {
2752 struct cpufreq_freqs *freq = data;
2753 struct kvm *kvm;
2754 struct kvm_vcpu *vcpu;
2755 int i, send_ipi = 0;
2756
2757 if (!ref_freq)
2758 ref_freq = freq->old;
2759
2760 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2761 return 0;
2762 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2763 return 0;
2764 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2765
2766 spin_lock(&kvm_lock);
2767 list_for_each_entry(kvm, &vm_list, vm_list) {
2768 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2769 vcpu = kvm->vcpus[i];
2770 if (!vcpu)
2771 continue;
2772 if (vcpu->cpu != freq->cpu)
2773 continue;
2774 if (!kvm_request_guest_time_update(vcpu))
2775 continue;
2776 if (vcpu->cpu != smp_processor_id())
2777 send_ipi++;
2778 }
2779 }
2780 spin_unlock(&kvm_lock);
2781
2782 if (freq->old < freq->new && send_ipi) {
2783 /*
2784 * We upscale the frequency. Must make the guest
2785 * doesn't see old kvmclock values while running with
2786 * the new frequency, otherwise we risk the guest sees
2787 * time go backwards.
2788 *
2789 * In case we update the frequency for another cpu
2790 * (which might be in guest context) send an interrupt
2791 * to kick the cpu out of guest context. Next time
2792 * guest context is entered kvmclock will be updated,
2793 * so the guest will not see stale values.
2794 */
2795 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2796 }
2797 return 0;
2798 }
2799
2800 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2801 .notifier_call = kvmclock_cpufreq_notifier
2802 };
2803
2804 int kvm_arch_init(void *opaque)
2805 {
2806 int r, cpu;
2807 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2808
2809 if (kvm_x86_ops) {
2810 printk(KERN_ERR "kvm: already loaded the other module\n");
2811 r = -EEXIST;
2812 goto out;
2813 }
2814
2815 if (!ops->cpu_has_kvm_support()) {
2816 printk(KERN_ERR "kvm: no hardware support\n");
2817 r = -EOPNOTSUPP;
2818 goto out;
2819 }
2820 if (ops->disabled_by_bios()) {
2821 printk(KERN_ERR "kvm: disabled by bios\n");
2822 r = -EOPNOTSUPP;
2823 goto out;
2824 }
2825
2826 r = kvm_mmu_module_init();
2827 if (r)
2828 goto out;
2829
2830 kvm_init_msr_list();
2831
2832 kvm_x86_ops = ops;
2833 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2834 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2835 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2836 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2837
2838 for_each_possible_cpu(cpu)
2839 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2840 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2841 tsc_khz_ref = tsc_khz;
2842 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2843 CPUFREQ_TRANSITION_NOTIFIER);
2844 }
2845
2846 return 0;
2847
2848 out:
2849 return r;
2850 }
2851
2852 void kvm_arch_exit(void)
2853 {
2854 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2855 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2856 CPUFREQ_TRANSITION_NOTIFIER);
2857 kvm_x86_ops = NULL;
2858 kvm_mmu_module_exit();
2859 }
2860
2861 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2862 {
2863 ++vcpu->stat.halt_exits;
2864 KVMTRACE_0D(HLT, vcpu, handler);
2865 if (irqchip_in_kernel(vcpu->kvm)) {
2866 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2867 return 1;
2868 } else {
2869 vcpu->run->exit_reason = KVM_EXIT_HLT;
2870 return 0;
2871 }
2872 }
2873 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2874
2875 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2876 unsigned long a1)
2877 {
2878 if (is_long_mode(vcpu))
2879 return a0;
2880 else
2881 return a0 | ((gpa_t)a1 << 32);
2882 }
2883
2884 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2885 {
2886 unsigned long nr, a0, a1, a2, a3, ret;
2887 int r = 1;
2888
2889 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2890 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2891 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2892 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2893 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2894
2895 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2896
2897 if (!is_long_mode(vcpu)) {
2898 nr &= 0xFFFFFFFF;
2899 a0 &= 0xFFFFFFFF;
2900 a1 &= 0xFFFFFFFF;
2901 a2 &= 0xFFFFFFFF;
2902 a3 &= 0xFFFFFFFF;
2903 }
2904
2905 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
2906 ret = -KVM_EPERM;
2907 goto out;
2908 }
2909
2910 switch (nr) {
2911 case KVM_HC_VAPIC_POLL_IRQ:
2912 ret = 0;
2913 break;
2914 case KVM_HC_MMU_OP:
2915 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2916 break;
2917 default:
2918 ret = -KVM_ENOSYS;
2919 break;
2920 }
2921 out:
2922 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2923 ++vcpu->stat.hypercalls;
2924 return r;
2925 }
2926 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2927
2928 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2929 {
2930 char instruction[3];
2931 int ret = 0;
2932 unsigned long rip = kvm_rip_read(vcpu);
2933
2934
2935 /*
2936 * Blow out the MMU to ensure that no other VCPU has an active mapping
2937 * to ensure that the updated hypercall appears atomically across all
2938 * VCPUs.
2939 */
2940 kvm_mmu_zap_all(vcpu->kvm);
2941
2942 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2943 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2944 != X86EMUL_CONTINUE)
2945 ret = -EFAULT;
2946
2947 return ret;
2948 }
2949
2950 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2951 {
2952 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2953 }
2954
2955 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2956 {
2957 struct descriptor_table dt = { limit, base };
2958
2959 kvm_x86_ops->set_gdt(vcpu, &dt);
2960 }
2961
2962 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2963 {
2964 struct descriptor_table dt = { limit, base };
2965
2966 kvm_x86_ops->set_idt(vcpu, &dt);
2967 }
2968
2969 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2970 unsigned long *rflags)
2971 {
2972 kvm_lmsw(vcpu, msw);
2973 *rflags = kvm_x86_ops->get_rflags(vcpu);
2974 }
2975
2976 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2977 {
2978 unsigned long value;
2979
2980 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2981 switch (cr) {
2982 case 0:
2983 value = vcpu->arch.cr0;
2984 break;
2985 case 2:
2986 value = vcpu->arch.cr2;
2987 break;
2988 case 3:
2989 value = vcpu->arch.cr3;
2990 break;
2991 case 4:
2992 value = vcpu->arch.cr4;
2993 break;
2994 case 8:
2995 value = kvm_get_cr8(vcpu);
2996 break;
2997 default:
2998 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2999 return 0;
3000 }
3001 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
3002 (u32)((u64)value >> 32), handler);
3003
3004 return value;
3005 }
3006
3007 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3008 unsigned long *rflags)
3009 {
3010 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
3011 (u32)((u64)val >> 32), handler);
3012
3013 switch (cr) {
3014 case 0:
3015 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3016 *rflags = kvm_x86_ops->get_rflags(vcpu);
3017 break;
3018 case 2:
3019 vcpu->arch.cr2 = val;
3020 break;
3021 case 3:
3022 kvm_set_cr3(vcpu, val);
3023 break;
3024 case 4:
3025 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3026 break;
3027 case 8:
3028 kvm_set_cr8(vcpu, val & 0xfUL);
3029 break;
3030 default:
3031 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3032 }
3033 }
3034
3035 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3036 {
3037 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3038 int j, nent = vcpu->arch.cpuid_nent;
3039
3040 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3041 /* when no next entry is found, the current entry[i] is reselected */
3042 for (j = i + 1; ; j = (j + 1) % nent) {
3043 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3044 if (ej->function == e->function) {
3045 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3046 return j;
3047 }
3048 }
3049 return 0; /* silence gcc, even though control never reaches here */
3050 }
3051
3052 /* find an entry with matching function, matching index (if needed), and that
3053 * should be read next (if it's stateful) */
3054 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3055 u32 function, u32 index)
3056 {
3057 if (e->function != function)
3058 return 0;
3059 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3060 return 0;
3061 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3062 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3063 return 0;
3064 return 1;
3065 }
3066
3067 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3068 u32 function, u32 index)
3069 {
3070 int i;
3071 struct kvm_cpuid_entry2 *best = NULL;
3072
3073 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3074 struct kvm_cpuid_entry2 *e;
3075
3076 e = &vcpu->arch.cpuid_entries[i];
3077 if (is_matching_cpuid_entry(e, function, index)) {
3078 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3079 move_to_next_stateful_cpuid_entry(vcpu, i);
3080 best = e;
3081 break;
3082 }
3083 /*
3084 * Both basic or both extended?
3085 */
3086 if (((e->function ^ function) & 0x80000000) == 0)
3087 if (!best || e->function > best->function)
3088 best = e;
3089 }
3090 return best;
3091 }
3092
3093 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3094 {
3095 u32 function, index;
3096 struct kvm_cpuid_entry2 *best;
3097
3098 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3099 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3100 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3101 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3102 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3103 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3104 best = kvm_find_cpuid_entry(vcpu, function, index);
3105 if (best) {
3106 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3107 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3108 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3109 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3110 }
3111 kvm_x86_ops->skip_emulated_instruction(vcpu);
3112 KVMTRACE_5D(CPUID, vcpu, function,
3113 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3114 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3115 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3116 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3117 }
3118 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3119
3120 /*
3121 * Check if userspace requested an interrupt window, and that the
3122 * interrupt window is open.
3123 *
3124 * No need to exit to userspace if we already have an interrupt queued.
3125 */
3126 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3127 struct kvm_run *kvm_run)
3128 {
3129 return (!vcpu->arch.irq_summary &&
3130 kvm_run->request_interrupt_window &&
3131 vcpu->arch.interrupt_window_open &&
3132 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3133 }
3134
3135 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3136 struct kvm_run *kvm_run)
3137 {
3138 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3139 kvm_run->cr8 = kvm_get_cr8(vcpu);
3140 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3141 if (irqchip_in_kernel(vcpu->kvm))
3142 kvm_run->ready_for_interrupt_injection = 1;
3143 else
3144 kvm_run->ready_for_interrupt_injection =
3145 (vcpu->arch.interrupt_window_open &&
3146 vcpu->arch.irq_summary == 0);
3147 }
3148
3149 static void vapic_enter(struct kvm_vcpu *vcpu)
3150 {
3151 struct kvm_lapic *apic = vcpu->arch.apic;
3152 struct page *page;
3153
3154 if (!apic || !apic->vapic_addr)
3155 return;
3156
3157 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3158
3159 vcpu->arch.apic->vapic_page = page;
3160 }
3161
3162 static void vapic_exit(struct kvm_vcpu *vcpu)
3163 {
3164 struct kvm_lapic *apic = vcpu->arch.apic;
3165
3166 if (!apic || !apic->vapic_addr)
3167 return;
3168
3169 down_read(&vcpu->kvm->slots_lock);
3170 kvm_release_page_dirty(apic->vapic_page);
3171 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3172 up_read(&vcpu->kvm->slots_lock);
3173 }
3174
3175 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3176 {
3177 int r;
3178
3179 if (vcpu->requests)
3180 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3181 kvm_mmu_unload(vcpu);
3182
3183 r = kvm_mmu_reload(vcpu);
3184 if (unlikely(r))
3185 goto out;
3186
3187 if (vcpu->requests) {
3188 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3189 __kvm_migrate_timers(vcpu);
3190 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3191 kvm_write_guest_time(vcpu);
3192 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3193 kvm_mmu_sync_roots(vcpu);
3194 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3195 kvm_x86_ops->tlb_flush(vcpu);
3196 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3197 &vcpu->requests)) {
3198 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3199 r = 0;
3200 goto out;
3201 }
3202 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3203 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3204 r = 0;
3205 goto out;
3206 }
3207 }
3208
3209 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3210 kvm_inject_pending_timer_irqs(vcpu);
3211
3212 preempt_disable();
3213
3214 kvm_x86_ops->prepare_guest_switch(vcpu);
3215 kvm_load_guest_fpu(vcpu);
3216
3217 local_irq_disable();
3218
3219 if (vcpu->requests || need_resched() || signal_pending(current)) {
3220 local_irq_enable();
3221 preempt_enable();
3222 r = 1;
3223 goto out;
3224 }
3225
3226 vcpu->guest_mode = 1;
3227 /*
3228 * Make sure that guest_mode assignment won't happen after
3229 * testing the pending IRQ vector bitmap.
3230 */
3231 smp_wmb();
3232
3233 if (vcpu->arch.exception.pending)
3234 __queue_exception(vcpu);
3235 else if (irqchip_in_kernel(vcpu->kvm))
3236 kvm_x86_ops->inject_pending_irq(vcpu);
3237 else
3238 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3239
3240 kvm_lapic_sync_to_vapic(vcpu);
3241
3242 up_read(&vcpu->kvm->slots_lock);
3243
3244 kvm_guest_enter();
3245
3246 get_debugreg(vcpu->arch.host_dr6, 6);
3247 get_debugreg(vcpu->arch.host_dr7, 7);
3248 if (unlikely(vcpu->arch.switch_db_regs)) {
3249 get_debugreg(vcpu->arch.host_db[0], 0);
3250 get_debugreg(vcpu->arch.host_db[1], 1);
3251 get_debugreg(vcpu->arch.host_db[2], 2);
3252 get_debugreg(vcpu->arch.host_db[3], 3);
3253
3254 set_debugreg(0, 7);
3255 set_debugreg(vcpu->arch.eff_db[0], 0);
3256 set_debugreg(vcpu->arch.eff_db[1], 1);
3257 set_debugreg(vcpu->arch.eff_db[2], 2);
3258 set_debugreg(vcpu->arch.eff_db[3], 3);
3259 }
3260
3261 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3262 kvm_x86_ops->run(vcpu, kvm_run);
3263
3264 if (unlikely(vcpu->arch.switch_db_regs)) {
3265 set_debugreg(0, 7);
3266 set_debugreg(vcpu->arch.host_db[0], 0);
3267 set_debugreg(vcpu->arch.host_db[1], 1);
3268 set_debugreg(vcpu->arch.host_db[2], 2);
3269 set_debugreg(vcpu->arch.host_db[3], 3);
3270 }
3271 set_debugreg(vcpu->arch.host_dr6, 6);
3272 set_debugreg(vcpu->arch.host_dr7, 7);
3273
3274 vcpu->guest_mode = 0;
3275 local_irq_enable();
3276
3277 ++vcpu->stat.exits;
3278
3279 /*
3280 * We must have an instruction between local_irq_enable() and
3281 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3282 * the interrupt shadow. The stat.exits increment will do nicely.
3283 * But we need to prevent reordering, hence this barrier():
3284 */
3285 barrier();
3286
3287 kvm_guest_exit();
3288
3289 preempt_enable();
3290
3291 down_read(&vcpu->kvm->slots_lock);
3292
3293 /*
3294 * Profile KVM exit RIPs:
3295 */
3296 if (unlikely(prof_on == KVM_PROFILING)) {
3297 unsigned long rip = kvm_rip_read(vcpu);
3298 profile_hit(KVM_PROFILING, (void *)rip);
3299 }
3300
3301 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3302 vcpu->arch.exception.pending = false;
3303
3304 kvm_lapic_sync_from_vapic(vcpu);
3305
3306 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3307 out:
3308 return r;
3309 }
3310
3311 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3312 {
3313 int r;
3314
3315 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3316 pr_debug("vcpu %d received sipi with vector # %x\n",
3317 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3318 kvm_lapic_reset(vcpu);
3319 r = kvm_arch_vcpu_reset(vcpu);
3320 if (r)
3321 return r;
3322 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3323 }
3324
3325 down_read(&vcpu->kvm->slots_lock);
3326 vapic_enter(vcpu);
3327
3328 r = 1;
3329 while (r > 0) {
3330 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3331 r = vcpu_enter_guest(vcpu, kvm_run);
3332 else {
3333 up_read(&vcpu->kvm->slots_lock);
3334 kvm_vcpu_block(vcpu);
3335 down_read(&vcpu->kvm->slots_lock);
3336 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3337 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3338 vcpu->arch.mp_state =
3339 KVM_MP_STATE_RUNNABLE;
3340 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3341 r = -EINTR;
3342 }
3343
3344 if (r > 0) {
3345 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3346 r = -EINTR;
3347 kvm_run->exit_reason = KVM_EXIT_INTR;
3348 ++vcpu->stat.request_irq_exits;
3349 }
3350 if (signal_pending(current)) {
3351 r = -EINTR;
3352 kvm_run->exit_reason = KVM_EXIT_INTR;
3353 ++vcpu->stat.signal_exits;
3354 }
3355 if (need_resched()) {
3356 up_read(&vcpu->kvm->slots_lock);
3357 kvm_resched(vcpu);
3358 down_read(&vcpu->kvm->slots_lock);
3359 }
3360 }
3361 }
3362
3363 up_read(&vcpu->kvm->slots_lock);
3364 post_kvm_run_save(vcpu, kvm_run);
3365
3366 vapic_exit(vcpu);
3367
3368 return r;
3369 }
3370
3371 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3372 {
3373 int r;
3374 sigset_t sigsaved;
3375
3376 vcpu_load(vcpu);
3377
3378 if (vcpu->sigset_active)
3379 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3380
3381 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3382 kvm_vcpu_block(vcpu);
3383 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3384 r = -EAGAIN;
3385 goto out;
3386 }
3387
3388 /* re-sync apic's tpr */
3389 if (!irqchip_in_kernel(vcpu->kvm))
3390 kvm_set_cr8(vcpu, kvm_run->cr8);
3391
3392 if (vcpu->arch.pio.cur_count) {
3393 r = complete_pio(vcpu);
3394 if (r)
3395 goto out;
3396 }
3397 #if CONFIG_HAS_IOMEM
3398 if (vcpu->mmio_needed) {
3399 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3400 vcpu->mmio_read_completed = 1;
3401 vcpu->mmio_needed = 0;
3402
3403 down_read(&vcpu->kvm->slots_lock);
3404 r = emulate_instruction(vcpu, kvm_run,
3405 vcpu->arch.mmio_fault_cr2, 0,
3406 EMULTYPE_NO_DECODE);
3407 up_read(&vcpu->kvm->slots_lock);
3408 if (r == EMULATE_DO_MMIO) {
3409 /*
3410 * Read-modify-write. Back to userspace.
3411 */
3412 r = 0;
3413 goto out;
3414 }
3415 }
3416 #endif
3417 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3418 kvm_register_write(vcpu, VCPU_REGS_RAX,
3419 kvm_run->hypercall.ret);
3420
3421 r = __vcpu_run(vcpu, kvm_run);
3422
3423 out:
3424 if (vcpu->sigset_active)
3425 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3426
3427 vcpu_put(vcpu);
3428 return r;
3429 }
3430
3431 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3432 {
3433 vcpu_load(vcpu);
3434
3435 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3436 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3437 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3438 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3439 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3440 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3441 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3442 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3443 #ifdef CONFIG_X86_64
3444 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3445 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3446 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3447 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3448 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3449 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3450 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3451 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3452 #endif
3453
3454 regs->rip = kvm_rip_read(vcpu);
3455 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3456
3457 /*
3458 * Don't leak debug flags in case they were set for guest debugging
3459 */
3460 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3461 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3462
3463 vcpu_put(vcpu);
3464
3465 return 0;
3466 }
3467
3468 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3469 {
3470 vcpu_load(vcpu);
3471
3472 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3473 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3474 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3475 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3476 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3477 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3478 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3479 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3480 #ifdef CONFIG_X86_64
3481 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3482 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3483 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3484 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3485 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3486 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3487 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3488 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3489
3490 #endif
3491
3492 kvm_rip_write(vcpu, regs->rip);
3493 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3494
3495
3496 vcpu->arch.exception.pending = false;
3497
3498 vcpu_put(vcpu);
3499
3500 return 0;
3501 }
3502
3503 void kvm_get_segment(struct kvm_vcpu *vcpu,
3504 struct kvm_segment *var, int seg)
3505 {
3506 kvm_x86_ops->get_segment(vcpu, var, seg);
3507 }
3508
3509 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3510 {
3511 struct kvm_segment cs;
3512
3513 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3514 *db = cs.db;
3515 *l = cs.l;
3516 }
3517 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3518
3519 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3520 struct kvm_sregs *sregs)
3521 {
3522 struct descriptor_table dt;
3523 int pending_vec;
3524
3525 vcpu_load(vcpu);
3526
3527 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3528 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3529 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3530 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3531 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3532 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3533
3534 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3535 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3536
3537 kvm_x86_ops->get_idt(vcpu, &dt);
3538 sregs->idt.limit = dt.limit;
3539 sregs->idt.base = dt.base;
3540 kvm_x86_ops->get_gdt(vcpu, &dt);
3541 sregs->gdt.limit = dt.limit;
3542 sregs->gdt.base = dt.base;
3543
3544 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3545 sregs->cr0 = vcpu->arch.cr0;
3546 sregs->cr2 = vcpu->arch.cr2;
3547 sregs->cr3 = vcpu->arch.cr3;
3548 sregs->cr4 = vcpu->arch.cr4;
3549 sregs->cr8 = kvm_get_cr8(vcpu);
3550 sregs->efer = vcpu->arch.shadow_efer;
3551 sregs->apic_base = kvm_get_apic_base(vcpu);
3552
3553 if (irqchip_in_kernel(vcpu->kvm)) {
3554 memset(sregs->interrupt_bitmap, 0,
3555 sizeof sregs->interrupt_bitmap);
3556 pending_vec = kvm_x86_ops->get_irq(vcpu);
3557 if (pending_vec >= 0)
3558 set_bit(pending_vec,
3559 (unsigned long *)sregs->interrupt_bitmap);
3560 } else
3561 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3562 sizeof sregs->interrupt_bitmap);
3563
3564 vcpu_put(vcpu);
3565
3566 return 0;
3567 }
3568
3569 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3570 struct kvm_mp_state *mp_state)
3571 {
3572 vcpu_load(vcpu);
3573 mp_state->mp_state = vcpu->arch.mp_state;
3574 vcpu_put(vcpu);
3575 return 0;
3576 }
3577
3578 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3579 struct kvm_mp_state *mp_state)
3580 {
3581 vcpu_load(vcpu);
3582 vcpu->arch.mp_state = mp_state->mp_state;
3583 vcpu_put(vcpu);
3584 return 0;
3585 }
3586
3587 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3588 struct kvm_segment *var, int seg)
3589 {
3590 kvm_x86_ops->set_segment(vcpu, var, seg);
3591 }
3592
3593 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3594 struct kvm_segment *kvm_desct)
3595 {
3596 kvm_desct->base = seg_desc->base0;
3597 kvm_desct->base |= seg_desc->base1 << 16;
3598 kvm_desct->base |= seg_desc->base2 << 24;
3599 kvm_desct->limit = seg_desc->limit0;
3600 kvm_desct->limit |= seg_desc->limit << 16;
3601 if (seg_desc->g) {
3602 kvm_desct->limit <<= 12;
3603 kvm_desct->limit |= 0xfff;
3604 }
3605 kvm_desct->selector = selector;
3606 kvm_desct->type = seg_desc->type;
3607 kvm_desct->present = seg_desc->p;
3608 kvm_desct->dpl = seg_desc->dpl;
3609 kvm_desct->db = seg_desc->d;
3610 kvm_desct->s = seg_desc->s;
3611 kvm_desct->l = seg_desc->l;
3612 kvm_desct->g = seg_desc->g;
3613 kvm_desct->avl = seg_desc->avl;
3614 if (!selector)
3615 kvm_desct->unusable = 1;
3616 else
3617 kvm_desct->unusable = 0;
3618 kvm_desct->padding = 0;
3619 }
3620
3621 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3622 u16 selector,
3623 struct descriptor_table *dtable)
3624 {
3625 if (selector & 1 << 2) {
3626 struct kvm_segment kvm_seg;
3627
3628 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3629
3630 if (kvm_seg.unusable)
3631 dtable->limit = 0;
3632 else
3633 dtable->limit = kvm_seg.limit;
3634 dtable->base = kvm_seg.base;
3635 }
3636 else
3637 kvm_x86_ops->get_gdt(vcpu, dtable);
3638 }
3639
3640 /* allowed just for 8 bytes segments */
3641 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3642 struct desc_struct *seg_desc)
3643 {
3644 gpa_t gpa;
3645 struct descriptor_table dtable;
3646 u16 index = selector >> 3;
3647
3648 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3649
3650 if (dtable.limit < index * 8 + 7) {
3651 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3652 return 1;
3653 }
3654 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3655 gpa += index * 8;
3656 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3657 }
3658
3659 /* allowed just for 8 bytes segments */
3660 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3661 struct desc_struct *seg_desc)
3662 {
3663 gpa_t gpa;
3664 struct descriptor_table dtable;
3665 u16 index = selector >> 3;
3666
3667 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3668
3669 if (dtable.limit < index * 8 + 7)
3670 return 1;
3671 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3672 gpa += index * 8;
3673 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3674 }
3675
3676 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3677 struct desc_struct *seg_desc)
3678 {
3679 u32 base_addr;
3680
3681 base_addr = seg_desc->base0;
3682 base_addr |= (seg_desc->base1 << 16);
3683 base_addr |= (seg_desc->base2 << 24);
3684
3685 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3686 }
3687
3688 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3689 {
3690 struct kvm_segment kvm_seg;
3691
3692 kvm_get_segment(vcpu, &kvm_seg, seg);
3693 return kvm_seg.selector;
3694 }
3695
3696 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3697 u16 selector,
3698 struct kvm_segment *kvm_seg)
3699 {
3700 struct desc_struct seg_desc;
3701
3702 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3703 return 1;
3704 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3705 return 0;
3706 }
3707
3708 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3709 {
3710 struct kvm_segment segvar = {
3711 .base = selector << 4,
3712 .limit = 0xffff,
3713 .selector = selector,
3714 .type = 3,
3715 .present = 1,
3716 .dpl = 3,
3717 .db = 0,
3718 .s = 1,
3719 .l = 0,
3720 .g = 0,
3721 .avl = 0,
3722 .unusable = 0,
3723 };
3724 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3725 return 0;
3726 }
3727
3728 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3729 int type_bits, int seg)
3730 {
3731 struct kvm_segment kvm_seg;
3732
3733 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3734 return kvm_load_realmode_segment(vcpu, selector, seg);
3735 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3736 return 1;
3737 kvm_seg.type |= type_bits;
3738
3739 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3740 seg != VCPU_SREG_LDTR)
3741 if (!kvm_seg.s)
3742 kvm_seg.unusable = 1;
3743
3744 kvm_set_segment(vcpu, &kvm_seg, seg);
3745 return 0;
3746 }
3747
3748 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3749 struct tss_segment_32 *tss)
3750 {
3751 tss->cr3 = vcpu->arch.cr3;
3752 tss->eip = kvm_rip_read(vcpu);
3753 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3754 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3755 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3756 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3757 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3758 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3759 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3760 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3761 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3762 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3763 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3764 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3765 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3766 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3767 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3768 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3769 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3770 }
3771
3772 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3773 struct tss_segment_32 *tss)
3774 {
3775 kvm_set_cr3(vcpu, tss->cr3);
3776
3777 kvm_rip_write(vcpu, tss->eip);
3778 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3779
3780 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3781 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3782 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3783 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3784 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3785 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3786 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3787 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3788
3789 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3790 return 1;
3791
3792 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3793 return 1;
3794
3795 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3796 return 1;
3797
3798 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3799 return 1;
3800
3801 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3802 return 1;
3803
3804 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3805 return 1;
3806
3807 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3808 return 1;
3809 return 0;
3810 }
3811
3812 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3813 struct tss_segment_16 *tss)
3814 {
3815 tss->ip = kvm_rip_read(vcpu);
3816 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3817 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3818 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3819 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3820 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3821 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3822 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3823 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3824 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3825
3826 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3827 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3828 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3829 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3830 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3831 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3832 }
3833
3834 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3835 struct tss_segment_16 *tss)
3836 {
3837 kvm_rip_write(vcpu, tss->ip);
3838 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3839 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3840 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3841 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3842 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3843 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3844 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3845 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3846 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3847
3848 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3849 return 1;
3850
3851 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3852 return 1;
3853
3854 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3855 return 1;
3856
3857 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3858 return 1;
3859
3860 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3861 return 1;
3862 return 0;
3863 }
3864
3865 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3866 u32 old_tss_base,
3867 struct desc_struct *nseg_desc)
3868 {
3869 struct tss_segment_16 tss_segment_16;
3870 int ret = 0;
3871
3872 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3873 sizeof tss_segment_16))
3874 goto out;
3875
3876 save_state_to_tss16(vcpu, &tss_segment_16);
3877
3878 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3879 sizeof tss_segment_16))
3880 goto out;
3881
3882 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3883 &tss_segment_16, sizeof tss_segment_16))
3884 goto out;
3885
3886 if (load_state_from_tss16(vcpu, &tss_segment_16))
3887 goto out;
3888
3889 ret = 1;
3890 out:
3891 return ret;
3892 }
3893
3894 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3895 u32 old_tss_base,
3896 struct desc_struct *nseg_desc)
3897 {
3898 struct tss_segment_32 tss_segment_32;
3899 int ret = 0;
3900
3901 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3902 sizeof tss_segment_32))
3903 goto out;
3904
3905 save_state_to_tss32(vcpu, &tss_segment_32);
3906
3907 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3908 sizeof tss_segment_32))
3909 goto out;
3910
3911 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3912 &tss_segment_32, sizeof tss_segment_32))
3913 goto out;
3914
3915 if (load_state_from_tss32(vcpu, &tss_segment_32))
3916 goto out;
3917
3918 ret = 1;
3919 out:
3920 return ret;
3921 }
3922
3923 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3924 {
3925 struct kvm_segment tr_seg;
3926 struct desc_struct cseg_desc;
3927 struct desc_struct nseg_desc;
3928 int ret = 0;
3929 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3930 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3931
3932 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3933
3934 /* FIXME: Handle errors. Failure to read either TSS or their
3935 * descriptors should generate a pagefault.
3936 */
3937 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3938 goto out;
3939
3940 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3941 goto out;
3942
3943 if (reason != TASK_SWITCH_IRET) {
3944 int cpl;
3945
3946 cpl = kvm_x86_ops->get_cpl(vcpu);
3947 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3948 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3949 return 1;
3950 }
3951 }
3952
3953 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3954 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3955 return 1;
3956 }
3957
3958 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3959 cseg_desc.type &= ~(1 << 1); //clear the B flag
3960 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3961 }
3962
3963 if (reason == TASK_SWITCH_IRET) {
3964 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3965 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3966 }
3967
3968 kvm_x86_ops->skip_emulated_instruction(vcpu);
3969
3970 if (nseg_desc.type & 8)
3971 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3972 &nseg_desc);
3973 else
3974 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3975 &nseg_desc);
3976
3977 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3978 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3979 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3980 }
3981
3982 if (reason != TASK_SWITCH_IRET) {
3983 nseg_desc.type |= (1 << 1);
3984 save_guest_segment_descriptor(vcpu, tss_selector,
3985 &nseg_desc);
3986 }
3987
3988 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3989 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3990 tr_seg.type = 11;
3991 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3992 out:
3993 return ret;
3994 }
3995 EXPORT_SYMBOL_GPL(kvm_task_switch);
3996
3997 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3998 struct kvm_sregs *sregs)
3999 {
4000 int mmu_reset_needed = 0;
4001 int i, pending_vec, max_bits;
4002 struct descriptor_table dt;
4003
4004 vcpu_load(vcpu);
4005
4006 dt.limit = sregs->idt.limit;
4007 dt.base = sregs->idt.base;
4008 kvm_x86_ops->set_idt(vcpu, &dt);
4009 dt.limit = sregs->gdt.limit;
4010 dt.base = sregs->gdt.base;
4011 kvm_x86_ops->set_gdt(vcpu, &dt);
4012
4013 vcpu->arch.cr2 = sregs->cr2;
4014 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4015 vcpu->arch.cr3 = sregs->cr3;
4016
4017 kvm_set_cr8(vcpu, sregs->cr8);
4018
4019 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4020 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4021 kvm_set_apic_base(vcpu, sregs->apic_base);
4022
4023 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4024
4025 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4026 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4027 vcpu->arch.cr0 = sregs->cr0;
4028
4029 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4030 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4031 if (!is_long_mode(vcpu) && is_pae(vcpu))
4032 load_pdptrs(vcpu, vcpu->arch.cr3);
4033
4034 if (mmu_reset_needed)
4035 kvm_mmu_reset_context(vcpu);
4036
4037 if (!irqchip_in_kernel(vcpu->kvm)) {
4038 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
4039 sizeof vcpu->arch.irq_pending);
4040 vcpu->arch.irq_summary = 0;
4041 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
4042 if (vcpu->arch.irq_pending[i])
4043 __set_bit(i, &vcpu->arch.irq_summary);
4044 } else {
4045 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4046 pending_vec = find_first_bit(
4047 (const unsigned long *)sregs->interrupt_bitmap,
4048 max_bits);
4049 /* Only pending external irq is handled here */
4050 if (pending_vec < max_bits) {
4051 kvm_x86_ops->set_irq(vcpu, pending_vec);
4052 pr_debug("Set back pending irq %d\n",
4053 pending_vec);
4054 }
4055 kvm_pic_clear_isr_ack(vcpu->kvm);
4056 }
4057
4058 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4059 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4060 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4061 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4062 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4063 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4064
4065 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4066 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4067
4068 /* Older userspace won't unhalt the vcpu on reset. */
4069 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4070 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4071 !(vcpu->arch.cr0 & X86_CR0_PE))
4072 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4073
4074 vcpu_put(vcpu);
4075
4076 return 0;
4077 }
4078
4079 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4080 struct kvm_guest_debug *dbg)
4081 {
4082 int i, r;
4083
4084 vcpu_load(vcpu);
4085
4086 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4087 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4088 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4089 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4090 vcpu->arch.switch_db_regs =
4091 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4092 } else {
4093 for (i = 0; i < KVM_NR_DB_REGS; i++)
4094 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4095 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4096 }
4097
4098 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4099
4100 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4101 kvm_queue_exception(vcpu, DB_VECTOR);
4102 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4103 kvm_queue_exception(vcpu, BP_VECTOR);
4104
4105 vcpu_put(vcpu);
4106
4107 return r;
4108 }
4109
4110 /*
4111 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4112 * we have asm/x86/processor.h
4113 */
4114 struct fxsave {
4115 u16 cwd;
4116 u16 swd;
4117 u16 twd;
4118 u16 fop;
4119 u64 rip;
4120 u64 rdp;
4121 u32 mxcsr;
4122 u32 mxcsr_mask;
4123 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4124 #ifdef CONFIG_X86_64
4125 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4126 #else
4127 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4128 #endif
4129 };
4130
4131 /*
4132 * Translate a guest virtual address to a guest physical address.
4133 */
4134 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4135 struct kvm_translation *tr)
4136 {
4137 unsigned long vaddr = tr->linear_address;
4138 gpa_t gpa;
4139
4140 vcpu_load(vcpu);
4141 down_read(&vcpu->kvm->slots_lock);
4142 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4143 up_read(&vcpu->kvm->slots_lock);
4144 tr->physical_address = gpa;
4145 tr->valid = gpa != UNMAPPED_GVA;
4146 tr->writeable = 1;
4147 tr->usermode = 0;
4148 vcpu_put(vcpu);
4149
4150 return 0;
4151 }
4152
4153 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4154 {
4155 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4156
4157 vcpu_load(vcpu);
4158
4159 memcpy(fpu->fpr, fxsave->st_space, 128);
4160 fpu->fcw = fxsave->cwd;
4161 fpu->fsw = fxsave->swd;
4162 fpu->ftwx = fxsave->twd;
4163 fpu->last_opcode = fxsave->fop;
4164 fpu->last_ip = fxsave->rip;
4165 fpu->last_dp = fxsave->rdp;
4166 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4167
4168 vcpu_put(vcpu);
4169
4170 return 0;
4171 }
4172
4173 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4174 {
4175 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4176
4177 vcpu_load(vcpu);
4178
4179 memcpy(fxsave->st_space, fpu->fpr, 128);
4180 fxsave->cwd = fpu->fcw;
4181 fxsave->swd = fpu->fsw;
4182 fxsave->twd = fpu->ftwx;
4183 fxsave->fop = fpu->last_opcode;
4184 fxsave->rip = fpu->last_ip;
4185 fxsave->rdp = fpu->last_dp;
4186 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4187
4188 vcpu_put(vcpu);
4189
4190 return 0;
4191 }
4192
4193 void fx_init(struct kvm_vcpu *vcpu)
4194 {
4195 unsigned after_mxcsr_mask;
4196
4197 /*
4198 * Touch the fpu the first time in non atomic context as if
4199 * this is the first fpu instruction the exception handler
4200 * will fire before the instruction returns and it'll have to
4201 * allocate ram with GFP_KERNEL.
4202 */
4203 if (!used_math())
4204 kvm_fx_save(&vcpu->arch.host_fx_image);
4205
4206 /* Initialize guest FPU by resetting ours and saving into guest's */
4207 preempt_disable();
4208 kvm_fx_save(&vcpu->arch.host_fx_image);
4209 kvm_fx_finit();
4210 kvm_fx_save(&vcpu->arch.guest_fx_image);
4211 kvm_fx_restore(&vcpu->arch.host_fx_image);
4212 preempt_enable();
4213
4214 vcpu->arch.cr0 |= X86_CR0_ET;
4215 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4216 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4217 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4218 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4219 }
4220 EXPORT_SYMBOL_GPL(fx_init);
4221
4222 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4223 {
4224 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4225 return;
4226
4227 vcpu->guest_fpu_loaded = 1;
4228 kvm_fx_save(&vcpu->arch.host_fx_image);
4229 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4230 }
4231 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4232
4233 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4234 {
4235 if (!vcpu->guest_fpu_loaded)
4236 return;
4237
4238 vcpu->guest_fpu_loaded = 0;
4239 kvm_fx_save(&vcpu->arch.guest_fx_image);
4240 kvm_fx_restore(&vcpu->arch.host_fx_image);
4241 ++vcpu->stat.fpu_reload;
4242 }
4243 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4244
4245 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4246 {
4247 if (vcpu->arch.time_page) {
4248 kvm_release_page_dirty(vcpu->arch.time_page);
4249 vcpu->arch.time_page = NULL;
4250 }
4251
4252 kvm_x86_ops->vcpu_free(vcpu);
4253 }
4254
4255 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4256 unsigned int id)
4257 {
4258 return kvm_x86_ops->vcpu_create(kvm, id);
4259 }
4260
4261 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4262 {
4263 int r;
4264
4265 /* We do fxsave: this must be aligned. */
4266 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4267
4268 vcpu->arch.mtrr_state.have_fixed = 1;
4269 vcpu_load(vcpu);
4270 r = kvm_arch_vcpu_reset(vcpu);
4271 if (r == 0)
4272 r = kvm_mmu_setup(vcpu);
4273 vcpu_put(vcpu);
4274 if (r < 0)
4275 goto free_vcpu;
4276
4277 return 0;
4278 free_vcpu:
4279 kvm_x86_ops->vcpu_free(vcpu);
4280 return r;
4281 }
4282
4283 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4284 {
4285 vcpu_load(vcpu);
4286 kvm_mmu_unload(vcpu);
4287 vcpu_put(vcpu);
4288
4289 kvm_x86_ops->vcpu_free(vcpu);
4290 }
4291
4292 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4293 {
4294 vcpu->arch.nmi_pending = false;
4295 vcpu->arch.nmi_injected = false;
4296
4297 vcpu->arch.switch_db_regs = 0;
4298 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4299 vcpu->arch.dr6 = DR6_FIXED_1;
4300 vcpu->arch.dr7 = DR7_FIXED_1;
4301
4302 return kvm_x86_ops->vcpu_reset(vcpu);
4303 }
4304
4305 void kvm_arch_hardware_enable(void *garbage)
4306 {
4307 kvm_x86_ops->hardware_enable(garbage);
4308 }
4309
4310 void kvm_arch_hardware_disable(void *garbage)
4311 {
4312 kvm_x86_ops->hardware_disable(garbage);
4313 }
4314
4315 int kvm_arch_hardware_setup(void)
4316 {
4317 return kvm_x86_ops->hardware_setup();
4318 }
4319
4320 void kvm_arch_hardware_unsetup(void)
4321 {
4322 kvm_x86_ops->hardware_unsetup();
4323 }
4324
4325 void kvm_arch_check_processor_compat(void *rtn)
4326 {
4327 kvm_x86_ops->check_processor_compatibility(rtn);
4328 }
4329
4330 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4331 {
4332 struct page *page;
4333 struct kvm *kvm;
4334 int r;
4335
4336 BUG_ON(vcpu->kvm == NULL);
4337 kvm = vcpu->kvm;
4338
4339 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4340 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4341 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4342 else
4343 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4344
4345 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4346 if (!page) {
4347 r = -ENOMEM;
4348 goto fail;
4349 }
4350 vcpu->arch.pio_data = page_address(page);
4351
4352 r = kvm_mmu_create(vcpu);
4353 if (r < 0)
4354 goto fail_free_pio_data;
4355
4356 if (irqchip_in_kernel(kvm)) {
4357 r = kvm_create_lapic(vcpu);
4358 if (r < 0)
4359 goto fail_mmu_destroy;
4360 }
4361
4362 return 0;
4363
4364 fail_mmu_destroy:
4365 kvm_mmu_destroy(vcpu);
4366 fail_free_pio_data:
4367 free_page((unsigned long)vcpu->arch.pio_data);
4368 fail:
4369 return r;
4370 }
4371
4372 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4373 {
4374 kvm_free_lapic(vcpu);
4375 down_read(&vcpu->kvm->slots_lock);
4376 kvm_mmu_destroy(vcpu);
4377 up_read(&vcpu->kvm->slots_lock);
4378 free_page((unsigned long)vcpu->arch.pio_data);
4379 }
4380
4381 struct kvm *kvm_arch_create_vm(void)
4382 {
4383 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4384
4385 if (!kvm)
4386 return ERR_PTR(-ENOMEM);
4387
4388 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4389 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4390 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4391
4392 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4393 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4394
4395 rdtscll(kvm->arch.vm_init_tsc);
4396
4397 return kvm;
4398 }
4399
4400 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4401 {
4402 vcpu_load(vcpu);
4403 kvm_mmu_unload(vcpu);
4404 vcpu_put(vcpu);
4405 }
4406
4407 static void kvm_free_vcpus(struct kvm *kvm)
4408 {
4409 unsigned int i;
4410
4411 /*
4412 * Unpin any mmu pages first.
4413 */
4414 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4415 if (kvm->vcpus[i])
4416 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4417 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4418 if (kvm->vcpus[i]) {
4419 kvm_arch_vcpu_free(kvm->vcpus[i]);
4420 kvm->vcpus[i] = NULL;
4421 }
4422 }
4423
4424 }
4425
4426 void kvm_arch_sync_events(struct kvm *kvm)
4427 {
4428 kvm_free_all_assigned_devices(kvm);
4429 }
4430
4431 void kvm_arch_destroy_vm(struct kvm *kvm)
4432 {
4433 kvm_iommu_unmap_guest(kvm);
4434 kvm_free_pit(kvm);
4435 kfree(kvm->arch.vpic);
4436 kfree(kvm->arch.vioapic);
4437 kvm_free_vcpus(kvm);
4438 kvm_free_physmem(kvm);
4439 if (kvm->arch.apic_access_page)
4440 put_page(kvm->arch.apic_access_page);
4441 if (kvm->arch.ept_identity_pagetable)
4442 put_page(kvm->arch.ept_identity_pagetable);
4443 kfree(kvm);
4444 }
4445
4446 int kvm_arch_set_memory_region(struct kvm *kvm,
4447 struct kvm_userspace_memory_region *mem,
4448 struct kvm_memory_slot old,
4449 int user_alloc)
4450 {
4451 int npages = mem->memory_size >> PAGE_SHIFT;
4452 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4453
4454 /*To keep backward compatibility with older userspace,
4455 *x86 needs to hanlde !user_alloc case.
4456 */
4457 if (!user_alloc) {
4458 if (npages && !old.rmap) {
4459 unsigned long userspace_addr;
4460
4461 down_write(&current->mm->mmap_sem);
4462 userspace_addr = do_mmap(NULL, 0,
4463 npages * PAGE_SIZE,
4464 PROT_READ | PROT_WRITE,
4465 MAP_PRIVATE | MAP_ANONYMOUS,
4466 0);
4467 up_write(&current->mm->mmap_sem);
4468
4469 if (IS_ERR((void *)userspace_addr))
4470 return PTR_ERR((void *)userspace_addr);
4471
4472 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4473 spin_lock(&kvm->mmu_lock);
4474 memslot->userspace_addr = userspace_addr;
4475 spin_unlock(&kvm->mmu_lock);
4476 } else {
4477 if (!old.user_alloc && old.rmap) {
4478 int ret;
4479
4480 down_write(&current->mm->mmap_sem);
4481 ret = do_munmap(current->mm, old.userspace_addr,
4482 old.npages * PAGE_SIZE);
4483 up_write(&current->mm->mmap_sem);
4484 if (ret < 0)
4485 printk(KERN_WARNING
4486 "kvm_vm_ioctl_set_memory_region: "
4487 "failed to munmap memory\n");
4488 }
4489 }
4490 }
4491
4492 spin_lock(&kvm->mmu_lock);
4493 if (!kvm->arch.n_requested_mmu_pages) {
4494 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4495 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4496 }
4497
4498 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4499 spin_unlock(&kvm->mmu_lock);
4500 kvm_flush_remote_tlbs(kvm);
4501
4502 return 0;
4503 }
4504
4505 void kvm_arch_flush_shadow(struct kvm *kvm)
4506 {
4507 kvm_mmu_zap_all(kvm);
4508 kvm_reload_remote_mmus(kvm);
4509 }
4510
4511 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4512 {
4513 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4514 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4515 || vcpu->arch.nmi_pending;
4516 }
4517
4518 static void vcpu_kick_intr(void *info)
4519 {
4520 #ifdef DEBUG
4521 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4522 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4523 #endif
4524 }
4525
4526 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4527 {
4528 int ipi_pcpu = vcpu->cpu;
4529 int cpu = get_cpu();
4530
4531 if (waitqueue_active(&vcpu->wq)) {
4532 wake_up_interruptible(&vcpu->wq);
4533 ++vcpu->stat.halt_wakeup;
4534 }
4535 /*
4536 * We may be called synchronously with irqs disabled in guest mode,
4537 * So need not to call smp_call_function_single() in that case.
4538 */
4539 if (vcpu->guest_mode && vcpu->cpu != cpu)
4540 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4541 put_cpu();
4542 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree