2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #ifndef _PARISC_ASSEMBLY_H
22 #define _PARISC_ASSEMBLY_H
32 #define FRAME_SIZE 128
33 #define CALLEE_SAVE_FRAME_SIZE 144
43 #define CALLEE_SAVE_FRAME_SIZE 128
61 /* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
62 * work around that for now... */
66 #include <asm/asm-offsets.h>
69 #include <asm/asmregs.h>
76 * We provide two versions of each macro to convert from physical
77 * to virtual and vice versa. The "_r1" versions take one argument
78 * register, but trashes r1 to do the conversion. The other
79 * version takes two arguments: a src and destination register.
80 * However, the source and destination registers can not be
84 .macro tophys grvirt
, grphys
85 ldil L
%(__PAGE_OFFSET
), \grphys
86 sub \grvirt
, \grphys
, \grphys
89 .macro tovirt grphys
, grvirt
90 ldil L
%(__PAGE_OFFSET
), \grvirt
91 add \grphys
, \grvirt
, \grvirt
95 ldil L
%(__PAGE_OFFSET
), %r1
100 ldil L
%(__PAGE_OFFSET
), %r1
116 /* Shift Left - note the r and t can NOT be the same! */
118 dep
,z
\r, 31-\sa
, 32-\sa
, \t
121 /* The PA 2.0 shift left */
123 depw
,z
\r, 31-\sa
, 32-\sa
, \t
126 /* And the PA 2.0W shift left */
128 depd
,z
\r, 63-\sa
, 64-\sa
, \t
131 /* Shift Right - note the r and t can NOT be the same! */
133 extru
\r, 31-\sa
, 32-\sa
, \t
136 /* pa20w version of shift right */
138 extrd
,u
\r, 63-\sa
, 64-\sa
, \t
141 /* load 32-bit 'value' into 'reg' compensating for the ldil
142 * sign-extension when running in wide mode.
143 * WARNING!! neither 'value' nor 'reg' can be expressions
144 * containing '.'!!!! */
145 .macro load32 value
, reg
147 ldo R
%\value
(\reg
), \reg
153 ldo R
%__gp(%r27
), %r27
155 ldil L
%$global$
, %r27
156 ldo R
%$global$
(%r27
), %r27
160 #define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
161 #define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
162 #define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
163 #define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
165 .macro save_general regs
166 STREG
%r1
, PT_GR1 (\regs
)
167 STREG
%r2
, PT_GR2 (\regs
)
168 STREG
%r3
, PT_GR3 (\regs
)
169 STREG
%r4
, PT_GR4 (\regs
)
170 STREG
%r5
, PT_GR5 (\regs
)
171 STREG
%r6
, PT_GR6 (\regs
)
172 STREG
%r7
, PT_GR7 (\regs
)
173 STREG
%r8
, PT_GR8 (\regs
)
174 STREG
%r9
, PT_GR9 (\regs
)
175 STREG
%r10
, PT_GR10(\regs
)
176 STREG
%r11
, PT_GR11(\regs
)
177 STREG
%r12
, PT_GR12(\regs
)
178 STREG
%r13
, PT_GR13(\regs
)
179 STREG
%r14
, PT_GR14(\regs
)
180 STREG
%r15
, PT_GR15(\regs
)
181 STREG
%r16
, PT_GR16(\regs
)
182 STREG
%r17
, PT_GR17(\regs
)
183 STREG
%r18
, PT_GR18(\regs
)
184 STREG
%r19
, PT_GR19(\regs
)
185 STREG
%r20
, PT_GR20(\regs
)
186 STREG
%r21
, PT_GR21(\regs
)
187 STREG
%r22
, PT_GR22(\regs
)
188 STREG
%r23
, PT_GR23(\regs
)
189 STREG
%r24
, PT_GR24(\regs
)
190 STREG
%r25
, PT_GR25(\regs
)
191 /* r26 is saved in get_stack and used to preserve a value across virt_map */
192 STREG
%r27
, PT_GR27(\regs
)
193 STREG
%r28
, PT_GR28(\regs
)
194 /* r29 is saved in get_stack and used to point to saved registers */
195 /* r30 stack pointer saved in get_stack */
196 STREG
%r31
, PT_GR31(\regs
)
199 .macro rest_general regs
200 /* r1 used as a temp in rest_stack and is restored there */
201 LDREG
PT_GR2 (\regs
), %r2
202 LDREG
PT_GR3 (\regs
), %r3
203 LDREG
PT_GR4 (\regs
), %r4
204 LDREG
PT_GR5 (\regs
), %r5
205 LDREG
PT_GR6 (\regs
), %r6
206 LDREG
PT_GR7 (\regs
), %r7
207 LDREG
PT_GR8 (\regs
), %r8
208 LDREG
PT_GR9 (\regs
), %r9
209 LDREG
PT_GR10(\regs
), %r10
210 LDREG
PT_GR11(\regs
), %r11
211 LDREG
PT_GR12(\regs
), %r12
212 LDREG
PT_GR13(\regs
), %r13
213 LDREG
PT_GR14(\regs
), %r14
214 LDREG
PT_GR15(\regs
), %r15
215 LDREG
PT_GR16(\regs
), %r16
216 LDREG
PT_GR17(\regs
), %r17
217 LDREG
PT_GR18(\regs
), %r18
218 LDREG
PT_GR19(\regs
), %r19
219 LDREG
PT_GR20(\regs
), %r20
220 LDREG
PT_GR21(\regs
), %r21
221 LDREG
PT_GR22(\regs
), %r22
222 LDREG
PT_GR23(\regs
), %r23
223 LDREG
PT_GR24(\regs
), %r24
224 LDREG
PT_GR25(\regs
), %r25
225 LDREG
PT_GR26(\regs
), %r26
226 LDREG
PT_GR27(\regs
), %r27
227 LDREG
PT_GR28(\regs
), %r28
228 /* r29 points to register save area, and is restored in rest_stack */
229 /* r30 stack pointer restored in rest_stack */
230 LDREG
PT_GR31(\regs
), %r31
234 fstd
,ma
%fr0
, 8(\regs
)
235 fstd
,ma
%fr1
, 8(\regs
)
236 fstd
,ma
%fr2
, 8(\regs
)
237 fstd
,ma
%fr3
, 8(\regs
)
238 fstd
,ma
%fr4
, 8(\regs
)
239 fstd
,ma
%fr5
, 8(\regs
)
240 fstd
,ma
%fr6
, 8(\regs
)
241 fstd
,ma
%fr7
, 8(\regs
)
242 fstd
,ma
%fr8
, 8(\regs
)
243 fstd
,ma
%fr9
, 8(\regs
)
244 fstd
,ma
%fr10
, 8(\regs
)
245 fstd
,ma
%fr11
, 8(\regs
)
246 fstd
,ma
%fr12
, 8(\regs
)
247 fstd
,ma
%fr13
, 8(\regs
)
248 fstd
,ma
%fr14
, 8(\regs
)
249 fstd
,ma
%fr15
, 8(\regs
)
250 fstd
,ma
%fr16
, 8(\regs
)
251 fstd
,ma
%fr17
, 8(\regs
)
252 fstd
,ma
%fr18
, 8(\regs
)
253 fstd
,ma
%fr19
, 8(\regs
)
254 fstd
,ma
%fr20
, 8(\regs
)
255 fstd
,ma
%fr21
, 8(\regs
)
256 fstd
,ma
%fr22
, 8(\regs
)
257 fstd
,ma
%fr23
, 8(\regs
)
258 fstd
,ma
%fr24
, 8(\regs
)
259 fstd
,ma
%fr25
, 8(\regs
)
260 fstd
,ma
%fr26
, 8(\regs
)
261 fstd
,ma
%fr27
, 8(\regs
)
262 fstd
,ma
%fr28
, 8(\regs
)
263 fstd
,ma
%fr29
, 8(\regs
)
264 fstd
,ma
%fr30
, 8(\regs
)
270 fldd
,mb
-8(\regs
), %fr30
271 fldd
,mb
-8(\regs
), %fr29
272 fldd
,mb
-8(\regs
), %fr28
273 fldd
,mb
-8(\regs
), %fr27
274 fldd
,mb
-8(\regs
), %fr26
275 fldd
,mb
-8(\regs
), %fr25
276 fldd
,mb
-8(\regs
), %fr24
277 fldd
,mb
-8(\regs
), %fr23
278 fldd
,mb
-8(\regs
), %fr22
279 fldd
,mb
-8(\regs
), %fr21
280 fldd
,mb
-8(\regs
), %fr20
281 fldd
,mb
-8(\regs
), %fr19
282 fldd
,mb
-8(\regs
), %fr18
283 fldd
,mb
-8(\regs
), %fr17
284 fldd
,mb
-8(\regs
), %fr16
285 fldd
,mb
-8(\regs
), %fr15
286 fldd
,mb
-8(\regs
), %fr14
287 fldd
,mb
-8(\regs
), %fr13
288 fldd
,mb
-8(\regs
), %fr12
289 fldd
,mb
-8(\regs
), %fr11
290 fldd
,mb
-8(\regs
), %fr10
291 fldd
,mb
-8(\regs
), %fr9
292 fldd
,mb
-8(\regs
), %fr8
293 fldd
,mb
-8(\regs
), %fr7
294 fldd
,mb
-8(\regs
), %fr6
295 fldd
,mb
-8(\regs
), %fr5
296 fldd
,mb
-8(\regs
), %fr4
297 fldd
,mb
-8(\regs
), %fr3
298 fldd
,mb
-8(\regs
), %fr2
299 fldd
,mb
-8(\regs
), %fr1
300 fldd
,mb
-8(\regs
), %fr0
305 std
,ma
%r3
, CALLEE_SAVE_FRAME_SIZE(%r30
)
343 ldd
,mb
-CALLEE_SAVE_FRAME_SIZE(%r30
), %r3
346 #else /* ! __LP64__ */
349 stw
,ma
%r3
, CALLEE_SAVE_FRAME_SIZE(%r30
)
387 ldw
,mb
-CALLEE_SAVE_FRAME_SIZE(%r30
), %r3
389 #endif /* ! __LP64__ */
391 .macro save_specials regs
393 SAVE_SP (%sr0
, PT_SR0 (\regs
))
394 SAVE_SP (%sr1
, PT_SR1 (\regs
))
395 SAVE_SP (%sr2
, PT_SR2 (\regs
))
396 SAVE_SP (%sr3
, PT_SR3 (\regs
))
397 SAVE_SP (%sr4
, PT_SR4 (\regs
))
398 SAVE_SP (%sr5
, PT_SR5 (\regs
))
399 SAVE_SP (%sr6
, PT_SR6 (\regs
))
400 SAVE_SP (%sr7
, PT_SR7 (\regs
))
402 SAVE_CR (%cr17
, PT_IASQ0(\regs
))
404 SAVE_CR (%cr17
, PT_IASQ1(\regs
))
406 SAVE_CR (%cr18
, PT_IAOQ0(\regs
))
408 SAVE_CR (%cr18
, PT_IAOQ1(\regs
))
411 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
412 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
413 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
414 * we lose the 6th bit on a save/restore over interrupt.
417 STREG
%r1
, PT_SAR (\regs
)
419 SAVE_CR (%cr11
, PT_SAR (\regs
))
421 SAVE_CR (%cr19
, PT_IIR (\regs
))
424 * Code immediately following this macro (in intr_save) relies
425 * on r8 containing ipsw.
428 STREG
%r8
, PT_PSW(\regs
)
431 .macro rest_specials regs
433 REST_SP (%sr0
, PT_SR0 (\regs
))
434 REST_SP (%sr1
, PT_SR1 (\regs
))
435 REST_SP (%sr2
, PT_SR2 (\regs
))
436 REST_SP (%sr3
, PT_SR3 (\regs
))
437 REST_SP (%sr4
, PT_SR4 (\regs
))
438 REST_SP (%sr5
, PT_SR5 (\regs
))
439 REST_SP (%sr6
, PT_SR6 (\regs
))
440 REST_SP (%sr7
, PT_SR7 (\regs
))
442 REST_CR (%cr17
, PT_IASQ0(\regs
))
443 REST_CR (%cr17
, PT_IASQ1(\regs
))
445 REST_CR (%cr18
, PT_IAOQ0(\regs
))
446 REST_CR (%cr18
, PT_IAOQ1(\regs
))
448 REST_CR (%cr11
, PT_SAR (\regs
))
450 REST_CR (%cr22
, PT_PSW (\regs
))
453 #endif /* __ASSEMBLY__ */